cyclic: Use schedule() instead of WATCHDOG_RESET()

Globally replace all occurances of WATCHDOG_RESET() with schedule(),
which handles the HW_WATCHDOG functionality and the cyclic
infrastructure.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
diff --git a/drivers/net/octeontx2/nix.c b/drivers/net/octeontx2/nix.c
index a5665a2..f596b6b 100644
--- a/drivers/net/octeontx2/nix.c
+++ b/drivers/net/octeontx2/nix.c
@@ -580,7 +580,7 @@
 		__iowmb();
 		result = lmt_submit((u64)(nix->nix_base +
 					       NIXX_LF_OP_SENDX(0)));
-		WATCHDOG_RESET();
+		schedule();
 	} while (result == 0);
 
 	return 0;
diff --git a/drivers/net/octeontx2/nix_af.c b/drivers/net/octeontx2/nix_af.c
index cd098d6..c945ea0 100644
--- a/drivers/net/octeontx2/nix_af.c
+++ b/drivers/net/octeontx2/nix_af.c
@@ -65,7 +65,7 @@
 	start = get_timer(0);
 	while ((res->s.compcode == NPA_AQ_COMP_E_NOTDONE) &&
 	       (get_timer(start) < 1000))
-		WATCHDOG_RESET();
+		schedule();
 	if (res->s.compcode != NPA_AQ_COMP_E_GOOD) {
 		printf("%s: Error: result 0x%x not good\n",
 		       __func__, res->s.compcode);
@@ -111,7 +111,7 @@
 	start = get_timer(0);
 	while ((res->s.compcode == NPA_AQ_COMP_E_NOTDONE) &&
 	       (get_timer(start) < 1000))
-		WATCHDOG_RESET();
+		schedule();
 
 	if (res->s.compcode != NPA_AQ_COMP_E_GOOD) {
 		printf("%s: Error: result 0x%x not good\n",
@@ -136,7 +136,7 @@
 
 	do {
 		lf_rst.u = npa_af_reg_read(npa_af, NPA_AF_LF_RST());
-		WATCHDOG_RESET();
+		schedule();
 	} while (lf_rst.s.exec);
 
 	/* Set Aura size and enable caching of contexts */
@@ -199,7 +199,7 @@
 		start = get_timer(0);
 		while ((res->s.compcode == NPA_AQ_COMP_E_NOTDONE) &&
 		       (get_timer(start) < 1000))
-			WATCHDOG_RESET();
+			schedule();
 
 		if (res->s.compcode != NPA_AQ_COMP_E_GOOD) {
 			printf("%s: Error: result 0x%x not good for lf %d\n"
@@ -235,7 +235,7 @@
 		start = get_timer(0);
 		while ((res->s.compcode == NPA_AQ_COMP_E_NOTDONE) &&
 		       (get_timer(start) < 1000))
-			WATCHDOG_RESET();
+			schedule();
 
 		if (res->s.compcode != NPA_AQ_COMP_E_GOOD) {
 			printf("%s: Error: result 0x%x not good for lf %d\n"
@@ -255,7 +255,7 @@
 
 	do {
 		lf_rst.u = npa_af_reg_read(npa, NPA_AF_LF_RST());
-		WATCHDOG_RESET();
+		schedule();
 	} while (lf_rst.s.exec);
 
 	return 0;
@@ -286,7 +286,7 @@
 	/* Wait for reset to complete */
 	do {
 		blk_rst.u = npa_af_reg_read(npa_af, NPA_AF_BLK_RST());
-		WATCHDOG_RESET();
+		schedule();
 	} while (blk_rst.s.busy);
 
 	/* Set little Endian */
@@ -318,7 +318,7 @@
 	/* Wait for reset to complete */
 	do {
 		blk_rst.u = npa_af_reg_read(npa_af, NPA_AF_BLK_RST());
-		WATCHDOG_RESET();
+		schedule();
 	} while (blk_rst.s.busy);
 
 	rvu_aq_free(&npa_af->aq);
@@ -481,7 +481,7 @@
 	start = get_timer(0);
 	/* Wait for completion */
 	do {
-		WATCHDOG_RESET();
+		schedule();
 		dsb();
 	} while (result->s.compcode == 0 && get_timer(start) < 2);
 
@@ -645,7 +645,7 @@
 
 	do {
 		lf_rst.u = nix_af_reg_read(nix_af, NIXX_AF_LF_RST());
-		WATCHDOG_RESET();
+		schedule();
 	} while (lf_rst.s.exec);
 
 	/* Config NIX RQ HW context and base*/
@@ -767,7 +767,7 @@
 
 	do {
 		sw_sync.u = nix_af_reg_read(nix_af, NIXX_AF_RX_SW_SYNC());
-		WATCHDOG_RESET();
+		schedule();
 	} while (sw_sync.s.ena);
 
 	for (index = 0; index < rq_count; index++) {
@@ -832,7 +832,7 @@
 
 	do {
 		lf_rst.u = nix_af_reg_read(nix_af, NIXX_AF_LF_RST());
-		WATCHDOG_RESET();
+		schedule();
 	} while (lf_rst.s.exec);
 
 	return 0;
@@ -972,7 +972,7 @@
 	/* Wait for reset to complete */
 	do {
 		blk_rst.u = npc_af_reg_read(nix_af, NPC_AF_BLK_RST());
-		WATCHDOG_RESET();
+		schedule();
 	} while (blk_rst.s.busy);
 
 	debug("%s: npc af reset --\n", __func__);
@@ -1008,7 +1008,7 @@
 	/* Wait for reset to complete */
 	do {
 		blk_rst.u = nix_af_reg_read(nix_af, NIXX_AF_BLK_RST());
-		WATCHDOG_RESET();
+		schedule();
 	} while (blk_rst.s.busy);
 
 	/* Put in LE mode */
@@ -1031,7 +1031,7 @@
 	/* Wait for calibration to complete */
 	do {
 		af_status.u = nix_af_reg_read(nix_af, NIXX_AF_STATUS());
-		WATCHDOG_RESET();
+		schedule();
 	} while (af_status.s.calibrate_done == 0);
 
 	af_cfg.u = nix_af_reg_read(nix_af, NIXX_AF_CFG());
@@ -1091,7 +1091,7 @@
 	/* Wait for reset to complete */
 	do {
 		blk_rst.u = nix_af_reg_read(nix_af, NIXX_AF_BLK_RST());
-		WATCHDOG_RESET();
+		schedule();
 	} while (blk_rst.s.busy);
 
 	rvu_aq_free(&nix_af->aq);