board: ls1012a: LS1012A-2G5RDB board support
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII
PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig
index 98231f9..d13b08e 100644
--- a/board/freescale/ls1012ardb/Kconfig
+++ b/board/freescale/ls1012ardb/Kconfig
@@ -15,3 +15,21 @@
source "board/freescale/common/Kconfig"
endif
+
+if TARGET_LS1012A2G5RDB
+
+config SYS_BOARD
+ default "ls1012ardb"
+
+config SYS_VENDOR
+ default "freescale"
+
+config SYS_SOC
+ default "fsl-layerscape"
+
+config SYS_CONFIG_NAME
+ default "ls1012a2g5rdb"
+
+source "board/freescale/common/Kconfig"
+
+endif
diff --git a/board/freescale/ls1012ardb/MAINTAINERS b/board/freescale/ls1012ardb/MAINTAINERS
index 2cb38e7..a0a0d8d 100644
--- a/board/freescale/ls1012ardb/MAINTAINERS
+++ b/board/freescale/ls1012ardb/MAINTAINERS
@@ -8,3 +8,10 @@
M: Sumit Garg <sumit.garg@nxp.com>
S: Maintained
F: configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
+
+LS1012A2G5RDB BOARD
+M: Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
+S: Maintained
+F: board/freescale/ls1012ardb/
+F: include/configs/ls1012a2g5rdb.h
+F: configs/ls1012a2g5rdb_qspi_defconfig
diff --git a/board/freescale/ls1012ardb/README b/board/freescale/ls1012ardb/README
index 453b432..572fd8c 100644
--- a/board/freescale/ls1012ardb/README
+++ b/board/freescale/ls1012ardb/README
@@ -52,3 +52,46 @@
U-boot Env | 1MB | 0x4020_0000
PPA FIT image | 2MB | 0x4050_0000
Linux ITB | ~53MB | 0x40A0_0000
+
+LS1012A2G5RDB board Overview
+-----------------------
+ - SERDES Connections, 3 lanes supporting:
+ - SGMII, SGMII 2.5
+ - SATA 3.0
+ - DDR Controller
+ - 16-bit, 1 GB DDR3L SDRAM memory, running at data rates up to 1 GT/s
+ -QSPI: A dual 1:3 switch, NX3L4357GM,115 (U35) drives the QSPI chip-select
+ signals to
+ - QSPI NOR flash memory
+ - USB 3.0
+ - one high-speed USB 2.0/3.0 port.
+ - SDIO WiFi, SPI
+ - 2 I2C controllers
+ - One SATA onboard connectors
+ - UART
+ - The LS1012A processor consists of two UART controllers,
+ out of which only UART1 is used on 2G5RDB.
+ - ARM JTAG support
+
+Major Difference between LS1012ARDB and LS1012A-2G5RDB
+------------------------------------------------------
+1. LS1012A-2G5RDB has Type C USB connector unlike USB Type A/B of LS1012ARDB
+2. LS1012A-2G5RDB has 2 2.5G AQR PHY unlike 2 1G Realtek RTL8211FS PHYs
+ of LS1012ARDB
+3. LS1012A-2G5RDB is not having Arduino header
+4. LS1012A-2G5RDB doesn't have PCI slot
+
+Booting Options
+---------------
+QSPI Flash
+
+QSPI flash map
+--------------
+Images | Size |QSPI Flash Address
+------------------------------------------
+RCW + PBI | 1MB | 0x4000_0000
+U-boot | 1MB | 0x4010_0000
+U-boot Env | 1MB | 0x4030_0000
+PPA FIT image | 2MB | 0x4040_0000
+PFE firmware | 20K | 0x00a0_0000
+Linux ITB | ~53MB | 0x4100_0000
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index 286f9d8..c9557bb 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -28,6 +28,7 @@
int checkboard(void)
{
+#ifdef CONFIG_TARGET_LS1012ARDB
u8 in1;
puts("Board: LS1012ARDB ");
@@ -77,7 +78,10 @@
puts(": bank2\n");
else
puts("unknown\n");
+#else
+ puts("Board: LS1012A2G5RDB ");
+#endif
return 0;
}
@@ -150,6 +154,7 @@
return 0;
}
+#ifdef CONFIG_TARGET_LS1012ARDB
int esdhc_status_fixup(void *blob, const char *compat)
{
char esdhc1_path[] = "/soc/esdhc@1580000";
@@ -193,7 +198,6 @@
if (mux_sdhc2 == 2 || mux_sdhc2 == 0)
sdhc2_en = true;
}
-
if (sdhc2_en)
do_fixup_by_path(blob, esdhc1_path, "status", "okay",
sizeof("okay"), 1);
@@ -202,6 +206,7 @@
sizeof("disabled"), 1);
return 0;
}
+#endif
int ft_board_setup(void *blob, bd_t *bd)
{