commit | 7f77e5f064262c66ca45c141176a3762f5733c2d | [log] [tgz] |
---|---|---|
author | Fabio Estevam <fabio.estevam@freescale.com> | Fri May 03 04:37:11 2013 +0000 |
committer | Stefano Babic <sbabic@denx.de> | Sun May 05 17:08:46 2013 +0200 |
tree | ceb20daff7109aa96bdf6876a0ac844a9df74dca | |
parent | 0541af823021e633ee444f2ce8110de8cdc94d63 [diff] |
mxs: spl_mem_init: Remove erroneous DDR setting On mx23 there is no 'DRAM init complete' in register HW_DRAM_CTL18. Remove this erroneous setting. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>