Patch by Markus Pietrek, 04 May 2004:
Fix clear_bss code for ARM systems (all except s3c44b0 which
doesn't clear BSS at all?)
diff --git a/CHANGELOG b/CHANGELOG
index 4cd62f6..82d977e 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,16 @@
Changes since U-Boot 1.1.1:
======================================================================
+* Patch by Markus Pietrek, 04 May 2004:
+ Fix clear_bss code for ARM systems (all except s3c44b0 which
+ doesn't clear BSS at all?)
+
+* Fix "ping" problem on INC-IP board. Strange problem:
+ Sometimes the store word instruction hangs while writing to one of
+ the Switch registers, but only if the next instruction is 16-byte
+ aligned. Moving the instruction into a separate function somehow
+ makes the problem go away.
+
* Patch by Rishi Bhattacharya, 08 May 2004:
Add support for TI OMAP5912 OSK Board
diff --git a/cpu/arm720t/start.S b/cpu/arm720t/start.S
index 791049a..f6ae9d6 100644
--- a/cpu/arm720t/start.S
+++ b/cpu/arm720t/start.S
@@ -154,7 +154,6 @@
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
- add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 49264da..0e372d0 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -191,7 +191,6 @@
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
- add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
diff --git a/cpu/arm925t/start.S b/cpu/arm925t/start.S
index da84de1..134a576 100644
--- a/cpu/arm925t/start.S
+++ b/cpu/arm925t/start.S
@@ -197,7 +197,6 @@
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
- add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
diff --git a/cpu/arm926ejs/start.S b/cpu/arm926ejs/start.S
index ad5d847..70be4de 100644
--- a/cpu/arm926ejs/start.S
+++ b/cpu/arm926ejs/start.S
@@ -172,7 +172,6 @@
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
- add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
diff --git a/cpu/at91rm9200/start.S b/cpu/at91rm9200/start.S
index b9b889a..d73af20 100644
--- a/cpu/at91rm9200/start.S
+++ b/cpu/at91rm9200/start.S
@@ -147,7 +147,6 @@
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
- add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
diff --git a/cpu/ixp/start.S b/cpu/ixp/start.S
index 09ecc73..9240b5c 100644
--- a/cpu/ixp/start.S
+++ b/cpu/ixp/start.S
@@ -289,7 +289,6 @@
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
- add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S
index de2a084..b1f6e7e 100644
--- a/cpu/pxa/start.S
+++ b/cpu/pxa/start.S
@@ -141,7 +141,6 @@
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
- add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
diff --git a/cpu/sa1100/start.S b/cpu/sa1100/start.S
index fe1316c..52f2c5d 100644
--- a/cpu/sa1100/start.S
+++ b/cpu/sa1100/start.S
@@ -154,7 +154,6 @@
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
- add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
diff --git a/drivers/inca-ip_sw.c b/drivers/inca-ip_sw.c
index f8fe52e..ab22b4d 100644
--- a/drivers/inca-ip_sw.c
+++ b/drivers/inca-ip_sw.c
@@ -41,13 +41,21 @@
#define DELAY udelay(10000)
+ /* Sometimes the store word instruction hangs while writing to one
+ * of the Switch registers. Moving the instruction into a separate
+ * function somehow makes the problem go away.
+ */
+static void SWORD(volatile u32 * reg, u32 value)
+{
+ *reg = value;
+}
#define DMA_WRITE_REG(reg, value) *((volatile u32 *)reg) = (u32)value;
#define DMA_READ_REG(reg, value) value = (u32)*((volatile u32*)reg)
#define SW_WRITE_REG(reg, value) \
- *((volatile u32*)reg) = (u32)value;\
+ SWORD(reg, value);\
DELAY;\
- *((volatile u32*)reg) = (u32)value;
+ SWORD(reg, value);
#define SW_READ_REG(reg, value) \
value = (u32)*((volatile u32*)reg);\