| commit | 7e9e68e6d862195da559f94e14d12d9cd67a6b7c | [log] [tgz] |
|---|---|---|
| author | Laurence Withers <lwithers@guralp.com> | Mon Jul 30 23:30:35 2012 +0000 |
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | Sat Sep 01 14:58:14 2012 +0200 |
| tree | 5842021210e1bded052f7a490a4d9aac58dac473 | |
| parent | f2edf564c3868d83872ee99ba210be1cd3203ad0 [diff] |
DaVinci DA850: UART2 clock ID comes from ASYNC3 On the DA830, UART2's clock is derived from PLL controller 0 output 2. On the DA850, it is in the ASYNC3 group, and may be switched between PLL controller 0 or 1. Fix the definition of the ID to match. Signed-off-by: Laurence Withers <lwithers@guralp.com> Cc: Tom Rini <trini@ti.com> Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>