commit 7e1cda6da1e900c83543796cae8d1594c01f94e8
author Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Wed Sep 10 22:48:06 2008 +0200
committer Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Wed Sep 10 22:48:06 2008 +0200
tree 9e0a45c86828b4549b77c7867320e867401d9c86
parent f80353bc7cb0d8cc25b89bc563b414c478d27440

rename CFG_ENV macros to CONFIG_ENV

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

include/configs/Alaska8220.h

diff --git a/include/configs/Alaska8220.h b/include/configs/Alaska8220.h
index 3b3c0bc..431ed4e 100644
--- a/include/configs/Alaska8220.h
+++ b/include/configs/Alaska8220.h
@@ -134,8 +134,8 @@
 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS	70
 /*
 #define CONFIG_ENV_IS_IN_EEPROM	1
-#define CFG_ENV_OFFSET		0
-#define CFG_ENV_SIZE		256
+#define CONFIG_ENV_OFFSET		0
+#define CONFIG_ENV_SIZE		256
 */
 
 /* If CFG_AMD_BOOT is defined, the the system will boot from AMD.
@@ -207,19 +207,19 @@
  */
 #define CONFIG_ENV_IS_IN_FLASH	1
 #if defined (CFG_AMD_BOOT)
-#define CFG_ENV_ADDR		(CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_AMD_SECT_SIZE)
-#define CFG_ENV_SIZE		PHYS_AMD_SECT_SIZE
-#define CFG_ENV_SECT_SIZE	PHYS_AMD_SECT_SIZE
-#define CFG_ENV1_ADDR		(CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_INTEL_SECT_SIZE)
-#define CFG_ENV1_SIZE		PHYS_INTEL_SECT_SIZE
-#define CFG_ENV1_SECT_SIZE	PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV_ADDR		(CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_AMD_SECT_SIZE)
+#define CONFIG_ENV_SIZE		PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE	PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV1_ADDR		(CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_INTEL_SECT_SIZE)
+#define CONFIG_ENV1_SIZE		PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV1_SECT_SIZE	PHYS_INTEL_SECT_SIZE
 #else
-#define CFG_ENV_ADDR		(CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_INTEL_SECT_SIZE)
-#define CFG_ENV_SIZE		PHYS_INTEL_SECT_SIZE
-#define CFG_ENV_SECT_SIZE	PHYS_INTEL_SECT_SIZE
-#define CFG_ENV1_ADDR		(CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_AMD_SECT_SIZE)
-#define CFG_ENV1_SIZE		PHYS_AMD_SECT_SIZE
-#define CFG_ENV1_SECT_SIZE	PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV_ADDR		(CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_INTEL_SECT_SIZE)
+#define CONFIG_ENV_SIZE		PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE	PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV1_ADDR		(CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_AMD_SECT_SIZE)
+#define CONFIG_ENV1_SIZE		PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV1_SECT_SIZE	PHYS_AMD_SECT_SIZE
 #endif
 
 #define CONFIG_ENV_OVERWRITE	1