diff --git a/arch/arm/dts/sama5d27_wlsom1.dtsi b/arch/arm/dts/sama5d27_wlsom1.dtsi
index 889a003..1c23b8c 100644
--- a/arch/arm/dts/sama5d27_wlsom1.dtsi
+++ b/arch/arm/dts/sama5d27_wlsom1.dtsi
@@ -41,36 +41,34 @@
 				};
 			};
 
-			pioA: gpio@fc038000 {
-				pinctrl {
-					pinctrl_macb0_phy_irq: macb0_phy_irq {
-						pinmux = <PIN_PB24__GPIO>;
-						bias-disable;
-					};
+			pioA: pinctrl@fc038000 {
+				pinctrl_macb0_phy_irq: macb0_phy_irq {
+					pinmux = <PIN_PB24__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_rmii: macb0_rmii {
-						pinmux = <PIN_PB14__GTXCK>,
-							 <PIN_PB15__GTXEN>,
-							 <PIN_PB16__GRXDV>,
-							 <PIN_PB17__GRXER>,
-							 <PIN_PB18__GRX0>,
-							 <PIN_PB19__GRX1>,
-							 <PIN_PB20__GTX0>,
-							 <PIN_PB21__GTX1>,
-							 <PIN_PB22__GMDC>,
-							 <PIN_PB23__GMDIO>;
-						bias-disable;
-					};
+				pinctrl_macb0_rmii: macb0_rmii {
+					pinmux = <PIN_PB14__GTXCK>,
+						 <PIN_PB15__GTXEN>,
+						 <PIN_PB16__GRXDV>,
+						 <PIN_PB17__GRXER>,
+						 <PIN_PB18__GRX0>,
+						 <PIN_PB19__GRX1>,
+						 <PIN_PB20__GTX0>,
+						 <PIN_PB21__GTX1>,
+						 <PIN_PB22__GMDC>,
+						 <PIN_PB23__GMDIO>;
+					bias-disable;
+				};
 
-					pinctrl_qspi1_default: qspi1_default {
-						pinmux = <PIN_PB5__QSPI1_SCK>,
-							 <PIN_PB6__QSPI1_CS>,
-							 <PIN_PB7__QSPI1_IO0>,
-							 <PIN_PB8__QSPI1_IO1>,
-							 <PIN_PB9__QSPI1_IO2>,
-							 <PIN_PB10__QSPI1_IO3>;
-						bias-pull-up;
-					};
+				pinctrl_qspi1_default: qspi1_default {
+					pinmux = <PIN_PB5__QSPI1_SCK>,
+						 <PIN_PB6__QSPI1_CS>,
+						 <PIN_PB7__QSPI1_IO0>,
+						 <PIN_PB8__QSPI1_IO1>,
+						 <PIN_PB9__QSPI1_IO2>,
+						 <PIN_PB10__QSPI1_IO3>;
+					bias-pull-up;
 				};
 			};
 		};