arm: dts: sync the Rockhip 3399 SoCs from Linux
Sync the rk3399 DTs and associated bits from 5.14-rc1.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
(Remove the conflict content for vmarc-som)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/arch/arm/dts/rk3399-nanopi4.dtsi b/arch/arm/dts/rk3399-nanopi4.dtsi
index c88018a..8c0ff6c 100644
--- a/arch/arm/dts/rk3399-nanopi4.dtsi
+++ b/arch/arm/dts/rk3399-nanopi4.dtsi
@@ -17,6 +17,12 @@
#include "rk3399-opp.dtsi"
/ {
+ aliases {
+ mmc0 = &sdio0;
+ mmc1 = &sdmmc;
+ mmc2 = &sdhci;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
@@ -117,9 +123,9 @@
leds: gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
- pinctrl-0 = <&leds_gpio>;
+ pinctrl-0 = <&status_led_pin>;
- status {
+ status_led: led-0 {
gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
label = "status_led";
linux,default-trigger = "heartbeat";
@@ -182,7 +188,7 @@
#address-cells = <1>;
#size-cells = <0>;
- rtl8211e: phy@1 {
+ rtl8211e: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
@@ -504,8 +510,6 @@
};
&pcie0 {
- ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
- max-link-speed = <2>;
num-lanes = <2>;
vpcie0v9-supply = <&vcca0v9_s3>;
vpcie1v8-supply = <&vcca1v8_s3>;
@@ -520,12 +524,12 @@
};
gpio-leds {
- leds_gpio: leds-gpio {
+ status_led_pin: status-led-pin {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
- phy {
+ gmac {
phy_intb: phy-intb {
rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};