Merge patch series "Apply SoM overlays on phyCORE-AM6xx SoMs"
Wadim Egorov <w.egorov@phytec.de> says:
Our SoMs are available in multiple configurations, managed via device
tree overlays. To determine the specific variant in use, we read the
EEPROM and apply the appropriate overlays during boot to the device tree
used by the OS.
Apply overlays for phyCORE-AM62x and phyCORE-AM64x SoMs.
Future K3 SoMs will be able to reuse this logic and overlays.
Link: https://lore.kernel.org/r/20241030164815.1763506-1-w.egorov@phytec.de
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 0aeda53..2164ad7 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -3,6 +3,7 @@
variables:
DEFAULT_TAG: ""
MIRROR_DOCKER: docker.io
+ SJG_LAB: ""
default:
tags:
@@ -16,6 +17,7 @@
stages:
- testsuites
- test.py
+ - sjg-lab
- world build
.buildman_and_testpy_template: &buildman_and_testpy_dfn
@@ -521,3 +523,158 @@
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
+
+.lab_template: &lab_dfn
+ stage: sjg-lab
+ rules:
+ - if: $SJG_LAB == "1"
+ when: always
+ - if: $SJG_LAB != "1"
+ when: manual
+ allow_failure: true
+ tags: [ 'lab' ]
+ script:
+ - if [[ -z "${SJG_LAB}" ]]; then
+ exit 0;
+ fi
+ # Environment:
+ # SRC - source tree
+ # OUT - output directory for builds
+ - export SRC="$(pwd)"
+ - export OUT="${SRC}/build/${BOARD}"
+ - export PATH=$PATH:~/bin
+ - export PATH=$PATH:/vid/software/devel/ubtest/u-boot-test-hooks/bin
+
+ # Load it on the device
+ - ret=0
+ - echo "role ${ROLE}"
+ - export strategy="-s uboot -e off"
+ - export USE_LABGRID_SJG=1
+ # export verbose="-v"
+ - ${SRC}/test/py/test.py --role ${ROLE} --build-dir "${OUT}"
+ --capture=tee-sys -k "not bootstd" || ret=$?
+ - U_BOOT_BOARD_IDENTITY="${ROLE}" u-boot-test-release || true
+ - if [[ $ret -ne 0 ]]; then
+ exit $ret;
+ fi
+ artifacts:
+ when: always
+ paths:
+ - "build/${BOARD}/test-log.html"
+ - "build/${BOARD}/multiplexed_log.css"
+ expire_in: 1 week
+
+rpi3:
+ variables:
+ ROLE: rpi3
+ <<: *lab_dfn
+
+opi_pc:
+ variables:
+ ROLE: opi_pc
+ <<: *lab_dfn
+
+pcduino3_nano:
+ variables:
+ ROLE: pcduino3_nano
+ <<: *lab_dfn
+
+samus:
+ variables:
+ ROLE: samus
+ <<: *lab_dfn
+
+link:
+ variables:
+ ROLE: link
+ <<: *lab_dfn
+
+jerry:
+ variables:
+ ROLE: jerry
+ <<: *lab_dfn
+
+minnowmax:
+ variables:
+ ROLE: minnowmax
+ <<: *lab_dfn
+
+opi_pc2:
+ variables:
+ ROLE: opi_pc2
+ <<: *lab_dfn
+
+bpi:
+ variables:
+ ROLE: bpi
+ <<: *lab_dfn
+
+rpi2:
+ variables:
+ ROLE: rpi2
+ <<: *lab_dfn
+
+bob:
+ variables:
+ ROLE: bob
+ <<: *lab_dfn
+
+ff3399:
+ variables:
+ ROLE: ff3399
+ <<: *lab_dfn
+
+coral:
+ variables:
+ ROLE: coral
+ <<: *lab_dfn
+
+rpi3z:
+ variables:
+ ROLE: rpi3z
+ <<: *lab_dfn
+
+bbb:
+ variables:
+ ROLE: bbb
+ <<: *lab_dfn
+
+kevin:
+ variables:
+ ROLE: kevin
+ <<: *lab_dfn
+
+pine64:
+ variables:
+ ROLE: pine64
+ <<: *lab_dfn
+
+c4:
+ variables:
+ ROLE: c4
+ <<: *lab_dfn
+
+rpi4:
+ variables:
+ ROLE: rpi4
+ <<: *lab_dfn
+
+rpi0:
+ variables:
+ ROLE: rpi0
+ <<: *lab_dfn
+
+snow:
+ variables:
+ ROLE: snow
+ <<: *lab_dfn
+
+pcduino3:
+ variables:
+ ROLE: pcduino3
+ <<: *lab_dfn
+
+nyan-big:
+ variables:
+ ROLE: nyan-big
+ <<: *lab_dfn
diff --git a/.readthedocs.yml b/.readthedocs.yml
index 7c6c255..16418f2 100644
--- a/.readthedocs.yml
+++ b/.readthedocs.yml
@@ -6,11 +6,11 @@
version: 2
build:
- os: "ubuntu-20.04"
+ os: "ubuntu-24.04"
apt_packages:
- python3-six
tools:
- python: "3.9"
+ python: "3.12"
# Build documentation in the docs/ directory with Sphinx
sphinx:
diff --git a/MAINTAINERS b/MAINTAINERS
index 38c714c..452ec44 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -58,6 +58,13 @@
F: include/acpi/
F: lib/acpi/
+ALIST:
+M: Simon Glass <sjg@chromium.org>
+S: Maintained
+F: include/alist.h
+F: lib/alist.c
+F: test/lib/alist.c
+
ANDROID AB
M: Igor Opaniuk <igor.opaniuk@gmail.com>
M: Mattijs Korpershoek <mkorpershoek@baylibre.com>
@@ -1544,6 +1551,7 @@
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: arch/sandbox/
+F: configs/sandbox*
F: doc/arch/sandbox.rst
F: drivers/*/*sandbox*.c
F: include/dt-bindings/*/sandbox*.h
@@ -1604,6 +1612,7 @@
SPI-NOR
M: Jagan Teki <jagan@amarulasolutions.com>
M: Vignesh R <vigneshr@ti.com>
+R: Tudor Ambarus <tudor.ambarus@linaro.org>
S: Maintained
F: drivers/mtd/spi/
F: include/spi_flash.h
diff --git a/Makefile b/Makefile
index 7275a02..da742ce 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
VERSION = 2025
PATCHLEVEL = 01
SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc2
NAME =
# *DOCUMENTATION*
@@ -1398,7 +1398,8 @@
--toolpath $(objtree)/tools \
$(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \
build -u -d u-boot.dtb -O . -m \
- --allow-missing $(if $(BINMAN_ALLOW_MISSING),--ignore-missing) \
+ --allow-missing --fake-ext-blobs \
+ $(if $(BINMAN_ALLOW_MISSING),--ignore-missing) \
-I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \
$(foreach f,$(of_list_dirs),-I $(f)) -a of-list=$(of_list) \
$(foreach f,$(BINMAN_INDIRS),-I $(f)) \
diff --git a/arch/Kconfig b/arch/Kconfig
index 8f1f466..6258788 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -8,6 +8,11 @@
config HAVE_ARCH_IOREMAP
bool
+config HAVE_SETJMP
+ bool
+ help
+ The architecture supports setjmp() and longjmp().
+
config SUPPORT_BIG_ENDIAN
bool
@@ -73,6 +78,7 @@
config ARM
bool "ARM architecture"
+ select HAVE_SETJMP
select ARCH_SUPPORTS_LTO
select CREATE_ARCH_SYMLINK
select HAVE_PRIVATE_LIBGCC if !ARM64
@@ -129,6 +135,7 @@
config RISCV
bool "RISC-V architecture"
select CREATE_ARCH_SYMLINK
+ select HAVE_SETJMP
select SUPPORT_ACPI
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
@@ -154,6 +161,7 @@
config SANDBOX
bool "Sandbox"
+ select HAVE_SETJMP
select ARCH_SUPPORTS_LTO
select BOARD_LATE_INIT
select BZIP2
@@ -212,7 +220,8 @@
imply VIRTIO_MMIO
imply VIRTIO_PCI
imply VIRTIO_SANDBOX
- imply VIRTIO_BLK
+ # Re-enable this when fully implemented
+ # imply VIRTIO_BLK
imply VIRTIO_NET
imply DM_SOUND
imply PCI_SANDBOX_EP
@@ -248,6 +257,7 @@
config X86
bool "x86 architecture"
+ select HAVE_SETJMP
select SUPPORT_SPL
select SUPPORT_TPL
select SUPPORT_LITTLE_ENDIAN
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 787f983..7282c41 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1398,6 +1398,8 @@
select DM_SERIAL
select DM_MMC
select DM_GPIO
+ imply OF_HAS_PRIOR_STAGE
+ imply MISC_INIT_R
config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index aeccfa9..042282f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -778,8 +778,6 @@
imx6dl-cubox-i.dtb \
imx6dl-cubox-i-emmc-som-v15.dtb \
imx6dl-cubox-i-som-v15.dtb \
- imx6dl-dhcom-pdk2.dtb \
- imx6dl-dhcom-picoitx.dts \
imx6dl-gw51xx.dtb \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
@@ -811,8 +809,7 @@
imx6dl-sabreauto.dtb \
imx6dl-sabresd.dtb \
imx6dl-sielaff.dtb \
- imx6dl-wandboard-revd1.dtb \
- imx6s-dhcom-drc02.dtb
+ imx6dl-wandboard-revd1.dtb
endif
@@ -824,7 +821,6 @@
imx6q-cubox-i.dtb \
imx6q-cubox-i-emmc-som-v15.dtb \
imx6q-cubox-i-som-v15.dtb \
- imx6q-dhcom-pdk2.dtb \
imx6q-display5.dtb \
imx6q-gw51xx.dtb \
imx6q-gw52xx.dtb \
@@ -979,9 +975,6 @@
imxrt1020-evk.dtb \
imxrt1170-evk.dtb \
-dtb-$(CONFIG_TARGET_RZG2L) += \
- r9a07g044l2-smarc.dts
-
ifdef CONFIG_RCAR_64
DTC_FLAGS += -R 4 -p 0x1000
endif
diff --git a/arch/arm/dts/imx6dl-dhcom-pdk2.dts b/arch/arm/dts/imx6dl-dhcom-pdk2.dts
deleted file mode 100644
index d596874..0000000
--- a/arch/arm/dts/imx6dl-dhcom-pdk2.dts
+++ /dev/null
@@ -1,15 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+)
-/*
- * Copyright (C) 2019 DH electronics GmbH
- */
-
-/dts-v1/;
-
-#include "imx6dl.dtsi"
-#include "imx6qdl-dhcom-som.dtsi"
-#include "imx6qdl-dhcom-pdk2.dtsi"
-
-/ {
- model = "Freescale i.MX6 Duallite/Solo DHCOM Premium Developer Kit (2)";
- compatible = "dh,imx6dl-dhcom-pdk2", "dh,imx6dl-dhcom", "fsl,imx6dl";
-};
diff --git a/arch/arm/dts/imx6dl-dhcom-picoitx.dts b/arch/arm/dts/imx6dl-dhcom-picoitx.dts
deleted file mode 100644
index 038bb00..0000000
--- a/arch/arm/dts/imx6dl-dhcom-picoitx.dts
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2021 DH electronics GmbH
- *
- * DHCOM iMX6 variant:
- * DHCM-iMX6DL-C0800-R102-F0819-E-SD-RTC-T-HS-I-01D2
- * DHCOM PCB number: 493-300 or newer
- * PicoITX PCB number: 487-600 or newer
- */
-/dts-v1/;
-
-#include "imx6dl.dtsi"
-#include "imx6qdl-dhcom-som.dtsi"
-#include "imx6qdl-dhcom-picoitx.dtsi"
-
-/ {
- model = "DH electronics i.MX6DL DHCOM on PicoITX";
- compatible = "dh,imx6dl-dhcom-picoitx", "dh,imx6dl-dhcom-som",
- "fsl,imx6dl";
-};
diff --git a/arch/arm/dts/imx6q-dhcom-pdk2.dts b/arch/arm/dts/imx6q-dhcom-pdk2.dts
deleted file mode 100644
index d4d5737..0000000
--- a/arch/arm/dts/imx6q-dhcom-pdk2.dts
+++ /dev/null
@@ -1,25 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2015-2021 DH electronics GmbH
- * Copyright (C) 2018 Marek Vasut <marex@denx.de>
- *
- * DHCOM iMX6 variant:
- * DHCM-iMX6Q-C0800-R102-F0819-E-SD-RTC-T-HS-I-01D2
- * DHCOM PCB number: 493-300 or newer
- * PDK2 PCB number: 516-400 or newer
- */
-/dts-v1/;
-
-#include "imx6q.dtsi"
-#include "imx6qdl-dhcom-som.dtsi"
-#include "imx6qdl-dhcom-pdk2.dtsi"
-
-/ {
- model = "DH electronics i.MX6Q DHCOM on Premium Developer Kit (2)";
- compatible = "dh,imx6q-dhcom-pdk2", "dh,imx6q-dhcom-som",
- "fsl,imx6q";
-};
-
-&sata {
- status = "okay";
-};
diff --git a/arch/arm/dts/imx6s-dhcom-drc02.dts b/arch/arm/dts/imx6s-dhcom-drc02.dts
deleted file mode 100644
index 4077b60..0000000
--- a/arch/arm/dts/imx6s-dhcom-drc02.dts
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2021 DH electronics GmbH
- *
- * DHCOM iMX6 variant:
- * DHCM-iMX6S-C0800-R102-F0409-E-CAN2-RTC-I-01D2
- * DHCOM PCB number: 493-400 or newer
- * DRC02 PCB number: 568-100 or newer
- */
-/dts-v1/;
-
-/*
- * The kernel only distinguishes between i.MX6 Quad and DualLite,
- * but the Solo is actually a DualLite with only one CPU. So use
- * DualLite for the Solo and disable one CPU node.
- */
-
-#include "imx6dl.dtsi"
-#include "imx6qdl-dhcom-som.dtsi"
-#include "imx6qdl-dhcom-drc02.dtsi"
-
-/ {
- model = "DH electronics i.MX6S DHCOM on DRC02";
- compatible = "dh,imx6s-dhcom-drc02", "dh,imx6s-dhcom-som",
- "fsl,imx6dl";
-
- cpus {
- /delete-node/ cpu@1;
- };
-};
diff --git a/arch/arm/dts/k3-am69-r5-sk.dts b/arch/arm/dts/k3-am69-r5-sk.dts
index 13809f8..9c6e324 100644
--- a/arch/arm/dts/k3-am69-r5-sk.dts
+++ b/arch/arm/dts/k3-am69-r5-sk.dts
@@ -9,105 +9,4 @@
#include "k3-j784s4-ddr-evm-lp4-4266.dtsi"
#include "k3-j784s4-ddr.dtsi"
#include "k3-am69-sk-u-boot.dtsi"
-
-/ {
- chosen {
- tick-timer = &mcu_timer0;
- };
-
- aliases {
- remoteproc0 = &sysctrler;
- remoteproc1 = &a72_0;
- };
-
- a72_0: a72@0 {
- compatible = "ti,am654-rproc";
- reg = <0x0 0x00a90000 0x0 0x10>;
- power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
- <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
- resets = <&k3_reset 202 0>;
- clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
- clock-names = "gtc", "core";
- assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
- assigned-clock-parents = <&k3_clks 61 2>;
- assigned-clock-rates = <200000000>, <2000000000>;
- ti,sci = <&sms>;
- ti,sci-proc-id = <32>;
- ti,sci-host-id = <10>;
- bootph-pre-ram;
- };
-
- dm_tifs: dm-tifs {
- compatible = "ti,j721e-dm-sci";
- ti,host-id = <3>;
- ti,secure-host;
- mbox-names = "rx", "tx";
- mboxes= <&secure_proxy_mcu 21>, <&secure_proxy_mcu 23>;
- bootph-pre-ram;
- };
-};
-
-&mcu_timer0 {
- status = "okay";
- clock-frequency = <250000000>;
- bootph-pre-ram;
-};
-
-&secure_proxy_sa3 {
- status = "okay";
- bootph-pre-ram;
-};
-
-&secure_proxy_mcu {
- status = "okay";
- bootph-pre-ram;
-};
-
-&cbass_mcu_wakeup {
- sysctrler: sysctrler {
- compatible = "ti,am654-system-controller";
- mboxes= <&secure_proxy_mcu 4>,
- <&secure_proxy_mcu 5>,
- <&secure_proxy_sa3 5>;
- mbox-names = "tx", "rx", "boot_notify";
- bootph-pre-ram;
- };
-};
-
-&sms {
- mboxes= <&secure_proxy_mcu 8>, <&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
- mbox-names = "tx", "rx", "notify";
- ti,host-id = <4>;
- ti,secure-host;
- bootph-pre-ram;
-};
-
-/* WKUP UART0 is used for DM firmware logs */
-&wkup_uart0 {
- bootph-pre-ram;
- status = "okay";
-};
-
-&ospi0 {
- reg = <0x0 0x47040000 0x0 0x100>,
- <0x0 0x50000000 0x0 0x8000000>;
-};
-
-&ospi1 {
- reg = <0x0 0x47050000 0x0 0x100>,
- <0x0 0x58000000 0x0 0x8000000>;
-};
-
-&fss {
- /* enable ranges missing from the FSS node */
- ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
- <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
-};
-
-&mcu_ringacc {
- ti,sci = <&dm_tifs>;
-};
-
-&mcu_udmap {
- ti,sci = <&dm_tifs>;
-};
+#include "k3-j784s4-r5.dtsi"
diff --git a/arch/arm/dts/k3-j784s4-r5-evm.dts b/arch/arm/dts/k3-j784s4-r5-evm.dts
index 8b8b0e7..0eeffa7 100644
--- a/arch/arm/dts/k3-j784s4-r5-evm.dts
+++ b/arch/arm/dts/k3-j784s4-r5-evm.dts
@@ -9,105 +9,4 @@
#include "k3-j784s4-ddr-evm-lp4-4266.dtsi"
#include "k3-j784s4-ddr.dtsi"
#include "k3-j784s4-evm-u-boot.dtsi"
-
-/ {
- chosen {
- tick-timer = &mcu_timer0;
- };
-
- aliases {
- remoteproc0 = &sysctrler;
- remoteproc1 = &a72_0;
- };
-
- a72_0: a72@0 {
- compatible = "ti,am654-rproc";
- reg = <0x0 0x00a90000 0x0 0x10>;
- power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
- <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
- resets = <&k3_reset 202 0>;
- clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
- clock-names = "gtc", "core";
- assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
- assigned-clock-parents = <&k3_clks 61 2>;
- assigned-clock-rates = <200000000>, <2000000000>;
- ti,sci = <&sms>;
- ti,sci-proc-id = <32>;
- ti,sci-host-id = <10>;
- bootph-pre-ram;
- };
-
- dm_tifs: dm-tifs {
- compatible = "ti,j721e-dm-sci";
- ti,host-id = <3>;
- ti,secure-host;
- mbox-names = "rx", "tx";
- mboxes= <&secure_proxy_mcu 21>, <&secure_proxy_mcu 23>;
- bootph-pre-ram;
- };
-};
-
-&mcu_timer0 {
- status = "okay";
- clock-frequency = <250000000>;
- bootph-pre-ram;
-};
-
-&secure_proxy_sa3 {
- status = "okay";
- bootph-pre-ram;
-};
-
-&secure_proxy_mcu {
- status = "okay";
- bootph-pre-ram;
-};
-
-&cbass_mcu_wakeup {
- sysctrler: sysctrler {
- compatible = "ti,am654-system-controller";
- mboxes= <&secure_proxy_mcu 4>,
- <&secure_proxy_mcu 5>,
- <&secure_proxy_sa3 5>;
- mbox-names = "tx", "rx", "boot_notify";
- bootph-pre-ram;
- };
-};
-
-&sms {
- mboxes= <&secure_proxy_mcu 8>, <&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
- mbox-names = "tx", "rx", "notify";
- ti,host-id = <4>;
- ti,secure-host;
- bootph-pre-ram;
-};
-
-/* WKUP UART0 is used for DM firmware logs */
-&wkup_uart0 {
- bootph-pre-ram;
- status = "okay";
-};
-
-&ospi0 {
- reg = <0x0 0x47040000 0x0 0x100>,
- <0x0 0x50000000 0x0 0x8000000>;
-};
-
-&ospi1 {
- reg = <0x0 0x47050000 0x0 0x100>,
- <0x0 0x58000000 0x0 0x8000000>;
-};
-
-&fss {
- /* enable ranges missing from the FSS node */
- ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
- <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
-};
-
-&mcu_ringacc {
- ti,sci = <&dm_tifs>;
-};
-
-&mcu_udmap {
- ti,sci = <&dm_tifs>;
-};
+#include "k3-j784s4-r5.dtsi"
diff --git a/arch/arm/dts/k3-j784s4-r5.dtsi b/arch/arm/dts/k3-j784s4-r5.dtsi
new file mode 100644
index 0000000..0cd0ccc
--- /dev/null
+++ b/arch/arm/dts/k3-j784s4-r5.dtsi
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ chosen {
+ tick-timer = &mcu_timer0;
+ };
+
+ aliases {
+ remoteproc0 = &sysctrler;
+ remoteproc1 = &a72_0;
+ };
+
+ a72_0: a72@0 {
+ compatible = "ti,am654-rproc";
+ reg = <0x0 0x00a90000 0x0 0x10>;
+ power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
+ <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
+ resets = <&k3_reset 202 0>;
+ clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
+ clock-names = "gtc", "core";
+ assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
+ assigned-clock-parents = <&k3_clks 61 2>;
+ assigned-clock-rates = <200000000>, <2000000000>;
+ ti,sci = <&sms>;
+ ti,sci-proc-id = <32>;
+ ti,sci-host-id = <10>;
+ bootph-pre-ram;
+ };
+
+ dm_tifs: dm-tifs {
+ compatible = "ti,j721e-dm-sci";
+ ti,host-id = <3>;
+ ti,secure-host;
+ mbox-names = "rx", "tx";
+ mboxes= <&secure_proxy_mcu 21>, <&secure_proxy_mcu 23>;
+ bootph-pre-ram;
+ };
+};
+
+&mcu_timer0 {
+ status = "okay";
+ clock-frequency = <250000000>;
+ bootph-pre-ram;
+};
+
+&secure_proxy_sa3 {
+ status = "okay";
+ bootph-pre-ram;
+};
+
+&secure_proxy_mcu {
+ status = "okay";
+ bootph-pre-ram;
+};
+
+&cbass_mcu_wakeup {
+ sysctrler: sysctrler {
+ compatible = "ti,am654-system-controller";
+ mboxes= <&secure_proxy_mcu 4>,
+ <&secure_proxy_mcu 5>,
+ <&secure_proxy_sa3 5>;
+ mbox-names = "tx", "rx", "boot_notify";
+ bootph-pre-ram;
+ };
+};
+
+&sms {
+ mboxes= <&secure_proxy_mcu 8>, <&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
+ mbox-names = "tx", "rx", "notify";
+ ti,host-id = <4>;
+ ti,secure-host;
+ bootph-pre-ram;
+};
+
+/* WKUP UART0 is used for DM firmware logs */
+&wkup_uart0 {
+ bootph-pre-ram;
+ status = "okay";
+};
+
+&ospi0 {
+ reg = <0x0 0x47040000 0x0 0x100>,
+ <0x0 0x50000000 0x0 0x8000000>;
+};
+
+&ospi1 {
+ reg = <0x0 0x47050000 0x0 0x100>,
+ <0x0 0x58000000 0x0 0x8000000>;
+};
+
+&fss {
+ /* enable ranges missing from the FSS node */
+ ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
+ <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
+};
+
+&mcu_ringacc {
+ ti,sci = <&dm_tifs>;
+};
+
+&mcu_udmap {
+ ti,sci = <&dm_tifs>;
+};
diff --git a/arch/arm/dts/r8a774a1-hihope-rzg2m-ex-u-boot.dtsi b/arch/arm/dts/r8a774a1-hihope-rzg2m-ex-u-boot.dtsi
new file mode 100644
index 0000000..dd5a208
--- /dev/null
+++ b/arch/arm/dts/r8a774a1-hihope-rzg2m-ex-u-boot.dtsi
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the Hihope RZ/G2M board
+ *
+ * Copyright (C) 2021-2024 Renesas Electronics Corporation
+ */
+
+#include "r8a774a1-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dtsi b/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dtsi
deleted file mode 100644
index 3ad619b..0000000
--- a/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dtsi
+++ /dev/null
@@ -1,26 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot for the Hihope RZ/G2M board
- *
- * Copyright (C) 2021 Renesas Electronics Corporation
- */
-
-#include "r8a774a1-u-boot.dtsi"
-
-&gpio3 {
- bt_reg_on{
- gpio-hog;
- gpios = <13 GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "bt-reg-on";
- };
-};
-
-&gpio4 {
- wlan_reg_on{
- gpio-hog;
- gpios = <6 GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "wlan-reg-on";
- };
-};
diff --git a/arch/arm/dts/r8a774a1-u-boot.dtsi b/arch/arm/dts/r8a774a1-u-boot.dtsi
index 38f5bfe..3530eeb 100644
--- a/arch/arm/dts/r8a774a1-u-boot.dtsi
+++ b/arch/arm/dts/r8a774a1-u-boot.dtsi
@@ -10,45 +10,3 @@
&extalr_clk {
bootph-all;
};
-
-/delete-node/ &audma0;
-/delete-node/ &audma1;
-/delete-node/ &can0;
-/delete-node/ &can1;
-/delete-node/ &canfd;
-/delete-node/ &csi20;
-/delete-node/ &csi40;
-/delete-node/ &du;
-/delete-node/ &fcpf0;
-/delete-node/ &fcpvb0;
-/delete-node/ &fcpvd0;
-/delete-node/ &fcpvd1;
-/delete-node/ &fcpvd2;
-/delete-node/ &fcpvi0;
-/delete-node/ &hdmi0;
-/delete-node/ &lvds0;
-/delete-node/ &rcar_sound;
-/delete-node/ &sound_card;
-/delete-node/ &vin0;
-/delete-node/ &vin1;
-/delete-node/ &vin2;
-/delete-node/ &vin3;
-/delete-node/ &vin4;
-/delete-node/ &vin5;
-/delete-node/ &vin6;
-/delete-node/ &vin7;
-/delete-node/ &vspb;
-/delete-node/ &vspd0;
-/delete-node/ &vspd1;
-/delete-node/ &vspd2;
-/delete-node/ &vspi0;
-
-/ {
- /delete-node/ hdmi0-out;
-};
-
-/ {
- soc {
- /delete-node/ fdp1@fe940000;
- };
-};
diff --git a/arch/arm/dts/r8a774b1-hihope-rzg2n-ex-u-boot.dtsi b/arch/arm/dts/r8a774b1-hihope-rzg2n-ex-u-boot.dtsi
new file mode 100644
index 0000000..b378cab
--- /dev/null
+++ b/arch/arm/dts/r8a774b1-hihope-rzg2n-ex-u-boot.dtsi
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the Hihope RZ/G2N board
+ *
+ * Copyright (C) 2021-2024 Renesas Electronics Corp.
+ */
+
+#include "r8a774b1-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dtsi b/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dtsi
deleted file mode 100644
index 6f2f6c7..0000000
--- a/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dtsi
+++ /dev/null
@@ -1,26 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot for the Hihope RZ/G2N board
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- */
-
-#include "r8a774b1-u-boot.dtsi"
-
-&gpio3 {
- bt_reg_on{
- gpio-hog;
- gpios = <13 GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "bt-reg-on";
- };
-};
-
-&gpio4 {
- wlan_reg_on{
- gpio-hog;
- gpios = <6 GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "wlan-reg-on";
- };
-};
diff --git a/arch/arm/dts/r8a774b1-u-boot.dtsi b/arch/arm/dts/r8a774b1-u-boot.dtsi
index d4890eb..07aeabc 100644
--- a/arch/arm/dts/r8a774b1-u-boot.dtsi
+++ b/arch/arm/dts/r8a774b1-u-boot.dtsi
@@ -10,43 +10,3 @@
&extalr_clk {
bootph-all;
};
-
-/delete-node/ &audma0;
-/delete-node/ &audma1;
-/delete-node/ &can0;
-/delete-node/ &can1;
-/delete-node/ &canfd;
-/delete-node/ &csi20;
-/delete-node/ &csi40;
-/delete-node/ &du;
-/delete-node/ &fcpf0;
-/delete-node/ &fcpvb0;
-/delete-node/ &fcpvd0;
-/delete-node/ &fcpvd1;
-/delete-node/ &fcpvi0;
-/delete-node/ &hdmi0;
-/delete-node/ &lvds0;
-/delete-node/ &rcar_sound;
-/delete-node/ &sound_card;
-/delete-node/ &vin0;
-/delete-node/ &vin1;
-/delete-node/ &vin2;
-/delete-node/ &vin3;
-/delete-node/ &vin4;
-/delete-node/ &vin5;
-/delete-node/ &vin6;
-/delete-node/ &vin7;
-/delete-node/ &vspb;
-/delete-node/ &vspd0;
-/delete-node/ &vspd1;
-/delete-node/ &vspi0;
-
-/ {
- /delete-node/ hdmi0-out;
-};
-
-/ {
- soc {
- /delete-node/ fdp1@fe940000;
- };
-};
diff --git a/arch/arm/dts/r8a774e1-hihope-rzg2h-ex-u-boot.dtsi b/arch/arm/dts/r8a774e1-hihope-rzg2h-ex-u-boot.dtsi
new file mode 100644
index 0000000..560bea4
--- /dev/null
+++ b/arch/arm/dts/r8a774e1-hihope-rzg2h-ex-u-boot.dtsi
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the Hihope RZ/G2H board
+ *
+ * Copyright (C) 2020-2024 Renesas Electronics Corp.
+ */
+
+#include "r8a774e1-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dtsi b/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dtsi
deleted file mode 100644
index 8e57e03..0000000
--- a/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dtsi
+++ /dev/null
@@ -1,26 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot for the Hihope RZ/G2H board
- *
- * Copyright (C) 2020 Renesas Electronics Corp.
- */
-
-#include "r8a774e1-u-boot.dtsi"
-
-&gpio3 {
- bt_reg_on{
- gpio-hog;
- gpios = <13 GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "bt-reg-on";
- };
-};
-
-&gpio4 {
- wlan_reg_on{
- gpio-hog;
- gpios = <6 GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "wlan-reg-on";
- };
-};
diff --git a/arch/arm/dts/r8a774e1-u-boot.dtsi b/arch/arm/dts/r8a774e1-u-boot.dtsi
index 45ef5b7..2202731 100644
--- a/arch/arm/dts/r8a774e1-u-boot.dtsi
+++ b/arch/arm/dts/r8a774e1-u-boot.dtsi
@@ -10,49 +10,3 @@
&extalr_clk {
bootph-all;
};
-
-/delete-node/ &audma0;
-/delete-node/ &audma1;
-/delete-node/ &can0;
-/delete-node/ &can1;
-/delete-node/ &canfd;
-/delete-node/ &csi20;
-/delete-node/ &csi40;
-/delete-node/ &du;
-/delete-node/ &fcpf0;
-/delete-node/ &fcpf1;
-/delete-node/ &fcpvb0;
-/delete-node/ &fcpvb1;
-/delete-node/ &fcpvd0;
-/delete-node/ &fcpvd1;
-/delete-node/ &fcpvi0;
-/delete-node/ &fcpvi1;
-/delete-node/ &hdmi0;
-/delete-node/ &lvds0;
-/delete-node/ &rcar_sound;
-/delete-node/ &sound_card;
-/delete-node/ &vin0;
-/delete-node/ &vin1;
-/delete-node/ &vin2;
-/delete-node/ &vin3;
-/delete-node/ &vin4;
-/delete-node/ &vin5;
-/delete-node/ &vin6;
-/delete-node/ &vin7;
-/delete-node/ &vspbc;
-/delete-node/ &vspbd;
-/delete-node/ &vspd0;
-/delete-node/ &vspd1;
-/delete-node/ &vspi0;
-/delete-node/ &vspi1;
-
-/ {
- /delete-node/ hdmi0-out;
-};
-
-/ {
- soc {
- /delete-node/ fdp1@fe940000;
- /delete-node/ fdp1@fe944000;
- };
-};
diff --git a/arch/arm/dts/r9a07g044.dtsi b/arch/arm/dts/r9a07g044.dtsi
deleted file mode 100644
index 66f68fc..0000000
--- a/arch/arm/dts/r9a07g044.dtsi
+++ /dev/null
@@ -1,1273 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-/*
- * Device Tree Source for the RZ/G2L and RZ/G2LC common SoC parts
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/r9a07g044-cpg.h>
-
-/ {
- compatible = "renesas,r9a07g044";
- #address-cells = <2>;
- #size-cells = <2>;
-
- audio_clk1: audio1-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by boards that provide it */
- clock-frequency = <0>;
- };
-
- audio_clk2: audio2-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by boards that provide it */
- clock-frequency = <0>;
- };
-
- /* External CAN clock - to be overridden by boards that provide it */
- can_clk: can-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /* clock can be either from exclk or crystal oscillator (XIN/XOUT) */
- extal_clk: extal-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board */
- clock-frequency = <0>;
- };
-
- cluster0_opp: opp-table-0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-150000000 {
- opp-hz = /bits/ 64 <150000000>;
- opp-microvolt = <1100000>;
- clock-latency-ns = <300000>;
- };
- opp-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- opp-microvolt = <1100000>;
- clock-latency-ns = <300000>;
- };
- opp-600000000 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <1100000>;
- clock-latency-ns = <300000>;
- };
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <1100000>;
- clock-latency-ns = <300000>;
- opp-suspend;
- };
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&cpu0>;
- };
- core1 {
- cpu = <&cpu1>;
- };
- };
- };
-
- cpu0: cpu@0 {
- compatible = "arm,cortex-a55";
- reg = <0>;
- device_type = "cpu";
- #cooling-cells = <2>;
- next-level-cache = <&L3_CA55>;
- enable-method = "psci";
- clocks = <&cpg CPG_CORE R9A07G044_CLK_I>;
- operating-points-v2 = <&cluster0_opp>;
- };
-
- cpu1: cpu@100 {
- compatible = "arm,cortex-a55";
- reg = <0x100>;
- device_type = "cpu";
- next-level-cache = <&L3_CA55>;
- enable-method = "psci";
- clocks = <&cpg CPG_CORE R9A07G044_CLK_I>;
- operating-points-v2 = <&cluster0_opp>;
- };
-
- L3_CA55: cache-controller-0 {
- compatible = "cache";
- cache-unified;
- cache-size = <0x40000>;
- cache-level = <3>;
- };
- };
-
- gpu_opp_table: opp-table-1 {
- compatible = "operating-points-v2";
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <1100000>;
- };
-
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <1100000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <1100000>;
- };
-
- opp-200000000 {
- opp-hz = /bits/ 64 <200000000>;
- opp-microvolt = <1100000>;
- };
-
- opp-125000000 {
- opp-hz = /bits/ 64 <125000000>;
- opp-microvolt = <1100000>;
- };
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <1100000>;
- };
-
- opp-62500000 {
- opp-hz = /bits/ 64 <62500000>;
- opp-microvolt = <1100000>;
- };
-
- opp-50000000 {
- opp-hz = /bits/ 64 <50000000>;
- opp-microvolt = <1100000>;
- };
- };
-
- pmu {
- compatible = "arm,cortex-a55-pmu";
- interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
- };
-
- psci {
- compatible = "arm,psci-1.0", "arm,psci-0.2";
- method = "smc";
- };
-
- soc: soc {
- compatible = "simple-bus";
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- mtu3: timer@10001200 {
- compatible = "renesas,r9a07g044-mtu3",
- "renesas,rz-mtu3";
- reg = <0 0x10001200 0 0xb00>;
- interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 171 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 173 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 174 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 175 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 181 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 183 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 184 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 185 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 186 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 187 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 192 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 202 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 204 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 207 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 211 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
- "tciv0", "tgie0", "tgif0",
- "tgia1", "tgib1", "tciv1", "tciu1",
- "tgia2", "tgib2", "tciv2", "tciu2",
- "tgia3", "tgib3", "tgic3", "tgid3",
- "tciv3",
- "tgia4", "tgib4", "tgic4", "tgid4",
- "tciv4",
- "tgiu5", "tgiv5", "tgiw5",
- "tgia6", "tgib6", "tgic6", "tgid6",
- "tciv6",
- "tgia7", "tgib7", "tgic7", "tgid7",
- "tciv7",
- "tgia8", "tgib8", "tgic8", "tgid8",
- "tciv8", "tciu8";
- clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>;
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_MTU_X_PRESET_MTU3>;
- #pwm-cells = <2>;
- status = "disabled";
- };
-
- ssi0: ssi@10049c00 {
- compatible = "renesas,r9a07g044-ssi",
- "renesas,rz-ssi";
- reg = <0 0x10049c00 0 0x400>;
- interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 327 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx";
- clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>,
- <&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>,
- <&audio_clk1>, <&audio_clk2>;
- clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
- resets = <&cpg R9A07G044_SSI0_RST_M2_REG>;
- dmas = <&dmac 0x2655>, <&dmac 0x2656>;
- dma-names = "tx", "rx";
- power-domains = <&cpg>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- ssi1: ssi@1004a000 {
- compatible = "renesas,r9a07g044-ssi",
- "renesas,rz-ssi";
- reg = <0 0x1004a000 0 0x400>;
- interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 332 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx";
- clocks = <&cpg CPG_MOD R9A07G044_SSI1_PCLK2>,
- <&cpg CPG_MOD R9A07G044_SSI1_PCLK_SFR>,
- <&audio_clk1>, <&audio_clk2>;
- clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
- resets = <&cpg R9A07G044_SSI1_RST_M2_REG>;
- dmas = <&dmac 0x2659>, <&dmac 0x265a>;
- dma-names = "tx", "rx";
- power-domains = <&cpg>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- ssi2: ssi@1004a400 {
- compatible = "renesas,r9a07g044-ssi",
- "renesas,rz-ssi";
- reg = <0 0x1004a400 0 0x400>;
- interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 337 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rt";
- clocks = <&cpg CPG_MOD R9A07G044_SSI2_PCLK2>,
- <&cpg CPG_MOD R9A07G044_SSI2_PCLK_SFR>,
- <&audio_clk1>, <&audio_clk2>;
- clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
- resets = <&cpg R9A07G044_SSI2_RST_M2_REG>;
- dmas = <&dmac 0x265f>;
- dma-names = "rt";
- power-domains = <&cpg>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- ssi3: ssi@1004a800 {
- compatible = "renesas,r9a07g044-ssi",
- "renesas,rz-ssi";
- reg = <0 0x1004a800 0 0x400>;
- interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 339 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx";
- clocks = <&cpg CPG_MOD R9A07G044_SSI3_PCLK2>,
- <&cpg CPG_MOD R9A07G044_SSI3_PCLK_SFR>,
- <&audio_clk1>, <&audio_clk2>;
- clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
- resets = <&cpg R9A07G044_SSI3_RST_M2_REG>;
- dmas = <&dmac 0x2661>, <&dmac 0x2662>;
- dma-names = "tx", "rx";
- power-domains = <&cpg>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- spi0: spi@1004ac00 {
- compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
- reg = <0 0x1004ac00 0 0x400>;
- interrupts = <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error", "rx", "tx";
- clocks = <&cpg CPG_MOD R9A07G044_RSPI0_CLKB>;
- resets = <&cpg R9A07G044_RSPI0_RST>;
- dmas = <&dmac 0x2e95>, <&dmac 0x2e96>;
- dma-names = "tx", "rx";
- power-domains = <&cpg>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi1: spi@1004b000 {
- compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
- reg = <0 0x1004b000 0 0x400>;
- interrupts = <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error", "rx", "tx";
- clocks = <&cpg CPG_MOD R9A07G044_RSPI1_CLKB>;
- resets = <&cpg R9A07G044_RSPI1_RST>;
- dmas = <&dmac 0x2e99>, <&dmac 0x2e9a>;
- dma-names = "tx", "rx";
- power-domains = <&cpg>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi2: spi@1004b400 {
- compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
- reg = <0 0x1004b400 0 0x400>;
- interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error", "rx", "tx";
- clocks = <&cpg CPG_MOD R9A07G044_RSPI2_CLKB>;
- resets = <&cpg R9A07G044_RSPI2_RST>;
- dmas = <&dmac 0x2e9d>, <&dmac 0x2e9e>;
- dma-names = "tx", "rx";
- power-domains = <&cpg>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- scif0: serial@1004b800 {
- compatible = "renesas,scif-r9a07g044";
- reg = <0 0x1004b800 0 0x400>;
- interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "eri", "rxi", "txi",
- "bri", "dri", "tei";
- clocks = <&cpg CPG_MOD R9A07G044_SCIF0_CLK_PCK>;
- clock-names = "fck";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_SCIF0_RST_SYSTEM_N>;
- status = "disabled";
- };
-
- scif1: serial@1004bc00 {
- compatible = "renesas,scif-r9a07g044";
- reg = <0 0x1004bc00 0 0x400>;
- interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "eri", "rxi", "txi",
- "bri", "dri", "tei";
- clocks = <&cpg CPG_MOD R9A07G044_SCIF1_CLK_PCK>;
- clock-names = "fck";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_SCIF1_RST_SYSTEM_N>;
- status = "disabled";
- };
-
- scif2: serial@1004c000 {
- compatible = "renesas,scif-r9a07g044";
- reg = <0 0x1004c000 0 0x400>;
- interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "eri", "rxi", "txi",
- "bri", "dri", "tei";
- clocks = <&cpg CPG_MOD R9A07G044_SCIF2_CLK_PCK>;
- clock-names = "fck";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_SCIF2_RST_SYSTEM_N>;
- status = "disabled";
- };
-
- scif3: serial@1004c400 {
- compatible = "renesas,scif-r9a07g044";
- reg = <0 0x1004c400 0 0x400>;
- interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "eri", "rxi", "txi",
- "bri", "dri", "tei";
- clocks = <&cpg CPG_MOD R9A07G044_SCIF3_CLK_PCK>;
- clock-names = "fck";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_SCIF3_RST_SYSTEM_N>;
- status = "disabled";
- };
-
- scif4: serial@1004c800 {
- compatible = "renesas,scif-r9a07g044";
- reg = <0 0x1004c800 0 0x400>;
- interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "eri", "rxi", "txi",
- "bri", "dri", "tei";
- clocks = <&cpg CPG_MOD R9A07G044_SCIF4_CLK_PCK>;
- clock-names = "fck";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_SCIF4_RST_SYSTEM_N>;
- status = "disabled";
- };
-
- sci0: serial@1004d000 {
- compatible = "renesas,r9a07g044-sci", "renesas,sci";
- reg = <0 0x1004d000 0 0x400>;
- interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 406 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 407 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "eri", "rxi", "txi", "tei";
- clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>;
- clock-names = "fck";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_SCI0_RST>;
- status = "disabled";
- };
-
- sci1: serial@1004d400 {
- compatible = "renesas,r9a07g044-sci", "renesas,sci";
- reg = <0 0x1004d400 0 0x400>;
- interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 411 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "eri", "rxi", "txi", "tei";
- clocks = <&cpg CPG_MOD R9A07G044_SCI1_CLKP>;
- clock-names = "fck";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_SCI1_RST>;
- status = "disabled";
- };
-
- canfd: can@10050000 {
- compatible = "renesas,r9a07g044-canfd", "renesas,rzg2l-canfd";
- reg = <0 0x10050000 0 0x8000>;
- interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "g_err", "g_recc",
- "ch0_err", "ch0_rec", "ch0_trx",
- "ch1_err", "ch1_rec", "ch1_trx";
- clocks = <&cpg CPG_MOD R9A07G044_CANFD_PCLK>,
- <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>,
- <&can_clk>;
- clock-names = "fck", "canfd", "can_clk";
- assigned-clocks = <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>;
- assigned-clock-rates = <50000000>;
- resets = <&cpg R9A07G044_CANFD_RSTP_N>,
- <&cpg R9A07G044_CANFD_RSTC_N>;
- reset-names = "rstp_n", "rstc_n";
- power-domains = <&cpg>;
- status = "disabled";
-
- channel0 {
- status = "disabled";
- };
- channel1 {
- status = "disabled";
- };
- };
-
- i2c0: i2c@10058000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
- reg = <0 0x10058000 0 0x400>;
- interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 348 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 349 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "tei", "ri", "ti", "spi", "sti",
- "naki", "ali", "tmoi";
- clocks = <&cpg CPG_MOD R9A07G044_I2C0_PCLK>;
- clock-frequency = <100000>;
- resets = <&cpg R9A07G044_I2C0_MRST>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- i2c1: i2c@10058400 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
- reg = <0 0x10058400 0 0x400>;
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 356 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 357 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "tei", "ri", "ti", "spi", "sti",
- "naki", "ali", "tmoi";
- clocks = <&cpg CPG_MOD R9A07G044_I2C1_PCLK>;
- clock-frequency = <100000>;
- resets = <&cpg R9A07G044_I2C1_MRST>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- i2c2: i2c@10058800 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
- reg = <0 0x10058800 0 0x400>;
- interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "tei", "ri", "ti", "spi", "sti",
- "naki", "ali", "tmoi";
- clocks = <&cpg CPG_MOD R9A07G044_I2C2_PCLK>;
- clock-frequency = <100000>;
- resets = <&cpg R9A07G044_I2C2_MRST>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- i2c3: i2c@10058c00 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
- reg = <0 0x10058c00 0 0x400>;
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 372 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "tei", "ri", "ti", "spi", "sti",
- "naki", "ali", "tmoi";
- clocks = <&cpg CPG_MOD R9A07G044_I2C3_PCLK>;
- clock-frequency = <100000>;
- resets = <&cpg R9A07G044_I2C3_MRST>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- adc: adc@10059000 {
- compatible = "renesas,r9a07g044-adc", "renesas,rzg2l-adc";
- reg = <0 0x10059000 0 0x400>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_EDGE_RISING>;
- clocks = <&cpg CPG_MOD R9A07G044_ADC_ADCLK>,
- <&cpg CPG_MOD R9A07G044_ADC_PCLK>;
- clock-names = "adclk", "pclk";
- resets = <&cpg R9A07G044_ADC_PRESETN>,
- <&cpg R9A07G044_ADC_ADRST_N>;
- reset-names = "presetn", "adrst-n";
- power-domains = <&cpg>;
- status = "disabled";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- channel@0 {
- reg = <0>;
- };
- channel@1 {
- reg = <1>;
- };
- channel@2 {
- reg = <2>;
- };
- channel@3 {
- reg = <3>;
- };
- channel@4 {
- reg = <4>;
- };
- channel@5 {
- reg = <5>;
- };
- channel@6 {
- reg = <6>;
- };
- channel@7 {
- reg = <7>;
- };
- };
-
- tsu: thermal@10059400 {
- compatible = "renesas,r9a07g044-tsu",
- "renesas,rzg2l-tsu";
- reg = <0 0x10059400 0 0x400>;
- clocks = <&cpg CPG_MOD R9A07G044_TSU_PCLK>;
- resets = <&cpg R9A07G044_TSU_PRESETN>;
- power-domains = <&cpg>;
- #thermal-sensor-cells = <1>;
- };
-
- sbc: spi@10060000 {
- compatible = "renesas,r9a07g044-rpc-if",
- "renesas,rzg2l-rpc-if";
- reg = <0 0x10060000 0 0x10000>,
- <0 0x20000000 0 0x10000000>,
- <0 0x10070000 0 0x10000>;
- reg-names = "regs", "dirmap", "wbuf";
- interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_SPI_CLK2>,
- <&cpg CPG_MOD R9A07G044_SPI_CLK>;
- resets = <&cpg R9A07G044_SPI_RST>;
- power-domains = <&cpg>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- cru: video@10830000 {
- compatible = "renesas,r9a07g044-cru", "renesas,rzg2l-cru";
- reg = <0 0x10830000 0 0x400>;
- clocks = <&cpg CPG_MOD R9A07G044_CRU_VCLK>,
- <&cpg CPG_MOD R9A07G044_CRU_PCLK>,
- <&cpg CPG_MOD R9A07G044_CRU_ACLK>;
- clock-names = "video", "apb", "axi";
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "image_conv", "image_conv_err", "axi_mst_err";
- resets = <&cpg R9A07G044_CRU_PRESETN>,
- <&cpg R9A07G044_CRU_ARESETN>;
- reset-names = "presetn", "aresetn";
- power-domains = <&cpg>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- #address-cells = <1>;
- #size-cells = <0>;
-
- reg = <0>;
- cruparallel: endpoint@0 {
- reg = <0>;
- };
- };
-
- port@1 {
- #address-cells = <1>;
- #size-cells = <0>;
-
- reg = <1>;
- crucsi2: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&csi2cru>;
- };
- };
- };
- };
-
- csi2: csi2@10830400 {
- compatible = "renesas,r9a07g044-csi2", "renesas,rzg2l-csi2";
- reg = <0 0x10830400 0 0xfc00>;
- interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_CRU_SYSCLK>,
- <&cpg CPG_MOD R9A07G044_CRU_VCLK>,
- <&cpg CPG_MOD R9A07G044_CRU_PCLK>;
- clock-names = "system", "video", "apb";
- resets = <&cpg R9A07G044_CRU_PRESETN>,
- <&cpg R9A07G044_CRU_CMN_RSTB>;
- reset-names = "presetn", "cmn-rstb";
- power-domains = <&cpg>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- };
-
- port@1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
-
- csi2cru: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&crucsi2>;
- };
- };
- };
- };
-
- dsi: dsi@10850000 {
- compatible = "renesas,r9a07g044-mipi-dsi",
- "renesas,rzg2l-mipi-dsi";
- reg = <0 0x10850000 0 0x20000>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "seq0", "seq1", "vin1", "rcv",
- "ferr", "ppi", "debug";
- clocks = <&cpg CPG_MOD R9A07G044_MIPI_DSI_PLLCLK>,
- <&cpg CPG_MOD R9A07G044_MIPI_DSI_SYSCLK>,
- <&cpg CPG_MOD R9A07G044_MIPI_DSI_ACLK>,
- <&cpg CPG_MOD R9A07G044_MIPI_DSI_PCLK>,
- <&cpg CPG_MOD R9A07G044_MIPI_DSI_VCLK>,
- <&cpg CPG_MOD R9A07G044_MIPI_DSI_LPCLK>;
- clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
- resets = <&cpg R9A07G044_MIPI_DSI_CMN_RSTB>,
- <&cpg R9A07G044_MIPI_DSI_ARESET_N>,
- <&cpg R9A07G044_MIPI_DSI_PRESET_N>;
- reset-names = "rst", "arst", "prst";
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- vspd: vsp@10870000 {
- compatible = "renesas,r9a07g044-vsp2";
- reg = <0 0x10870000 0 0x10000>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>,
- <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>,
- <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>;
- clock-names = "aclk", "pclk", "vclk";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_LCDC_RESET_N>;
- renesas,fcp = <&fcpvd>;
- };
-
- fcpvd: fcp@10880000 {
- compatible = "renesas,r9a07g044-fcpvd",
- "renesas,fcpv";
- reg = <0 0x10880000 0 0x10000>;
- clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>,
- <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>,
- <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>;
- clock-names = "aclk", "pclk", "vclk";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_LCDC_RESET_N>;
- };
-
- cpg: clock-controller@11010000 {
- compatible = "renesas,r9a07g044-cpg";
- reg = <0 0x11010000 0 0x10000>;
- clocks = <&extal_clk>;
- clock-names = "extal";
- #clock-cells = <2>;
- #reset-cells = <1>;
- #power-domain-cells = <0>;
- };
-
- sysc: system-controller@11020000 {
- compatible = "renesas,r9a07g044-sysc";
- reg = <0 0x11020000 0 0x10000>;
- interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "lpm_int", "ca55stbydone_int",
- "cm33stbyr_int", "ca55_deny";
- status = "disabled";
- };
-
- pinctrl: pinctrl@11030000 {
- compatible = "renesas,r9a07g044-pinctrl";
- reg = <0 0x11030000 0 0x10000>;
- gpio-controller;
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- interrupt-parent = <&irqc>;
- interrupt-controller;
- gpio-ranges = <&pinctrl 0 0 392>;
- clocks = <&cpg CPG_MOD R9A07G044_GPIO_HCLK>;
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_GPIO_RSTN>,
- <&cpg R9A07G044_GPIO_PORT_RESETN>,
- <&cpg R9A07G044_GPIO_SPARE_RESETN>;
- };
-
- irqc: interrupt-controller@110a0000 {
- compatible = "renesas,r9a07g044-irqc",
- "renesas,rzg2l-irqc";
- #interrupt-cells = <2>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0x110a0000 0 0x10000>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>,
- <&cpg CPG_MOD R9A07G044_IA55_PCLK>;
- clock-names = "clk", "pclk";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_IA55_RESETN>;
- };
-
- dmac: dma-controller@11820000 {
- compatible = "renesas,r9a07g044-dmac",
- "renesas,rz-dmac";
- reg = <0 0x11820000 0 0x10000>,
- <0 0x11830000 0 0x10000>;
- interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15";
- clocks = <&cpg CPG_MOD R9A07G044_DMAC_ACLK>,
- <&cpg CPG_MOD R9A07G044_DMAC_PCLK>;
- clock-names = "main", "register";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_DMAC_ARESETN>,
- <&cpg R9A07G044_DMAC_RST_ASYNC>;
- reset-names = "arst", "rst_async";
- #dma-cells = <1>;
- dma-channels = <16>;
- };
-
- gpu: gpu@11840000 {
- compatible = "renesas,r9a07g044-mali",
- "arm,mali-bifrost";
- reg = <0x0 0x11840000 0x0 0x10000>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "job", "mmu", "gpu", "event";
- clocks = <&cpg CPG_MOD R9A07G044_GPU_CLK>,
- <&cpg CPG_MOD R9A07G044_GPU_AXI_CLK>,
- <&cpg CPG_MOD R9A07G044_GPU_ACE_CLK>;
- clock-names = "gpu", "bus", "bus_ace";
- power-domains = <&cpg>;
- resets = <&cpg R9A07G044_GPU_RESETN>,
- <&cpg R9A07G044_GPU_AXI_RESETN>,
- <&cpg R9A07G044_GPU_ACE_RESETN>;
- reset-names = "rst", "axi_rst", "ace_rst";
- operating-points-v2 = <&gpu_opp_table>;
- };
-
- gic: interrupt-controller@11900000 {
- compatible = "arm,gic-v3";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x0 0x11900000 0 0x40000>,
- <0x0 0x11940000 0 0x60000>;
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
- };
-
- sdhi0: mmc@11c00000 {
- compatible = "renesas,sdhi-r9a07g044",
- "renesas,rcar-gen3-sdhi";
- reg = <0x0 0x11c00000 0 0x10000>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK>,
- <&cpg CPG_MOD R9A07G044_SDHI0_CLK_HS>,
- <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK2>,
- <&cpg CPG_MOD R9A07G044_SDHI0_ACLK>;
- clock-names = "core", "clkh", "cd", "aclk";
- resets = <&cpg R9A07G044_SDHI0_IXRST>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- sdhi1: mmc@11c10000 {
- compatible = "renesas,sdhi-r9a07g044",
- "renesas,rcar-gen3-sdhi";
- reg = <0x0 0x11c10000 0 0x10000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK>,
- <&cpg CPG_MOD R9A07G044_SDHI1_CLK_HS>,
- <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK2>,
- <&cpg CPG_MOD R9A07G044_SDHI1_ACLK>;
- clock-names = "core", "clkh", "cd", "aclk";
- resets = <&cpg R9A07G044_SDHI1_IXRST>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- eth0: ethernet@11c20000 {
- compatible = "renesas,r9a07g044-gbeth",
- "renesas,rzg2l-gbeth";
- reg = <0 0x11c20000 0 0x10000>;
- interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "mux", "fil", "arp_ns";
- phy-mode = "rgmii";
- clocks = <&cpg CPG_MOD R9A07G044_ETH0_CLK_AXI>,
- <&cpg CPG_MOD R9A07G044_ETH0_CLK_CHI>,
- <&cpg CPG_CORE R9A07G044_CLK_HP>;
- clock-names = "axi", "chi", "refclk";
- resets = <&cpg R9A07G044_ETH0_RST_HW_N>;
- power-domains = <&cpg>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- eth1: ethernet@11c30000 {
- compatible = "renesas,r9a07g044-gbeth",
- "renesas,rzg2l-gbeth";
- reg = <0 0x11c30000 0 0x10000>;
- interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "mux", "fil", "arp_ns";
- phy-mode = "rgmii";
- clocks = <&cpg CPG_MOD R9A07G044_ETH1_CLK_AXI>,
- <&cpg CPG_MOD R9A07G044_ETH1_CLK_CHI>,
- <&cpg CPG_CORE R9A07G044_CLK_HP>;
- clock-names = "axi", "chi", "refclk";
- resets = <&cpg R9A07G044_ETH1_RST_HW_N>;
- power-domains = <&cpg>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- phyrst: usbphy-ctrl@11c40000 {
- compatible = "renesas,r9a07g044-usbphy-ctrl",
- "renesas,rzg2l-usbphy-ctrl";
- reg = <0 0x11c40000 0 0x10000>;
- clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>;
- resets = <&cpg R9A07G044_USB_PRESETN>;
- power-domains = <&cpg>;
- #reset-cells = <1>;
- status = "disabled";
- };
-
- ohci0: usb@11c50000 {
- compatible = "generic-ohci";
- reg = <0 0x11c50000 0 0x100>;
- interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
- <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
- resets = <&phyrst 0>,
- <&cpg R9A07G044_USB_U2H0_HRESETN>;
- phys = <&usb2_phy0 1>;
- phy-names = "usb";
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- ohci1: usb@11c70000 {
- compatible = "generic-ohci";
- reg = <0 0x11c70000 0 0x100>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
- <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
- resets = <&phyrst 1>,
- <&cpg R9A07G044_USB_U2H1_HRESETN>;
- phys = <&usb2_phy1 1>;
- phy-names = "usb";
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- ehci0: usb@11c50100 {
- compatible = "generic-ehci";
- reg = <0 0x11c50100 0 0x100>;
- interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
- <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
- resets = <&phyrst 0>,
- <&cpg R9A07G044_USB_U2H0_HRESETN>;
- phys = <&usb2_phy0 2>;
- phy-names = "usb";
- companion = <&ohci0>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- ehci1: usb@11c70100 {
- compatible = "generic-ehci";
- reg = <0 0x11c70100 0 0x100>;
- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
- <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
- resets = <&phyrst 1>,
- <&cpg R9A07G044_USB_U2H1_HRESETN>;
- phys = <&usb2_phy1 2>;
- phy-names = "usb";
- companion = <&ohci1>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- usb2_phy0: usb-phy@11c50200 {
- compatible = "renesas,usb2-phy-r9a07g044",
- "renesas,rzg2l-usb2-phy";
- reg = <0 0x11c50200 0 0x700>;
- interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
- <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
- resets = <&phyrst 0>;
- #phy-cells = <1>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- usb2_phy1: usb-phy@11c70200 {
- compatible = "renesas,usb2-phy-r9a07g044",
- "renesas,rzg2l-usb2-phy";
- reg = <0 0x11c70200 0 0x700>;
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
- <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
- resets = <&phyrst 1>;
- #phy-cells = <1>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- hsusb: usb@11c60000 {
- compatible = "renesas,usbhs-r9a07g044",
- "renesas,rza2-usbhs";
- reg = <0 0x11c60000 0 0x10000>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
- <&cpg CPG_MOD R9A07G044_USB_U2P_EXR_CPUCLK>;
- resets = <&phyrst 0>,
- <&cpg R9A07G044_USB_U2P_EXL_SYSRST>;
- renesas,buswait = <7>;
- phys = <&usb2_phy0 3>;
- phy-names = "usb";
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- wdt0: watchdog@12800800 {
- compatible = "renesas,r9a07g044-wdt",
- "renesas,rzg2l-wdt";
- reg = <0 0x12800800 0 0x400>;
- clocks = <&cpg CPG_MOD R9A07G044_WDT0_PCLK>,
- <&cpg CPG_MOD R9A07G044_WDT0_CLK>;
- clock-names = "pclk", "oscclk";
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "wdt", "perrout";
- resets = <&cpg R9A07G044_WDT0_PRESETN>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- wdt1: watchdog@12800c00 {
- compatible = "renesas,r9a07g044-wdt",
- "renesas,rzg2l-wdt";
- reg = <0 0x12800C00 0 0x400>;
- clocks = <&cpg CPG_MOD R9A07G044_WDT1_PCLK>,
- <&cpg CPG_MOD R9A07G044_WDT1_CLK>;
- clock-names = "pclk", "oscclk";
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "wdt", "perrout";
- resets = <&cpg R9A07G044_WDT1_PRESETN>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- ostm0: timer@12801000 {
- compatible = "renesas,r9a07g044-ostm",
- "renesas,ostm";
- reg = <0x0 0x12801000 0x0 0x400>;
- interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
- clocks = <&cpg CPG_MOD R9A07G044_OSTM0_PCLK>;
- resets = <&cpg R9A07G044_OSTM0_PRESETZ>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- ostm1: timer@12801400 {
- compatible = "renesas,r9a07g044-ostm",
- "renesas,ostm";
- reg = <0x0 0x12801400 0x0 0x400>;
- interrupts = <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
- clocks = <&cpg CPG_MOD R9A07G044_OSTM1_PCLK>;
- resets = <&cpg R9A07G044_OSTM1_PRESETZ>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
- ostm2: timer@12801800 {
- compatible = "renesas,r9a07g044-ostm",
- "renesas,ostm";
- reg = <0x0 0x12801800 0x0 0x400>;
- interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
- clocks = <&cpg CPG_MOD R9A07G044_OSTM2_PCLK>;
- resets = <&cpg R9A07G044_OSTM2_PRESETZ>;
- power-domains = <&cpg>;
- status = "disabled";
- };
- };
-
- thermal-zones {
- cpu-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
- thermal-sensors = <&tsu 0>;
- sustainable-power = <717>;
-
- cooling-maps {
- map0 {
- trip = <&target>;
- cooling-device = <&cpu0 0 2>;
- contribution = <1024>;
- };
- };
-
- trips {
- sensor_crit: sensor-crit {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "critical";
- };
-
- target: trip-point {
- temperature = <100000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
- <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
- <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
- <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
- };
-};
diff --git a/arch/arm/dts/r9a07g044l2-smarc.dts b/arch/arm/dts/r9a07g044l2-smarc.dts
deleted file mode 100644
index 568d49c..0000000
--- a/arch/arm/dts/r9a07g044l2-smarc.dts
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-/*
- * Device Tree Source for the RZ/G2L SMARC EVK board
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- */
-
-/dts-v1/;
-
-/* Enable SCIF2 (SER0) on PMOD1 (CN7) */
-#define PMOD1_SER0 1
-
-/*
- * To enable MTU3a PWM on PMOD0,
- * Disable PMOD1_SER0 by setting "#define PMOD1_SER0 0" above and
- * enable PMOD_MTU3 by setting "#define PMOD_MTU3 1" below.
- */
-#define PMOD_MTU3 0
-
-#if (PMOD_MTU3 && PMOD1_SER0)
-#error "Cannot set as PMOD_MTU3 and PMOD1_SER0 are mutually exclusive "
-#endif
-
-#define MTU3_COUNTER_Z_PHASE_SIGNAL 0
-
-#if (!PMOD_MTU3 && MTU3_COUNTER_Z_PHASE_SIGNAL)
-#error "Cannot set 1 to MTU3_COUNTER_Z_PHASE_SIGNAL as PMOD_MTU3=0"
-#endif
-
-#include "r9a07g044l2.dtsi"
-#include "rzg2l-smarc-som.dtsi"
-#include "rzg2l-smarc-pinfunction.dtsi"
-#include "rz-smarc-common.dtsi"
-#include "rzg2l-smarc.dtsi"
-
-/ {
- model = "Renesas SMARC EVK based on r9a07g044l2";
- compatible = "renesas,smarc-evk", "renesas,r9a07g044l2", "renesas,r9a07g044";
-};
diff --git a/arch/arm/dts/r9a07g044l2.dtsi b/arch/arm/dts/r9a07g044l2.dtsi
deleted file mode 100644
index 91dc10b..0000000
--- a/arch/arm/dts/r9a07g044l2.dtsi
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-/*
- * Device Tree Source for the RZ/G2L R9A07G044L2 SoC specific parts
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- */
-
-/dts-v1/;
-#include "r9a07g044.dtsi"
-
-/ {
- compatible = "renesas,r9a07g044l2", "renesas,r9a07g044";
-};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi
new file mode 100644
index 0000000..2ab32cf
--- /dev/null
+++ b/arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rk3328-nanopi-r2s-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi b/arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi
new file mode 100644
index 0000000..19acbce
--- /dev/null
+++ b/arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2024 Heiko Stuebner <heiko@sntech.de>
+ */
+
+#include "rk356x-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3588-coolpi-cm5-genbook-u-boot.dtsi b/arch/arm/dts/rk3588-coolpi-cm5-genbook-u-boot.dtsi
new file mode 100644
index 0000000..5a3073d
--- /dev/null
+++ b/arch/arm/dts/rk3588-coolpi-cm5-genbook-u-boot.dtsi
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3588-u-boot.dtsi"
+
+&fspim2_pins {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sfc {
+ flash@0 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ };
+};
+
+/* USB A out */
+&usb_host1_xhci {
+ snps,dis_u3_susphy_quirk;
+};
diff --git a/arch/arm/dts/rz-smarc-common.dtsi b/arch/arm/dts/rz-smarc-common.dtsi
deleted file mode 100644
index b7a3e6c..0000000
--- a/arch/arm/dts/rz-smarc-common.dtsi
+++ /dev/null
@@ -1,183 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-/*
- * Device Tree Source for the RZ/{G2L,G2LC,V2L} SMARC EVK common parts
- *
- * Copyright (C) 2022 Renesas Electronics Corp.
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
-
-/*
- * SSI-WM8978
- *
- * This command is required when Playback/Capture
- *
- * amixer cset name='Left Input Mixer L2 Switch' on
- * amixer cset name='Right Input Mixer R2 Switch' on
- * amixer cset name='Headphone Playback Volume' 100
- * amixer cset name='PCM Volume' 100%
- * amixer cset name='Input PGA Volume' 25
- *
- */
-
-/ {
- aliases {
- serial0 = &scif0;
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- snd_rzg2l: sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,bitclock-master = <&cpu_dai>;
- simple-audio-card,frame-master = <&cpu_dai>;
- simple-audio-card,mclk-fs = <256>;
-
- simple-audio-card,widgets = "Microphone", "Microphone Jack";
- simple-audio-card,routing =
- "L2", "Mic Bias",
- "R2", "Mic Bias",
- "Mic Bias", "Microphone Jack";
-
- cpu_dai: simple-audio-card,cpu {
- };
-
- codec_dai: simple-audio-card,codec {
- clocks = <&versa3 2>;
- sound-dai = <&wm8978>;
- };
- };
-
- usb0_vbus_otg: regulator-usb0-vbus-otg {
- compatible = "regulator-fixed";
-
- regulator-name = "USB0_VBUS_OTG";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vccq_sdhi1: regulator-vccq-sdhi1 {
- compatible = "regulator-gpio";
- regulator-name = "SDHI1 VccQ";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- gpios-states = <1>;
- states = <3300000 1>, <1800000 0>;
- };
-
- x1: x1-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000000>;
- };
-};
-
-&audio_clk1 {
- clock-frequency = <11289600>;
-};
-
-&audio_clk2 {
- clock-frequency = <12288000>;
-};
-
-&canfd {
- pinctrl-0 = <&can0_pins &can1_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- channel0 {
- status = "okay";
- };
-
- channel1 {
- status = "okay";
- };
-};
-
-&ehci0 {
- dr_mode = "otg";
- status = "okay";
-};
-
-&ehci1 {
- status = "okay";
-};
-
-&hsusb {
- dr_mode = "otg";
- status = "okay";
-};
-
-&i2c0 {
- pinctrl-0 = <&i2c0_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&i2c1 {
- pinctrl-0 = <&i2c1_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&ohci0 {
- dr_mode = "otg";
- status = "okay";
-};
-
-&ohci1 {
- status = "okay";
-};
-
-&phyrst {
- status = "okay";
-};
-
-&scif0 {
- pinctrl-0 = <&scif0_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&sdhi1 {
- pinctrl-0 = <&sdhi1_pins>;
- pinctrl-1 = <&sdhi1_pins_uhs>;
- pinctrl-names = "default", "state_uhs";
-
- vmmc-supply = <®_3p3v>;
- vqmmc-supply = <&vccq_sdhi1>;
- bus-width = <4>;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- status = "okay";
-};
-
-&spi1 {
- pinctrl-0 = <&spi1_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&usb2_phy0 {
- pinctrl-0 = <&usb0_pins>;
- pinctrl-names = "default";
-
- vbus-supply = <&usb0_vbus_otg>;
- status = "okay";
-};
-
-&usb2_phy1 {
- pinctrl-0 = <&usb1_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
diff --git a/arch/arm/dts/rzg2l-smarc-pinfunction.dtsi b/arch/arm/dts/rzg2l-smarc-pinfunction.dtsi
deleted file mode 100644
index 18c526c..0000000
--- a/arch/arm/dts/rzg2l-smarc-pinfunction.dtsi
+++ /dev/null
@@ -1,157 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-/*
- * Device Tree Source for the RZ/{G2L,V2L} SMARC pincontrol parts
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
-
-&pinctrl {
- pinctrl-0 = <&sound_clk_pins>;
- pinctrl-names = "default";
-
- can0_pins: can0 {
- pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
- <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
- };
-
- /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
- can0-stb-hog {
- gpio-hog;
- gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "can0_stb";
- };
-
- can1_pins: can1 {
- pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */
- <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
- };
-
- /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
- can1-stb-hog {
- gpio-hog;
- gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "can1_stb";
- };
-
- i2c0_pins: i2c0 {
- pins = "RIIC0_SDA", "RIIC0_SCL";
- input-enable;
- };
-
- i2c1_pins: i2c1 {
- pins = "RIIC1_SDA", "RIIC1_SCL";
- input-enable;
- };
-
- i2c3_pins: i2c3 {
- pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */
- <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */
- };
-
- mtu3_pins: mtu3 {
- mtu3-ext-clk-input-pin {
- pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA */
- <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB */
- };
-
- mtu3-pwm {
- pinmux = <RZG2L_PORT_PINMUX(44, 0, 4)>, /* MTIOC3A */
- <RZG2L_PORT_PINMUX(44, 1, 4)>, /* MTIOC3B */
- <RZG2L_PORT_PINMUX(44, 2, 4)>, /* MTIOC3C */
- <RZG2L_PORT_PINMUX(44, 3, 4)>; /* MTIOC3D */
- };
-
-#if MTU3_COUNTER_Z_PHASE_SIGNAL
- mtu3-zphase-clk {
- pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A */
- };
-#endif /* MTU3_COUNTER_Z_PHASE_SIGNAL */
- };
-
- scif0_pins: scif0 {
- pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
- <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
- };
-
- scif2_pins: scif2 {
- pinmux = <RZG2L_PORT_PINMUX(48, 0, 1)>, /* TxD */
- <RZG2L_PORT_PINMUX(48, 1, 1)>, /* RxD */
- <RZG2L_PORT_PINMUX(48, 3, 1)>, /* CTS# */
- <RZG2L_PORT_PINMUX(48, 4, 1)>; /* RTS# */
- };
-
- sd1-pwr-en-hog {
- gpio-hog;
- gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "sd1_pwr_en";
- };
-
- sdhi1_pins: sd1 {
- sd1_data {
- pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
- power-source = <3300>;
- };
-
- sd1_ctrl {
- pins = "SD1_CLK", "SD1_CMD";
- power-source = <3300>;
- };
-
- sd1_mux {
- pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
- };
- };
-
- sdhi1_pins_uhs: sd1_uhs {
- sd1_data_uhs {
- pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
- power-source = <1800>;
- };
-
- sd1_ctrl_uhs {
- pins = "SD1_CLK", "SD1_CMD";
- power-source = <1800>;
- };
-
- sd1_mux_uhs {
- pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
- };
- };
-
- sound_clk_pins: sound_clk {
- pins = "AUDIO_CLK1", "AUDIO_CLK2";
- input-enable;
- };
-
- spi1_pins: spi1 {
- pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */
- <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
- <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
- <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
- };
-
- ssi0_pins: ssi0 {
- pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
- <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
- <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
- <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
- };
-
- usb0_pins: usb0 {
- pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
- <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
- <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
- };
-
- usb1_pins: usb1 {
- pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
- <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
- };
-};
-
diff --git a/arch/arm/dts/rzg2l-smarc-som.dtsi b/arch/arm/dts/rzg2l-smarc-som.dtsi
deleted file mode 100644
index 547859c..0000000
--- a/arch/arm/dts/rzg2l-smarc-som.dtsi
+++ /dev/null
@@ -1,371 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-/*
- * Device Tree Source for the RZ/{G2L,V2L} SMARC SOM common parts
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irqc-rzg2l.h>
-#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
-
-/* SW1[2] should be at position 2/OFF to enable 64 GB eMMC */
-#define EMMC 1
-
-/*
- * To enable uSD card on CN3,
- * SW1[2] should be at position 3/ON.
- * Disable eMMC by setting "#define EMMC 0" above.
- */
-#define SDHI (!EMMC)
-
-/ {
- aliases {
- ethernet0 = ð0;
- ethernet1 = ð1;
- };
-
- chosen {
- bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
- };
-
- memory@48000000 {
- device_type = "memory";
- /* first 128MB is reserved for secure area. */
- reg = <0x0 0x48000000 0x0 0x78000000>;
- };
-
- reg_1p8v: regulator-1p8v {
- compatible = "regulator-fixed";
- regulator-name = "fixed-1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- reg_3p3v: regulator-3p3v {
- compatible = "regulator-fixed";
- regulator-name = "fixed-3.3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- reg_1p1v: regulator-vdd-core {
- compatible = "regulator-fixed";
- regulator-name = "fixed-1.1V";
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vccq_sdhi0: regulator-vccq-sdhi0 {
- compatible = "regulator-gpio";
-
- regulator-name = "SDHI0 VccQ";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- states = <3300000 1>, <1800000 0>;
- regulator-boot-on;
- gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>;
- regulator-always-on;
- };
-
- /* 32.768kHz crystal */
- x2: x2-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
-};
-
-&adc {
- pinctrl-0 = <&adc_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- /delete-node/ channel@6;
- /delete-node/ channel@7;
-};
-
-ð0 {
- pinctrl-0 = <ð0_pins>;
- pinctrl-names = "default";
- phy-handle = <&phy0>;
- phy-mode = "rgmii-id";
- status = "okay";
-
- phy0: ethernet-phy@7 {
- compatible = "ethernet-phy-id0022.1640",
- "ethernet-phy-ieee802.3-c22";
- reg = <7>;
- interrupt-parent = <&irqc>;
- interrupts = <RZG2L_IRQ2 IRQ_TYPE_LEVEL_LOW>;
- rxc-skew-psec = <2400>;
- txc-skew-psec = <2400>;
- rxdv-skew-psec = <0>;
- txen-skew-psec = <0>;
- rxd0-skew-psec = <0>;
- rxd1-skew-psec = <0>;
- rxd2-skew-psec = <0>;
- rxd3-skew-psec = <0>;
- txd0-skew-psec = <0>;
- txd1-skew-psec = <0>;
- txd2-skew-psec = <0>;
- txd3-skew-psec = <0>;
- };
-};
-
-ð1 {
- pinctrl-0 = <ð1_pins>;
- pinctrl-names = "default";
- phy-handle = <&phy1>;
- phy-mode = "rgmii-id";
- status = "okay";
-
- phy1: ethernet-phy@7 {
- compatible = "ethernet-phy-id0022.1640",
- "ethernet-phy-ieee802.3-c22";
- reg = <7>;
- interrupt-parent = <&irqc>;
- interrupts = <RZG2L_IRQ3 IRQ_TYPE_LEVEL_LOW>;
- rxc-skew-psec = <2400>;
- txc-skew-psec = <2400>;
- rxdv-skew-psec = <0>;
- txen-skew-psec = <0>;
- rxd0-skew-psec = <0>;
- rxd1-skew-psec = <0>;
- rxd2-skew-psec = <0>;
- rxd3-skew-psec = <0>;
- txd0-skew-psec = <0>;
- txd1-skew-psec = <0>;
- txd2-skew-psec = <0>;
- txd3-skew-psec = <0>;
- };
-};
-
-&extal_clk {
- clock-frequency = <24000000>;
-};
-
-&gpu {
- mali-supply = <®_1p1v>;
-};
-
-&i2c3 {
- raa215300: pmic@12 {
- compatible = "renesas,raa215300";
- reg = <0x12>, <0x6f>;
- reg-names = "main", "rtc";
-
- clocks = <&x2>;
- clock-names = "xin";
- };
-};
-
-&ostm1 {
- status = "okay";
-};
-
-&ostm2 {
- status = "okay";
-};
-
-&pinctrl {
- adc_pins: adc {
- pinmux = <RZG2L_PORT_PINMUX(9, 0, 2)>; /* ADC_TRG */
- };
-
- eth0_pins: eth0 {
- pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */
- <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */
- <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */
- <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */
- <RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */
- <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */
- <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */
- <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */
- <RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */
- <RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */
- <RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */
- <RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */
- <RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */
- <RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */
- <RZG2L_PORT_PINMUX(26, 1, 1)>, /* ET0_RXD3 */
- <RZG2L_PORT_PINMUX(1, 0, 1)>; /* IRQ2 */
- };
-
- eth1_pins: eth1 {
- pinmux = <RZG2L_PORT_PINMUX(37, 2, 1)>, /* ET1_LINKSTA */
- <RZG2L_PORT_PINMUX(37, 0, 1)>, /* ET1_MDC */
- <RZG2L_PORT_PINMUX(37, 1, 1)>, /* ET1_MDIO */
- <RZG2L_PORT_PINMUX(29, 0, 1)>, /* ET1_TXC */
- <RZG2L_PORT_PINMUX(29, 1, 1)>, /* ET1_TX_CTL */
- <RZG2L_PORT_PINMUX(30, 0, 1)>, /* ET1_TXD0 */
- <RZG2L_PORT_PINMUX(30, 1, 1)>, /* ET1_TXD1 */
- <RZG2L_PORT_PINMUX(31, 0, 1)>, /* ET1_TXD2 */
- <RZG2L_PORT_PINMUX(31, 1, 1)>, /* ET1_TXD3 */
- <RZG2L_PORT_PINMUX(33, 1, 1)>, /* ET1_RXC */
- <RZG2L_PORT_PINMUX(34, 0, 1)>, /* ET1_RX_CTL */
- <RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */
- <RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */
- <RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */
- <RZG2L_PORT_PINMUX(36, 0, 1)>, /* ET1_RXD3 */
- <RZG2L_PORT_PINMUX(1, 1, 1)>; /* IRQ3 */
- };
-
- gpio-sd0-pwr-en-hog {
- gpio-hog;
- gpios = <RZG2L_GPIO(4, 1) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "gpio_sd0_pwr_en";
- };
-
- qspi0_pins: qspi0 {
- qspi0-data {
- pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3";
- power-source = <1800>;
- };
-
- qspi0-ctrl {
- pins = "QSPI0_SPCLK", "QSPI0_SSL", "QSPI_RESET#";
- power-source = <1800>;
- };
- };
-
- /*
- * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]
- * The below switch logic can be used to select the device between
- * eMMC and microSD, after setting GPIO_SD0_DEV_SEL to high in DT.
- * SW1[2] should be at position 2/OFF to enable 64 GB eMMC
- * SW1[2] should be at position 3/ON to enable uSD card CN3
- */
- sd0-dev-sel-hog {
- gpio-hog;
- gpios = <RZG2L_GPIO(41, 1) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "sd0_dev_sel";
- };
-
- sdhi0_emmc_pins: sd0emmc {
- sd0_emmc_data {
- pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
- "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
- power-source = <1800>;
- };
-
- sd0_emmc_ctrl {
- pins = "SD0_CLK", "SD0_CMD";
- power-source = <1800>;
- };
-
- sd0_emmc_rst {
- pins = "SD0_RST#";
- power-source = <1800>;
- };
- };
-
- sdhi0_pins: sd0 {
- sd0_data {
- pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
- power-source = <3300>;
- };
-
- sd0_ctrl {
- pins = "SD0_CLK", "SD0_CMD";
- power-source = <3300>;
- };
-
- sd0_mux {
- pinmux = <RZG2L_PORT_PINMUX(47, 0, 2)>; /* SD0_CD */
- };
- };
-
- sdhi0_pins_uhs: sd0_uhs {
- sd0_data_uhs {
- pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
- power-source = <1800>;
- };
-
- sd0_ctrl_uhs {
- pins = "SD0_CLK", "SD0_CMD";
- power-source = <1800>;
- };
-
- sd0_mux_uhs {
- pinmux = <RZG2L_PORT_PINMUX(47, 0, 2)>; /* SD0_CD */
- };
- };
-};
-
-&sbc {
- pinctrl-0 = <&qspi0_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- flash@0 {
- compatible = "micron,mt25qu512a", "jedec,spi-nor";
- reg = <0>;
- m25p,fast-read;
- spi-max-frequency = <50000000>;
- spi-rx-bus-width = <4>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- boot@0 {
- reg = <0x00000000 0x2000000>;
- read-only;
- };
- user@2000000 {
- reg = <0x2000000 0x2000000>;
- };
- };
- };
-};
-
-#if SDHI
-&sdhi0 {
- pinctrl-0 = <&sdhi0_pins>;
- pinctrl-1 = <&sdhi0_pins_uhs>;
- pinctrl-names = "default", "state_uhs";
-
- vmmc-supply = <®_3p3v>;
- vqmmc-supply = <&vccq_sdhi0>;
- bus-width = <4>;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- status = "okay";
-};
-#endif
-
-#if EMMC
-&sdhi0 {
- pinctrl-0 = <&sdhi0_emmc_pins>;
- pinctrl-1 = <&sdhi0_emmc_pins>;
- pinctrl-names = "default", "state_uhs";
-
- vmmc-supply = <®_3p3v>;
- vqmmc-supply = <®_1p8v>;
- bus-width = <8>;
- mmc-hs200-1_8v;
- non-removable;
- fixed-emmc-driver-type = <1>;
- status = "okay";
-};
-#endif
-
-&wdt0 {
- status = "okay";
- timeout-sec = <60>;
-};
-
-&wdt1 {
- status = "okay";
- timeout-sec = <60>;
-};
diff --git a/arch/arm/dts/rzg2l-smarc.dtsi b/arch/arm/dts/rzg2l-smarc.dtsi
deleted file mode 100644
index 37807f1..0000000
--- a/arch/arm/dts/rzg2l-smarc.dtsi
+++ /dev/null
@@ -1,181 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-/*
- * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK common parts
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
-
-/ {
- aliases {
- serial1 = &scif2;
- i2c3 = &i2c3;
- };
-
- osc1: cec-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <12000000>;
- };
-
- hdmi-out {
- compatible = "hdmi-connector";
- type = "d";
-
- port {
- hdmi_con_out: endpoint {
- remote-endpoint = <&adv7535_out>;
- };
- };
- };
-};
-
-&cpu_dai {
- sound-dai = <&ssi0>;
-};
-
-&dsi {
- status = "okay";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dsi0_in: endpoint {
- };
- };
-
- port@1 {
- reg = <1>;
- dsi0_out: endpoint {
- data-lanes = <1 2 3 4>;
- remote-endpoint = <&adv7535_in>;
- };
- };
- };
-};
-
-&i2c1 {
- adv7535: hdmi@3d {
- compatible = "adi,adv7535";
- reg = <0x3d>;
-
- interrupt-parent = <&pinctrl>;
- interrupts = <RZG2L_GPIO(2, 1) IRQ_TYPE_EDGE_FALLING>;
- clocks = <&osc1>;
- clock-names = "cec";
- avdd-supply = <®_1p8v>;
- dvdd-supply = <®_1p8v>;
- pvdd-supply = <®_1p8v>;
- a2vdd-supply = <®_1p8v>;
- v3p3-supply = <®_3p3v>;
- v1p2-supply = <®_1p8v>;
-
- adi,dsi-lanes = <4>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- adv7535_in: endpoint {
- remote-endpoint = <&dsi0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- adv7535_out: endpoint {
- remote-endpoint = <&hdmi_con_out>;
- };
- };
- };
- };
-};
-
-&i2c3 {
- pinctrl-0 = <&i2c3_pins>;
- pinctrl-names = "default";
- clock-frequency = <400000>;
-
- status = "okay";
-
- wm8978: codec@1a {
- compatible = "wlf,wm8978";
- #sound-dai-cells = <0>;
- reg = <0x1a>;
- };
-
- versa3: clock-generator@68 {
- compatible = "renesas,5p35023";
- reg = <0x68>;
- #clock-cells = <1>;
- clocks = <&x1>;
-
- renesas,settings = [
- 80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf
- 00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6
- 80 b0 45 c4 95
- ];
-
- assigned-clocks = <&versa3 0>, <&versa3 1>,
- <&versa3 2>, <&versa3 3>,
- <&versa3 4>, <&versa3 5>;
- assigned-clock-rates = <24000000>, <11289600>,
- <11289600>, <12000000>,
- <25000000>, <12288000>;
- };
-};
-
-#if PMOD_MTU3
-&mtu3 {
- pinctrl-0 = <&mtu3_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-#if MTU3_COUNTER_Z_PHASE_SIGNAL
-/* SDHI cd pin is muxed with counter Z phase signal */
-&sdhi1 {
- status = "disabled";
-};
-#endif /* MTU3_COUNTER_Z_PHASE_SIGNAL */
-
-&spi1 {
- status = "disabled";
-};
-#endif /* PMOD_MTU3 */
-
-/*
- * To enable SCIF2 (SER0) on PMOD1 (CN7)
- * SW1 should be at position 2->3 so that SER0_CTS# line is activated
- * SW2 should be at position 2->3 so that SER0_TX line is activated
- * SW3 should be at position 2->3 so that SER0_RX line is activated
- * SW4 should be at position 2->3 so that SER0_RTS# line is activated
- */
-#if PMOD1_SER0
-&scif2 {
- pinctrl-0 = <&scif2_pins>;
- pinctrl-names = "default";
-
- uart-has-rtscts;
- status = "okay";
-};
-#endif
-
-&ssi0 {
- pinctrl-0 = <&ssi0_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&vccq_sdhi1 {
- gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
-};
diff --git a/arch/arm/dts/stm32mp13xx-dhcor-som.dtsi b/arch/arm/dts/stm32mp13xx-dhcor-som.dtsi
deleted file mode 100644
index ddad649..0000000
--- a/arch/arm/dts/stm32mp13xx-dhcor-som.dtsi
+++ /dev/null
@@ -1,308 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) 2024 Marek Vasut <marex@denx.de>
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/mfd/st,stpmic1.h>
-#include <dt-bindings/regulator/st,stm32mp13-regulator.h>
-#include "stm32mp13-pinctrl.dtsi"
-
-/ {
- model = "DH electronics STM32MP13xx DHCOR SoM";
- compatible = "dh,stm32mp131a-dhcor-som",
- "st,stm32mp131";
-
- aliases {
- mmc0 = &sdmmc2;
- mmc1 = &sdmmc1;
- serial0 = &uart4;
- serial1 = &uart7;
- rtc0 = &rv3032;
- spi0 = &qspi;
- };
-
- memory@c0000000 {
- device_type = "memory";
- reg = <0xc0000000 0x20000000>;
- };
-
- reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- optee@dd000000 {
- reg = <0xdd000000 0x3000000>;
- no-map;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpiof 12 GPIO_ACTIVE_LOW>;
- };
-
- vin: vin {
- compatible = "regulator-fixed";
- regulator-name = "vin";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <96>;
- i2c-scl-falling-time-ns = <3>;
- clock-frequency = <400000>;
- status = "okay";
- /* spare dmas for other usage */
- /delete-property/dmas;
- /delete-property/dma-names;
-
- pmic: stpmic@33 {
- compatible = "st,stpmic1";
- reg = <0x33>;
- interrupts-extended = <&gpioi 3 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
- status = "okay";
-
- regulators {
- compatible = "st,stpmic1-regulators";
-
- ldo1-supply = <&vin>;
- ldo2-supply = <&vin>;
- ldo3-supply = <&vin>;
- ldo4-supply = <&vin>;
- ldo5-supply = <&vin>;
- ldo6-supply = <&vin>;
- pwr_sw1-supply = <&bst_out>;
- pwr_sw2-supply = <&bst_out>;
-
- vddcpu: buck1 { /* VDD_CPU_1V2 */
- regulator-name = "vddcpu";
- regulator-min-microvolt = <1250000>;
- regulator-max-microvolt = <1250000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd_ddr: buck2 { /* VDD_DDR_1V35 */
- regulator-name = "vdd_ddr";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd: buck3 { /* VDD_3V3_1V8 */
- regulator-name = "vdd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vddcore: buck4 { /* VDD_CORE_1V2 */
- regulator-name = "vddcore";
- regulator-min-microvolt = <1250000>;
- regulator-max-microvolt = <1250000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd_adc: ldo1 { /* VDD_ADC_1V8 */
- regulator-name = "vdd_adc";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- interrupts = <IT_CURLIM_LDO1 0>;
- };
-
- vdd_ldo2: ldo2 { /* LDO2_OUT_1V8 */
- regulator-name = "vdd_ldo2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- interrupts = <IT_CURLIM_LDO2 0>;
- };
-
- vdd_ldo3: ldo3 { /* LDO3_OUT */
- regulator-name = "vdd_ldo3";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- interrupts = <IT_CURLIM_LDO3 0>;
- };
-
- vdd_usb: ldo4 { /* VDD_USB_3V3 */
- regulator-name = "vdd_usb";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- interrupts = <IT_CURLIM_LDO4 0>;
- };
-
- vdd_sd: ldo5 { /* VDD_SD_3V3_1V8 */
- regulator-name = "vdd_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- interrupts = <IT_CURLIM_LDO5 0>;
- };
-
- vdd_sd2: ldo6 { /* VDD_SD2_3V3_1V8 */
- regulator-name = "vdd_sd2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- interrupts = <IT_CURLIM_LDO6 0>;
- };
-
- vref_ddr: vref_ddr { /* VREF_DDR_0V675 */
- regulator-name = "vref_ddr";
- regulator-always-on;
- };
-
- bst_out: boost { /* BST_OUT_5V2 */
- regulator-name = "bst_out";
- };
-
- vbus_otg: pwr_sw1 {
- regulator-name = "vbus_otg";
- interrupts = <IT_OCP_OTG 0>;
- };
-
- vbus_sw: pwr_sw2 {
- regulator-name = "vbus_sw";
- interrupts = <IT_OCP_SWOUT 0>;
- regulator-active-discharge = <1>;
- };
- };
-
- onkey {
- compatible = "st,stpmic1-onkey";
- interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
- interrupt-names = "onkey-falling", "onkey-rising";
- status = "okay";
- };
-
- watchdog {
- compatible = "st,stpmic1-wdt";
- status = "disabled";
- };
- };
-
- eeprom0: eeprom@50 {
- compatible = "atmel,24c256"; /* ST M24256 */
- reg = <0x50>;
- pagesize = <64>;
- };
-
- rv3032: rtc@51 {
- compatible = "microcrystal,rv3032";
- reg = <0x51>;
- interrupts-extended = <&gpioi 0 IRQ_TYPE_EDGE_FALLING>;
- };
-};
-
-&iwdg2 {
- timeout-sec = <32>;
- status = "okay";
-};
-
-&qspi {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&qspi_clk_pins_a
- &qspi_bk1_pins_a
- &qspi_cs1_pins_a>;
- pinctrl-1 = <&qspi_clk_sleep_pins_a
- &qspi_bk1_sleep_pins_a
- &qspi_cs1_sleep_pins_a>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- flash0: flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-rx-bus-width = <4>;
- spi-max-frequency = <108000000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-};
-
-/* Console UART */
-&uart4 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&uart4_pins_b>;
- pinctrl-1 = <&uart4_sleep_pins_b>;
- pinctrl-2 = <&uart4_idle_pins_b>;
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "okay";
-};
-
-/* Bluetooth */
-&uart7 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&uart7_pins_a>;
- pinctrl-1 = <&uart7_sleep_pins_a>;
- pinctrl-2 = <&uart7_idle_pins_a>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "infineon,cyw43439-bt", "brcm,bcm4329-bt";
- max-speed = <3000000>;
- device-wakeup-gpios = <&gpiog 9 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpioi 2 GPIO_ACTIVE_HIGH>;
- };
-};
-
-/* SDIO WiFi */
-&sdmmc1 {
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
- pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
- pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
- bus-width = <4>;
- cap-power-off-card;
- keep-power-in-suspend;
- non-removable;
- st,neg-edge;
- vmmc-supply = <&vdd>;
- mmc-pwrseq = <&sdio_pwrseq>;
- status = "okay";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- brcmf: bcrmf@1 { /* muRata 1YN */
- reg = <1>;
- compatible = "infineon,cyw43439-fmac", "brcm,bcm4329-fmac";
- interrupt-parent = <&gpioe>;
- interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "host-wake";
- };
-};
-
-/* eMMC */
-&sdmmc2 {
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a &sdmmc2_clk_pins_a>;
- pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a &sdmmc2_clk_pins_a>;
- pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
- bus-width = <8>;
- mmc-ddr-3_3v;
- no-sd;
- no-sdio;
- non-removable;
- st,neg-edge;
- vmmc-supply = <&vdd>;
- vqmmc-supply = <&vdd>;
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts b/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts
deleted file mode 100644
index c8b9818..0000000
--- a/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
-/*
- * Copyright (C) 2022 Marek Vasut <marex@denx.de>
- *
- * DHCOR STM32MP1 variant:
- * DHCR-STM32MP153C-C065-R051-V33-SPI-I-01LG
- * DHCOR PCB number: 586-100 or newer
- * DRC Compact PCB number: 627-100 or newer
- */
-
-/dts-v1/;
-
-#include "stm32mp153.dtsi"
-#include "stm32mp15xc.dtsi"
-#include "stm32mp15xx-dhcor-som.dtsi"
-#include "stm32mp15xx-dhcor-drc-compact.dtsi"
-
-/ {
- model = "DH electronics STM32MP153C DHCOR DRC Compact";
- compatible = "dh,stm32mp153c-dhcor-drc-compact",
- "dh,stm32mp153c-dhcor-som",
- "st,stm32mp153";
-};
-
-&m_can1 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&m_can1_pins_c>;
- pinctrl-1 = <&m_can1_sleep_pins_c>;
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32mp157a-dhcor-avenger96.dts b/arch/arm/dts/stm32mp157a-dhcor-avenger96.dts
deleted file mode 100644
index 2e3c9fb..0000000
--- a/arch/arm/dts/stm32mp157a-dhcor-avenger96.dts
+++ /dev/null
@@ -1,38 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
-/*
- * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
- * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
- * Copyright (C) 2020 Marek Vasut <marex@denx.de>
- *
- * DHCOR STM32MP1 variant:
- * DHCR-STM32MP157A-C065-R102-V18-SPI-C-01LG
- * DHCOR PCB number: 586-100 or newer
- * Avenger96 PCB number: 588-200 or newer
- */
-
-/dts-v1/;
-
-#include "stm32mp157.dtsi"
-#include "stm32mp15xc.dtsi"
-#include "stm32mp15xx-dhcor-som.dtsi"
-#include "stm32mp15xx-dhcor-avenger96.dtsi"
-
-/ {
- model = "Arrow Electronics STM32MP157A Avenger96 board";
- compatible = "arrow,stm32mp157a-avenger96", "dh,stm32mp157a-dhcor-som",
- "st,stm32mp157";
-};
-
-&m_can1 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&m_can1_pins_b>;
- pinctrl-1 = <&m_can1_sleep_pins_b>;
- status = "disabled";
-};
-
-&m_can2 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&m_can2_pins_a>;
- pinctrl-1 = <&m_can2_sleep_pins_a>;
- status = "disabled";
-};
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index dd67e96..4c334e4 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -12,6 +12,7 @@
/ {
aliases {
+ eeprom0 = &eeprom0;
i2c1 = &i2c2;
i2c3 = &i2c4;
i2c4 = &i2c5;
@@ -19,15 +20,14 @@
mmc1 = &sdmmc2;
spi0 = &qspi;
usb0 = &usbotg_hs;
- eeprom0 = &eeprom0;
};
config {
- u-boot,boot-led = "heartbeat";
- u-boot,error-led = "error";
- dh,som-coding-gpios = <&gpiof 12 0>, <&gpiof 13 0>, <&gpiof 15 0>;
dh,ddr3-coding-gpios = <&gpioz 6 0>, <&gpioz 7 0>;
dh,mac-coding-gpios = <&gpioc 3 0>;
+ dh,som-coding-gpios = <&gpiof 12 0>, <&gpiof 13 0>, <&gpiof 15 0>;
+ u-boot,boot-led = "heartbeat";
+ u-boot,error-led = "error";
};
};
@@ -36,17 +36,6 @@
/delete-property/ st,eth-ref-clk-sel;
};
-ðernet0_rmii_pins_a {
- pins1 {
- pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
- <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
- <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
- <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
- <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
- };
-};
-
&i2c4 {
bootph-all;
bootph-pre-ram;
@@ -62,36 +51,6 @@
};
};
-&phy0 {
- /delete-property/ reset-gpios;
-};
-
-&pinctrl {
- mco2_pins_a: mco2-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- };
-
- mco2_sleep_pins_a: mco2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
- };
- };
-};
-
-&pmic {
- bootph-all;
- bootph-pre-ram;
-
- regulators {
- bootph-pre-ram;
- };
-};
-
&flash0 {
bootph-pre-ram;
@@ -123,6 +82,19 @@
};
};
+&phy0 {
+ /delete-property/ reset-gpios;
+};
+
+&pmic {
+ bootph-all;
+ bootph-pre-ram;
+
+ regulators {
+ bootph-pre-ram;
+ };
+};
+
&qspi {
bootph-pre-ram;
};
@@ -269,6 +241,14 @@
};
};
+®11 {
+ bootph-pre-ram;
+};
+
+®18 {
+ bootph-pre-ram;
+};
+
&sdmmc1 {
bootph-pre-ram;
st,use-ckin;
@@ -331,14 +311,6 @@
};
};
-®11 {
- bootph-pre-ram;
-};
-
-®18 {
- bootph-pre-ram;
-};
-
&usb33 {
bootph-pre-ram;
};
diff --git a/arch/arm/include/asm/mach-imx/hab.h b/arch/arm/include/asm/mach-imx/hab.h
index 2abf28e..c0caf57 100644
--- a/arch/arm/include/asm/mach-imx/hab.h
+++ b/arch/arm/include/asm/mach-imx/hab.h
@@ -132,13 +132,14 @@
HAB_TGT_ANY = 0x55,
};
-struct imx_sec_config_fuse_t {
+struct imx_fuse {
int bank;
int word;
};
#if defined(CONFIG_IMX_HAB)
-extern struct imx_sec_config_fuse_t const imx_sec_config_fuse;
+extern struct imx_fuse const imx_sec_config_fuse;
+extern struct imx_fuse const imx_field_return_fuse;
#endif
/*Function prototype description*/
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 21d955b..011cca5 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -293,3 +293,5 @@
obj-$(CONFIG_SPL_BOOTROM_SUPPORT) += spl_imx_romapi.o
obj-$(CONFIG_IMX8_ROMAPI) += romapi.o
+
+obj-$(CONFIG_MX7)$(CONFIG_IMX8M) += snvs.o
diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
index a8107f4..6000923 100644
--- a/arch/arm/mach-imx/hab.c
+++ b/arch/arm/mach-imx/hab.c
@@ -26,6 +26,14 @@
#define IS_HAB_ENABLED_BIT \
(is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
((is_soc_type(MXC_SOC_MX7) || is_soc_type(MXC_SOC_IMX8M)) ? 0x2000000 : 0x2))
+#define FIELD_RETURN_FUSE_MASK \
+ (is_imx8mp() ? 0xFFFFFFFF : 0x00000001)
+/*
+ * The fuse pattern for i.MX8M Plus is 0x28001401, but bit 2 is already set from factory.
+ * This means when field return is set, the fuse word value reads 0x28001405
+ */
+#define FIELD_RETURN_PATTERN \
+ (is_imx8mp() ? 0x28001405 : 0x00000001)
#ifdef CONFIG_MX7ULP
#define HAB_M4_PERSISTENT_START ((soc_rev() >= CHIP_REV_2_0) ? 0x20008040 : \
@@ -870,18 +878,30 @@
bool imx_hab_is_enabled(void)
{
- struct imx_sec_config_fuse_t *fuse =
- (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
+ struct imx_fuse *sec_config =
+ (struct imx_fuse *)&imx_sec_config_fuse;
+ struct imx_fuse *field_return =
+ (struct imx_fuse *)&imx_field_return_fuse;
uint32_t reg;
+ bool is_enabled;
int ret;
- ret = fuse_read(fuse->bank, fuse->word, ®);
+ ret = fuse_read(sec_config->bank, sec_config->word, ®);
if (ret) {
- puts("\nSecure boot fuse read error\n");
+ puts("Secure boot fuse read error\n");
return ret;
}
+ is_enabled = reg & IS_HAB_ENABLED_BIT;
+ if (is_enabled) {
+ ret = fuse_read(field_return->bank, field_return->word, ®);
+ if (ret) {
+ puts("Field return fuse read error\n");
+ return ret;
+ }
+ is_enabled = (reg & FIELD_RETURN_FUSE_MASK) != FIELD_RETURN_PATTERN;
+ }
- return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
+ return is_enabled;
}
int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index a72329e..9588b8b 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -34,13 +34,20 @@
#include <linux/bitfield.h>
#include <linux/sizes.h>
+#include "../snvs.h"
+
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_IMX_HAB)
-struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
+struct imx_fuse const imx_sec_config_fuse = {
.bank = 1,
.word = 3,
};
+
+struct imx_fuse const imx_field_return_fuse = {
+ .bank = 8,
+ .word = 3,
+};
#endif
int timer_init(void)
@@ -571,6 +578,8 @@
writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR);
/* Clear interrupt status */
writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR);
+
+ init_snvs();
}
static void imx8m_setup_csu_tzasc(void)
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index 7c28fa3..21e0e7d 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -42,12 +42,18 @@
struct rom_api *g_rom_api = (struct rom_api *)0x1980;
-#ifdef CONFIG_ENV_IS_IN_MMC
+#if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) || CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
__weak int board_mmc_get_env_dev(int devno)
{
return devno;
}
+#ifdef CONFIG_SYS_MMC_ENV_DEV
+#define IMX9_MMC_ENV_DEV CONFIG_SYS_MMC_ENV_DEV
+#else
+#define IMX9_MMC_ENV_DEV 0
+#endif
+
int mmc_get_env_dev(void)
{
int ret;
@@ -59,7 +65,7 @@
if (ret != ROM_API_OKAY) {
puts("ROMAPI: failure at query_boot_info\n");
- return CONFIG_SYS_MMC_ENV_DEV;
+ return IMX9_MMC_ENV_DEV;
}
boot_type = boot >> 16;
@@ -69,7 +75,7 @@
/* If not boot from sd/mmc, use default value */
if (boot_type != BOOT_TYPE_SD && boot_type != BOOT_TYPE_MMC)
- return env_get_ulong("mmcdev", 10, CONFIG_SYS_MMC_ENV_DEV);
+ return env_get_ulong("mmcdev", 10, IMX9_MMC_ENV_DEV);
return board_mmc_get_env_dev(boot_instance);
}
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index 9b40fe9..d4a6173 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -51,10 +51,15 @@
#endif
#if defined(CONFIG_IMX_HAB)
-struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
+struct imx_fuse const imx_sec_config_fuse = {
.bank = 0,
.word = 6,
};
+
+struct imx_fuse const imx_field_return_fuse = {
+ .bank = 5,
+ .word = 6,
+};
#endif
u32 get_nr_cpus(void)
diff --git a/arch/arm/mach-imx/mx7/Makefile b/arch/arm/mach-imx/mx7/Makefile
index f1436e2..fec228a 100644
--- a/arch/arm/mach-imx/mx7/Makefile
+++ b/arch/arm/mach-imx/mx7/Makefile
@@ -3,5 +3,5 @@
# (C) Copyright 2015 Freescale Semiconductor, Inc.
#
-obj-y := soc.o clock.o clock_slice.o ddr.o snvs.o
+obj-y := soc.o clock.o clock_slice.o ddr.o
obj-$(CONFIG_ARMV7_PSCI) += psci-mx7.o psci-suspend.o
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 1b891a2..e504c1f 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -127,10 +127,15 @@
#endif
#if defined(CONFIG_IMX_HAB)
-struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
+struct imx_fuse const imx_sec_config_fuse = {
.bank = 1,
.word = 3,
};
+
+struct imx_fuse const imx_field_return_fuse = {
+ .bank = 8,
+ .word = 3,
+};
#endif
static bool is_mx7d(void)
diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c
index 980e022..61d331e 100644
--- a/arch/arm/mach-imx/mx7ulp/soc.c
+++ b/arch/arm/mach-imx/mx7ulp/soc.c
@@ -38,10 +38,15 @@
static char *get_reset_cause(char *);
#if defined(CONFIG_IMX_HAB)
-struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
+struct imx_fuse const imx_sec_config_fuse = {
.bank = 29,
.word = 6,
};
+
+struct imx_fuse const imx_field_return_fuse = {
+ .bank = 9,
+ .word = 6,
+};
#endif
#define ROM_VERSION_ADDR 0x80
diff --git a/arch/arm/mach-imx/mx7/snvs.c b/arch/arm/mach-imx/snvs.c
similarity index 100%
rename from arch/arm/mach-imx/mx7/snvs.c
rename to arch/arm/mach-imx/snvs.c
diff --git a/arch/arm/mach-imx/snvs.h b/arch/arm/mach-imx/snvs.h
new file mode 100644
index 0000000..4ce9781
--- /dev/null
+++ b/arch/arm/mach-imx/snvs.h
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 Linaro
+ */
+
+void init_snvs(void);
diff --git a/arch/arm/mach-renesas/include/mach/rzg2l.h b/arch/arm/mach-renesas/include/mach/rzg2l.h
index 057df5c..c49a71a 100644
--- a/arch/arm/mach-renesas/include/mach/rzg2l.h
+++ b/arch/arm/mach-renesas/include/mach/rzg2l.h
@@ -8,6 +8,6 @@
#define __ASM_ARCH_RZG2L_H
#define GICD_BASE 0x11900000
-#define GICR_BASE 0x11960000
+#define GICR_BASE 0x11940000
#endif /* __ASM_ARCH_RZG2L_H */
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index edccb2a..0c28241 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -169,15 +169,36 @@
}
#endif
-#if defined(CONFIG_XPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+#if defined(CONFIG_XPL_BUILD)
+#if defined(CONFIG_TPL_BUILD)
static void rk3399_force_power_on_reset(void)
{
+ const struct rockchip_cru *cru = rockchip_get_cru();
ofnode node;
struct gpio_desc sysreset_gpio;
- if (!IS_ENABLED(CONFIG_SPL_GPIO)) {
+ /*
+ * The RK3399 resets only 'almost all logic' (see also in the
+ * TRM "3.9.4 Global software reset"), when issuing a software
+ * reset. This may cause issues during boot-up for some
+ * configurations of the application software stack.
+ *
+ * To work around this, we test whether the last reset reason
+ * was a power-on reset and (if not) issue an overtemp-reset to
+ * reset the entire module.
+ *
+ * While this was previously fixed by modifying the various
+ * places that could generate a software reset (e.g. U-Boot's
+ * sysreset driver, the ATF or Linux), we now have it here to
+ * ensure that we no longer have to track this through the
+ * various components.
+ */
+ if (cru->glb_rst_st == 0)
+ return;
+
+ if (!IS_ENABLED(CONFIG_TPL_GPIO)) {
debug("%s: trying to force a power-on reset but no GPIO "
- "support in SPL!\n", __func__);
+ "support in TPL!\n", __func__);
return;
}
@@ -198,6 +219,11 @@
dm_gpio_set_value(&sysreset_gpio, 1);
}
+void tpl_board_init(void)
+{
+ rk3399_force_power_on_reset();
+}
+# else
void __weak led_setup(void)
{
}
@@ -205,28 +231,6 @@
void spl_board_init(void)
{
led_setup();
-
- if (IS_ENABLED(CONFIG_SPL_GPIO)) {
- struct rockchip_cru *cru = rockchip_get_cru();
-
- /*
- * The RK3399 resets only 'almost all logic' (see also in the
- * TRM "3.9.4 Global software reset"), when issuing a software
- * reset. This may cause issues during boot-up for some
- * configurations of the application software stack.
- *
- * To work around this, we test whether the last reset reason
- * was a power-on reset and (if not) issue an overtemp-reset to
- * reset the entire module.
- *
- * While this was previously fixed by modifying the various
- * places that could generate a software reset (e.g. U-Boot's
- * sysreset driver, the ATF or Linux), we now have it here to
- * ensure that we no longer have to track this through the
- * various components.
- */
- if (cru->glb_rst_st != 0)
- rk3399_force_power_on_reset();
- }
}
#endif
+#endif
diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig
index e646f71..ce327ed 100644
--- a/arch/arm/mach-rockchip/rk3568/Kconfig
+++ b/arch/arm/mach-rockchip/rk3568/Kconfig
@@ -32,6 +32,19 @@
help
Powkiddy X55 handheld gaming console with an RK3566 SoC.
+config TARGET_QNAP_TS433_RK3568
+ bool "QNAP-TS433"
+ help
+ Qnap TS433 4-bay NAS with a RK3568 SoC.
+
+ It provides the following featureset:
+ * 4GB LPDDR4
+ * 4GB eMMC
+ * 2 SATA ports connected to two RK3568's SATA controllers
+ * 2 SATA ports connected to a JMicron JMB58x AHCI SATA controller
+ * 1 1G network controller
+ * 1 2.5G Realtek RTL8125 network controller
+
config TARGET_QUARTZ64_RK3566
bool "Pine64 Quartz64"
help
@@ -70,6 +83,7 @@
source "board/hardkernel/odroid_m1s/Kconfig"
source "board/pine64/quartz64_rk3566/Kconfig"
source "board/powkiddy/x55/Kconfig"
+source "board/qnap/ts433/Kconfig"
source "board/radxa/zero3-rk3566/Kconfig"
source "board/xunlong/orangepi-3b-rk3566/Kconfig"
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig
index 6f28a31..b5a0e62 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -29,6 +29,24 @@
- 3.5mm Headphone out, 2.0mm PH-2A Mic in
- 5V Fan connector, PWM beeper, IR receiver, RTC battery connector
+config TARGET_GENBOOK_CM5_RK3588
+ bool "Cool Pi CM5 GenBook"
+ select BOARD_LATE_INIT
+ help
+ GeenBook is a notebook based on Rockchip RK3588, and works as a carrier
+ board connect with CM5 SOM.
+
+ Specification:
+ - Rockchip RK3588
+ - LPDDR5X 8/32 GB
+ - eMMC 64 GB
+ - HDMI Type A out x 1
+ - USB 3.0 Host x 1
+ - USB-C 3.0 with DisplayPort AltMode
+ - PCIE M.2 E Key for RTL8852BE Wireless connection
+ - PCIE M.2 M Key for NVME connection
+ - eDP panel with 1920x1080
+
config TARGET_JAGUAR_RK3588
bool "Theobroma Systems SBC-RK3588-AMR (Jaguar)"
select BOARD_LATE_INIT
@@ -367,6 +385,7 @@
default 0x00a00000
source "board/armsom/sige7-rk3588/Kconfig"
+source "board/coolpi/genbook_cm5_rk3588/Kconfig"
source "board/edgeble/neural-compute-module-6/Kconfig"
source "board/friendlyelec/cm3588-nas-rk3588/Kconfig"
source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index bbb9329..6b880f1 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -21,6 +21,10 @@
#include <timestamp.h>
#endif
+__weak void tpl_board_init(void)
+{
+}
+
void board_init_f(ulong dummy)
{
struct udevice *dev;
@@ -54,6 +58,8 @@
if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER))
timer_init();
+ tpl_board_init();
+
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret) {
printf("DRAM init failed: %d\n", ret);
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index bf32ead..de35658 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -10,6 +10,7 @@
dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2.dtb
dtb-$(CONFIG_TARGET_TH1520_LPI4A) += th1520-lichee-pi-4a.dtb
dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-mbv32.dtb
+dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-mbv64.dtb
dtb-$(CONFIG_TARGET_ASPEED_AST2700_IBEX) += ast2700-ibex.dtb
include $(srctree)/scripts/Makefile.dts
diff --git a/arch/riscv/dts/xilinx-mbv64.dts b/arch/riscv/dts/xilinx-mbv64.dts
new file mode 100644
index 0000000..4d65d33
--- /dev/null
+++ b/arch/riscv/dts/xilinx-mbv64.dts
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for AMD MicroBlaze V
+ *
+ * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
+
+/dts-v1/;
+
+#include "binman.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "AMD MicroBlaze V 64bit";
+ compatible = "qemu,mbv", "amd,mbv";
+
+ cpus: cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ timebase-frequency = <100000000>;
+ cpu_0: cpu@0 {
+ compatible = "amd,mbv64", "riscv";
+ device_type = "cpu";
+ reg = <0>;
+ riscv,isa = "rv64imafdc";
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ clock-frequency = <100000000>;
+ cpu0_intc: interrupt-controller {
+ compatible = "riscv,cpu-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+ };
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ bootargs = "earlycon";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0 0x80000000 0 0x40000000>;
+ };
+
+ clk100: clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
+
+ axi: axi {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "simple-bus";
+ ranges;
+ bootph-all;
+
+ axi_intc: interrupt-controller@41200000 {
+ compatible = "xlnx,xps-intc-1.00.a";
+ reg = <0 0x41200000 0 0x1000>;
+ interrupt-controller;
+ interrupt-parent = <&cpu0_intc>;
+ #interrupt-cells = <2>;
+ kind-of-intr = <0>;
+ };
+
+ xlnx_timer0: timer@41c00000 {
+ compatible = "xlnx,xps-timer-1.00.a";
+ reg = <0 0x41c00000 0 0x1000>;
+ interrupt-parent = <&axi_intc>;
+ interrupts = <0 2>;
+ bootph-all;
+ xlnx,one-timer-only = <0>;
+ clock-names = "s_axi_aclk";
+ clocks = <&clk100>;
+ };
+
+ uart0: serial@40600000 {
+ compatible = "xlnx,xps-uartlite-1.00.a";
+ reg = <0 0x40600000 0 0x1000>;
+ interrupt-parent = <&axi_intc>;
+ interrupts = <1 2>;
+ bootph-all;
+ clocks = <&clk100>;
+ current-speed = <115200>;
+ xlnx,data-bits = <8>;
+ xlnx,use-parity = <0>;
+ };
+ };
+};
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index 06f8c13..d1c4dcf 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -253,6 +253,19 @@
return mentry->tag;
}
+void sandbox_map_list(void)
+{
+ struct sandbox_mapmem_entry *mentry;
+ struct sandbox_state *state = state_get_current();
+
+ printf("Sandbox memory-mapping\n");
+ printf("%8s %16s %6s\n", "Addr", "Mapping", "Refcnt");
+ list_for_each_entry(mentry, &state->mapmem_head, sibling_node) {
+ printf("%8lx %p %6d\n", mentry->tag, mentry->ptr,
+ mentry->refcnt);
+ }
+}
+
unsigned long sandbox_read(const void *addr, enum sandboxio_size_t size)
{
struct sandbox_state *state = state_get_current();
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index 81752ed..2940768 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -449,6 +449,16 @@
gd->ram_size = state->ram_size;
}
+static int sandbox_cmdline_cb_native(struct sandbox_state *state,
+ const char *arg)
+{
+ state->native = true;
+
+ return 0;
+}
+SANDBOX_CMDLINE_OPT_SHORT(native, 'N', 0,
+ "Use native mode (host-based EFI boot filename)");
+
void state_show(struct sandbox_state *state)
{
char **p;
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 3017b33..dee2801 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1515,7 +1515,7 @@
flash-stick@1 {
reg = <1>;
compatible = "sandbox,usb-flash";
- sandbox,filepath = "testflash1.bin";
+ sandbox,filepath = "flash1.img";
};
flash-stick@2 {
diff --git a/arch/sandbox/include/asm/cpu.h b/arch/sandbox/include/asm/cpu.h
index c97ac7b..682bb33 100644
--- a/arch/sandbox/include/asm/cpu.h
+++ b/arch/sandbox/include/asm/cpu.h
@@ -8,4 +8,7 @@
void cpu_sandbox_set_current(const char *name);
+/* show the mapping of sandbox addresses to pointers */
+void sandbox_map_list(void);
+
#endif /* __SANDBOX_CPU_H */
diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
index a23bd64..3d09170 100644
--- a/arch/sandbox/include/asm/io.h
+++ b/arch/sandbox/include/asm/io.h
@@ -235,7 +235,7 @@
* nomap_sysmem() - pass through an address unchanged
*
* This is used to indicate an address which should NOT be mapped, e.g. in
- * SMBIOS tables. Using this function instead of a case shows that the sandbox
+ * SMBIOS tables. Using this function instead of a cast shows that the sandbox
* conversion has been done
*/
static inline void *nomap_sysmem(phys_addr_t paddr, unsigned long len)
diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h
index e7dc017..dc21a62 100644
--- a/arch/sandbox/include/asm/state.h
+++ b/arch/sandbox/include/asm/state.h
@@ -101,6 +101,7 @@
bool disable_eth; /* Disable Ethernet devices */
bool disable_sf_bootdevs; /* Don't bind SPI flash bootdevs */
bool upl; /* Enable Universal Payload (UPL) */
+ bool native; /* Adjust to reflect host arch */
/* Pointer to information for each SPI bus/cs */
struct sandbox_spi_info spi[CONFIG_SANDBOX_SPI_MAX_BUS]
diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts
index b867468..39d1d32 100644
--- a/arch/x86/dts/coreboot.dts
+++ b/arch/x86/dts/coreboot.dts
@@ -54,6 +54,13 @@
menu-inset = <3>;
menuitem-gap-y = <1>;
};
+
+ cedit-theme {
+ font-size = <30>;
+ menu-inset = <3>;
+ menuitem-gap-y = <1>;
+ menu-title-margin-x = <30>;
+ };
};
sysinfo {
diff --git a/board/armltd/total_compute/Makefile b/board/armltd/total_compute/Makefile
index 8b10458..f1ef5a0 100644
--- a/board/armltd/total_compute/Makefile
+++ b/board/armltd/total_compute/Makefile
@@ -4,3 +4,4 @@
# Usama Arif <usama.arif@arm.com>
obj-y := total_compute.o
+obj-y += lowlevel_init.o
diff --git a/board/armltd/total_compute/lowlevel_init.S b/board/armltd/total_compute/lowlevel_init.S
new file mode 100644
index 0000000..3c06937
--- /dev/null
+++ b/board/armltd/total_compute/lowlevel_init.S
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2024 Arm Limited
+ */
+
+.global save_boot_params
+save_boot_params:
+ /* The firmware provided FDT address via x1 */
+ adr x8, fw_dtb_pointer
+ str x1, [x8]
+
+ b save_boot_params_ret
diff --git a/board/armltd/total_compute/total_compute.c b/board/armltd/total_compute/total_compute.c
index e1b4f49..1336d2e 100644
--- a/board/armltd/total_compute/total_compute.c
+++ b/board/armltd/total_compute/total_compute.c
@@ -7,21 +7,18 @@
#include <config.h>
#include <dm.h>
#include <dm/platform_data/serial_pl01x.h>
+#include <cpu_func.h>
+#include <env.h>
+#include <linux/sizes.h>
+
#include <asm/armv8/mmu.h>
#include <asm/global_data.h>
-
-static const struct pl01x_serial_plat serial_plat = {
- .base = UART0_BASE,
- .type = TYPE_PL011,
- .clock = CFG_PL011_CLOCK,
-};
+#include <asm/system.h>
-U_BOOT_DRVINFO(total_compute_serials) = {
- .name = "serial_pl01x",
- .plat = &serial_plat,
-};
+/* +1 is end of list which needs to be empty */
+#define TC_MEM_MAP_MAX (1 + CONFIG_NR_DRAM_BANKS + 1)
-static struct mm_region total_compute_mem_map[] = {
+static struct mm_region total_compute_mem_map[TC_MEM_MAP_MAX] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
@@ -29,20 +26,49 @@
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0xff80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- /* List terminator */
- 0,
}
};
struct mm_region *mem_map = total_compute_mem_map;
+/*
+ * Push the variable into the .data section so that it
+ * does not get cleared later.
+ */
+unsigned long __section(".data") fw_dtb_pointer;
+
+void *board_fdt_blob_setup(int *err)
+{
+ *err = 0;
+ if (fdt_magic(fw_dtb_pointer) != FDT_MAGIC) {
+ *err = -ENXIO;
+ return NULL;
+ }
+
+ return (void *)fw_dtb_pointer;
+}
+
+int misc_init_r(void)
+{
+ size_t base;
+
+ if (!env_get("fdt_addr_r"))
+ env_set_hex("fdt_addr_r", fw_dtb_pointer);
+
+ if (!env_get("kernel_addr_r")) {
+ /*
+ * The kernel has to be 2M aligned and the first 64K at the
+ * start of SDRAM is reserved for DTB.
+ */
+ base = gd->ram_base + SZ_2M;
+ assert(IS_ALIGNED(base, SZ_2M));
+
+ env_set_hex("kernel_addr_r", base);
+ }
+
+ return 0;
+}
+
int board_init(void)
{
return 0;
@@ -50,19 +76,42 @@
int dram_init(void)
{
- gd->ram_size = PHYS_SDRAM_1_SIZE;
- return 0;
+ return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+ return fdtdec_setup_memory_banksize();
+}
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+void build_mem_map(void)
+{
+ int i;
- return 0;
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ /*
+ * The first node is for I/O device, start from node 1 for
+ * updating DRAM info.
+ */
+ mem_map[i + 1].virt = gd->bd->bi_dram[i].start;
+ mem_map[i + 1].phys = gd->bd->bi_dram[i].start;
+ mem_map[i + 1].size = gd->bd->bi_dram[i].size;
+ mem_map[i + 1].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE;
+ }
+}
+
+void enable_caches(void)
+{
+ build_mem_map();
+
+ icache_enable();
+ dcache_enable();
+}
+
+u64 get_page_table_size(void)
+{
+ return SZ_256K;
}
/* Nothing to be done here as handled by PSCI interface */
diff --git a/board/armltd/total_compute/total_compute.env b/board/armltd/total_compute/total_compute.env
new file mode 100644
index 0000000..7924632
--- /dev/null
+++ b/board/armltd/total_compute/total_compute.env
@@ -0,0 +1,39 @@
+/* DRAM1 + 0x2000_0000 */
+load_addr=0xa0000000
+/* DRAM1 + 0x0800_0000 */
+initrd_addr_r=0x88000000
+
+bootcmd=
+ virtio scan;
+ if virtio info; then
+ blk_dev=virtio;
+ else;
+ blk_dev=mmc;
+ fi;
+ echo block device is ${blk_dev};
+ if part number ${blk_dev} 0 vbmeta is_avb; then
+ echo '${blk_dev} with vbmeta partition detected.';
+ echo 'Starting Android Verified boot...';
+ avb init ${blk_dev} 0;
+ if avb verify; then
+ set bootargs $bootargs $avb_bootargs;
+ part start ${blk_dev} 0 boot boot_start;
+ part size ${blk_dev} 0 boot boot_size;
+ ${blk_dev} read ${load_addr} ${boot_start} ${boot_size};
+ bootm ${load_addr} ${load_addr} ${fdt_addr_r};
+ else;
+ echo 'AVB verification failed.';
+ exit;
+ fi;
+ elif part number ${blk_dev} 0 system is_non_avb_android; then
+ echo 'Booting Android non-AVB...';
+ booti ${kernel_addr_r} ${initrd_addr_r} ${fdt_addr_r};
+ elif iminfo ${load_addr}; then
+ echo 'Booting FIT image...';
+ bootm ${load_addr} ${load_addr} ${fdt_addr_r};
+ else;
+ echo 'Booting Debian...';
+ set bootargs $bootargs root=/dev/mmcblk0p1 rw;
+ booti ${kernel_addr_r} - ${fdt_addr_r};
+ fi;
+ echo 'ERROR: No valid image to boot the system. Aborting boot sequence.';
diff --git a/board/coolpi/genbook_cm5_rk3588/Kconfig b/board/coolpi/genbook_cm5_rk3588/Kconfig
new file mode 100644
index 0000000..67086ea
--- /dev/null
+++ b/board/coolpi/genbook_cm5_rk3588/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_GENBOOK_CM5_RK3588
+
+config SYS_BOARD
+ default "genbook_cm5_rk3588"
+
+config SYS_VENDOR
+ default "coolpi"
+
+config SYS_CONFIG_NAME
+ default "genbook-cm5-rk3588"
+
+endif
diff --git a/board/coolpi/genbook_cm5_rk3588/MAINTAINERS b/board/coolpi/genbook_cm5_rk3588/MAINTAINERS
new file mode 100644
index 0000000..0496cc9
--- /dev/null
+++ b/board/coolpi/genbook_cm5_rk3588/MAINTAINERS
@@ -0,0 +1,7 @@
+GENBOOK-CM5-RK3588
+M: Andy Yan <andyshrk@163.com>
+S: Maintained
+F: board/coolpi/genbook-cm5-rk3588
+F: include/configs/genbook-cm5-rk3588.h
+F: configs/coolpi-cm5-genbook-rk3588_defconfig
+F: arch/arm/dts/rk3588-coolpi-cm5-genbook-u-boot.dtsi
diff --git a/board/emulation/qemu-arm/Kconfig b/board/emulation/qemu-arm/Kconfig
index e21c135..80ab9d8 100644
--- a/board/emulation/qemu-arm/Kconfig
+++ b/board/emulation/qemu-arm/Kconfig
@@ -5,6 +5,7 @@
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
+ select HAS_CUSTOM_SYS_INIT_SP_ADDR
select QFW if ACPI
select QFW_MMIO if CMD_QFW
imply VIRTIO_MMIO
diff --git a/board/freescale/imx93_evk/imx93_evk.c b/board/freescale/imx93_evk/imx93_evk.c
index 341831a..c9171df 100644
--- a/board/freescale/imx93_evk/imx93_evk.c
+++ b/board/freescale/imx93_evk/imx93_evk.c
@@ -58,7 +58,7 @@
int board_late_init(void)
{
-#ifdef CONFIG_ENV_IS_IN_MMC
+#if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) || CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
board_late_mmc_env_init();
#endif
diff --git a/board/hoperun/hihope-rzg2/hihope-rzg2.c b/board/hoperun/hihope-rzg2/hihope-rzg2.c
index 0966e25..8b635ef 100644
--- a/board/hoperun/hihope-rzg2/hihope-rzg2.c
+++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c
@@ -96,15 +96,15 @@
int board_fit_config_name_match(const char *name)
{
if (is_hoperun_hihope_rzg2_board("hoperun,hihope-rzg2m") &&
- !strcmp(name, "r8a774a1-hihope-rzg2m-u-boot"))
+ !strcmp(name, "r8a774a1-hihope-rzg2m-ex"))
return 0;
if (is_hoperun_hihope_rzg2_board("hoperun,hihope-rzg2n") &&
- !strcmp(name, "r8a774b1-hihope-rzg2n-u-boot"))
+ !strcmp(name, "r8a774b1-hihope-rzg2n-ex"))
return 0;
if (is_hoperun_hihope_rzg2_board("hoperun,hihope-rzg2h") &&
- !strcmp(name, "r8a774e1-hihope-rzg2h-u-boot"))
+ !strcmp(name, "r8a774e1-hihope-rzg2h-ex"))
return 0;
return -1;
diff --git a/board/qnap/ts433/Kconfig b/board/qnap/ts433/Kconfig
new file mode 100644
index 0000000..b00e1f9
--- /dev/null
+++ b/board/qnap/ts433/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_QNAP_TS433_RK3568
+
+config SYS_BOARD
+ default "qnap_ts433"
+
+config SYS_VENDOR
+ default "qnap"
+
+config SYS_CONFIG_NAME
+ default "qnap_ts433"
+
+endif
diff --git a/board/qnap/ts433/MAINTAINERS b/board/qnap/ts433/MAINTAINERS
new file mode 100644
index 0000000..c2b31ad
--- /dev/null
+++ b/board/qnap/ts433/MAINTAINERS
@@ -0,0 +1,8 @@
+QNAP-TS433
+M: Heiko Stuebner <heiko@sntech.de>
+S: Maintained
+F: board/qnap/ts433/
+F: doc/board/qnap/
+F: include/configs/qnap_ts433.h
+F: configs/qnap-ts433-rk3568_defconfig
+F: arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi
diff --git a/board/renesas/rzg2l/MAINTAINERS b/board/renesas/rzg2l/MAINTAINERS
index 0a51391..0e656e2 100644
--- a/board/renesas/rzg2l/MAINTAINERS
+++ b/board/renesas/rzg2l/MAINTAINERS
@@ -1,6 +1,6 @@
RENESAS RZG2L BOARD FAMILY
M: Paul Barker <paul.barker.ct@bp.renesas.com>
S: Supported
-F: arch/arm/dts/rz-smarc-common.dtsi
+N: rz-smarc
N: rzg2l
N: r9a07g044
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index 8f619e5..5f81be5 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -28,6 +28,12 @@
F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
F: arch/arm/dts/rk3328-nanopi-r2s.dts
+NANOPI-R2S-PLUS-RK3328
+M: Jonas Karlman <jonas@kwiboo.se>
+S: Maintained
+F: configs/nanopi-r2s-plus-rk3328_defconfig
+F: arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi
+
ORANGEPI-R1-PLUS-RK3328
M: Tianling Shen <cnsztl@gmail.com>
S: Maintained
diff --git a/board/ti/j784s4/MAINTAINERS b/board/ti/j784s4/MAINTAINERS
index b7605ff3..e92e8d0 100644
--- a/board/ti/j784s4/MAINTAINERS
+++ b/board/ti/j784s4/MAINTAINERS
@@ -8,6 +8,7 @@
F: configs/j784s4_evm_a72_defconfig
F: arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
F: arch/arm/dts/k3-j784s4-r5-evm.dts
+F: arch/arm/dts/k3-j784s4-r5.dtsi
F: arch/arm/dts/k3-j784s4-ddr.dtsi
F: arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi
F: doc/board/ti/j784s4_evm.rst
diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig
index c7df4ab..0ff8440 100644
--- a/board/xilinx/Kconfig
+++ b/board/xilinx/Kconfig
@@ -45,7 +45,7 @@
default 0x1000 if ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2
default 0x8000 if MICROBLAZE
default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP
- default 0x23000000 if TARGET_XILINX_MBV
+ default 0x83000000 if TARGET_XILINX_MBV
depends on OF_BOARD || OF_SEPARATE
help
Offset in the memory where the board configuration DTB is placed.
diff --git a/boot/Kconfig b/boot/Kconfig
index b9287c6..7dd30a0 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -1699,7 +1699,7 @@
memory
config ARCH_FIXUP_FDT_MEMORY
- bool "Enable arch_fixup_memory_banks() call"
+ bool "Enable fdt_fixup_memory_banks() call"
default y
help
Enable FDT memory map syncup before OS boot. This feature can be
diff --git a/boot/Makefile b/boot/Makefile
index 0e0afad..43def7c 100644
--- a/boot/Makefile
+++ b/boot/Makefile
@@ -59,6 +59,9 @@
obj-$(CONFIG_$(PHASE_)EXPO) += expo.o scene.o expo_build.o
obj-$(CONFIG_$(PHASE_)EXPO) += scene_menu.o scene_textline.o
+ifdef CONFIG_COREBOOT_SYSINFO
+obj-$(CONFIG_$(SPL_TPL_)EXPO) += expo_build_cb.o
+endif
obj-$(CONFIG_$(PHASE_)BOOTMETH_VBE) += vbe.o
obj-$(CONFIG_$(PHASE_)BOOTMETH_VBE_REQUEST) += vbe_request.o
diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c
index 2ad6d3b..f836aa6 100644
--- a/boot/bootmeth_efi.c
+++ b/boot/bootmeth_efi.c
@@ -13,7 +13,7 @@
#include <bootmeth.h>
#include <command.h>
#include <dm.h>
-#include <efi_default_filename.h>
+#include <efi.h>
#include <efi_loader.h>
#include <fs.h>
#include <malloc.h>
@@ -25,32 +25,11 @@
#define EFI_DIRNAME "/EFI/BOOT/"
-static int get_efi_pxe_arch(void)
-{
- /* http://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml */
- if (IS_ENABLED(CONFIG_ARM64))
- return 0xb;
- else if (IS_ENABLED(CONFIG_ARM))
- return 0xa;
- else if (IS_ENABLED(CONFIG_X86_64))
- return 0x6;
- else if (IS_ENABLED(CONFIG_X86))
- return 0x7;
- else if (IS_ENABLED(CONFIG_ARCH_RV32I))
- return 0x19;
- else if (IS_ENABLED(CONFIG_ARCH_RV64I))
- return 0x1b;
- else if (IS_ENABLED(CONFIG_SANDBOX))
- return 0; /* not used */
-
- return -EINVAL;
-}
-
static int get_efi_pxe_vci(char *str, int max_len)
{
int ret;
- ret = get_efi_pxe_arch();
+ ret = efi_get_pxe_arch();
if (ret < 0)
return ret;
@@ -168,7 +147,7 @@
}
strcpy(fname, EFI_DIRNAME);
- strcat(fname, BOOTEFI_NAME);
+ strcat(fname, efi_get_basename());
if (bflow->blk)
desc = dev_get_uclass_plat(bflow->blk);
@@ -239,7 +218,7 @@
ret = get_efi_pxe_vci(str, sizeof(str));
if (ret)
return log_msg_ret("vci", ret);
- ret = get_efi_pxe_arch();
+ ret = efi_get_pxe_arch();
if (ret < 0)
return log_msg_ret("arc", ret);
arch = ret;
diff --git a/boot/expo_build_cb.c b/boot/expo_build_cb.c
new file mode 100644
index 0000000..442ad76
--- /dev/null
+++ b/boot/expo_build_cb.c
@@ -0,0 +1,245 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Building an expo from an FDT description
+ *
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#define LOG_CATEGORY LOGC_EXPO
+
+#include <cedit.h>
+#include <ctype.h>
+#include <errno.h>
+#include <expo.h>
+#include <log.h>
+#include <malloc.h>
+#include <vsprintf.h>
+#include <asm/cb_sysinfo.h>
+
+/**
+ * struct build_info - Information to use when building
+ */
+struct build_info {
+ const struct cb_cmos_option_table *tab;
+ struct cedit_priv *priv;
+};
+
+/**
+ * convert_to_title() - Convert text to 'title' format and allocate a string
+ *
+ * Converts "this_is_a_test" to "This is a test" so it looks better
+ *
+ * @text: Text to convert
+ * Return: Allocated string, or NULL if out of memory
+ */
+static char *convert_to_title(const char *text)
+{
+ int len = strlen(text);
+ char *buf, *s;
+
+ buf = malloc(len + 1);
+ if (!buf)
+ return NULL;
+
+ for (s = buf; *text; s++, text++) {
+ if (s == buf)
+ *s = toupper(*text);
+ else if (*text == '_')
+ *s = ' ';
+ else
+ *s = *text;
+ }
+ *s = '\0';
+
+ return buf;
+}
+
+/**
+ * menu_build() - Build a menu and add it to a scene
+ *
+ * See doc/developer/expo.rst for a description of the format
+ *
+ * @info: Build information
+ * @entry: CMOS entry to build a menu for
+ * @scn: Scene to add the menu to
+ * @objp: Returns the object pointer
+ * Returns: 0 if OK, -ENOMEM if out of memory, -EINVAL if there is a format
+ * error, -ENOENT if there is a references to a non-existent string
+ */
+static int menu_build(struct build_info *info,
+ const struct cb_cmos_entries *entry, struct scene *scn,
+ struct scene_obj **objp)
+{
+ struct scene_obj_menu *menu;
+ const void *ptr, *end;
+ uint menu_id;
+ char *title;
+ int ret, i;
+
+ ret = scene_menu(scn, entry->name, 0, &menu);
+ if (ret < 0)
+ return log_msg_ret("men", ret);
+ menu_id = ret;
+
+ title = convert_to_title(entry->name);
+ if (!title)
+ return log_msg_ret("con", -ENOMEM);
+
+ /* Set the title */
+ ret = scene_txt_str(scn, "title", 0, 0, title, NULL);
+ if (ret < 0)
+ return log_msg_ret("tit", ret);
+ menu->title_id = ret;
+
+ end = (void *)info->tab + info->tab->size;
+ for (ptr = (void *)info->tab + info->tab->header_length, i = 0;
+ ptr < end; i++) {
+ const struct cb_cmos_enums *enums = ptr;
+ struct scene_menitem *item;
+ uint label;
+
+ ptr += enums->size;
+ if (enums->tag != CB_TAG_OPTION_ENUM ||
+ enums->config_id != entry->config_id)
+ continue;
+
+ ret = scene_txt_str(scn, enums->text, 0, 0, enums->text, NULL);
+ if (ret < 0)
+ return log_msg_ret("tit", ret);
+ label = ret;
+
+ ret = scene_menuitem(scn, menu_id, simple_xtoa(i), 0, 0, label,
+ 0, 0, 0, &item);
+ if (ret < 0)
+ return log_msg_ret("mi", ret);
+ item->value = enums->value;
+ }
+ *objp = &menu->obj;
+
+ return 0;
+}
+
+/**
+ * scene_build() - Build a scene and all its objects
+ *
+ * See doc/developer/expo.rst for a description of the format
+ *
+ * @info: Build information
+ * @scn: Scene to add the object to
+ * Returns: 0 if OK, -ENOMEM if out of memory, -EINVAL if there is a format
+ * error, -ENOENT if there is a references to a non-existent string
+ */
+static int scene_build(struct build_info *info, struct expo *exp)
+{
+ struct scene_obj_menu *menu;
+ const void *ptr, *end;
+ struct scene_obj *obj;
+ struct scene *scn;
+ uint label, menu_id;
+ int ret;
+
+ ret = scene_new(exp, "cmos", 0, &scn);
+ if (ret < 0)
+ return log_msg_ret("scn", ret);
+
+ ret = scene_txt_str(scn, "title", 0, 0, "CMOS RAM settings", NULL);
+ if (ret < 0)
+ return log_msg_ret("add", ret);
+ scn->title_id = ret;
+
+ ret = scene_txt_str(scn, "prompt", 0, 0,
+ "UP and DOWN to choose, ENTER to select", NULL);
+ if (ret < 0)
+ return log_msg_ret("add", ret);
+
+ end = (void *)info->tab + info->tab->size;
+ for (ptr = (void *)info->tab + info->tab->header_length; ptr < end;) {
+ const struct cb_cmos_entries *entry;
+ const struct cb_record *rec = ptr;
+
+ entry = ptr;
+ ptr += rec->size;
+ if (rec->tag != CB_TAG_OPTION)
+ continue;
+ switch (entry->config) {
+ case 'e':
+ ret = menu_build(info, entry, scn, &obj);
+ break;
+ default:
+ continue;
+ }
+ if (ret < 0)
+ return log_msg_ret("add", ret);
+
+ obj->start_bit = entry->bit;
+ obj->bit_length = entry->length;
+ }
+
+ ret = scene_menu(scn, "save", EXPOID_SAVE, &menu);
+ if (ret < 0)
+ return log_msg_ret("men", ret);
+ menu_id = ret;
+
+ ret = scene_txt_str(scn, "save", 0, 0, "Save and exit", NULL);
+ if (ret < 0)
+ return log_msg_ret("sav", ret);
+ label = ret;
+ ret = scene_menuitem(scn, menu_id, "save", 0, 0, label,
+ 0, 0, 0, NULL);
+ if (ret < 0)
+ return log_msg_ret("mi", ret);
+
+ ret = scene_menu(scn, "nosave", EXPOID_DISCARD, &menu);
+ if (ret < 0)
+ return log_msg_ret("men", ret);
+ menu_id = ret;
+
+ ret = scene_txt_str(scn, "nosave", 0, 0, "Exit without saving", NULL);
+ if (ret < 0)
+ return log_msg_ret("nos", ret);
+ label = ret;
+ ret = scene_menuitem(scn, menu_id, "exit", 0, 0, label,
+ 0, 0, 0, NULL);
+ if (ret < 0)
+ return log_msg_ret("mi", ret);
+
+ return 0;
+}
+
+static int build_it(struct build_info *info, struct expo **expp)
+{
+ struct expo *exp;
+ int ret;
+
+ ret = expo_new("coreboot", NULL, &exp);
+ if (ret)
+ return log_msg_ret("exp", ret);
+ expo_set_dynamic_start(exp, EXPOID_BASE_ID);
+
+ ret = scene_build(info, exp);
+ if (ret < 0)
+ return log_msg_ret("scn", ret);
+
+ *expp = exp;
+
+ return 0;
+}
+
+int cb_expo_build(struct expo **expp)
+{
+ struct build_info info;
+ struct expo *exp;
+ int ret;
+
+ info.tab = lib_sysinfo.option_table;
+ if (!info.tab)
+ return log_msg_ret("tab", -ENOENT);
+
+ ret = build_it(&info, &exp);
+ if (ret)
+ return log_msg_ret("bui", ret);
+ *expp = exp;
+
+ return 0;
+}
diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c
index d6a4b2c..3ae1755 100644
--- a/boot/pxe_utils.c
+++ b/boot/pxe_utils.c
@@ -1474,7 +1474,7 @@
* Create a menu and add items for all the labels.
*/
m = menu_create(cfg->title, DIV_ROUND_UP(cfg->timeout, 10),
- cfg->prompt, NULL, label_print, NULL, NULL);
+ cfg->prompt, NULL, label_print, NULL, NULL, NULL);
if (!m)
return NULL;
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 4fba9fe..b2d0348 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -2124,6 +2124,25 @@
wget is a simple command to download kernel, or other files,
from a http server over TCP.
+config WGET_HTTPS
+ bool "wget https"
+ depends on CMD_WGET
+ depends on PROT_TCP_LWIP
+ depends on MBEDTLS_LIB
+ select SHA256
+ select RSA
+ select ASYMMETRIC_KEY_TYPE
+ select ASYMMETRIC_PUBLIC_KEY_SUBTYPE
+ select X509_CERTIFICATE_PARSER
+ select PKCS7_MESSAGE_PARSER
+ select MBEDTLS_LIB_CRYPTO
+ select MBEDTLS_LIB_TLS
+ select RSA_VERIFY_WITH_PKEY
+ select X509_CERTIFICATE_PARSER
+ select PKCS7_MESSAGE_PARSER
+ help
+ Enable TLS over http for wget.
+
endif # if CMD_NET
config CMD_PXE
@@ -2871,6 +2890,17 @@
memory by coreboot before jumping to U-Boot. It can be useful for
debugging the beaaviour of coreboot or U-Boot.
+config CMD_CBCMOS
+ bool "cbcmos"
+ depends on X86
+ default y if SYS_COREBOOT
+ help
+ This provides information options to check the CMOS RAM checksum,
+ if present, as well as to update it.
+
+ It is useful when coreboot CMOS-RAM settings must be examined or
+ updated.
+
config CMD_CYCLIC
bool "cyclic - Show information about cyclic functions"
depends on CYCLIC
diff --git a/cmd/bootflow.c b/cmd/bootflow.c
index 1588f27..f67948d 100644
--- a/cmd/bootflow.c
+++ b/cmd/bootflow.c
@@ -393,7 +393,11 @@
printf("Partition: %d\n", bflow->part);
printf("Subdir: %s\n", bflow->subdir ? bflow->subdir : "(none)");
printf("Filename: %s\n", bflow->fname);
- printf("Buffer: %lx\n", (ulong)map_to_sysmem(bflow->buf));
+ printf("Buffer: ");
+ if (bflow->buf)
+ printf("%lx\n", (ulong)map_to_sysmem(bflow->buf));
+ else
+ printf("(not loaded)\n");
printf("Size: %x (%d bytes)\n", bflow->size, bflow->size);
printf("OS: %s\n", bflow->os_name ? bflow->os_name : "(none)");
printf("Cmdline: ");
@@ -403,7 +407,8 @@
puts("(none)");
putc('\n');
if (bflow->x86_setup)
- printf("X86 setup: %p\n", bflow->x86_setup);
+ printf("X86 setup: %lx\n",
+ (ulong)map_to_sysmem(bflow->x86_setup));
printf("Logo: %s\n", bflow->logo ?
simple_xtoa((ulong)map_to_sysmem(bflow->logo)) : "(none)");
if (bflow->logo) {
diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c
index 977a04b..ffa63a4 100644
--- a/cmd/bootmenu.c
+++ b/cmd/bootmenu.c
@@ -103,11 +103,13 @@
switch (key) {
case BKEY_UP:
+ menu->last_active = menu->active;
if (menu->active > 0)
--menu->active;
/* no menu key selected, regenerate menu */
return NULL;
case BKEY_DOWN:
+ menu->last_active = menu->active;
if (menu->active < menu->count - 1)
++menu->active;
/* no menu key selected, regenerate menu */
@@ -133,6 +135,17 @@
return NULL;
}
+static bool bootmenu_need_reprint(void *data)
+{
+ struct bootmenu_data *menu = data;
+ bool need_reprint;
+
+ need_reprint = menu->last_active != menu->active;
+ menu->last_active = menu->active;
+
+ return need_reprint;
+}
+
static void bootmenu_destroy(struct bootmenu_data *menu)
{
struct bootmenu_entry *iter = menu->first;
@@ -332,6 +345,7 @@
menu->delay = delay;
menu->active = 0;
+ menu->last_active = -1;
menu->first = NULL;
default_str = env_get("bootmenu_default");
@@ -506,7 +520,7 @@
menu = menu_create(NULL, bootmenu->delay, 1, menu_display_statusline,
bootmenu_print_entry, bootmenu_choice_entry,
- bootmenu);
+ bootmenu_need_reprint, bootmenu);
if (!menu) {
bootmenu_destroy(bootmenu);
return BOOTMENU_RET_FAIL;
diff --git a/cmd/cedit.c b/cmd/cedit.c
index fec67a8..f696356 100644
--- a/cmd/cedit.c
+++ b/cmd/cedit.c
@@ -67,6 +67,28 @@
return 0;
}
+#ifdef CONFIG_COREBOOT_SYSINFO
+static int do_cedit_cb_load(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct expo *exp;
+ int ret;
+
+ if (argc > 1)
+ return CMD_RET_USAGE;
+
+ ret = cb_expo_build(&exp);
+ if (ret) {
+ printf("Failed to build expo: %dE\n", ret);
+ return CMD_RET_FAILURE;
+ }
+
+ cur_exp = exp;
+
+ return 0;
+}
+#endif /* CONFIG_COREBOOT_SYSINFO */
+
static int do_cedit_write_fdt(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -271,6 +293,9 @@
U_BOOT_LONGHELP(cedit,
"load <interface> <dev[:part]> <filename> - load config editor\n"
+#ifdef CONFIG_COREBOOT_SYSINFO
+ "cb_load - load coreboot CMOS editor\n"
+#endif
"cedit read_fdt <i/f> <dev[:part]> <filename> - read settings\n"
"cedit write_fdt <i/f> <dev[:part]> <filename> - write settings\n"
"cedit read_env [-v] - read settings from env vars\n"
@@ -281,6 +306,9 @@
U_BOOT_CMD_WITH_SUBCMDS(cedit, "Configuration editor", cedit_help_text,
U_BOOT_SUBCMD_MKENT(load, 5, 1, do_cedit_load),
+#ifdef CONFIG_COREBOOT_SYSINFO
+ U_BOOT_SUBCMD_MKENT(cb_load, 5, 1, do_cedit_cb_load),
+#endif
U_BOOT_SUBCMD_MKENT(read_fdt, 5, 1, do_cedit_read_fdt),
U_BOOT_SUBCMD_MKENT(write_fdt, 5, 1, do_cedit_write_fdt),
U_BOOT_SUBCMD_MKENT(read_env, 2, 1, do_cedit_read_env),
diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index bea09e4..e08b6ba 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -443,7 +443,7 @@
efi_menu->menu_desc = menu_desc;
menu = menu_create(NULL, 0, 1, display_statusline, item_data_print,
- item_choice, efi_menu);
+ item_choice, NULL, efi_menu);
if (!menu)
return EFI_INVALID_PARAMETER;
@@ -963,7 +963,7 @@
return handle_user_input(bo->description, EFICONFIG_DESCRIPTION_MAX, 22,
"\n ** Edit Description **\n"
"\n"
- " enter description: ");
+ " Enter description: ");
}
/**
diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index e040fe7..02f1e08 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -511,6 +511,27 @@
return CMD_RET_SUCCESS;
}
+/**
+ * do_efi_show_defaults() - show UEFI default filename and PXE architecture
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ * Return: CMD_RET_SUCCESS on success, CMD_RET_RET_FAILURE on failure
+ *
+ * Implement efidebug "defaults" sub-command.
+ * Shows the default EFI filename and PXE architecture
+ */
+static int do_efi_show_defaults(struct cmd_tbl *cmdtp, int flag,
+ int argc, char *const argv[])
+{
+ printf("Default boot path: EFI\\BOOT\\%s\n", efi_get_basename());
+ printf("PXE arch: 0x%02x\n", efi_get_pxe_arch());
+
+ return CMD_RET_SUCCESS;
+}
+
static const char * const efi_mem_type_string[] = {
[EFI_RESERVED_MEMORY_TYPE] = "RESERVED",
[EFI_LOADER_CODE] = "LOADER CODE",
@@ -1561,6 +1582,8 @@
"", ""),
U_BOOT_CMD_MKENT(dh, CONFIG_SYS_MAXARGS, 1, do_efi_show_handles,
"", ""),
+ U_BOOT_CMD_MKENT(defaults, CONFIG_SYS_MAXARGS, 1, do_efi_show_defaults,
+ "", ""),
U_BOOT_CMD_MKENT(images, CONFIG_SYS_MAXARGS, 1, do_efi_show_images,
"", ""),
U_BOOT_CMD_MKENT(memmap, CONFIG_SYS_MAXARGS, 1, do_efi_show_memmap,
@@ -1653,6 +1676,8 @@
" - show UEFI drivers\n"
"efidebug dh\n"
" - show UEFI handles\n"
+ "efidebug defaults\n"
+ " - show default EFI filename and PXE architecture\n"
"efidebug images\n"
" - show loaded images\n"
"efidebug memmap\n"
diff --git a/cmd/sb.c b/cmd/sb.c
index db485fd..9245052 100644
--- a/cmd/sb.c
+++ b/cmd/sb.c
@@ -7,6 +7,7 @@
#include <command.h>
#include <dm.h>
#include <spl.h>
+#include <asm/cpu.h>
#include <asm/global_data.h>
#include <asm/state.h>
@@ -29,6 +30,14 @@
#endif
}
+static int do_sb_map(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ sandbox_map_list();
+
+ return 0;
+}
+
static int do_sb_state(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -40,29 +49,12 @@
return 0;
}
-static struct cmd_tbl cmd_sb_sub[] = {
- U_BOOT_CMD_MKENT(handoff, 1, 0, do_sb_handoff, "", ""),
- U_BOOT_CMD_MKENT(state, 1, 0, do_sb_state, "", ""),
-};
-
-static int do_sb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
-{
- struct cmd_tbl *c;
-
- /* Skip past 'sb' */
- argc--;
- argv++;
-
- c = find_cmd_tbl(argv[0], cmd_sb_sub, ARRAY_SIZE(cmd_sb_sub));
- if (c)
- return c->cmd(cmdtp, flag, argc, argv);
- else
- return CMD_RET_USAGE;
-}
-
-U_BOOT_CMD(
- sb, 8, 1, do_sb,
- "Sandbox status commands",
+U_BOOT_LONGHELP(sb,
"handoff - Show handoff data received from SPL\n"
- "sb state - Show sandbox state"
-);
+ "sb map - Show mapped memory\n"
+ "sb state - Show sandbox state");
+
+U_BOOT_CMD_WITH_SUBCMDS(sb, "Sandbox status commands", sb_help_text,
+ U_BOOT_SUBCMD_MKENT(handoff, 1, 1, do_sb_handoff),
+ U_BOOT_SUBCMD_MKENT(map, 1, 1, do_sb_map),
+ U_BOOT_SUBCMD_MKENT(state, 1, 1, do_sb_state));
diff --git a/cmd/x86/Makefile b/cmd/x86/Makefile
index 9252152..5f3f5be 100644
--- a/cmd/x86/Makefile
+++ b/cmd/x86/Makefile
@@ -2,6 +2,7 @@
obj-$(CONFIG_CMD_CBSYSINFO) += cbsysinfo.o
obj-y += cpuid.o msr.o mtrr.o
+obj-$(CONFIG_CMD_CBCMOS) += cbcmos.o
obj-$(CONFIG_CMD_EXCEPTION) += exception.o
obj-$(CONFIG_USE_HOB) += hob.o
obj-$(CONFIG_HAVE_FSP) += fsp.o
diff --git a/cmd/x86/cbcmos.c b/cmd/x86/cbcmos.c
new file mode 100644
index 0000000..fe5582f
--- /dev/null
+++ b/cmd/x86/cbcmos.c
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for booting from coreboot
+ *
+ * Copyright 2021 Google LLC
+ */
+
+#define LOG_CATEGORY UCLASS_RTC
+
+#include <command.h>
+#include <dm.h>
+#include <rtc.h>
+#include <asm/cb_sysinfo.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const struct sysinfo_t *get_table(void)
+{
+ if (!gd->arch.coreboot_table) {
+ printf("No coreboot sysinfo table found\n");
+ return NULL;
+ }
+
+ return &lib_sysinfo;
+}
+
+static int calc_sum(struct udevice *dev, uint start_bit, uint bit_count)
+{
+ uint start_byte = start_bit / 8;
+ uint byte_count = bit_count / 8;
+ int ret, i;
+ uint sum;
+
+ log_debug("Calc sum from %x: %x bytes\n", start_byte, byte_count);
+ sum = 0;
+ for (i = 0; i < bit_count / 8; i++) {
+ ret = rtc_read8(dev, start_bit / 8 + i);
+ if (ret < 0)
+ return ret;
+ sum += ret;
+ }
+
+ return (sum & 0xff) << 8 | (sum & 0xff00) >> 8;
+}
+
+/**
+ * prep_cbcmos() - Prepare for a CMOS-RAM command
+ *
+ * @tab: coreboot table
+ * @devnum: RTC device name to use, or NULL for the first one
+ * @dep: Returns RTC device on success
+ * Return: calculated checksum for CMOS RAM or -ve on error
+ */
+static int prep_cbcmos(const struct sysinfo_t *tab, const char *devname,
+ struct udevice **devp)
+{
+ struct udevice *dev;
+ int ret;
+
+ if (!tab)
+ return CMD_RET_FAILURE;
+ if (devname)
+ ret = uclass_get_device_by_name(UCLASS_RTC, devname, &dev);
+ else
+ ret = uclass_first_device_err(UCLASS_RTC, &dev);
+ if (ret) {
+ printf("Failed to get RTC device: %dE\n", ret);
+ return ret;
+ }
+
+ ret = calc_sum(dev, tab->cmos_range_start,
+ tab->cmos_range_end + 1 - tab->cmos_range_start);
+ if (ret < 0) {
+ printf("Failed to read RTC device: %dE\n", ret);
+ return ret;
+ }
+ *devp = dev;
+
+ return ret;
+}
+
+static int do_cbcmos_check(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ const struct sysinfo_t *tab = get_table();
+ struct udevice *dev;
+ u16 cur, sum;
+ int ret;
+
+ ret = prep_cbcmos(tab, argv[1], &dev);
+ if (ret < 0)
+ return CMD_RET_FAILURE;
+ sum = ret;
+
+ ret = rtc_read16(dev, tab->cmos_checksum_location / 8, &cur);
+ if (ret < 0) {
+ printf("Failed to read RTC device: %dE\n", ret);
+ return CMD_RET_FAILURE;
+ }
+ if (sum != cur) {
+ printf("Checksum %04x error: calculated %04x\n", cur, sum);
+ return CMD_RET_FAILURE;
+ }
+
+ return 0;
+}
+
+static int do_cbcmos_update(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ const struct sysinfo_t *tab = get_table();
+ struct udevice *dev;
+ u16 sum;
+ int ret;
+
+ ret = prep_cbcmos(tab, argv[1], &dev);
+ if (ret < 0)
+ return CMD_RET_FAILURE;
+ sum = ret;
+
+ ret = rtc_write16(dev, tab->cmos_checksum_location / 8, sum);
+ if (ret < 0) {
+ printf("Failed to read RTC device: %dE\n", ret);
+ return CMD_RET_FAILURE;
+ }
+ printf("Checksum %04x written\n", sum);
+
+ return 0;
+}
+
+U_BOOT_LONGHELP(cbcmos,
+ "check - check CMOS RAM\n"
+ "cbcmos update - Update CMOS-RAM checksum";
+);
+
+U_BOOT_CMD_WITH_SUBCMDS(cbcmos, "coreboot CMOS RAM", cbcmos_help_text,
+ U_BOOT_SUBCMD_MKENT(check, 2, 1, do_cbcmos_check),
+ U_BOOT_SUBCMD_MKENT(update, 2, 1, do_cbcmos_update));
diff --git a/cmd/x86/cbsysinfo.c b/cmd/x86/cbsysinfo.c
index 7ca2e13..ea4d896 100644
--- a/cmd/x86/cbsysinfo.c
+++ b/cmd/x86/cbsysinfo.c
@@ -184,6 +184,77 @@
return "<unknown>";
}
+static void show_option_vals(const struct cb_cmos_option_table *tab,
+ uint id)
+{
+ const void *ptr, *end;
+ bool found = false;
+
+ end = (void *)tab + tab->size;
+ for (ptr = (void *)tab + tab->header_length; ptr < end;) {
+ const struct cb_record *rec = ptr;
+
+ switch (rec->tag) {
+ case CB_TAG_OPTION_ENUM: {
+ const struct cb_cmos_enums *enums = ptr;
+
+ if (enums->config_id == id) {
+ if (!found)
+ printf(" ");
+ printf(" %d:%s", enums->value, enums->text);
+ found = true;
+ }
+ break;
+ }
+ break;
+ case CB_TAG_OPTION_DEFAULTS:
+ case CB_TAG_OPTION_CHECKSUM:
+ case CB_TAG_OPTION:
+ break;
+ default:
+ printf("tag %x\n", rec->tag);
+ break;
+ }
+ ptr += rec->size;
+ }
+}
+
+static void show_option_table(const struct cb_cmos_option_table *tab)
+{
+ const void *ptr, *end;
+
+ print_ptr("option_table", tab);
+ if (!tab->size)
+ return;
+
+ printf(" Bit Len Cfg ID Name\n");
+ end = (void *)tab + tab->size;
+ for (ptr = (void *)tab + tab->header_length; ptr < end;) {
+ const struct cb_record *rec = ptr;
+
+ switch (rec->tag) {
+ case CB_TAG_OPTION: {
+ const struct cb_cmos_entries *entry = ptr;
+
+ printf("%4x %4x %3c %3x %-20s", entry->bit,
+ entry->length, entry->config, entry->config_id,
+ entry->name);
+ show_option_vals(tab, entry->config_id);
+ printf("\n");
+ break;
+ }
+ case CB_TAG_OPTION_ENUM:
+ case CB_TAG_OPTION_DEFAULTS:
+ case CB_TAG_OPTION_CHECKSUM:
+ break;
+ default:
+ printf("tag %x\n", rec->tag);
+ break;
+ }
+ ptr += rec->size;
+ }
+}
+
static void show_table(struct sysinfo_t *info, bool verbose)
{
struct cb_serial *ser = info->serial;
@@ -218,7 +289,7 @@
printf("%12d: %02x:%-8s %016llx %016llx\n", i, mr->type,
get_mem_name(mr->type), mr->base, mr->size);
}
- print_ptr("option_table", info->option_table);
+ show_option_table(info->option_table);
print_hex("CMOS start", info->cmos_range_start);
if (info->cmos_range_start) {
diff --git a/common/bootstage.c b/common/bootstage.c
index c7bb204..4532100 100644
--- a/common/bootstage.c
+++ b/common/bootstage.c
@@ -249,6 +249,8 @@
printf("%11s", "");
print_grouped_ull(rec->time_us, BOOTSTAGE_DIGITS);
} else {
+ if (prev > rec->time_us)
+ prev = 0;
print_grouped_ull(rec->time_us, BOOTSTAGE_DIGITS);
print_grouped_ull(rec->time_us - prev, BOOTSTAGE_DIGITS);
}
@@ -257,13 +259,6 @@
return rec->time_us;
}
-static int h_compare_record(const void *r1, const void *r2)
-{
- const struct bootstage_record *rec1 = r1, *rec2 = r2;
-
- return rec1->time_us > rec2->time_us ? 1 : -1;
-}
-
#ifdef CONFIG_OF_LIBFDT
/**
* Add all bootstage timings to a device tree.
@@ -342,9 +337,6 @@
prev = print_time_record(rec, 0);
- /* Sort records by increasing time */
- qsort(data->record, data->rec_count, sizeof(*rec), h_compare_record);
-
for (i = 1, rec++; i < data->rec_count; i++, rec++) {
if (rec->id && !rec->start_us)
prev = print_time_record(rec, prev);
diff --git a/common/log.c b/common/log.c
index b83a661..c9fe352 100644
--- a/common/log.c
+++ b/common/log.c
@@ -32,6 +32,7 @@
"fs",
"expo",
"console",
+ "test",
};
_Static_assert(ARRAY_SIZE(log_cat_name) == LOGC_COUNT - LOGC_NONE,
diff --git a/common/menu.c b/common/menu.c
index 8cc9bf0..5a2126a 100644
--- a/common/menu.c
+++ b/common/menu.c
@@ -43,6 +43,7 @@
void (*display_statusline)(struct menu *);
void (*item_data_print)(void *);
char *(*item_choice)(void *);
+ bool (*need_reprint)(void *);
void *item_choice_data;
struct list_head items;
int item_cnt;
@@ -117,6 +118,11 @@
*/
static inline void menu_display(struct menu *m)
{
+ if (m->need_reprint) {
+ if (!m->need_reprint(m->item_choice_data))
+ return;
+ }
+
if (m->title) {
puts(m->title);
putc('\n');
@@ -362,6 +368,9 @@
* item. Returns a key string corresponding to the chosen item or NULL if
* no item has been selected.
*
+ * need_reprint - If not NULL, will be called before printing the menu.
+ * Returning FALSE means the menu does not need reprint.
+ *
* item_choice_data - Will be passed as the argument to the item_choice function
*
* Returns a pointer to the menu if successful, or NULL if there is
@@ -371,6 +380,7 @@
void (*display_statusline)(struct menu *),
void (*item_data_print)(void *),
char *(*item_choice)(void *),
+ bool (*need_reprint)(void *),
void *item_choice_data)
{
struct menu *m;
@@ -386,6 +396,7 @@
m->display_statusline = display_statusline;
m->item_data_print = item_data_print;
m->item_choice = item_choice;
+ m->need_reprint = need_reprint;
m->item_choice_data = item_choice_data;
m->item_cnt = 0;
@@ -525,14 +536,15 @@
struct cli_ch_state *cch)
{
enum bootmenu_key key;
- int c;
+ int c, errchar = 0;
c = cli_ch_process(cch, 0);
if (!c) {
while (!c && !tstc()) {
schedule();
mdelay(10);
- c = cli_ch_process(cch, -ETIMEDOUT);
+ c = cli_ch_process(cch, errchar);
+ errchar = -ETIMEDOUT;
}
if (!c) {
c = getchar();
diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig
index c4b4dfe..8180ed5 100644
--- a/configs/10m50_defconfig
+++ b/configs/10m50_defconfig
@@ -24,15 +24,15 @@
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_ITEST is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_RX_ETH_BUFFER=0
CONFIG_ALTERA_PIO=y
CONFIG_MISC=y
diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig
index 077506e..0a6eae4 100644
--- a/configs/3c120_defconfig
+++ b/configs/3c120_defconfig
@@ -24,15 +24,15 @@
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_ITEST is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_RX_ETH_BUFFER=0
CONFIG_ALTERA_PIO=y
CONFIG_MISC=y
diff --git a/configs/CMPCPRO_defconfig b/configs/CMPCPRO_defconfig
index e92dc0c..7607135 100644
--- a/configs/CMPCPRO_defconfig
+++ b/configs/CMPCPRO_defconfig
@@ -135,8 +135,8 @@
CONFIG_CMD_MTD=y
CONFIG_CMD_NAND=y
CONFIG_CMD_TEMPERATURE=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_SLEEP is not set
diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig
index bf57c06..8aa8068 100644
--- a/configs/M5235EVB_Flash32_defconfig
+++ b/configs/M5235EVB_Flash32_defconfig
@@ -24,8 +24,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_MII_INIT=y
CONFIG_CMD_PING=y
diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index 7cfec24..c76d655 100644
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -23,8 +23,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_MII_INIT=y
CONFIG_CMD_PING=y
diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig
index effff66..599eaf7 100644
--- a/configs/M5275EVB_defconfig
+++ b/configs/M5275EVB_defconfig
@@ -23,8 +23,8 @@
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_MII_INIT=y
CONFIG_CMD_PING=y
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index 8670712..37fe513 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -37,8 +37,8 @@
CONFIG_LOADS_ECHO=y
CONFIG_SYS_LOADS_BAUD_CHANGE=y
CONFIG_CMD_PCI=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index e10e61a..4bc3ebe 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -36,8 +36,8 @@
CONFIG_LOADS_ECHO=y
CONFIG_SYS_LOADS_BAUD_CHANGE=y
CONFIG_CMD_PCI=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 9587975..2a22b8a 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -5,7 +5,6 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
-CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_TPL_TEXT_BASE=0xD0000000
@@ -13,6 +12,7 @@
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_MPC85xx=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index e703424..d2ac0b4 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -7,11 +7,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
-CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 374879e..4913034 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -8,10 +8,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
-CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index cd0117b..56e7357 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -5,7 +5,6 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
-CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_TPL_TEXT_BASE=0xD0000000
@@ -13,6 +12,7 @@
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_MPC85xx=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index af0fe29..1beb5bb 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -7,11 +7,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
-CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 8ed9d1a..a9275e5 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -8,10 +8,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
-CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 004ec92..d180f34 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -5,7 +5,6 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
-CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_TPL_TEXT_BASE=0xD0000000
@@ -13,6 +12,7 @@
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_MPC85xx=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 635045f..4237dc9 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -7,11 +7,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
-CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 4b7c8d2..3b5f6be 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -8,10 +8,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
-CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 3b29f1d..25c51c2 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -5,7 +5,6 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
-CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_TPL_TEXT_BASE=0xD0000000
@@ -13,6 +12,7 @@
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_MPC85xx=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index f12469d..5324e7b 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -7,11 +7,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
-CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 8c377d3..7bfa4eb 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -8,10 +8,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
-CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xD0000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index 36ef896..c889714 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -5,13 +5,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
-CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_TPL_TEXT_BASE=0xF8F80000
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_MPC85xx=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index b23add9..d1e097e 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 98a48ef..ad7d5b6 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 6f19aac..2d5c83c 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -5,13 +5,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
-CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_TPL_TEXT_BASE=0xF8F80000
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_MPC85xx=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index f439e56..679c6fe 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 43aba38..2ccb202 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 7dd0048..118f510 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -5,13 +5,13 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
-CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_TPL_TEXT_BASE=0xF8F80000
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_MPC85xx=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index e7daa79..6b6b35a 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index 08d0951..e30b541 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index d7fcab1..ec80871 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -5,13 +5,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
-CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_TPL_TEXT_BASE=0xF8F80000
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_MPC85xx=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 22243cc..0a65873 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index d2bd375..ce95ab8 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index b8543d9..618e827 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -5,13 +5,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
-CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_TPL_TEXT_BASE=0xF8F80000
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_MPC85xx=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index a62ecfe..eb9ee65 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 9e6e43d..f73ddc3 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig
index bc10b6e..35f5b5b 100644
--- a/configs/SBx81LIFKW_defconfig
+++ b/configs/SBx81LIFKW_defconfig
@@ -27,11 +27,11 @@
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_NTPSERVER=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
-CONFIG_CMD_SNTP=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
CONFIG_DOS_PARTITION=y
CONFIG_OF_CONTROL=y
@@ -40,8 +40,8 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=20000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig
index 427b48b..ed3bc5b 100644
--- a/configs/SBx81LIFXCAT_defconfig
+++ b/configs/SBx81LIFXCAT_defconfig
@@ -27,11 +27,11 @@
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_NTPSERVER=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
-CONFIG_CMD_SNTP=y
# CONFIG_CMD_LED is not set
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
CONFIG_DOS_PARTITION=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 34ef789..37dfdb4 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 3dc29f7..72630f1 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -7,11 +7,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 6b43fd7..8d48b39 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -8,10 +8,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 7d2b5ea..01a8594 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -6,10 +6,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x180000
CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index e26fe8f..26de5bf 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -6,11 +6,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index f63e9de..674246a 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 1ca48d3..8d7ca9b 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -6,10 +6,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x140000
CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index b70c3f6..3ba3022 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -6,11 +6,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 94991cd..1cdcd0d 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 7b015ed..63db57b 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -6,10 +6,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 0e9ebaa..04cc53d 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -6,11 +6,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 1552319..26c479f 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index b98c861..995dc7e 100644
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -6,10 +6,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index f97bf90..a66dba3 100644
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -6,11 +6,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index 15cb9b2..8a87a1b 100644
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 4881efc..8d03c7d 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -6,11 +6,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
diff --git a/configs/ae350_rv32_falcon_xip_defconfig b/configs/ae350_rv32_falcon_xip_defconfig
index 116fd21..a2f8d4c 100644
--- a/configs/ae350_rv32_falcon_xip_defconfig
+++ b/configs/ae350_rv32_falcon_xip_defconfig
@@ -6,9 +6,9 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
-CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x100000
diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig
index 642fb7b..2392788 100644
--- a/configs/ae350_rv32_spl_xip_defconfig
+++ b/configs/ae350_rv32_spl_xip_defconfig
@@ -6,9 +6,9 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
-CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x100000
diff --git a/configs/ae350_rv64_falcon_xip_defconfig b/configs/ae350_rv64_falcon_xip_defconfig
index eb69e59..e072f7c 100644
--- a/configs/ae350_rv64_falcon_xip_defconfig
+++ b/configs/ae350_rv64_falcon_xip_defconfig
@@ -6,8 +6,8 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
-CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x100000
diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig
index 9b80234..5ad1751 100644
--- a/configs/ae350_rv64_spl_xip_defconfig
+++ b/configs/ae350_rv64_spl_xip_defconfig
@@ -6,8 +6,8 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
-CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x100000
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index c480762..488115d 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -1,41 +1,25 @@
+#include <configs/renesas_rcar2.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_ARCH_RENESAS=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x100000
-CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
-CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7794-alt"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Alt"
CONFIG_R8A7794=y
CONFIG_TARGET_ALT=y
-CONFIG_SYS_MONITOR_LEN=262144
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xe6340000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
-CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_ENV_ADDR=0xC0000
-CONFIG_PCI=y
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_BOOTDELAY=3
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -45,65 +29,16 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_SDRAM=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)"
-CONFIG_PARTITION_UUIDS=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_SH_MMCIF=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_SH_ETHER=y
-CONFIG_PCI_RCAR_GEN2=y
-CONFIG_PINCTRL=y
-CONFIG_PINCONF=y
-CONFIG_PINCTRL_PFC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SH_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_STORAGE=y
-CONFIG_SYS_TIMER_COUNTS_DOWN=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index 2c23c9b..396e743 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -5,10 +5,10 @@
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
-CONFIG_SPL_TEXT_BASE=0x40300350
CONFIG_AM33XX=y
CONFIG_CLOCK_SYNTHESIZER=y
# CONFIG_OF_LIBFDT_OVERLAY is not set
+CONFIG_SPL_TEXT_BASE=0x40300350
CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_SPL=y
CONFIG_TIMESTAMP=y
diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig
index afa6e49..4be0b2f 100644
--- a/configs/am335x_hs_evm_uart_defconfig
+++ b/configs/am335x_hs_evm_uart_defconfig
@@ -5,11 +5,11 @@
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
-CONFIG_SPL_TEXT_BASE=0x40301950
CONFIG_AM33XX=y
CONFIG_CLOCK_SYNTHESIZER=y
# CONFIG_OF_LIBFDT_OVERLAY is not set
# CONFIG_SPL_MMC is not set
+CONFIG_SPL_TEXT_BASE=0x40301950
CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_SPL=y
# CONFIG_SPL_FS_FAT is not set
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index c4693bc..8dab015 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -6,8 +6,8 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
-CONFIG_SPL_TEXT_BASE=0x40300350
CONFIG_AM43XX=y
+CONFIG_SPL_TEXT_BASE=0x40300350
CONFIG_SPL=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 980ef13..419bcb7 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -8,12 +8,12 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
-CONFIG_SPL_TEXT_BASE=0x403018e0
CONFIG_AM43XX=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0x403018e0
CONFIG_SPL=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index b793f00..d10d2a5 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -5,9 +5,9 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am572x-idk"
-CONFIG_SPL_TEXT_BASE=0x40300000
CONFIG_OMAP54XX=y
CONFIG_TARGET_AM57XX_EVM=y
+CONFIG_SPL_TEXT_BASE=0x40300000
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig
index 2d8068e..d865b12 100644
--- a/configs/am57xx_hs_evm_usb_defconfig
+++ b/configs/am57xx_hs_evm_usb_defconfig
@@ -6,12 +6,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
-CONFIG_SPL_TEXT_BASE=0x40306D50
CONFIG_OMAP54XX=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
CONFIG_TARGET_AM57XX_EVM=y
+CONFIG_SPL_TEXT_BASE=0x40306D50
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig
index c396171..7d63340 100644
--- a/configs/am62ax_evm_a53_defconfig
+++ b/configs/am62ax_evm_a53_defconfig
@@ -9,12 +9,12 @@
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62a7-sk"
-CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80a00000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig
index 2e758b4..ec712b1 100644
--- a/configs/am62ax_evm_r5_defconfig
+++ b/configs/am62ax_evm_r5_defconfig
@@ -11,12 +11,12 @@
CONFIG_ENV_OFFSET=0x680000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am62a7-r5-sk"
-CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7145
+CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x43c3b000
CONFIG_SPL_BSS_MAX_SIZE=0x3000
diff --git a/configs/am62px_evm_r5_defconfig b/configs/am62px_evm_r5_defconfig
index 5fed277..a93c33c 100644
--- a/configs/am62px_evm_r5_defconfig
+++ b/configs/am62px_evm_r5_defconfig
@@ -13,12 +13,12 @@
CONFIG_ENV_OFFSET=0x680000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am62p5-r5-sk"
-CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x43c4b000
CONFIG_SPL_BSS_MAX_SIZE=0x3000
diff --git a/configs/am62x_beagleplay_r5_defconfig b/configs/am62x_beagleplay_r5_defconfig
index 9daee2a..d0c09b9 100644
--- a/configs/am62x_beagleplay_r5_defconfig
+++ b/configs/am62x_beagleplay_r5_defconfig
@@ -13,13 +13,13 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-beagleplay"
-CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x43c3b000
CONFIG_SPL_BSS_MAX_SIZE=0x3000
diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig
index 6ff0782..fcc5eb0 100644
--- a/configs/am62x_evm_r5_defconfig
+++ b/configs/am62x_evm_r5_defconfig
@@ -15,13 +15,13 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk"
-CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x43c3b000
CONFIG_SPL_BSS_MAX_SIZE=0x3000
diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig
index 599115a..c4e498a 100644
--- a/configs/am64x_evm_r5_defconfig
+++ b/configs/am64x_evm_r5_defconfig
@@ -16,12 +16,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-evm"
-CONFIG_SPL_TEXT_BASE=0x70000000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x70000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x7019b800
CONFIG_SPL_BSS_MAX_SIZE=0x4000
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 9dc3f15..cf7a211 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -15,12 +15,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board"
-CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80a00000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig
index f60003b..083522c 100644
--- a/configs/am65x_evm_r5_defconfig
+++ b/configs/am65x_evm_r5_defconfig
@@ -15,12 +15,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
-CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x41c7effc
CONFIG_SPL_BSS_MAX_SIZE=0xc00
diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig
index 036b30d..e60e0d6 100644
--- a/configs/am65x_evm_r5_usbdfu_defconfig
+++ b/configs/am65x_evm_r5_usbdfu_defconfig
@@ -14,11 +14,11 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
-CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_DM_RESET=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x41c7effc
CONFIG_SPL_BSS_MAX_SIZE=0xc00
diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig
index 44c18ce..ecd48c4 100644
--- a/configs/am65x_evm_r5_usbmsc_defconfig
+++ b/configs/am65x_evm_r5_usbmsc_defconfig
@@ -14,11 +14,11 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
-CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_DM_RESET=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x41c7effc
CONFIG_SPL_BSS_MAX_SIZE=0xc00
diff --git a/configs/amd_versal2_mini_qspi_defconfig b/configs/amd_versal2_mini_qspi_defconfig
index ee87d45..3947604 100644
--- a/configs/amd_versal2_mini_qspi_defconfig
+++ b/configs/amd_versal2_mini_qspi_defconfig
@@ -64,10 +64,6 @@
# CONFIG_I2C is not set
# CONFIG_INPUT is not set
# CONFIG_MMC is not set
-CONFIG_DM_SPI_FLASH=y
-# CONFIG_SPI_FLASH_LOCK is not set
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
# CONFIG_POWER is not set
CONFIG_DEBUG_UART_PL011=y
CONFIG_DEBUG_UART_ANNOUNCE=y
diff --git a/configs/amd_versal2_virt_defconfig b/configs/amd_versal2_virt_defconfig
index 8c308f3..08e6077 100644
--- a/configs/amd_versal2_virt_defconfig
+++ b/configs/amd_versal2_virt_defconfig
@@ -67,10 +67,10 @@
CONFIG_MULTI_DTB_FIT=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SIMPLE_PM_BUS=y
CONFIG_CLK_CCF=y
diff --git a/configs/aml-a311d-cc_defconfig b/configs/aml-a311d-cc_defconfig
index c8e2220..6d0d5eb 100644
--- a/configs/aml-a311d-cc_defconfig
+++ b/configs/aml-a311d-cc_defconfig
@@ -14,12 +14,14 @@
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART_BASE=0xff803000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING="aml-a311d-cc"
-CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
CONFIG_REMAKE_ELF=y
+CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
@@ -30,8 +32,8 @@
CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
-CONFIG_CMD_DFU=y
CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
@@ -39,8 +41,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_EFIDEBUG=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -51,7 +53,6 @@
CONFIG_BUTTON_ADC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
-CONFIG_SET_DFU_ALT_INFO=y
CONFIG_MMC_MESON_GX=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
@@ -104,5 +105,3 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
-CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/aml-s905d3-cc_defconfig b/configs/aml-s905d3-cc_defconfig
index a6e5d58..1975c67 100644
--- a/configs/aml-s905d3-cc_defconfig
+++ b/configs/aml-s905d3-cc_defconfig
@@ -14,12 +14,14 @@
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART_BASE=0xff803000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING="aml-s905d3-cc"
-CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
CONFIG_REMAKE_ELF=y
+CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
@@ -30,8 +32,8 @@
CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
-CONFIG_CMD_DFU=y
CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
@@ -39,8 +41,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_EFIDEBUG=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -51,7 +53,6 @@
CONFIG_BUTTON_ADC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
-CONFIG_SET_DFU_ALT_INFO=y
CONFIG_MMC_MESON_GX=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
@@ -104,5 +105,3 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
-CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig
index d3216ec..14c97b4 100644
--- a/configs/anbernic-rgxx3-rk3566_defconfig
+++ b/configs/anbernic-rgxx3-rk3566_defconfig
@@ -70,7 +70,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
# CONFIG_RAM_ROCKCHIP_DEBUG is not set
-# CONFIG_RNG_SMCCC_TRNG is not set
CONFIG_BAUDRATE=1500000
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig
index 795cdc2..6afda7f 100644
--- a/configs/apalis-imx8_defconfig
+++ b/configs/apalis-imx8_defconfig
@@ -53,9 +53,7 @@
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_TFTP_TSIZE=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.10.2"
@@ -63,6 +61,8 @@
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_CLK_IMX8=y
diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig
index baab3bf..ef982f7 100644
--- a/configs/apalis-tk1_defconfig
+++ b/configs/apalis-tk1_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DEFAULT_DEVICE_TREE="tegra124-apalis"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_TEGRA124=y
CONFIG_TARGET_APALIS_TK1=y
@@ -53,9 +53,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_TFTP_TSIZE=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.10.2"
@@ -63,6 +61,8 @@
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_SYS_I2C_TEGRA=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index b44861d..a3f65c5 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -73,15 +73,15 @@
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.10.2"
CONFIG_USE_NETMASK=y
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
CONFIG_LBA48=y
diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig
index 963b280..3143566 100644
--- a/configs/apalis_t30_defconfig
+++ b/configs/apalis_t30_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_TEGRA30=y
CONFIG_TARGET_APALIS_T30=y
@@ -46,10 +46,10 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_TFTP_TSIZE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_SYS_I2C_TEGRA=y
CONFIG_E1000=y
CONFIG_E1000_NO_NVM=y
diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig
index 6c8e4b2..9b07709 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig
index cfffdfa..dafbc76 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig
index dc633aa..4ee101f 100644
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -33,8 +33,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig
index 4883a80..09095e9 100644
--- a/configs/at91sam9261ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs0_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig
index c4fdc9c..d594d96 100644
--- a/configs/at91sam9261ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs3_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig
index 9051db4..f53bf3c 100644
--- a/configs/at91sam9261ek_nandflash_defconfig
+++ b/configs/at91sam9261ek_nandflash_defconfig
@@ -33,8 +33,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig
index 3feb7c0..9bfda68 100644
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig
index 3feb7c0..9bfda68 100644
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig
index d7c850e..e515818 100644
--- a/configs/at91sam9263ek_nandflash_defconfig
+++ b/configs/at91sam9263ek_nandflash_defconfig
@@ -36,8 +36,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig
index 102dedb..488c370 100644
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -35,8 +35,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig
index c8783b0..d8c490d 100644
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -36,8 +36,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig
index 4c07fce..211b20b 100644
--- a/configs/at91sam9g10ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig
index 64ec4bb..f6529b1 100644
--- a/configs/at91sam9g10ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig
index 6d95555..580960e 100644
--- a/configs/at91sam9g10ek_nandflash_defconfig
+++ b/configs/at91sam9g10ek_nandflash_defconfig
@@ -33,8 +33,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig
index 256552f..273e93c 100644
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -36,8 +36,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
index 5c134c9..c4d1252 100644
--- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig
+++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
@@ -35,8 +35,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig
index b403766..7520316 100644
--- a/configs/at91sam9g20ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig
index 878c04c..adf3c10 100644
--- a/configs/at91sam9g20ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig
index f8173f4..e68f503 100644
--- a/configs/at91sam9g20ek_nandflash_defconfig
+++ b/configs/at91sam9g20ek_nandflash_defconfig
@@ -33,8 +33,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig
index 34d8264..796181b 100644
--- a/configs/at91sam9m10g45ek_mmc_defconfig
+++ b/configs/at91sam9m10g45ek_mmc_defconfig
@@ -38,8 +38,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig
index ad8a82b..e57bd2c 100644
--- a/configs/at91sam9m10g45ek_nandflash_defconfig
+++ b/configs/at91sam9m10g45ek_nandflash_defconfig
@@ -38,8 +38,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index 88e0f6c..c50842a 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -31,8 +31,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index 0bfc856..e7b4107 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -31,8 +31,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index b329a96..cb4f0b5 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -33,8 +33,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index 633dae9..c40319e 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -39,8 +39,8 @@
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index 82db49e..8db86c7 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -36,8 +36,8 @@
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index d512dd6..3f59395 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -38,8 +38,8 @@
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index ba5b9c6..12336d0 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -40,8 +40,8 @@
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig
index 6c8e4b2..9b07709 100644
--- a/configs/at91sam9xeek_dataflash_cs0_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs0_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig
index cfffdfa..dafbc76 100644
--- a/configs/at91sam9xeek_dataflash_cs1_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs1_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig
index dc633aa..4ee101f 100644
--- a/configs/at91sam9xeek_nandflash_defconfig
+++ b/configs/at91sam9xeek_nandflash_defconfig
@@ -33,8 +33,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig
index 4a893ed..c32d535 100644
--- a/configs/bayleybay_defconfig
+++ b/configs/bayleybay_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTSTAGE=y
diff --git a/configs/bcm96846_defconfig b/configs/bcm96846_defconfig
index 877a606..8bc6ac1 100644
--- a/configs/bcm96846_defconfig
+++ b/configs/bcm96846_defconfig
@@ -14,22 +14,18 @@
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM6846"
CONFIG_ENV_VARS_UBOOT_CONFIG=y
-CONFIG_OF_UPSTREAM=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_UBI=y
-CONFIG_CMD_UBIFS=y
CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_CACHE=y
CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=nand0"
+CONFIG_CMD_UBI=y
CONFIG_OF_EMBED=y
CONFIG_CLK=y
CONFIG_MTD=y
-CONFIG_MTDIDS_DEFAULT="nand0=nand0"
CONFIG_DM_MTD=y
-CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
-CONFIG_SYS_NAND_ONFI_DETECTION=n
diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig
index 17a1b18..71037ee 100644
--- a/configs/beaver_defconfig
+++ b/configs/beaver_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_TEGRA30=y
CONFIG_TARGET_BEAVER=y
diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig
index f8ea8f9..afff2d5 100644
--- a/configs/bitmain_antminer_s9_defconfig
+++ b/configs/bitmain_antminer_s9_defconfig
@@ -54,9 +54,9 @@
CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_PXE=y
@@ -74,9 +74,9 @@
CONFIG_ENV_IS_IN_FAT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_BOOTP_SERVERIP=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DFU_TIMEOUT=y
diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig
index 2cd3762..3ed587a 100644
--- a/configs/bk4r1_defconfig
+++ b/configs/bk4r1_defconfig
@@ -42,8 +42,8 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTCOUNT=y
diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig
index aa30585..09fef29 100644
--- a/configs/blanche_defconfig
+++ b/configs/blanche_defconfig
@@ -1,86 +1,21 @@
+#include <configs/renesas_rcar2.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x00000000
-CONFIG_SYS_MALLOC_LEN=0x100000
-CONFIG_SYS_MALLOC_F_LEN=0x8000
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
-CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7792-blanche"
CONFIG_ARCH_RENESAS_BOARD_STRING="Blanche"
CONFIG_R8A7792=y
CONFIG_TARGET_BLANCHE=y
-CONFIG_SYS_MONITOR_LEN=262144
-CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_ENV_ADDR=0x40000
-CONFIG_PCI=y
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_BOOTDELAY=3
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_SDRAM=y
# CONFIG_CMD_SF is not set
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_PARTITION_UUIDS=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_SH_MMCIF=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SYS_MAX_FLASH_SECT=1024
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SMC911X=y
-CONFIG_PCI_RCAR_GEN2=y
-CONFIG_PINCTRL=y
-CONFIG_PINCONF=y
-CONFIG_PINCTRL_PFC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SH_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_STORAGE=y
-CONFIG_SYS_TIMER_COUNTS_DOWN=y
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index cc4ba11..6f4dfad 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -31,8 +31,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index f983150..cdf13c8 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -32,8 +32,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig
index 4a404f0..d8fb956 100644
--- a/configs/boston32r6_defconfig
+++ b/configs/boston32r6_defconfig
@@ -32,8 +32,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig
index 49fb759..b6d3102 100644
--- a/configs/boston32r6el_defconfig
+++ b/configs/boston32r6el_defconfig
@@ -33,8 +33,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index 5b710fc..6b23d18 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -32,8 +32,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index 1d4bb7d..ff4b526 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -33,8 +33,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig
index b736534..a7446ec 100644
--- a/configs/boston64r6_defconfig
+++ b/configs/boston64r6_defconfig
@@ -32,8 +32,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig
index caf5da3..0dab8ef 100644
--- a/configs/boston64r6el_defconfig
+++ b/configs/boston64r6el_defconfig
@@ -33,8 +33,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
index 4691bc6..d96fdaa 100644
--- a/configs/brppt1_mmc_defconfig
+++ b/configs/brppt1_mmc_defconfig
@@ -61,9 +61,9 @@
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
# CONFIG_CMD_ITEST is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTCOUNT=y
@@ -86,8 +86,8 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_OF_TRANSLATE=y
diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig
index 0bbb682..f02aef2 100644
--- a/configs/brppt2_defconfig
+++ b/configs/brppt2_defconfig
@@ -51,9 +51,9 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
@@ -69,8 +69,8 @@
CONFIG_ARP_TIMEOUT=1500
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_SPL_DM_SEQ_ALIAS=y
# CONFIG_OF_TRANSLATE is not set
diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig
index 2c13976..ee70220 100644
--- a/configs/brsmarc1_defconfig
+++ b/configs/brsmarc1_defconfig
@@ -61,7 +61,6 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
-CONFIG_CMD_CLK=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
@@ -69,9 +68,9 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_ITEST is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
@@ -89,8 +88,8 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
# CONFIG_OF_TRANSLATE is not set
diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig
index d5f378f..245e4a5 100644
--- a/configs/brxre1_defconfig
+++ b/configs/brxre1_defconfig
@@ -59,9 +59,9 @@
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
# CONFIG_CMD_ITEST is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
@@ -80,8 +80,8 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
# CONFIG_OF_TRANSLATE is not set
diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig
index 3fca1ae..57978de 100644
--- a/configs/cardhu_defconfig
+++ b/configs/cardhu_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_TEGRA30=y
CONFIG_TARGET_CARDHU=y
diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig
index 2829025..d2778fb 100644
--- a/configs/cei-tk1-som_defconfig
+++ b/configs/cei-tk1-som_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_TEGRA124=y
CONFIG_TARGET_CEI_TK1_SOM=y
diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig
index a84d4cc..d247505 100644
--- a/configs/cherryhill_defconfig
+++ b/configs/cherryhill_defconfig
@@ -25,8 +25,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index cd8dbfc..874f266 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -9,7 +9,6 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey"
-CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=614400
CONFIG_ROCKCHIP_RK3288=y
@@ -17,6 +16,7 @@
CONFIG_TARGET_CHROMEBIT_MICKEY=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SYS_BOOTM_LEN=0x4000000
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index 4dc9cb8..decac2e 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -11,13 +11,13 @@
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob"
-CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
# CONFIG_SPL_MMC is not set
CONFIG_SPL_STACK=0xff8effff
+CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xff8e0000
CONFIG_SPL_BSS_MAX_SIZE=0x10000
diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig
index 00b655e..0fb7304 100644
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -6,9 +6,9 @@
CONFIG_MAX_CPUS=8
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral"
-CONFIG_SPL_TEXT_BASE=0xfef10000
CONFIG_TPL_TEXT_BASE=0xffff8000
CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000
+CONFIG_SPL_TEXT_BASE=0xfef10000
CONFIG_DEBUG_UART_BASE=0xde000000
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index f719cff..f40b8e8 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -9,13 +9,13 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry"
-CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=614400
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC is not set
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SYS_BOOTM_LEN=0x4000000
diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig
index 9b9fb80..5bbea6c 100644
--- a/configs/chromebook_kevin_defconfig
+++ b/configs/chromebook_kevin_defconfig
@@ -11,7 +11,6 @@
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin"
-CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0
@@ -19,6 +18,7 @@
# CONFIG_SPL_MMC is not set
CONFIG_TARGET_CHROMEBOOK_KEVIN=y
CONFIG_SPL_STACK=0xff8effff
+CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xff8e0000
CONFIG_SPL_BSS_MAX_SIZE=0x10000
diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index 9583f87..0fc1279 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -47,8 +47,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTSTAGE=y
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index ef4bfc9..a2231cc 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_SOUND=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index c973fe7..2f125ba 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -9,7 +9,6 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
-CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=614400
CONFIG_ROCKCHIP_RK3288=y
@@ -17,6 +16,7 @@
CONFIG_TARGET_CHROMEBOOK_MINNIE=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SYS_BOOTM_LEN=0x4000000
diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig
index 67ebbe3..6e9aa60 100644
--- a/configs/chromebook_samus_defconfig
+++ b/configs/chromebook_samus_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_SOUND=y
diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig
index 075e3f1..fc524da 100644
--- a/configs/chromebook_samus_tpl_defconfig
+++ b/configs/chromebook_samus_tpl_defconfig
@@ -7,10 +7,10 @@
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus"
-CONFIG_SPL_TEXT_BASE=0xffe70000
CONFIG_TPL_TEXT_BASE=0xfffd8100
CONFIG_TPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x3000
+CONFIG_SPL_TEXT_BASE=0xffe70000
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
index 401fead..c19b090 100644
--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
@@ -9,7 +9,6 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
-CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=614400
CONFIG_ROCKCHIP_RK3288=y
@@ -17,6 +16,7 @@
CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SYS_BOOTM_LEN=0x4000000
diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig
index b7396fa..a1561fd 100644
--- a/configs/chromebox_panther_defconfig
+++ b/configs/chromebox_panther_defconfig
@@ -29,8 +29,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTSTAGE=y
diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig
index a541d95..2d094bd 100644
--- a/configs/ci20_mmc_defconfig
+++ b/configs/ci20_mmc_defconfig
@@ -8,10 +8,10 @@
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x83800
CONFIG_DEFAULT_DEVICE_TREE="ci20"
-CONFIG_SPL_TEXT_BASE=0xf4000a00
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0xf4008000
+CONFIG_SPL_TEXT_BASE=0xf4000a00
CONFIG_SPL_BSS_START_ADDR=0xf4004000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SYS_BOOTM_LEN=0x4000000
diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig
index 217617e..b023106 100644
--- a/configs/cl-som-imx7_defconfig
+++ b/configs/cl-som-imx7_defconfig
@@ -53,8 +53,8 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index bba25e0..6f6597c 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -11,9 +11,9 @@
CONFIG_TARGET_CLEARFOG=y
CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
diff --git a/configs/clearfog_sata_defconfig b/configs/clearfog_sata_defconfig
index b82d604..491a273 100644
--- a/configs/clearfog_sata_defconfig
+++ b/configs/clearfog_sata_defconfig
@@ -11,9 +11,9 @@
CONFIG_TARGET_CLEARFOG=y
CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
diff --git a/configs/clearfog_spi_defconfig b/configs/clearfog_spi_defconfig
index cef80d6..d3de165 100644
--- a/configs/clearfog_spi_defconfig
+++ b/configs/clearfog_spi_defconfig
@@ -11,9 +11,9 @@
CONFIG_TARGET_CLEARFOG=y
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index edc27eb..a7940c2 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -12,12 +12,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am437x-cm-t43"
-CONFIG_SPL_TEXT_BASE=0x40300350
CONFIG_AM43XX=y
CONFIG_TARGET_CM_T43=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x40300350
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/colibri-imx6ull-emmc_defconfig b/configs/colibri-imx6ull-emmc_defconfig
index c9ab51d..ba65a3c 100644
--- a/configs/colibri-imx6ull-emmc_defconfig
+++ b/configs/colibri-imx6ull-emmc_defconfig
@@ -51,9 +51,7 @@
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_TFTP_TSIZE=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.10.2"
@@ -61,6 +59,8 @@
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig
index 4a0ff02..785e8a6 100644
--- a/configs/colibri-imx6ull_defconfig
+++ b/configs/colibri-imx6ull_defconfig
@@ -61,9 +61,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_TFTP_TSIZE=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.10.2"
@@ -71,6 +69,8 @@
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig
index 42569ec..3d576da 100644
--- a/configs/colibri-imx8x_defconfig
+++ b/configs/colibri-imx8x_defconfig
@@ -54,9 +54,7 @@
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_TFTP_TSIZE=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.10.2"
@@ -64,6 +62,8 @@
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_CLK_IMX8=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index facf0b2..4c6ba80 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -72,15 +72,15 @@
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.10.2"
CONFIG_USE_NETMASK=y
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index cc616f4..7885d0e 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -61,15 +61,15 @@
CONFIG_ENV_RANGE=0x80000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.10.2"
CONFIG_USE_NETMASK=y
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig
index 57d5017..ab6a156 100644
--- a/configs/colibri_imx7_emmc_defconfig
+++ b/configs/colibri_imx7_emmc_defconfig
@@ -50,15 +50,15 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.10.2"
CONFIG_USE_NETMASK=y
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_FSL_CAAM_JR_NTZ_ACCESS=y
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index a1a12e2..6c5c1a9 100644
--- a/configs/colibri_t20_defconfig
+++ b/configs/colibri_t20_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x200000
CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri"
-CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SPL_STACK=0xffffc
+CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_TEGRA20=y
CONFIG_TARGET_COLIBRI_T20=y
@@ -50,10 +50,10 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=1536
CONFIG_TFTP_TSIZE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=1536
CONFIG_SYS_I2C_TEGRA=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig
index 3be175b..4f2dde6 100644
--- a/configs/colibri_t30_defconfig
+++ b/configs/colibri_t30_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_TEGRA30=y
CONFIG_TARGET_COLIBRI_T30=y
@@ -44,10 +44,10 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_TFTP_TSIZE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_SYS_I2C_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index de3cf23..3a80624 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -66,13 +66,13 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.10.2"
CONFIG_USE_NETMASK=y
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
CONFIG_VYBRID_GPIO=y
diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
index 2512307..bb3d721 100644
--- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
+++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
@@ -41,8 +41,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTSTAGE=y
diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig
index f511932..c5fb5a9 100644
--- a/configs/conga-qeval20-qa3-e3845_defconfig
+++ b/configs/conga-qeval20-qa3-e3845_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTSTAGE=y
diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig
index cced383..2d6c83a 100644
--- a/configs/controlcenterdc_defconfig
+++ b/configs/controlcenterdc_defconfig
@@ -14,9 +14,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x40031000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40028000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
diff --git a/configs/coolpi-cm5-genbook-rk3588_defconfig b/configs/coolpi-cm5-genbook-rk3588_defconfig
new file mode 100644
index 0000000..3eb5dc9
--- /dev/null
+++ b/configs/coolpi-cm5-genbook-rk3588_defconfig
@@ -0,0 +1,101 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=24000000
+CONFIG_SF_DEFAULT_MODE=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-coolpi-cm5-genbook"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_SPL_SERIAL=y
+CONFIG_TARGET_GENBOOK_CM5_RK3588=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_SF_DEFAULT_BUS=5
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-coolpi-cm5-genbook.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
+CONFIG_SPL_ATF=y
+# CONFIG_CMD_BIND is not set
+# CONFIG_CMD_FASTBOOT is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_AHCI_PCI=y
+CONFIG_DWC_AHCI=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_SPL_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_PHY_ROCKCHIP_USBDP=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_SCSI=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_ROCKCHIP_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig
index 553f1dc..706c0cd 100644
--- a/configs/coreboot64_defconfig
+++ b/configs/coreboot64_defconfig
@@ -17,6 +17,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
+CONFIG_CEDIT=y
CONFIG_SYS_PBSIZE=532
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -46,6 +47,7 @@
CONFIG_USE_ROOTPATH=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_OFNODE_MULTI_TREE=y
# CONFIG_ACPIGEN is not set
CONFIG_SYS_IDE_MAXDEVICE=4
CONFIG_SYS_ATA_DATA_OFFSET=0
diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig
index 881bf8d..bd190e4 100644
--- a/configs/coreboot_defconfig
+++ b/configs/coreboot_defconfig
@@ -16,6 +16,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
+CONFIG_CEDIT=y
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_LOG=y
@@ -42,6 +43,7 @@
CONFIG_USE_ROOTPATH=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_OFNODE_MULTI_TREE=y
# CONFIG_ACPIGEN is not set
CONFIG_SYS_IDE_MAXDEVICE=4
CONFIG_SYS_ATA_DATA_OFFSET=0
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index b1e3ee0..ce2f4f7 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -18,9 +18,9 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70007f00
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus"
-CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4000
+CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3000
CONFIG_SPL_BSS_MAX_SIZE=0x800
@@ -59,8 +59,8 @@
CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_MTDPARTS=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig
index b733a57..134b353 100644
--- a/configs/cougarcanyon2_defconfig
+++ b/configs/cougarcanyon2_defconfig
@@ -28,8 +28,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index 58c9770..3129cbf 100644
--- a/configs/crownbay_defconfig
+++ b/configs/crownbay_defconfig
@@ -30,8 +30,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_SOUND=y
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index 1fe21be..c5e4bb0 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -36,8 +36,8 @@
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index dbc9bf4..4cddc7f 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -19,9 +19,9 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ti/davinci/da850-evm"
-CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x8001ff00
+CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xc0000000
CONFIG_SYS_LOAD_ADDR=0xc0700000
diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
index 0513648..b8b1a96 100644
--- a/configs/da850evm_nand_defconfig
+++ b/configs/da850evm_nand_defconfig
@@ -16,9 +16,9 @@
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ti/davinci/da850-evm"
-CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x8001ff00
+CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xc0000000
CONFIG_SYS_LOAD_ADDR=0xc0700000
diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig
index 865aca7..4dba371 100644
--- a/configs/dalmore_defconfig
+++ b/configs/dalmore_defconfig
@@ -8,8 +8,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_TEGRA114=y
CONFIG_TARGET_DALMORE=y
diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index 31645f0..d2f400d 100644
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -12,9 +12,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40020000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
@@ -38,8 +38,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index 3b91ebc..23fe44f 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -12,9 +12,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
@@ -42,8 +42,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/db-88f6820-amc_nand_defconfig b/configs/db-88f6820-amc_nand_defconfig
index 60caed4..f0dd977 100644
--- a/configs/db-88f6820-amc_nand_defconfig
+++ b/configs/db-88f6820-amc_nand_defconfig
@@ -14,9 +14,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
@@ -44,8 +44,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index 5b69a20..cb017a7 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -12,9 +12,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
@@ -41,8 +41,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 7e1495b..a417c94 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -12,9 +12,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
-CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40020000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
@@ -41,8 +41,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig
index 78ee3bd..06e52cc 100644
--- a/configs/db-xc3-24g4xg_defconfig
+++ b/configs/db-xc3-24g4xg_defconfig
@@ -26,8 +26,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig
index b220dc8..98841bb 100644
--- a/configs/deneb_defconfig
+++ b/configs/deneb_defconfig
@@ -13,12 +13,12 @@
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8-deneb"
-CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_TARGET_DENEB=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
+CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x128000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig
index ea0d30e..d9fff4e 100644
--- a/configs/dfi-bt700-q7x-151_defconfig
+++ b/configs/dfi-bt700-q7x-151_defconfig
@@ -35,8 +35,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTSTAGE=y
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index 468ec38..43ac5a5 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -5,11 +5,12 @@
CONFIG_MX6QDL=y
CONFIG_TARGET_DHCOMIMX6=y
CONFIG_SPL_SYS_L2_PL310=y
-CONFIG_DEFAULT_DEVICE_TREE="imx6q-dhcom-pdk2"
+CONFIG_DEFAULT_DEVICE_TREE="nxp/imx/imx6q-dhcom-pdk2"
CONFIG_MX6_DDRCAL=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_OF_LIBFDT_OVERLAY=y
-CONFIG_OF_LIST="imx6q-dhcom-pdk2 imx6dl-dhcom-pdk2 imx6s-dhcom-drc02 imx6dl-dhcom-picoitx"
+CONFIG_OF_LIST="nxp/imx/imx6q-dhcom-pdk2 nxp/imx/imx6dl-dhcom-pdk2 nxp/imx/imx6s-dhcom-drc02 nxp/imx/imx6dl-dhcom-picoitx"
+CONFIG_OF_UPSTREAM=y
CONFIG_FIT_VERBOSE=y
CONFIG_MULTI_DTB_FIT=y
CONFIG_LTO=y
diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index 9cbe788..323e2f5 100644
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -27,8 +27,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig
index e2bb60f..e35ca16 100644
--- a/configs/dockstar_defconfig
+++ b/configs/dockstar_defconfig
@@ -42,9 +42,9 @@
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 7061339..2448bef 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -6,9 +6,9 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
-CONFIG_SPL_TEXT_BASE=0x40300000
CONFIG_OMAP54XX=y
CONFIG_TARGET_DRA7XX_EVM=y
+CONFIG_SPL_TEXT_BASE=0x40300000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig
index fca69a4..850ccd9 100644
--- a/configs/dra7xx_hs_evm_usb_defconfig
+++ b/configs/dra7xx_hs_evm_usb_defconfig
@@ -7,12 +7,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
-CONFIG_SPL_TEXT_BASE=0x40306D50
CONFIG_OMAP54XX=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
CONFIG_TARGET_DRA7XX_EVM=y
+CONFIG_SPL_TEXT_BASE=0x40306D50
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
diff --git a/configs/draco-etamin_defconfig b/configs/draco-etamin_defconfig
index 8c902e4..f650dbc 100644
--- a/configs/draco-etamin_defconfig
+++ b/configs/draco-etamin_defconfig
@@ -53,8 +53,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_DNS2=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/draco-rastaban_defconfig b/configs/draco-rastaban_defconfig
index 3953a1a..511956e 100644
--- a/configs/draco-rastaban_defconfig
+++ b/configs/draco-rastaban_defconfig
@@ -50,8 +50,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_DNS2=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/draco-thuban_defconfig b/configs/draco-thuban_defconfig
index 2851336..1b2ce3b 100644
--- a/configs/draco-thuban_defconfig
+++ b/configs/draco-thuban_defconfig
@@ -50,8 +50,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_DNS2=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 7ef8ed0..f347c09 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -39,9 +39,9 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=50000000
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_SYS_ATA_STRIDE=4
diff --git a/configs/ds116_defconfig b/configs/ds116_defconfig
index c321e6f..8562874 100644
--- a/configs/ds116_defconfig
+++ b/configs/ds116_defconfig
@@ -17,9 +17,9 @@
CONFIG_ENV_OFFSET=0x7E0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="marvell/armada-385-synology-ds116"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
@@ -62,8 +62,8 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_ARP_TIMEOUT=200
CONFIG_NET_RETRY_COUNT=50
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_AHCI_GENERIC=y
CONFIG_LBA48=y
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index 4676c55..25e5be3 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -17,9 +17,9 @@
CONFIG_ENV_OFFSET=0x7E0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
-CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40020000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig
index 271dbdf..1c52322 100644
--- a/configs/eb_cpu5282_defconfig
+++ b/configs/eb_cpu5282_defconfig
@@ -26,8 +26,8 @@
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_MII_INIT=y
CONFIG_OVERWRITE_ETHADDR_ONCE=y
diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig
index 89a7925..a8c1b99 100644
--- a/configs/eb_cpu5282_internal_defconfig
+++ b/configs/eb_cpu5282_internal_defconfig
@@ -24,8 +24,8 @@
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_MII_INIT=y
CONFIG_OVERWRITE_ETHADDR_ONCE=y
diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig
index 071ddb8..957fd83 100644
--- a/configs/efi-x86_payload32_defconfig
+++ b/configs/efi-x86_payload32_defconfig
@@ -24,8 +24,8 @@
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/endeavoru_defconfig b/configs/endeavoru_defconfig
index f0c8ce1..1d1f104 100644
--- a/configs/endeavoru_defconfig
+++ b/configs/endeavoru_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-htc-endeavoru"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_TEGRA30=y
CONFIG_TARGET_ENDEAVORU=y
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index 78b0a5c..544ac82 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
@@ -27,11 +27,11 @@
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_NCSI=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
-CONFIG_CMD_NCSI=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig
index 7cf97ee..c9d75e0 100644
--- a/configs/evb-ast2600_defconfig
+++ b/configs/evb-ast2600_defconfig
@@ -63,11 +63,11 @@
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_NCSI=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
-CONFIG_CMD_NCSI=y
CONFIG_CMD_EXT4=y
CONFIG_DOS_PARTITION=y
# CONFIG_SPL_DOS_PARTITION is not set
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 69c6d7e..ba79960 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -12,10 +12,10 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
-CONFIG_SPL_TEXT_BASE=0x10081000
CONFIG_ROCKCHIP_RK3036=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0x10081fff
+CONFIG_SPL_TEXT_BASE=0x10081000
CONFIG_SPL_STACK_R=y
CONFIG_SYS_LOAD_ADDR=0x60800800
CONFIG_DEBUG_UART_BASE=0x20068000
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 7118a4f..3cbc226 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -10,10 +10,10 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x61100000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
-CONFIG_SPL_TEXT_BASE=0x60000000
CONFIG_ROCKCHIP_RK322X=y
CONFIG_TARGET_EVB_RK3229=y
CONFIG_SPL_STACK_R_ADDR=0x60600000
+CONFIG_SPL_TEXT_BASE=0x60000000
CONFIG_SPL_STACK_R=y
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x61800800
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 6091319..fd52853 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -86,7 +86,6 @@
CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 63df818..b9e53ec 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -27,8 +27,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
@@ -42,9 +42,9 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="bzImage"
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_TSIZE=y
CONFIG_USE_ROOTPATH=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig
index 243a4c3..c9eb661 100644
--- a/configs/gardena-smart-gateway-at91sam_defconfig
+++ b/configs/gardena-smart-gateway-at91sam_defconfig
@@ -15,11 +15,11 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g25-gardena-smart-gateway"
-CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x308000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig
index cfa51b2..215858c 100644
--- a/configs/ge_b1x5v2_defconfig
+++ b/configs/ge_b1x5v2_defconfig
@@ -54,11 +54,11 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_SNTP=y
CONFIG_CMD_DHCP=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
-CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig
index 1d06f34..f79f0e8 100644
--- a/configs/generic-rk3568_defconfig
+++ b/configs/generic-rk3568_defconfig
@@ -22,7 +22,6 @@
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-generic.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -31,6 +30,7 @@
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_MISC=y
CONFIG_CMD_MMC=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig
index ebe883e..51e31dc 100644
--- a/configs/generic-rk3588_defconfig
+++ b/configs/generic-rk3588_defconfig
@@ -18,13 +18,13 @@
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-generic.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_MISC=y
CONFIG_CMD_MMC=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig
index e54d7ef..af9c7a4 100644
--- a/configs/giedi_defconfig
+++ b/configs/giedi_defconfig
@@ -13,12 +13,12 @@
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8-giedi"
-CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_TARGET_GIEDI=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
+CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x128000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index e1ee43d..af758fc 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -44,9 +44,9 @@
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_LBA48=y
diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index be78678..d212f91 100644
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -1,41 +1,25 @@
+#include <configs/renesas_rcar2.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_ARCH_RENESAS=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x100000
-CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
-CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7793-gose"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Gose"
CONFIG_R8A7793=y
CONFIG_TARGET_GOSE=y
-CONFIG_SYS_MONITOR_LEN=262144
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xe6340000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
-CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_ENV_ADDR=0xC0000
-CONFIG_PCI=y
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_BOOTDELAY=3
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -45,63 +29,14 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_SDRAM=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)"
-CONFIG_PARTITION_UUIDS=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_SH_ETHER=y
-CONFIG_PCI_RCAR_GEN2=y
-CONFIG_PINCTRL=y
-CONFIG_PINCONF=y
-CONFIG_PINCTRL_PFC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SH_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_STORAGE=y
-CONFIG_SYS_TIMER_COUNTS_DOWN=y
diff --git a/configs/grouper_defconfig b/configs/grouper_defconfig
index d07d740..9221ffb 100644
--- a/configs/grouper_defconfig
+++ b/configs/grouper_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-nexus7-grouper-E1565"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_TEGRA30=y
CONFIG_TARGET_GROUPER=y
diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig
index fcc079e..a400543 100644
--- a/configs/grpeach_defconfig
+++ b/configs/grpeach_defconfig
@@ -29,10 +29,10 @@
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_USB=y
+CONFIG_CMD_SNTP=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
-CONFIG_CMD_SNTP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
index d42d47f..9929d58 100644
--- a/configs/gurnard_defconfig
+++ b/configs/gurnard_defconfig
@@ -30,8 +30,8 @@
CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig
index a64e751..d8cc845 100644
--- a/configs/harmony_defconfig
+++ b/configs/harmony_defconfig
@@ -6,8 +6,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x1FFE0000
CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony"
-CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SPL_STACK=0xffffc
+CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_TEGRA20=y
CONFIG_TARGET_HARMONY=y
diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
index e45446c..2778cb7 100644
--- a/configs/helios4_defconfig
+++ b/configs/helios4_defconfig
@@ -11,9 +11,9 @@
CONFIG_TARGET_HELIOS4=y
CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig
index bc64a80..c9753e1 100644
--- a/configs/hihope_rzg2_defconfig
+++ b/configs/hihope_rzg2_defconfig
@@ -1,83 +1,42 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774a1-hihope-rzg2m"
-CONFIG_RCAR_GEN3=y
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774a1-hihope-rzg2m-ex"
CONFIG_TARGET_HIHOPE_RZG2=y
-CONFIG_SYS_MONITOR_LEN=1048576
-CONFIG_SYS_LOAD_ADDR=0x58000000
# CONFIG_SPL is not set
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774a1-hihope-rzg2m.dtb; booti 0x48080000 - 0x48000000"
-CONFIG_DEFAULT_FDT_FILE="r8a774a1-hihope-rzg2m.dtb"
-CONFIG_SYS_PBSIZE=2068
+CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774a1-hihope-rzg2m-ex.dtb; booti 0x48080000 - 0x48000000"
+CONFIG_DEFAULT_FDT_FILE="r8a774a1-hihope-rzg2m-ex.dtb"
# CONFIG_BOARD_EARLY_INIT_F is not set
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
-CONFIG_OF_LIST="renesas/r8a774a1-hihope-rzg2m renesas/r8a774b1-hihope-rzg2n renesas/r8a774e1-hihope-rzg2h"
+CONFIG_OF_LIST="renesas/r8a774a1-hihope-rzg2m-ex renesas/r8a774b1-hihope-rzg2n-ex renesas/r8a774e1-hihope-rzg2h-ex"
CONFIG_MULTI_DTB_FIT_LZO=y
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_SYS_MMC_ENV_DEV=0
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
CONFIG_GPIO_HOG=y
-CONFIG_RCAR_GPIO=y
CONFIG_DM_PCA953X=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_REALTEK=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_TEE=y
CONFIG_OPTEE=y
CONFIG_USB=y
diff --git a/configs/hmibsc_defconfig b/configs/hmibsc_defconfig
index 38bc73f..88c9c70 100644
--- a/configs/hmibsc_defconfig
+++ b/configs/hmibsc_defconfig
@@ -31,8 +31,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
diff --git a/configs/ibex-ast2700_defconfig b/configs/ibex-ast2700_defconfig
index e1d5be2..e4b9a9a 100644
--- a/configs/ibex-ast2700_defconfig
+++ b/configs/ibex-ast2700_defconfig
@@ -11,8 +11,8 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x14bd7800
CONFIG_ENV_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="ast2700-ibex"
-CONFIG_SPL_TEXT_BASE=0x14bc0080
CONFIG_DM_RESET=y
+CONFIG_SPL_TEXT_BASE=0x14bc0080
CONFIG_SPL_BSS_START_ADDR=0x14bd7800
CONFIG_SPL_BSS_MAX_SIZE=0x800
CONFIG_SYS_BOOTM_LEN=0x4000000
@@ -68,7 +68,6 @@
CONFIG_DEVICE_TREE_INCLUDES="ast2700-u-boot.dtsi"
# CONFIG_OF_TAG_MIGRATE is not set
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-# CONFIG_NET is not set
CONFIG_SYS_RX_ETH_BUFFER=2
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_DM_SEQ_ALIAS is not set
diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig
index 2823965..9d195e1 100644
--- a/configs/iconnect_defconfig
+++ b/configs/iconnect_defconfig
@@ -45,9 +45,9 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ideapad-yoga-11_defconfig b/configs/ideapad-yoga-11_defconfig
index a9dd521..3c152cb 100644
--- a/configs/ideapad-yoga-11_defconfig
+++ b/configs/ideapad-yoga-11_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-lenovo-ideapad-yoga-11"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_TEGRA30=y
CONFIG_TARGET_IDEAPAD_YOGA_11=y
diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig
index 914e293..233c89c 100644
--- a/configs/imgtec_xilfpga_defconfig
+++ b/configs/imgtec_xilfpga_defconfig
@@ -29,8 +29,8 @@
CONFIG_CMD_TIME=y
# CONFIG_ISO_PARTITION is not set
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CLK=y
CONFIG_XILINX_EMACLITE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig
index c7212d7..38282e6 100644
--- a/configs/imx28_xea_defconfig
+++ b/configs/imx28_xea_defconfig
@@ -12,7 +12,6 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="imx28-xea"
-CONFIG_SPL_TEXT_BASE=0x1000
CONFIG_TARGET_XEA=y
CONFIG_SPL_MXS_PMU_MINIMAL_VDD5V_CURRENT=y
CONFIG_SPL_MXS_PMU_DISABLE_BATT_CHARGE=y
@@ -21,6 +20,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x20000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SPL_TEXT_BASE=0x1000
CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPL_SIZE_LIMIT=0xa000
diff --git a/configs/imx28_xea_sb_defconfig b/configs/imx28_xea_sb_defconfig
index 39e1d1c..c7751b5 100644
--- a/configs/imx28_xea_sb_defconfig
+++ b/configs/imx28_xea_sb_defconfig
@@ -10,8 +10,8 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="imx28-xea"
-CONFIG_SPL_TEXT_BASE=0x1000
CONFIG_TARGET_XEA=y
+CONFIG_SPL_TEXT_BASE=0x1000
CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPL=y
diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig
index 7ae8d54..722a596 100644
--- a/configs/imx8mm-cl-iot-gate-optee_defconfig
+++ b/configs/imx8mm-cl-iot-gate-optee_defconfig
@@ -8,7 +8,6 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-cl-iot-gate-optee"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -16,6 +15,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig
index ca0335b..1aa42ef 100644
--- a/configs/imx8mm-cl-iot-gate_defconfig
+++ b/configs/imx8mm-cl-iot-gate_defconfig
@@ -9,7 +9,6 @@
CONFIG_ENV_OFFSET=0x200000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-cl-iot-gate"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_CL_IOT_GATE=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -17,6 +16,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
index 14f8bfe..db44145 100644
--- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-ctouch2"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_ICORE_MX8MM=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
index d0d46d2..94b4a95 100644
--- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-edimm2.2"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_ICORE_MX8MM=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig
index d4ceca7..ae9595e 100644
--- a/configs/imx8mm-mx8menlo_defconfig
+++ b/configs/imx8mm-mx8menlo_defconfig
@@ -9,7 +9,6 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-mx8menlo"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_MX8MENLO=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -19,6 +18,7 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
@@ -97,8 +97,8 @@
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eth0"
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
diff --git a/configs/imx8mm-phygate-tauri-l_defconfig b/configs/imx8mm-phygate-tauri-l_defconfig
index c69fe50..18fffa7 100644
--- a/configs/imx8mm-phygate-tauri-l_defconfig
+++ b/configs/imx8mm-phygate-tauri-l_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x3C0000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-phygate-tauri-l"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_PHYCORE_IMX8MM=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
index 3411d2b..56e1889 100644
--- a/configs/imx8mm_beacon_defconfig
+++ b/configs/imx8mm_beacon_defconfig
@@ -11,13 +11,13 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-beacon-kit"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_BEACON=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mm_beacon_fspi_defconfig b/configs/imx8mm_beacon_fspi_defconfig
index 44af74b..2a8bd2d 100644
--- a/configs/imx8mm_beacon_fspi_defconfig
+++ b/configs/imx8mm_beacon_fspi_defconfig
@@ -12,12 +12,12 @@
CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-beacon-kit"
-CONFIG_SPL_TEXT_BASE=0x7E2000
CONFIG_TARGET_IMX8MM_BEACON=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E2000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig
index 77bdefd..105fbfb 100644
--- a/configs/imx8mm_data_modul_edm_sbc_defconfig
+++ b/configs/imx8mm_data_modul_edm_sbc_defconfig
@@ -12,7 +12,6 @@
CONFIG_IMX_CONFIG="board/data_modul/imx8mm_edm_sbc/imximage.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-data-modul-edm-sbc"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_DATA_MODUL_EDM_SBC=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
@@ -23,6 +22,7 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
@@ -36,7 +36,6 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTARGS=y
@@ -107,12 +106,12 @@
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_CAT=y
CONFIG_CMD_XXD=y
-CONFIG_CMD_DHCP=y
CONFIG_CMD_DHCP6=y
CONFIG_CMD_TFTPPUT=y
-CONFIG_CMD_WGET=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_WGET=y
CONFIG_CMD_PXE=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
@@ -146,12 +145,12 @@
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_TSIZE=y
CONFIG_PROT_TCP_SACK=y
CONFIG_IPV6=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index 1a15292..9075710 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-evk"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_EVK=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mm_evk_fspi_defconfig b/configs/imx8mm_evk_fspi_defconfig
index 4898384..fb4a442 100644
--- a/configs/imx8mm_evk_fspi_defconfig
+++ b/configs/imx8mm_evk_fspi_defconfig
@@ -12,13 +12,13 @@
CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-evk"
-CONFIG_SPL_TEXT_BASE=0x7E2000
CONFIG_TARGET_IMX8MM_EVK=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E2000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mm_phg_defconfig b/configs/imx8mm_phg_defconfig
index f0867e6..384f2cc 100644
--- a/configs/imx8mm_phg_defconfig
+++ b/configs/imx8mm_phg_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x200000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-phg"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_PHG=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index 4a4e554..da248e4 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -9,7 +9,6 @@
CONFIG_ENV_OFFSET=0x3f0000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-venice-gw71xx-0x"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_VENICE=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
@@ -18,6 +17,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
@@ -87,11 +87,11 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eth0"
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_PROT_TCP_SACK=y
CONFIG_IPV6=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM=y
CONFIG_SPL_CLK_COMPOSITE_CCF=y
CONFIG_CLK_COMPOSITE_CCF=y
diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig
index 23bfaf2..b72fa93 100644
--- a/configs/imx8mn_beacon_2g_defconfig
+++ b/configs/imx8mn_beacon_2g_defconfig
@@ -12,7 +12,6 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-beacon-kit"
-CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_IMX8MN_BEACON_2GB_LPDDR=y
CONFIG_OF_LIBFDT_OVERLAY=y
@@ -21,6 +20,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig
index aa83412..69af7ce 100644
--- a/configs/imx8mn_beacon_defconfig
+++ b/configs/imx8mn_beacon_defconfig
@@ -12,7 +12,6 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-beacon-kit"
-CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
@@ -20,6 +19,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mn_beacon_fspi_defconfig b/configs/imx8mn_beacon_fspi_defconfig
index 3a92f0b..b90cb90 100644
--- a/configs/imx8mn_beacon_fspi_defconfig
+++ b/configs/imx8mn_beacon_fspi_defconfig
@@ -12,7 +12,6 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-beacon-kit"
-CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
@@ -20,6 +19,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig
index 364f25f..f4a0474 100644
--- a/configs/imx8mn_bsh_smm_s2_defconfig
+++ b/configs/imx8mn_bsh_smm_s2_defconfig
@@ -9,7 +9,6 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-bsh-smm-s2"
-CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BSH_SMM_S2=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -17,6 +16,7 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig
index e8f3d40..9ca96a7 100644
--- a/configs/imx8mn_bsh_smm_s2pro_defconfig
+++ b/configs/imx8mn_bsh_smm_s2pro_defconfig
@@ -9,7 +9,6 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-bsh-smm-s2pro"
-CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BSH_SMM_S2PRO=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -18,6 +17,7 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig
index b20d0b0..3eb58d6 100644
--- a/configs/imx8mn_ddr4_evk_defconfig
+++ b/configs/imx8mn_ddr4_evk_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-ddr4-evk"
-CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_DDR4_EVK=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig
index ee571c7..43860fe 100644
--- a/configs/imx8mn_evk_defconfig
+++ b/configs/imx8mn_evk_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-evk"
-CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_EVK=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig
index 1922f2d..9016c40 100644
--- a/configs/imx8mn_var_som_defconfig
+++ b/configs/imx8mn_var_som_defconfig
@@ -10,7 +10,6 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mn-var-som-symphony"
-CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_VAR_SOM=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -19,6 +18,7 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig
index b0a7f07..44af3e6 100644
--- a/configs/imx8mn_venice_defconfig
+++ b/configs/imx8mn_venice_defconfig
@@ -9,7 +9,6 @@
CONFIG_ENV_OFFSET=0x3f0000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-venice-gw7902"
-CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_VENICE=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -17,6 +16,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
@@ -86,11 +86,11 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eth0"
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_PROT_TCP_SACK=y
CONFIG_IPV6=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM=y
CONFIG_SPL_CLK_IMX8MN=y
CONFIG_CLK_IMX8MN=y
diff --git a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
index 58c525d..d7d5df7 100644
--- a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
+++ b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
@@ -12,13 +12,13 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-icore-mx8mp-edimm2.2"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_ICORE_MX8MP=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig
index 2a54c76..f39e4f5 100644
--- a/configs/imx8mp_beacon_defconfig
+++ b/configs/imx8mp_beacon_defconfig
@@ -13,7 +13,6 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-beacon-kit"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_BEACON=y
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -21,6 +20,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
diff --git a/configs/imx8mp_data_modul_edm_sbc_defconfig b/configs/imx8mp_data_modul_edm_sbc_defconfig
index 7559c9d..f809d23 100644
--- a/configs/imx8mp_data_modul_edm_sbc_defconfig
+++ b/configs/imx8mp_data_modul_edm_sbc_defconfig
@@ -13,7 +13,6 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-data-modul-edm-sbc"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_DATA_MODUL_EDM_SBC=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
@@ -24,6 +23,7 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
CONFIG_SPL_STACK=0x96fc00
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x96fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
@@ -43,7 +43,6 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTARGS=y
@@ -115,12 +114,12 @@
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_CAT=y
CONFIG_CMD_XXD=y
-CONFIG_CMD_DHCP=y
CONFIG_CMD_DHCP6=y
CONFIG_CMD_TFTPPUT=y
-CONFIG_CMD_WGET=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_WGET=y
CONFIG_CMD_PXE=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
@@ -155,12 +154,12 @@
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_TSIZE=y
CONFIG_PROT_TCP_SACK=y
CONFIG_IPV6=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
diff --git a/configs/imx8mp_debix_model_a_defconfig b/configs/imx8mp_debix_model_a_defconfig
index 9f75ab1..560ac12 100644
--- a/configs/imx8mp_debix_model_a_defconfig
+++ b/configs/imx8mp_debix_model_a_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-debix-model-a"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_DEBIX_MODEL_A=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index ecf75a0..5369f8b 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-evk"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_EVK=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
diff --git a/configs/imx8mp_navqp_defconfig b/configs/imx8mp_navqp_defconfig
index d4c10fe..6c7eb33 100644
--- a/configs/imx8mp_navqp_defconfig
+++ b/configs/imx8mp_navqp_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-navqp"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_NAVQP=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig
index 898ed0e..bfcda77 100644
--- a/configs/imx8mp_rsb3720a1_4G_defconfig
+++ b/configs/imx8mp_rsb3720a1_4G_defconfig
@@ -14,7 +14,6 @@
CONFIG_IMX_CONFIG="board/advantech/imx8mp_rsb3720a1/imximage-8mp-lpddr4.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-rsb3720-a1"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_RSB3720A1_4G=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -22,6 +21,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig
index 5eeb3fd..69e67bc 100644
--- a/configs/imx8mp_rsb3720a1_6G_defconfig
+++ b/configs/imx8mp_rsb3720a1_6G_defconfig
@@ -14,7 +14,6 @@
CONFIG_IMX_CONFIG="board/advantech/imx8mp_rsb3720a1/imximage-8mp-lpddr4.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-rsb3720-a1"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_RSB3720A1_6G=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -22,6 +21,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
index 4b93e0c..bf296b1 100644
--- a/configs/imx8mp_venice_defconfig
+++ b/configs/imx8mp_venice_defconfig
@@ -9,7 +9,6 @@
CONFIG_ENV_OFFSET=0x3f0000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-venice-gw71xx-2x"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_VENICE=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
@@ -18,6 +17,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
@@ -87,11 +87,11 @@
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_MMC_ENV_DEV=2
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_PROT_TCP_SACK=y
CONFIG_IPV6=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_CLK_IMX8MP=y
diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig
index 8e0b7a7..7444b64 100644
--- a/configs/imx8mq_cm_defconfig
+++ b/configs/imx8mq_cm_defconfig
@@ -12,12 +12,12 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-cm"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MQ_CM=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x180000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig
index fd129da..a3a2333 100644
--- a/configs/imx8mq_evk_defconfig
+++ b/configs/imx8mq_evk_defconfig
@@ -12,7 +12,6 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mq-evk"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MQ_EVK=y
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -20,6 +19,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x180000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig
index 487dae6..a372739 100644
--- a/configs/imx8mq_phanbell_defconfig
+++ b/configs/imx8mq_phanbell_defconfig
@@ -12,7 +12,6 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-phanbell"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MQ_PHANBELL=y
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -20,6 +19,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x180000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8mq_reform2_defconfig b/configs/imx8mq_reform2_defconfig
index 475320b..1a6d6dc 100644
--- a/configs/imx8mq_reform2_defconfig
+++ b/configs/imx8mq_reform2_defconfig
@@ -12,7 +12,6 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-mnt-reform2"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MQ_REFORM2=y
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -20,6 +19,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x180000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig
index 779ae9a..9bbbc6a 100644
--- a/configs/imx8qm_mek_defconfig
+++ b/configs/imx8qm_mek_defconfig
@@ -13,12 +13,12 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-mek"
-CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_TARGET_IMX8QM_MEK=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
+CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x128000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig
index 539debc..dfb288b 100644
--- a/configs/imx8qxp_mek_defconfig
+++ b/configs/imx8qxp_mek_defconfig
@@ -13,12 +13,12 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-mek"
-CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_TARGET_IMX8QXP_MEK=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
+CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x128000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig
index 1e421d4..cccc315 100644
--- a/configs/imx8ulp_evk_defconfig
+++ b/configs/imx8ulp_evk_defconfig
@@ -11,12 +11,12 @@
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx8ulp/imximage.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8ulp-evk"
-CONFIG_SPL_TEXT_BASE=0x22020000
CONFIG_TARGET_IMX8ULP_EVK=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x22050000
+CONFIG_SPL_TEXT_BASE=0x22020000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x22048000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx93-phyboard-segin_defconfig b/configs/imx93-phyboard-segin_defconfig
index 18a4087..309262c 100644
--- a/configs/imx93-phyboard-segin_defconfig
+++ b/configs/imx93-phyboard-segin_defconfig
@@ -12,7 +12,6 @@
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx93-phyboard-segin"
-CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_AHAB_BOOT=y
CONFIG_TARGET_PHYCORE_IMX93=y
CONFIG_OF_LIBFDT_OVERLAY=y
@@ -20,6 +19,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x20519dd0
+CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x2051a000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig
index a4acb77..df62eec 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -11,12 +11,12 @@
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-11x11-evk"
-CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_TARGET_IMX93_11X11_EVK=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x20519dd0
+CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x2051a000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx93_9x9_qsb_defconfig b/configs/imx93_9x9_qsb_defconfig
index 74460a7..582fe5a 100644
--- a/configs/imx93_9x9_qsb_defconfig
+++ b/configs/imx93_9x9_qsb_defconfig
@@ -13,13 +13,13 @@
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-9x9-qsb"
-CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_TARGET_IMX93_9X9_QSB=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x20519dd0
CONFIG_SPL_SYS_MALLOC_F_LEN=0x18000
+CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x2051a000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx93_9x9_qsb_inline_ecc_defconfig b/configs/imx93_9x9_qsb_inline_ecc_defconfig
index 4b39db4..c95145c 100644
--- a/configs/imx93_9x9_qsb_inline_ecc_defconfig
+++ b/configs/imx93_9x9_qsb_inline_ecc_defconfig
@@ -13,13 +13,13 @@
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-9x9-qsb"
-CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_TARGET_IMX93_9X9_QSB=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x20519dd0
CONFIG_SPL_SYS_MALLOC_F_LEN=0x18000
+CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x2051a000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imx93_var_som_defconfig b/configs/imx93_var_som_defconfig
index cb102f2..96cd862 100644
--- a/configs/imx93_var_som_defconfig
+++ b/configs/imx93_var_som_defconfig
@@ -11,13 +11,13 @@
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx93-var-som-symphony"
-CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_AHAB_BOOT=y
CONFIG_TARGET_IMX93_VAR_SOM=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x20519dd0
+CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x2051a000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig
index 58a3e92..b67dc39 100644
--- a/configs/imxrt1020-evk_defconfig
+++ b/configs/imxrt1020-evk_defconfig
@@ -12,10 +12,10 @@
CONFIG_ENV_OFFSET=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imxrt1020-evk"
-CONFIG_SPL_TEXT_BASE=0x20209000
CONFIG_TARGET_IMXRT1020_EVK=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x20209000
CONFIG_SYS_LOAD_ADDR=0x20209000
CONFIG_SPL_SIZE_LIMIT=0x20000
CONFIG_SPL=y
diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig
index 141303c..b488ff1 100644
--- a/configs/imxrt1050-evk_defconfig
+++ b/configs/imxrt1050-evk_defconfig
@@ -14,17 +14,16 @@
CONFIG_ENV_OFFSET=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk"
-CONFIG_SPL_TEXT_BASE=0x20002000
CONFIG_TARGET_IMXRT1050_EVK=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x20002000
CONFIG_SYS_LOAD_ADDR=0x20002000
CONFIG_SPL_SIZE_LIMIT=0x20000
CONFIG_SPL=y
CONFIG_HAVE_SYS_UBOOT_START=y
CONFIG_SYS_UBOOT_START=0x800023FD
CONFIG_BOOTSTD_FULL=y
-CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_SD_BOOT=y
CONFIG_SPI_BOOT=y
CONFIG_SYS_CBSIZE=256
diff --git a/configs/imxrt1050-evk_fspi_defconfig b/configs/imxrt1050-evk_fspi_defconfig
index b77dbab..5d58e72 100644
--- a/configs/imxrt1050-evk_fspi_defconfig
+++ b/configs/imxrt1050-evk_fspi_defconfig
@@ -16,17 +16,16 @@
CONFIG_IMX_CONFIG="board/freescale/imxrt1050-evk/imximage-nor.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk"
-CONFIG_SPL_TEXT_BASE=0x20002000
CONFIG_TARGET_IMXRT1050_EVK=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x20002000
CONFIG_SYS_LOAD_ADDR=0x20002000
CONFIG_SPL_SIZE_LIMIT=0x20000
CONFIG_SPL=y
CONFIG_HAVE_SYS_UBOOT_START=y
CONFIG_SYS_UBOOT_START=0x800023FD
CONFIG_BOOTSTD_FULL=y
-CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_SD_BOOT=y
CONFIG_SPI_BOOT=y
CONFIG_SYS_CBSIZE=256
diff --git a/configs/imxrt1170-evk_defconfig b/configs/imxrt1170-evk_defconfig
index 487da27..32107fa 100644
--- a/configs/imxrt1170-evk_defconfig
+++ b/configs/imxrt1170-evk_defconfig
@@ -14,10 +14,10 @@
CONFIG_ENV_OFFSET=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imxrt1170-evk"
-CONFIG_SPL_TEXT_BASE=0x202C0000
CONFIG_TARGET_IMXRT1170_EVK=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x202C0000
CONFIG_SYS_LOAD_ADDR=0x202C0000
CONFIG_SPL_SIZE_LIMIT=0x20000
CONFIG_SPL=y
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index 97ec66f..cb09739 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -36,8 +36,8 @@
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig
index 2624f0c..d158886 100644
--- a/configs/iot2050_defconfig
+++ b/configs/iot2050_defconfig
@@ -18,11 +18,11 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am6528-iot2050-basic"
-CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80a00000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index 03849b9..eb6203f 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -16,13 +16,13 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ti/k3-j7200-common-proc-board"
-CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80a00000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig
index 1db9251..f036a6f 100644
--- a/configs/j7200_evm_r5_defconfig
+++ b/configs/j7200_evm_r5_defconfig
@@ -16,12 +16,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-r5-common-proc-board"
-CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc
CONFIG_SPL_BSS_MAX_SIZE=0xa000
diff --git a/configs/j721e_beagleboneai64_r5_defconfig b/configs/j721e_beagleboneai64_r5_defconfig
index 9662423..77e4496 100644
--- a/configs/j721e_beagleboneai64_r5_defconfig
+++ b/configs/j721e_beagleboneai64_r5_defconfig
@@ -13,12 +13,12 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-beagleboneai64"
-CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x41cf59f0
CONFIG_SPL_BSS_MAX_SIZE=0xa000
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index ad6dbbc..00546ae 100644
--- a/configs/j721e_evm_r5_defconfig
+++ b/configs/j721e_evm_r5_defconfig
@@ -16,12 +16,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board"
-CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x41cf59f0
CONFIG_SPL_BSS_MAX_SIZE=0xa000
diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig
index d619ac8..2a0ccfb 100644
--- a/configs/j721s2_evm_a72_defconfig
+++ b/configs/j721s2_evm_a72_defconfig
@@ -15,13 +15,13 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ti/k3-j721s2-common-proc-board"
-CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80a00000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig
index d647f7c..f4441d6 100644
--- a/configs/j721s2_evm_r5_defconfig
+++ b/configs/j721s2_evm_r5_defconfig
@@ -16,12 +16,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j721s2-r5-common-proc-board"
-CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x41c76000
CONFIG_SPL_BSS_MAX_SIZE=0xa000
diff --git a/configs/j722s_evm_a53_defconfig b/configs/j722s_evm_a53_defconfig
index 1fdfdb5..35329fb 100644
--- a/configs/j722s_evm_a53_defconfig
+++ b/configs/j722s_evm_a53_defconfig
@@ -14,12 +14,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ti/k3-j722s-evm"
-CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80a00000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/j722s_evm_r5_defconfig b/configs/j722s_evm_r5_defconfig
index e6a573d..a3c13fe 100644
--- a/configs/j722s_evm_r5_defconfig
+++ b/configs/j722s_evm_r5_defconfig
@@ -13,12 +13,12 @@
CONFIG_ENV_OFFSET=0x680000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j722s-r5-evm"
-CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x43c7b000
CONFIG_SPL_BSS_MAX_SIZE=0x3000
diff --git a/configs/j784s4_evm_r5_defconfig b/configs/j784s4_evm_r5_defconfig
index 0b5441f..3f1f66d 100644
--- a/configs/j784s4_evm_r5_defconfig
+++ b/configs/j784s4_evm_r5_defconfig
@@ -16,12 +16,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j784s4-r5-evm"
-CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x41c76000
CONFIG_SPL_BSS_MAX_SIZE=0xa000
diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig
index c13edd8..b92590e 100644
--- a/configs/jetson-tk1_defconfig
+++ b/configs/jetson-tk1_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_TEGRA124=y
CONFIG_TARGET_JETSON_TK1=y
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index b87defb..c207309 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -19,9 +19,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2e-evm"
-CONFIG_SPL_TEXT_BASE=0xC100000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xc1223f4
+CONFIG_SPL_TEXT_BASE=0xC100000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xc10fff8
CONFIG_SPL_BSS_MAX_SIZE=0x8000
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 740a436..c93e82a 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -18,9 +18,9 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2g-evm"
-CONFIG_SPL_TEXT_BASE=0xC0A0000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xc0c23f4
+CONFIG_SPL_TEXT_BASE=0xC0A0000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xc0afff8
CONFIG_SPL_BSS_MAX_SIZE=0x8000
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 782cb1d..7ae7a3b 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -19,9 +19,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2hk-evm"
-CONFIG_SPL_TEXT_BASE=0xC200000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xc2223f4
+CONFIG_SPL_TEXT_BASE=0xC200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xc20fff8
CONFIG_SPL_BSS_MAX_SIZE=0x8000
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 3a87e48..9f08e9d 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -19,9 +19,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2l-evm"
-CONFIG_SPL_TEXT_BASE=0xC100000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xc1223f4
+CONFIG_SPL_TEXT_BASE=0xC100000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xc10fff8
CONFIG_SPL_BSS_MAX_SIZE=0x8000
diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index a50822e..4e37df2 100644
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -42,8 +42,8 @@
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SPI=y
CONFIG_BOOTP_BOOTFILESIZE=y
-CONFIG_CMD_PING=y
CONFIG_CMD_ETHSW=y
+CONFIG_CMD_PING=y
CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig
index a9ed1ba..211880b 100644
--- a/configs/kmcoge5ne_defconfig
+++ b/configs/kmcoge5ne_defconfig
@@ -148,8 +148,8 @@
CONFIG_SYS_LOADS_BAUD_CHANGE=y
CONFIG_CMD_NAND=y
# CONFIG_CMD_PINMUX is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_JFFS2=y
diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig
index 1d3c757..b69410b 100644
--- a/configs/kmeter1_defconfig
+++ b/configs/kmeter1_defconfig
@@ -127,8 +127,8 @@
CONFIG_LOADS_ECHO=y
CONFIG_SYS_LOADS_BAUD_CHANGE=y
# CONFIG_CMD_PINMUX is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_JFFS2=y
diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig
index b036ede..28ad18e 100644
--- a/configs/kmopti2_defconfig
+++ b/configs/kmopti2_defconfig
@@ -134,8 +134,8 @@
CONFIG_LOADS_ECHO=y
CONFIG_SYS_LOADS_BAUD_CHANGE=y
# CONFIG_CMD_PINMUX is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_JFFS2=y
diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig
index a6741b4..42ced44 100644
--- a/configs/kmsupx5_defconfig
+++ b/configs/kmsupx5_defconfig
@@ -119,8 +119,8 @@
CONFIG_CMD_I2C=y
CONFIG_LOADS_ECHO=y
CONFIG_SYS_LOADS_BAUD_CHANGE=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_JFFS2=y
diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig
index c8bfc99..3488e26 100644
--- a/configs/kmtepr2_defconfig
+++ b/configs/kmtepr2_defconfig
@@ -133,8 +133,8 @@
CONFIG_CMD_I2C=y
CONFIG_LOADS_ECHO=y
CONFIG_SYS_LOADS_BAUD_CHANGE=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_JFFS2=y
diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index f5deacf..9bce9e3 100644
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -1,41 +1,25 @@
+#include <configs/renesas_rcar2.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_ARCH_RENESAS=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x100000
-CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
-CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7791-koelsch"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Koelsch"
CONFIG_R8A7791=y
CONFIG_TARGET_KOELSCH=y
-CONFIG_SYS_MONITOR_LEN=262144
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xe6340000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
-CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_ENV_ADDR=0xC0000
-CONFIG_PCI=y
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_BOOTDELAY=3
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -45,63 +29,14 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_SDRAM=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)"
-CONFIG_PARTITION_UUIDS=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_SH_ETHER=y
-CONFIG_PCI_RCAR_GEN2=y
-CONFIG_PINCTRL=y
-CONFIG_PINCONF=y
-CONFIG_PINCTRL_PFC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SH_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_STORAGE=y
-CONFIG_SYS_TIMER_COUNTS_DOWN=y
diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig
index baefb27..f2d5bc1 100644
--- a/configs/kontron-sl-mx8mm_defconfig
+++ b/configs/kontron-sl-mx8mm_defconfig
@@ -13,13 +13,13 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-kontron-bl"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_KONTRON_MX8MM=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL_STACK=0x91fff0
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig
index f155c94..6e21870 100644
--- a/configs/kontron_pitx_imx8m_defconfig
+++ b/configs/kontron_pitx_imx8m_defconfig
@@ -12,7 +12,6 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-kontron-pitx-imx8m"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_KONTRON_PITX_IMX8M=y
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -20,6 +19,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x180000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig
index 7073553..35894a1 100644
--- a/configs/kontron_sl28_defconfig
+++ b/configs/kontron_sl28_defconfig
@@ -12,13 +12,13 @@
CONFIG_ENV_OFFSET=0x3e0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="freescale/fsl-ls1028a-kontron-sl28"
-CONFIG_SPL_TEXT_BASE=0x18010000
CONFIG_SYS_FSL_SDHC_CLK_DIV=1
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x18009ff0
+CONFIG_SPL_TEXT_BASE=0x18010000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 6a402ac..dd25fd6 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -13,11 +13,11 @@
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
-CONFIG_SPL_TEXT_BASE=0x10081000
CONFIG_ROCKCHIP_RK3036=y
CONFIG_TARGET_KYLIN_RK3036=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0x10081fff
+CONFIG_SPL_TEXT_BASE=0x10081000
CONFIG_SPL_STACK_R=y
CONFIG_SYS_LOAD_ADDR=0x60800800
CONFIG_DEBUG_UART_BASE=0x20068000
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index 920d026..0d4eed0 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -1,41 +1,25 @@
+#include <configs/renesas_rcar2.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_ARCH_RENESAS=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x100000
-CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
-CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7790-lager"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Lager"
CONFIG_R8A7790=y
CONFIG_TARGET_LAGER=y
-CONFIG_SYS_MONITOR_LEN=262144
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xe6340000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
-CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_ENV_ADDR=0xC0000
-CONFIG_PCI=y
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_BOOTDELAY=3
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -45,65 +29,16 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_SDRAM=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)"
-CONFIG_PARTITION_UUIDS=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_SH_MMCIF=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_SH_ETHER=y
-CONFIG_PCI_RCAR_GEN2=y
-CONFIG_PINCTRL=y
-CONFIG_PINCONF=y
-CONFIG_PINCTRL_PFC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SH_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_STORAGE=y
-CONFIG_SYS_TIMER_COUNTS_DOWN=y
diff --git a/configs/librem5_defconfig b/configs/librem5_defconfig
index ad49889..f81e828 100644
--- a/configs/librem5_defconfig
+++ b/configs/librem5_defconfig
@@ -12,7 +12,6 @@
CONFIG_SYS_I2C_MXC_I2C4=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-librem5-r4"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_LIBREM5=y
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -20,6 +19,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x180000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig
index a20ddbc..1784163 100644
--- a/configs/libretech-ac_defconfig
+++ b/configs/libretech-ac_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="libretech-ac"
CONFIG_SYS_VENDOR="libre-computer"
CONFIG_SYS_BOARD="aml-s805x-ac"
+CONFIG_SYS_CONFIG_NAME="libretech-ac"
CONFIG_ARCH_MESON=y
CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
@@ -21,6 +21,8 @@
CONFIG_IDENT_STRING=" libretech-ac"
CONFIG_DEBUG_UART=y
CONFIG_REMAKE_ELF=y
+CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
@@ -33,9 +35,9 @@
CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
+CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_ADC=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
@@ -43,8 +45,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_EFIDEBUG=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -52,7 +54,6 @@
CONFIG_SARADC_MESON=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
-CONFIG_SET_DFU_ALT_INFO=y
CONFIG_MMC_MESON_GX=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
@@ -102,5 +103,3 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
-CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index 46a2531..f195d07 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -13,11 +13,11 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart"
-CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index e47b5da..97d0122 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -15,11 +15,11 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
-CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index 54c4bd2..96314d5 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -15,12 +15,12 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
-CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index 9dbd83a..e466c3d 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -15,12 +15,12 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
-CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig
index a42122a..86ee531 100644
--- a/configs/ls1021atsn_sdcard_defconfig
+++ b/configs/ls1021atsn_sdcard_defconfig
@@ -13,11 +13,11 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn"
-CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index 021c2b1..7dc3241 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -14,12 +14,12 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
-CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SYS_MONITOR_LEN=1064960
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index 4924a6a..d621262 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -15,11 +15,11 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
-CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 146ebf4..53f487d 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -15,11 +15,11 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
-CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index d9c2526..97eb7d9 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -48,8 +48,8 @@
CONFIG_CMD_CACHE=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_SATA=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index fcf5695..cc53c17 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -53,8 +53,8 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_SATA=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig
index 78ad887..8da7271 100644
--- a/configs/ls1028aqds_tfa_lpuart_defconfig
+++ b/configs/ls1028aqds_tfa_lpuart_defconfig
@@ -52,8 +52,8 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_SATA=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index adcae63..3f71a37 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -47,8 +47,8 @@
CONFIG_CMD_CACHE=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_SATA=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 17230d0..09d5dee 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -52,8 +52,8 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_SATA=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index 0066414..755411e 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -13,11 +13,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xE0000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
-CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x18009ff0
+CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index cbc8d6a..1be0b4e 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -13,11 +13,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x200000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
-CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x18009ff0
+CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80100000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 521a925..18de0ad 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -41,9 +41,9 @@
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_LBA48=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index 1872774..018d489 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -42,9 +42,9 @@
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_LBA48=y
diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig
index d7324ce..6130cd8 100644
--- a/configs/m53menlo_defconfig
+++ b/configs/m53menlo_defconfig
@@ -13,11 +13,11 @@
CONFIG_TARGET_M53MENLO=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx53-m53menlo"
-CONFIG_SPL_TEXT_BASE=0x70008000
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C
CONFIG_SPL_STACK=0x70004000
+CONFIG_SPL_TEXT_BASE=0x70008000
CONFIG_SYS_LOAD_ADDR=0x70800000
CONFIG_WATCHDOG_TIMEOUT_MSECS=8000
CONFIG_SPL=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index ba3631f..bf9cbff 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -12,9 +12,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
-CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40020000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
@@ -37,8 +37,8 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig
index 9b60ce3..682ce30 100644
--- a/configs/mccmon6_nor_defconfig
+++ b/configs/mccmon6_nor_defconfig
@@ -34,7 +34,6 @@
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NOR_OFS=0x09600000
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
-CONFIG_CMD_CLK=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig
index ecd3e31..665dc9e 100644
--- a/configs/mccmon6_sd_defconfig
+++ b/configs/mccmon6_sd_defconfig
@@ -32,7 +32,6 @@
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NOR_OFS=0x09600000
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
-CONFIG_CMD_CLK=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig
index ec7318c..def3f98 100644
--- a/configs/medcom-wide_defconfig
+++ b/configs/medcom-wide_defconfig
@@ -6,8 +6,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x1FFE0000
CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide"
-CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SPL_STACK=0xffffc
+CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_TEGRA20=y
CONFIG_TARGET_MEDCOM_WIDE=y
diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig
index 5d79565..5a040cd 100644
--- a/configs/meesc_dataflash_defconfig
+++ b/configs/meesc_dataflash_defconfig
@@ -24,8 +24,8 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig
index bab87e6..1ce98bd 100644
--- a/configs/meesc_defconfig
+++ b/configs/meesc_defconfig
@@ -24,8 +24,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index ca78b32..a9d595c 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -53,9 +53,9 @@
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_USE_HOSTNAME=y
CONFIG_HOSTNAME="microblaze-generic"
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_XILINX_GPIO=y
CONFIG_DM_I2C=y
diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig
index a35721a..5ea6cc3 100644
--- a/configs/microchip_mpfs_icicle_defconfig
+++ b/configs/microchip_mpfs_icicle_defconfig
@@ -5,7 +5,6 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="microchip/mpfs-icicle-kit"
-CONFIG_OF_UPSTREAM=y
CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_SYS_MEM_TOP_HIDE=0x400000
CONFIG_TARGET_MICROCHIP_ICICLE=y
@@ -18,6 +17,7 @@
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_OF_UPSTREAM=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_DM_MTD=y
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index 48577c5..1eddb58 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -40,8 +40,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTSTAGE=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 5595352..420a8bd 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -9,7 +9,6 @@
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
-CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=614400
CONFIG_ROCKCHIP_RK3288=y
@@ -17,6 +16,7 @@
CONFIG_TARGET_MIQI_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SYS_BOOTM_LEN=0x4000000
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index dc9b12e..12a3705 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -15,7 +15,6 @@
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_SIZE=0x8000
CONFIG_DEFAULT_DEVICE_TREE="rk3066a-mk808"
-CONFIG_SPL_TEXT_BASE=0x60000000
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3066=y
# CONFIG_ROCKCHIP_STIMER is not set
@@ -24,6 +23,7 @@
CONFIG_TARGET_MK808=y
CONFIG_SPL_STACK_R_ADDR=0x70000000
CONFIG_SPL_STACK=0x1008ffff
+CONFIG_SPL_TEXT_BASE=0x60000000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SYS_LOAD_ADDR=0x70800800
diff --git a/configs/msc_sm2s_imx8mp_defconfig b/configs/msc_sm2s_imx8mp_defconfig
index fc84485..def90d4 100644
--- a/configs/msc_sm2s_imx8mp_defconfig
+++ b/configs/msc_sm2s_imx8mp_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_OFFSET=0x200000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-msc-sm2s"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_MSC_SM2S_IMX8MP=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x0098FC00
CONFIG_SPL_BSS_MAX_SIZE=0x400
diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig
index bc9d1c2..0577b12 100644
--- a/configs/mscc_jr2_defconfig
+++ b/configs/mscc_jr2_defconfig
@@ -41,8 +41,8 @@
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
# CONFIG_NET_TFTP_VARS is not set
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig
index a857616..dfd6bc0 100644
--- a/configs/mscc_luton_defconfig
+++ b/configs/mscc_luton_defconfig
@@ -43,8 +43,8 @@
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
# CONFIG_NET_TFTP_VARS is not set
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig
index 855e966..23aff7e 100644
--- a/configs/mscc_ocelot_defconfig
+++ b/configs/mscc_ocelot_defconfig
@@ -41,8 +41,8 @@
CONFIG_CMD_GPIO=y
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
# CONFIG_NET_TFTP_VARS is not set
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig
index f8a43c4..6ddcbe1 100644
--- a/configs/mscc_serval_defconfig
+++ b/configs/mscc_serval_defconfig
@@ -38,8 +38,8 @@
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
# CONFIG_NET_TFTP_VARS is not set
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig
index a3328c6..629b555 100644
--- a/configs/mscc_servalt_defconfig
+++ b/configs/mscc_servalt_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
# CONFIG_NET_TFTP_VARS is not set
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig
index 47106ca..08a88e1 100644
--- a/configs/mt7622_rfb_defconfig
+++ b/configs/mt7622_rfb_defconfig
@@ -26,11 +26,11 @@
CONFIG_CMD_SMC=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.1.1"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.3"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig
index 376167d..cf89f43 100644
--- a/configs/mt7623a_unielec_u7623_02_defconfig
+++ b/configs/mt7623a_unielec_u7623_02_defconfig
@@ -33,11 +33,11 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.1.1"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.2"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig
index 23b750f..42da25e 100644
--- a/configs/mt7623n_bpir2_defconfig
+++ b/configs/mt7623n_bpir2_defconfig
@@ -35,11 +35,11 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.1.1"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.2"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig
index ef148a9..abdf3d0 100644
--- a/configs/mt7629_rfb_defconfig
+++ b/configs/mt7629_rfb_defconfig
@@ -10,12 +10,12 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41fffef0
CONFIG_ENV_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb"
-CONFIG_SPL_TEXT_BASE=0x201000
CONFIG_TARGET_MT7629=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x40800000
CONFIG_SPL_STACK=0x106000
+CONFIG_SPL_TEXT_BASE=0x201000
CONFIG_SPL_STACK_R=y
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x42007f1c
@@ -55,11 +55,11 @@
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-parents"
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.1.1"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.2"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
diff --git a/configs/mt7988_rfb_defconfig b/configs/mt7988_rfb_defconfig
index 96c7368..4d7454d 100644
--- a/configs/mt7988_rfb_defconfig
+++ b/configs/mt7988_rfb_defconfig
@@ -36,7 +36,6 @@
CONFIG_EFI_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.1.1"
CONFIG_USE_NETMASK=y
@@ -44,6 +43,7 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.2"
CONFIG_PROT_TCP=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
diff --git a/configs/mt7988_sd_rfb_defconfig b/configs/mt7988_sd_rfb_defconfig
index 7d0a262..9946998 100644
--- a/configs/mt7988_sd_rfb_defconfig
+++ b/configs/mt7988_sd_rfb_defconfig
@@ -36,7 +36,6 @@
CONFIG_EFI_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_IPADDR=y
CONFIG_IPADDR="192.168.1.1"
CONFIG_USE_NETMASK=y
@@ -44,6 +43,7 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.2"
CONFIG_PROT_TCP=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig
index 3016f75..6bb3ced 100644
--- a/configs/mx23_olinuxino_defconfig
+++ b/configs/mx23_olinuxino_defconfig
@@ -9,9 +9,9 @@
CONFIG_ENV_OFFSET=0x40000
CONFIG_IMX_CONFIG=""
CONFIG_DEFAULT_DEVICE_TREE="imx23-olinuxino"
-CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_TARGET_MX23_OLINUXINO=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_SPL=y
CONFIG_BOOTDELAY=3
diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig
index 6152d93..02cbc4b 100644
--- a/configs/mx23evk_defconfig
+++ b/configs/mx23evk_defconfig
@@ -11,9 +11,9 @@
CONFIG_IMX_CONFIG=""
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx23-evk"
-CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_TARGET_MX23EVK=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_SPL=y
CONFIG_USE_BOOTCOMMAND=y
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index 951d506..fdab7ef 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -11,9 +11,9 @@
CONFIG_IMX_CONFIG=""
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx28-evk"
-CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_TARGET_MX28EVK=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_SPL=y
CONFIG_FIT=y
diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig
index b165dd4..baee86a 100644
--- a/configs/myir_mys_6ulx_defconfig
+++ b/configs/myir_mys_6ulx_defconfig
@@ -9,10 +9,10 @@
CONFIG_MX6ULL=y
CONFIG_TARGET_MYS_6ULX=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-myir-mys-6ulx-eval"
-CONFIG_SPL_TEXT_BASE=0x908000
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x908000
CONFIG_SPL=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x90000000
diff --git a/configs/n2350_defconfig b/configs/n2350_defconfig
index 7851bc4..9fb84c3 100644
--- a/configs/n2350_defconfig
+++ b/configs/n2350_defconfig
@@ -17,9 +17,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="armada-385-thecus-n2350"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
@@ -62,8 +62,8 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_ARP_TIMEOUT=200
CONFIG_NET_RETRY_COUNT=50
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_AHCI_GENERIC=y
CONFIG_LBA48=y
diff --git a/configs/nanopi-r2c-plus-rk3328_defconfig b/configs/nanopi-r2c-plus-rk3328_defconfig
index f83df37..bef1e22 100644
--- a/configs/nanopi-r2c-plus-rk3328_defconfig
+++ b/configs/nanopi-r2c-plus-rk3328_defconfig
@@ -92,7 +92,6 @@
CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/nanopi-r2c-rk3328_defconfig b/configs/nanopi-r2c-rk3328_defconfig
index 1e65091..4d66a76 100644
--- a/configs/nanopi-r2c-rk3328_defconfig
+++ b/configs/nanopi-r2c-rk3328_defconfig
@@ -92,7 +92,6 @@
CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/nanopi-r2s-plus-rk3328_defconfig b/configs/nanopi-r2s-plus-rk3328_defconfig
new file mode 100644
index 0000000..3a75566
--- /dev/null
+++ b/configs/nanopi-r2s-plus-rk3328_defconfig
@@ -0,0 +1,106 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-nanopi-r2s-plus"
+CONFIG_DM_RESET=y
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s-plus.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_POWER=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_GIGE=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPL_DM_REGULATOR_GPIO=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSINFO=y
+CONFIG_SYSRESET=y
+# CONFIG_TPL_SYSRESET is not set
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig
index 90073a1..2b9193d 100644
--- a/configs/nanopi-r2s-rk3328_defconfig
+++ b/configs/nanopi-r2s-rk3328_defconfig
@@ -92,7 +92,6 @@
CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index bf47ec6..783879d 100644
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -27,8 +27,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index 2f1ea40..67b883d 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index 97b528c..7c0e42c 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index ce9d8d9..65cd79f 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index b467619..1f82c2c 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -36,8 +36,8 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_SATA=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index 562654c..f900d0c 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index f4e998e..f671835 100644
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -39,9 +39,9 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_LBA48=y
diff --git a/configs/nsa325_defconfig b/configs/nsa325_defconfig
index 607810c..c4235ee 100644
--- a/configs/nsa325_defconfig
+++ b/configs/nsa325_defconfig
@@ -52,8 +52,8 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_LBA48=y
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index 60db3fa..9054ec5 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -8,8 +8,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x82408000
CONFIG_TEGRA124=y
CONFIG_TARGET_NYAN_BIG=y
diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig
index 7909a33..92592ad 100644
--- a/configs/octeontx2_95xx_defconfig
+++ b/configs/octeontx2_95xx_defconfig
@@ -22,6 +22,7 @@
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x04000000
CONFIG_SYS_MEMTEST_END=0x040f0000
+# CONFIG_BOOTEFI_HELLO_COMPILE is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SUPPORT_RAW_INITRD=y
@@ -38,7 +39,6 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
-# CONFIG_BOOTEFI_HELLO_COMPILE is not set
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
CONFIG_CMD_MX_CYCLIC=y
@@ -54,18 +54,18 @@
CONFIG_CMD_PCI=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_WDT=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
CONFIG_CMD_PXE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
@@ -78,8 +78,8 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_TSIZE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=8192
diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig
index cac337c..f77d515 100644
--- a/configs/octeontx2_96xx_defconfig
+++ b/configs/octeontx2_96xx_defconfig
@@ -22,6 +22,7 @@
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+# CONFIG_BOOTEFI_HELLO_COMPILE is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SUPPORT_RAW_INITRD=y
@@ -38,7 +39,6 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
-# CONFIG_BOOTEFI_HELLO_COMPILE is not set
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
CONFIG_CMD_MX_CYCLIC=y
@@ -55,18 +55,18 @@
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_USB=y
CONFIG_CMD_WDT=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
CONFIG_CMD_PXE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
@@ -79,8 +79,8 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_TSIZE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SCSI_AHCI=y
CONFIG_AHCI_PCI=y
CONFIG_DM_I2C=y
diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig
index c935c4e..19a52bc 100644
--- a/configs/octeontx_81xx_defconfig
+++ b/configs/octeontx_81xx_defconfig
@@ -23,6 +23,7 @@
CONFIG_AHCI=y
CONFIG_SYS_MEMTEST_START=0x2800000
CONFIG_SYS_MEMTEST_END=0x28f0000
+# CONFIG_BOOTEFI_HELLO_COMPILE is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SUPPORT_RAW_INITRD=y
@@ -39,7 +40,6 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
-# CONFIG_BOOTEFI_HELLO_COMPILE is not set
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
CONFIG_CMD_MX_CYCLIC=y
@@ -56,17 +56,17 @@
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_USB=y
CONFIG_CMD_WDT=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
CONFIG_CMD_PXE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
@@ -79,8 +79,8 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_TSIZE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SCSI_AHCI=y
CONFIG_AHCI_PCI=y
CONFIG_LBA48=y
diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig
index b214339..498a8b9 100644
--- a/configs/octeontx_83xx_defconfig
+++ b/configs/octeontx_83xx_defconfig
@@ -21,6 +21,7 @@
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
+# CONFIG_BOOTEFI_HELLO_COMPILE is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SUPPORT_RAW_INITRD=y
@@ -37,7 +38,6 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
-# CONFIG_BOOTEFI_HELLO_COMPILE is not set
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
CONFIG_CMD_MX_CYCLIC=y
@@ -54,17 +54,17 @@
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_USB=y
CONFIG_CMD_WDT=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
CONFIG_CMD_PXE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
@@ -76,8 +76,8 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_TSIZE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SCSI_AHCI=y
CONFIG_AHCI_PCI=y
CONFIG_LBA48=y
diff --git a/configs/odroid-m1s-rk3566_defconfig b/configs/odroid-m1s-rk3566_defconfig
index 21f4fcb..39e815a 100644
--- a/configs/odroid-m1s-rk3566_defconfig
+++ b/configs/odroid-m1s-rk3566_defconfig
@@ -6,9 +6,9 @@
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_ODROID_M1S_RK3566=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART_BASE=0xFE660000
CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
diff --git a/configs/odroid-m2-rk3588s_defconfig b/configs/odroid-m2-rk3588s_defconfig
index d612ef3..4c3fa85 100644
--- a/configs/odroid-m2-rk3588s_defconfig
+++ b/configs/odroid-m2-rk3588s_defconfig
@@ -6,9 +6,9 @@
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_ODROID_M2_RK3588S=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART_BASE=0xFEB50000
CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 51ed353..b9ea355 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -19,10 +19,10 @@
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk"
-CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x8001ff00
+CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xc0000000
CONFIG_SYS_LOAD_ADDR=0xc0700000
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index ef26332..f7ed9e4 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -55,13 +55,13 @@
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_DNS=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT2=y
@@ -77,9 +77,9 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_ROOTPATH=y
CONFIG_ROOTPATH="/tftpboot/opos6ul-root"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_BOUNCE_BUFFER=y
diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig
index 23d3baa..6d5d8b9 100644
--- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
@@ -102,7 +102,6 @@
CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig
index faadfa8..b382f9b 100644
--- a/configs/orangepi-r1-plus-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-rk3328_defconfig
@@ -102,7 +102,6 @@
CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/origen_defconfig b/configs/origen_defconfig
index c6cc17a..bb69c02 100644
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@@ -14,8 +14,8 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x4200
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen"
-CONFIG_SPL_TEXT_BASE=0x02021410
CONFIG_SYS_MONITOR_LEN=262144
+CONFIG_SPL_TEXT_BASE=0x02021410
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_SPL=y
CONFIG_IDENT_STRING=" for ORIGEN"
diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig
index 57b4332..e93fa1c 100644
--- a/configs/paz00_defconfig
+++ b/configs/paz00_defconfig
@@ -6,8 +6,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00"
-CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SPL_STACK=0xffffc
+CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_TEGRA20=y
CONFIG_TARGET_PAZ00=y
diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig
index 8986f0c..d0d558a 100644
--- a/configs/pcm052_defconfig
+++ b/configs/pcm052_defconfig
@@ -31,8 +31,8 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_DHCP=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig
index 819482a..b40fb61 100644
--- a/configs/phycore-am335x-r2-regor_defconfig
+++ b/configs/phycore-am335x-r2-regor_defconfig
@@ -43,8 +43,8 @@
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_DNS2=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig
index 0d5373b..aaf7ff8 100644
--- a/configs/phycore-am335x-r2-wega_defconfig
+++ b/configs/phycore-am335x-r2-wega_defconfig
@@ -43,8 +43,8 @@
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_DNS2=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig
index 48a0c0b..5e59efe 100644
--- a/configs/phycore-imx8mm_defconfig
+++ b/configs/phycore-imx8mm_defconfig
@@ -10,7 +10,6 @@
CONFIG_ENV_OFFSET=0x3C0000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-phyboard-polis-rdk"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_PHYCORE_IMX8MM=y
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -18,6 +17,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 1240c7f..2398182 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -13,7 +13,6 @@
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-pollux-rdk"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_PHYCORE_IMX8MP=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -21,6 +20,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index c7d5b73..0f8e999 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -9,13 +9,13 @@
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3288-phycore-rdk"
-CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SYS_MONITOR_LEN=614400
CONFIG_ROCKCHIP_RK3288=y
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_PHYCORE_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SYS_BOOTM_LEN=0x4000000
diff --git a/configs/phycore_am62x_a53_defconfig b/configs/phycore_am62x_a53_defconfig
index d4b5191..0b0cf17 100644
--- a/configs/phycore_am62x_a53_defconfig
+++ b/configs/phycore_am62x_a53_defconfig
@@ -16,12 +16,12 @@
CONFIG_ENV_OFFSET=0x680000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am625-phyboard-lyra-rdk"
-CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80c80000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/phycore_am62x_r5_defconfig b/configs/phycore_am62x_r5_defconfig
index 3ffb269..a856e69 100644
--- a/configs/phycore_am62x_r5_defconfig
+++ b/configs/phycore_am62x_r5_defconfig
@@ -16,13 +16,13 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-phycore-som-2gb"
-CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x43c3b000
CONFIG_SPL_BSS_MAX_SIZE=0x3000
diff --git a/configs/phycore_am64x_r5_defconfig b/configs/phycore_am64x_r5_defconfig
index 269efdf..2d9ff95 100644
--- a/configs/phycore_am64x_r5_defconfig
+++ b/configs/phycore_am64x_r5_defconfig
@@ -16,12 +16,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-phycore-som-2gb"
-CONFIG_SPL_TEXT_BASE=0x70000000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x70000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x7019b800
CONFIG_SPL_BSS_MAX_SIZE=0x4000
diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig
index 2f6b158..126caf5 100644
--- a/configs/phycore_pcl063_defconfig
+++ b/configs/phycore_pcl063_defconfig
@@ -9,10 +9,10 @@
CONFIG_MX6UL=y
CONFIG_TARGET_PCL063=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phytec-segin-ff-rdk-nand"
-CONFIG_SPL_TEXT_BASE=0x00909000
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x00909000
CONFIG_SPL=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x90000000
diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig
index b42a410..547d59a 100644
--- a/configs/phycore_pcl063_ull_defconfig
+++ b/configs/phycore_pcl063_ull_defconfig
@@ -9,10 +9,10 @@
CONFIG_MX6ULL=y
CONFIG_TARGET_PCL063_ULL=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-phytec-segin-ff-rdk-emmc"
-CONFIG_SPL_TEXT_BASE=0x908000
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x908000
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig
index 2960440..e9ba2a6 100644
--- a/configs/pico-imx8mq_defconfig
+++ b/configs/pico-imx8mq_defconfig
@@ -12,7 +12,6 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_PICO_IMX8MQ=y
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -20,6 +19,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x180000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig
index 8c43d9d..1f2889e 100644
--- a/configs/plutux_defconfig
+++ b/configs/plutux_defconfig
@@ -6,8 +6,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x1FFE0000
CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux"
-CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SPL_STACK=0xffffc
+CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_TEGRA20=y
CONFIG_TARGET_PLUTUX=y
diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig
index 811801b..cc37567 100644
--- a/configs/pm9263_defconfig
+++ b/configs/pm9263_defconfig
@@ -30,8 +30,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_JFFS2=y
diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig
index 20aa351..fa8b538 100644
--- a/configs/pm9g45_defconfig
+++ b/configs/pm9g45_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig
index d81bf59..50103f3 100644
--- a/configs/pogo_e02_defconfig
+++ b/configs/pogo_e02_defconfig
@@ -42,9 +42,9 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig
index 66cfaae..fb8036a 100644
--- a/configs/pogo_v4_defconfig
+++ b/configs/pogo_v4_defconfig
@@ -51,9 +51,9 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_LBA48=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index fe16850..1b2fb4a 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -9,13 +9,13 @@
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
-CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SYS_MONITOR_LEN=614400
CONFIG_ROCKCHIP_RK3288=y
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_POPMETAL_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SYS_BOOTM_LEN=0x4000000
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index 77844af..98a67be 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -1,41 +1,25 @@
+#include <configs/renesas_rcar2.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_ARCH_RENESAS=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x100000
-CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
-CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7791-porter"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Porter"
CONFIG_R8A7791=y
CONFIG_TARGET_PORTER=y
-CONFIG_SYS_MONITOR_LEN=262144
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xe6340000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
-CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_ENV_ADDR=0xC0000
-CONFIG_PCI=y
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_BOOTDELAY=3
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -45,63 +29,14 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_SDRAM=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)"
-CONFIG_PARTITION_UUIDS=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_SH_ETHER=y
-CONFIG_PCI_RCAR_GEN2=y
-CONFIG_PINCTRL=y
-CONFIG_PINCONF=y
-CONFIG_PINCTRL_PFC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SH_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_STORAGE=y
-CONFIG_SYS_TIMER_COUNTS_DOWN=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 67c0ee7..7a180b1 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -30,6 +30,7 @@
CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_TPL=y
+CONFIG_TPL_GPIO=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
@@ -78,6 +79,8 @@
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_TPL_PINCTRL=y
+CONFIG_TPL_PINCTRL_FULL=y
CONFIG_DM_PMIC_FAN53555=y
CONFIG_PMIC_RK8XX=y
CONFIG_SPL_PMIC_RK8XX=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 1211c5c..162b1f1 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -59,8 +59,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_DNS2=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/qc750_defconfig b/configs/qc750_defconfig
index 58a3c83..2485e64 100644
--- a/configs/qc750_defconfig
+++ b/configs/qc750_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-wexler-qc750"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_TEGRA30=y
CONFIG_TARGET_QC750=y
diff --git a/configs/qemu-arm-sbsa_defconfig b/configs/qemu-arm-sbsa_defconfig
index 69195af..375e924 100644
--- a/configs/qemu-arm-sbsa_defconfig
+++ b/configs/qemu-arm-sbsa_defconfig
@@ -1,12 +1,12 @@
CONFIG_ARM=y
CONFIG_ARCH_QEMU=y
+CONFIG_BLOBLIST_SIZE_RELOC=0x20000
CONFIG_TARGET_QEMU_ARM_SBSA=y
+CONFIG_EFI_VARIABLE_NO_STORE=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="bootflow scan"
+CONFIG_BLOBLIST_ALLOC=y
CONFIG_EFI_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_EFI_MEDIA=y
CONFIG_FS_FAT=y
-CONFIG_EFI_VARIABLE_NO_STORE=y
-CONFIG_BLOBLIST_ALLOC=y
-CONFIG_BLOBLIST_SIZE_RELOC=0x20000
diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig
index de7267e..9f20b3f 100644
--- a/configs/qemu-ppce500_defconfig
+++ b/configs/qemu-ppce500_defconfig
@@ -39,8 +39,8 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="uImage"
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_ROOTPATH=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SIMPLE_BUS_CORRECT_RANGE=y
CONFIG_LBA48=y
CONFIG_CHIP_SELECTS_PER_CTRL=0
diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig
index 008eb46..812b206 100644
--- a/configs/qemu-x86_64_defconfig
+++ b/configs/qemu-x86_64_defconfig
@@ -6,8 +6,8 @@
CONFIG_MAX_CPUS=2
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx"
-CONFIG_SPL_TEXT_BASE=0xfffd4000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_TEXT_BASE=0xfffd4000
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_X86_RUN_64BIT=y
diff --git a/configs/qemu_arm64_lwip_defconfig b/configs/qemu_arm64_lwip_defconfig
index d3d8ef1..754c770 100644
--- a/configs/qemu_arm64_lwip_defconfig
+++ b/configs/qemu_arm64_lwip_defconfig
@@ -7,3 +7,4 @@
CONFIG_CMD_DNS=y
CONFIG_CMD_WGET=y
CONFIG_EFI_HTTP_BOOT=y
+CONFIG_WGET_HTTPS=y
diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig
index d042aea..cc4f454 100644
--- a/configs/qemu_arm_defconfig
+++ b/configs/qemu_arm_defconfig
@@ -67,3 +67,4 @@
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_PCI=y
CONFIG_TPM=y
+CONFIG_UNIT_TEST=y
diff --git a/configs/qnap-ts433-rk3568_defconfig b/configs/qnap-ts433-rk3568_defconfig
new file mode 100644
index 0000000..ceef0d2
--- /dev/null
+++ b/configs/qnap-ts433-rk3568_defconfig
@@ -0,0 +1,85 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-qnap-ts433"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_SERIAL=y
+CONFIG_TARGET_QNAP_TS433_RK3568=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-qnap-ts433.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_AHCI_PCI=y
+CONFIG_DWC_AHCI=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_RTL8169=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_FAN53555=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_SCSI=y
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig
index 33484df..4534b17 100644
--- a/configs/r8a77970_eagle_defconfig
+++ b/configs/r8a77970_eagle_defconfig
@@ -1,84 +1,43 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x700000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77970-eagle"
CONFIG_SPL_TEXT_BASE=0xe6318000
-CONFIG_RCAR_GEN3=y
CONFIG_TARGET_EAGLE=y
-CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe631f000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
-CONFIG_SYS_LOAD_ADDR=0x58000000
-CONFIG_REMAKE_ELF=y
# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77970-eagle.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb"
-CONFIG_SYS_PBSIZE=2068
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_OF_DTB_PROPS_REMOVE=y
CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-extended interrupt-names interrupt-map interrupt-map-mask iommus"
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH_PHY=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_TEE=y
CONFIG_OPTEE=y
diff --git a/configs/r8a77970_v3msk_defconfig b/configs/r8a77970_v3msk_defconfig
index ab49d54..4a146e1 100644
--- a/configs/r8a77970_v3msk_defconfig
+++ b/configs/r8a77970_v3msk_defconfig
@@ -1,87 +1,46 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x700000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77970-v3msk"
CONFIG_SPL_TEXT_BASE=0xe6318000
-CONFIG_RCAR_GEN3=y
CONFIG_R8A77970=y
CONFIG_TARGET_V3MSK=y
-CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe631f000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
-CONFIG_SYS_LOAD_ADDR=0x58000000
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
CONFIG_DEFAULT_FDT_FILE="r8a77970-v3msk.dtb"
-CONFIG_SYS_PBSIZE=2068
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_OF_DTB_PROPS_REMOVE=y
CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-extended interrupt-names interrupt-map interrupt-map-mask iommus"
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH_PHY=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_SYSRESET=y
diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig
index 1e7e430..9cf93d7 100644
--- a/configs/r8a77980_condor_defconfig
+++ b/configs/r8a77980_condor_defconfig
@@ -1,66 +1,37 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RENESAS=y
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x700000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77980-condor"
CONFIG_SPL_TEXT_BASE=0xe6318000
-CONFIG_RCAR_GEN3=y
CONFIG_TARGET_CONDOR=y
-CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe631f000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
-CONFIG_SYS_LOAD_ADDR=0x58000000
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77980-condor.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77980-condor.dtb"
-CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_OF_DTB_PROPS_REMOVE=y
CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-extended interrupt-names interrupt-map interrupt-map-mask iommus"
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
@@ -69,24 +40,12 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH_PHY=y
CONFIG_SH_ETHER=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_SYSINFO=y
CONFIG_TEE=y
CONFIG_OPTEE=y
diff --git a/configs/r8a77980_v3hsk_defconfig b/configs/r8a77980_v3hsk_defconfig
index e942acd..d177207 100644
--- a/configs/r8a77980_v3hsk_defconfig
+++ b/configs/r8a77980_v3hsk_defconfig
@@ -1,83 +1,42 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RENESAS=y
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x700000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77980-v3hsk"
CONFIG_SPL_TEXT_BASE=0xe6318000
-CONFIG_RCAR_GEN3=y
CONFIG_R8A77980=y
CONFIG_TARGET_V3HSK=y
-CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe631f000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
-CONFIG_SYS_LOAD_ADDR=0x58000000
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_DEFAULT_FDT_FILE="r8a77980-v3hsk.dtb"
-CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_OF_DTB_PROPS_REMOVE=y
CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-extended interrupt-names interrupt-map interrupt-map-mask iommus"
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH_PHY=y
CONFIG_SH_ETHER=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_SYSRESET=y
diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig
index 7418d39..da93d44 100644
--- a/configs/r8a77990_ebisu_defconfig
+++ b/configs/r8a77990_ebisu_defconfig
@@ -1,69 +1,40 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77990-ebisu"
CONFIG_SPL_TEXT_BASE=0xe6318000
-CONFIG_RCAR_GEN3=y
CONFIG_TARGET_EBISU=y
-CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe631f000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
-CONFIG_SYS_LOAD_ADDR=0x58000000
-CONFIG_REMAKE_ELF=y
CONFIG_SYS_MONITOR_BASE=0x00000000
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77990-ebisu.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb"
-CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_OF_DTB_PROPS_REMOVE=y
CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-extended interrupt-names interrupt-map interrupt-map-mask iommus"
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
@@ -72,7 +43,6 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
@@ -85,22 +55,11 @@
CONFIG_RENESAS_RPC_HF=y
CONFIG_SYS_MAX_FLASH_SECT=256
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH_PHY=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_SYSINFO=y
CONFIG_TEE=y
CONFIG_OPTEE=y
diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig
index 29d921d..0fe5be6 100644
--- a/configs/r8a77995_draak_defconfig
+++ b/configs/r8a77995_draak_defconfig
@@ -1,68 +1,39 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77995-draak"
CONFIG_SPL_TEXT_BASE=0xe6318000
-CONFIG_RCAR_GEN3=y
CONFIG_TARGET_DRAAK=y
-CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe631f000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
-CONFIG_SYS_LOAD_ADDR=0x58000000
-CONFIG_REMAKE_ELF=y
CONFIG_SYS_MONITOR_BASE=0x00000000
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb"
-CONFIG_SYS_PBSIZE=2068
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_OF_DTB_PROPS_REMOVE=y
CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-extended interrupt-names interrupt-map interrupt-map-mask iommus"
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
@@ -71,7 +42,6 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
@@ -82,22 +52,11 @@
CONFIG_RENESAS_RPC_HF=y
CONFIG_SYS_MAX_FLASH_SECT=256
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH_PHY=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_SYSINFO=y
CONFIG_TEE=y
CONFIG_OPTEE=y
diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig
index ad53d88..aae4406 100644
--- a/configs/r8a779a0_falcon_defconfig
+++ b/configs/r8a779a0_falcon_defconfig
@@ -1,75 +1,23 @@
+#include <configs/renesas_rcar4.config>
+
CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=16666666
-CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN4=y
+CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC00000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779a0-falcon"
-CONFIG_RCAR_GEN4=y
CONFIG_TARGET_FALCON=y
-CONFIG_SYS_MONITOR_LEN=1048576
-CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_SYS_CLK_FREQ=16666666
-# CONFIG_PSCI_RESET is not set
CONFIG_ARMV8_PSCI=y
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a779a0-falcon.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a779a0-falcon.dtb"
CONFIG_SYS_PBSIZE=2068
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_I2C=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_DM_ETH_PHY=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
diff --git a/configs/r8a779f0_spider_defconfig b/configs/r8a779f0_spider_defconfig
index 1959abc..7274038 100644
--- a/configs/r8a779f0_spider_defconfig
+++ b/configs/r8a779f0_spider_defconfig
@@ -1,84 +1,32 @@
+#include <configs/renesas_rcar4.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RENESAS=y
-CONFIG_SYS_MALLOC_LEN=0x4000000
+CONFIG_RCAR_GEN4=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xD00000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779f0-spider"
-CONFIG_RCAR_GEN4=y
CONFIG_TARGET_SPIDER=y
-CONFIG_SYS_MONITOR_LEN=1048576
-CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_SYS_CLK_FREQ=20000000
-# CONFIG_PSCI_RESET is not set
CONFIG_SYS_BOOT_GET_CMDLINE=y
CONFIG_SYS_BARGSIZE=2048
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image && tftp 0x48000000 Image-r8a779f0-spider.dtb && booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a779f0-spider.dtb"
CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_UFS=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
-CONFIG_CLK=y
CONFIG_CLK_GPIO=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
CONFIG_DM_PCA953X=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_I2C=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHYLIB_10G=y
CONFIG_PHY_MARVELL_10G=y
-CONFIG_DM_ETH_PHY=y
CONFIG_RENESAS_ETHER_SWITCH=y
CONFIG_PHY_R8A779F0_ETHERNET_SERDES=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCSI=y
CONFIG_BAUDRATE=1843200
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_UFS=y
CONFIG_UFS_RENESAS=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=131072
diff --git a/configs/r8a779g0_whitehawk_defconfig b/configs/r8a779g0_whitehawk_defconfig
index ba7abb9..758b0ff 100644
--- a/configs/r8a779g0_whitehawk_defconfig
+++ b/configs/r8a779g0_whitehawk_defconfig
@@ -1,75 +1,23 @@
+#include <configs/renesas_rcar4.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RENESAS=y
-CONFIG_SYS_MALLOC_LEN=0x4000000
+CONFIG_RCAR_GEN4=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779g0-white-hawk"
-CONFIG_RCAR_GEN4=y
CONFIG_TARGET_WHITEHAWK=y
-CONFIG_SYS_MONITOR_LEN=1048576
-CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_SYS_CLK_FREQ=16666666
-# CONFIG_PSCI_RESET is not set
CONFIG_SYS_BOOT_GET_CMDLINE=y
CONFIG_SYS_BARGSIZE=2048
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image && tftp 0x48000000 Image-r8a779g0-white-hawk.dtb && booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a779g0-white-hawk.dtb"
CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_I2C=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_DM_ETH_PHY=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
CONFIG_BAUDRATE=921600
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
diff --git a/configs/r8a779h0_grayhawk_defconfig b/configs/r8a779h0_grayhawk_defconfig
index 73dd62e..ef70921 100644
--- a/configs/r8a779h0_grayhawk_defconfig
+++ b/configs/r8a779h0_grayhawk_defconfig
@@ -1,75 +1,23 @@
+#include <configs/renesas_rcar4.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RENESAS=y
-CONFIG_SYS_MALLOC_LEN=0x4000000
+CONFIG_RCAR_GEN4=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779h0-gray-hawk-single"
-CONFIG_RCAR_GEN4=y
CONFIG_TARGET_GRAYHAWK=y
-CONFIG_SYS_MONITOR_LEN=1048576
-CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_SYS_CLK_FREQ=16666666
-# CONFIG_PSCI_RESET is not set
CONFIG_SYS_BOOT_GET_CMDLINE=y
CONFIG_SYS_BARGSIZE=2048
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image && tftp 0x48000000 Image-r8a779h0-gray-hawk.dtb && booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a779h0-gray-hawk.dtb"
CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_I2C=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_DM_ETH_PHY=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
CONFIG_BAUDRATE=921600
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig
index b33b8fe..6b095f6 100644
--- a/configs/rcar3_salvator-x_defconfig
+++ b/configs/rcar3_salvator-x_defconfig
@@ -1,73 +1,44 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RENESAS=y
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77951-salvator-x"
CONFIG_SPL_TEXT_BASE=0xe6338000
-CONFIG_RCAR_GEN3=y
CONFIG_TARGET_SALVATOR_X=y
-CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe633f000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
-CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_PCI=y
-CONFIG_REMAKE_ELF=y
CONFIG_SYS_MONITOR_BASE=0x00000000
# CONFIG_EFI_UNICODE_CAPITALIZATION is not set
-CONFIG_FIT=y
# CONFIG_BOOTSTD is not set
-CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77951-salvator-x.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77951-salvator-x.dtb"
-CONFIG_SYS_PBSIZE=2068
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="renesas/r8a77951-salvator-x renesas/r8a77960-salvator-x renesas/r8a77965-salvator-x"
CONFIG_MULTI_DTB_FIT_LZO=y
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
CONFIG_OF_DTB_PROPS_REMOVE=y
CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-extended interrupt-names interrupt-map interrupt-map-mask iommus"
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
@@ -76,7 +47,6 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
@@ -89,11 +59,7 @@
CONFIG_RENESAS_RPC_HF=y
CONFIG_SYS_MAX_FLASH_SECT=256
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH_PHY=y
@@ -101,13 +67,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCI_RCAR_GEN3=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_SYSINFO=y
CONFIG_TEE=y
CONFIG_OPTEE=y
diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig
index f8e8c92..7ffa115 100644
--- a/configs/rcar3_ulcb_defconfig
+++ b/configs/rcar3_ulcb_defconfig
@@ -1,70 +1,41 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RENESAS=y
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77951-ulcb"
CONFIG_SPL_TEXT_BASE=0xe6338000
-CONFIG_RCAR_GEN3=y
CONFIG_TARGET_ULCB=y
-CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe633f000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
-CONFIG_SYS_LOAD_ADDR=0x58000000
-CONFIG_REMAKE_ELF=y
CONFIG_SYS_MONITOR_BASE=0x00000000
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77951-ulcb.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77951-ulcb.dtb"
-CONFIG_SYS_PBSIZE=2068
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="renesas/r8a77951-ulcb renesas/r8a77960-ulcb renesas/r8a77965-ulcb"
CONFIG_MULTI_DTB_FIT_LZO=y
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
CONFIG_OF_DTB_PROPS_REMOVE=y
CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-extended interrupt-names interrupt-map interrupt-map-mask iommus"
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
@@ -73,7 +44,6 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
@@ -86,22 +56,11 @@
CONFIG_RENESAS_RPC_HF=y
CONFIG_SYS_MAX_FLASH_SECT=256
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH_PHY=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_SYSINFO=y
CONFIG_SYSRESET=y
CONFIG_TEE=y
diff --git a/configs/renesas_rcar.config b/configs/renesas_rcar.config
new file mode 100644
index 0000000..351803b
--- /dev/null
+++ b/configs/renesas_rcar.config
@@ -0,0 +1,27 @@
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_FIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_MTD=y
+CONFIG_OF_CONTROL=y
+CONFIG_RCAR_GPIO=y
+CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_VERSION_VARIABLE=y
diff --git a/configs/renesas_rcar2.config b/configs/renesas_rcar2.config
new file mode 100644
index 0000000..74dfd41
--- /dev/null
+++ b/configs/renesas_rcar2.config
@@ -0,0 +1,42 @@
+#include <configs/renesas_rcar.config>
+
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_EFI_LOADER is not set
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_USB=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_SIZE=0x40000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_PARTITION_UUIDS=y
+CONFIG_PCI=y
+CONFIG_PCI_RCAR_GEN2=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_PFC=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_SH_QSPI=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_SYS_LOAD_ADDR=0x50000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SYS_MALLOC_LEN=0x100000
+CONFIG_SYS_MONITOR_LEN=262144
+CONFIG_SYS_PBSIZE=256
+CONFIG_SYS_TIMER_COUNTS_DOWN=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_PCI=y
+CONFIG_USB_STORAGE=y
diff --git a/configs/renesas_rcar3.config b/configs/renesas_rcar3.config
new file mode 100644
index 0000000..228e1b4
--- /dev/null
+++ b/configs/renesas_rcar3.config
@@ -0,0 +1,6 @@
+#include <configs/renesas_rcar64.config>
+
+CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_SYS_PBSIZE=2068
diff --git a/configs/renesas_rcar4.config b/configs/renesas_rcar4.config
new file mode 100644
index 0000000..87d6a60
--- /dev/null
+++ b/configs/renesas_rcar4.config
@@ -0,0 +1,17 @@
+#include <configs/renesas_rcar64.config>
+
+# CONFIG_PSCI_RESET is not set
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_CMD_MMC=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SYS_I2C_RCAR_I2C=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_USE_BOOTCOMMAND=y
diff --git a/configs/renesas_rcar64.config b/configs/renesas_rcar64.config
new file mode 100644
index 0000000..12211ae
--- /dev/null
+++ b/configs/renesas_rcar64.config
@@ -0,0 +1,14 @@
+#include <configs/renesas_rcar.config>
+
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_SPI=y
+CONFIG_PHY_ANEG_TIMEOUT=20000
+CONFIG_REGMAP=y
+CONFIG_REMAKE_ELF=y
+CONFIG_RENESAS_RPC_SPI=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_SYSCON=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
+CONFIG_SYS_MALLOC_BOOTPARAMS=y
+CONFIG_SYS_MALLOC_LEN=0x4000000
+CONFIG_SYS_MONITOR_LEN=1048576
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index e2ab518..bff65d1 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -9,13 +9,13 @@
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
-CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SYS_MONITOR_LEN=614400
CONFIG_ROCKCHIP_RK3288=y
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_ROCK2=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SYS_BOOTM_LEN=0x4000000
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index c54e13e..47ee210 100644
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -34,6 +34,7 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
CONFIG_SPL_ATF=y
+CONFIG_CMD_TCPM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -94,6 +95,8 @@
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_SPL_USB_DWC3_GENERIC=y
+CONFIG_TYPEC_TCPM=y
+CONFIG_TYPEC_FUSB302=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
@@ -106,6 +109,3 @@
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y
-CONFIG_TYPEC_TCPM=y
-CONFIG_TYPEC_FUSB302=y
-CONFIG_CMD_TCPM=y
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index e023425..d7f1131 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -12,12 +12,12 @@
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock"
-CONFIG_SPL_TEXT_BASE=0x10080800
CONFIG_ROCKCHIP_RK3188=y
# CONFIG_ROCKCHIP_STIMER is not set
CONFIG_TARGET_ROCK=y
CONFIG_SPL_STACK_R_ADDR=0x60080000
CONFIG_SPL_STACK=0x10087fff
+CONFIG_SPL_TEXT_BASE=0x10080800
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SYS_LOAD_ADDR=0x60800800
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index b2f87f5..dd8df54 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -60,8 +60,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_DNS2=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig
index 95e82df..5e19d36 100644
--- a/configs/rzg2_beacon_defconfig
+++ b/configs/rzg2_beacon_defconfig
@@ -1,84 +1,43 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774a1-beacon-rzg2m-kit"
-CONFIG_RCAR_GEN3=y
CONFIG_TARGET_BEACON_RZG2M=y
-CONFIG_SYS_MONITOR_LEN=1048576
-CONFIG_SYS_LOAD_ADDR=0x58000000
# CONFIG_SPL is not set
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
CONFIG_DEFAULT_FDT_FILE="r8a774a1-beacon-rzg2m-kit.dtb"
-CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PART=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="renesas/r8a774a1-beacon-rzg2m-kit renesas/r8a774b1-beacon-rzg2n-kit renesas/r8a774e1-beacon-rzg2h-kit"
CONFIG_MULTI_DTB_FIT_LZO=y
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
CONFIG_DM_PCA953X=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_ATHEROS=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_USB=y
diff --git a/configs/sam9x60_curiosity_mmc1_defconfig b/configs/sam9x60_curiosity_mmc1_defconfig
index 7e7efa5..114589c 100644
--- a/configs/sam9x60_curiosity_mmc1_defconfig
+++ b/configs/sam9x60_curiosity_mmc1_defconfig
@@ -42,8 +42,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig
index 5d5f5ec..f4e663f 100644
--- a/configs/sam9x60_curiosity_mmc_defconfig
+++ b/configs/sam9x60_curiosity_mmc_defconfig
@@ -42,8 +42,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig
index 93bbe6c..1e542e2 100644
--- a/configs/sam9x60ek_mmc_defconfig
+++ b/configs/sam9x60ek_mmc_defconfig
@@ -44,8 +44,8 @@
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF_TEST=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig
index ddce526..c1754e8 100644
--- a/configs/sam9x60ek_nandflash_defconfig
+++ b/configs/sam9x60ek_nandflash_defconfig
@@ -44,8 +44,8 @@
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF_TEST=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig
index 7f09214..8696b08 100644
--- a/configs/sam9x60ek_qspiflash_defconfig
+++ b/configs/sam9x60ek_qspiflash_defconfig
@@ -43,8 +43,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig
index 7cde865..70e3ea1 100644
--- a/configs/sama5d27_giantboard_defconfig
+++ b/configs/sama5d27_giantboard_defconfig
@@ -13,13 +13,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_giantboard"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig
index 2715437..9246ede 100644
--- a/configs/sama5d27_som1_ek_mmc1_defconfig
+++ b/configs/sama5d27_som1_ek_mmc1_defconfig
@@ -13,13 +13,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -54,8 +54,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig
index 25a0d6c..4be4245 100644
--- a/configs/sama5d27_som1_ek_mmc_defconfig
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -14,13 +14,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -55,8 +55,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig
index f88a2e6..cdd1060 100644
--- a/configs/sama5d27_som1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_som1_ek_qspiflash_defconfig
@@ -14,13 +14,13 @@
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -53,8 +53,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig
index 5edb634..cc69a41 100644
--- a/configs/sama5d27_wlsom1_ek_mmc_defconfig
+++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig
@@ -12,13 +12,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -58,8 +58,8 @@
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
index 9d5863e..beab5d0 100644
--- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
@@ -13,12 +13,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -62,8 +62,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig
index c1d1f20..5e8b9b9 100644
--- a/configs/sama5d2_icp_mmc_defconfig
+++ b/configs/sama5d2_icp_mmc_defconfig
@@ -63,8 +63,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig
index c731c67..463951a 100644
--- a/configs/sama5d2_icp_qspiflash_defconfig
+++ b/configs/sama5d2_icp_qspiflash_defconfig
@@ -51,8 +51,8 @@
CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_GETTIME=y
CONFIG_CMD_TIMER=y
diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig
index ac96fe8..e62fd8c 100644
--- a/configs/sama5d2_ptc_ek_mmc_defconfig
+++ b/configs/sama5d2_ptc_ek_mmc_defconfig
@@ -38,8 +38,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig
index e4d6a1d..0729cad 100644
--- a/configs/sama5d2_ptc_ek_nandflash_defconfig
+++ b/configs/sama5d2_ptc_ek_nandflash_defconfig
@@ -38,8 +38,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig
index 23b53f1..736a6ee 100644
--- a/configs/sama5d2_xplained_emmc_defconfig
+++ b/configs/sama5d2_xplained_emmc_defconfig
@@ -13,13 +13,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -54,8 +54,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index f3b1b78..6fd1075 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -14,13 +14,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -56,8 +56,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig
index f4b27fb..4c30e9d 100644
--- a/configs/sama5d2_xplained_qspiflash_defconfig
+++ b/configs/sama5d2_xplained_qspiflash_defconfig
@@ -14,13 +14,13 @@
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -57,8 +57,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index da386d2..9431ff1 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -17,12 +17,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -61,8 +61,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig
index a5d7be0..217632c 100644
--- a/configs/sama5d36ek_cmp_mmc_defconfig
+++ b/configs/sama5d36ek_cmp_mmc_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig
index caf843e..595cb9c 100644
--- a/configs/sama5d36ek_cmp_nandflash_defconfig
+++ b/configs/sama5d36ek_cmp_nandflash_defconfig
@@ -37,8 +37,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig
index 7db6bed..743959c 100644
--- a/configs/sama5d36ek_cmp_spiflash_defconfig
+++ b/configs/sama5d36ek_cmp_spiflash_defconfig
@@ -39,8 +39,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index ad02b09..0050d95 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -13,13 +13,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
-CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x318000
+CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -53,8 +53,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 2eb9e1b..6a66637 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -12,12 +12,12 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
-CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x318000
+CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -53,8 +53,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 27e5a1d..4c79146 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -14,12 +14,12 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
-CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x318000
+CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -57,8 +57,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 770b999..985a152 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -13,11 +13,11 @@
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
-CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x318000
+CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -57,8 +57,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 4bb0dbe..3f2bd73 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -17,11 +17,11 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
-CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x318000
+CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -60,8 +60,8 @@
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 2efe73f..f0c4356 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -14,13 +14,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -54,8 +54,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index 0241318..4d6ca43 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -13,12 +13,12 @@
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -54,8 +54,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index 28babe7..c0680fb 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -17,12 +17,12 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -59,8 +59,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index c839514..347ccb4 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -14,12 +14,12 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -55,8 +55,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index fadefd9..b309b87 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -13,11 +13,11 @@
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -55,8 +55,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index 35b6314..38edafc 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -17,11 +17,11 @@
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
-CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -58,8 +58,8 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index b5f80b8..7960b2e 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -44,7 +44,6 @@
CONFIG_CMD_NVEDIT_SELECT=y
CONFIG_LOOPW=y
CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_BCB=y
@@ -75,10 +74,10 @@
CONFIG_CMD_RARP=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_IPV6_ROUTER_DISCOVERY=y
CONFIG_CMD_ETHSW=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RTC=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index d111858..718e4a8 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -71,7 +71,6 @@
CONFIG_CMD_NVEDIT_SELECT=y
CONFIG_LOOPW=y
CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEM_SEARCH=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
@@ -111,10 +110,10 @@
CONFIG_CMD_RARP=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_IPV6_ROUTER_DISCOVERY=y
CONFIG_CMD_ETHSW=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_2048=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index 0313fa0..563093d 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -41,7 +41,6 @@
CONFIG_CMD_NVEDIT_SELECT=y
CONFIG_LOOPW=y
CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
@@ -64,9 +63,9 @@
CONFIG_CMD_RARP=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_IPV6_ROUTER_DISCOVERY=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RTC=y
CONFIG_CMD_TIME=y
diff --git a/configs/sandbox_nocmdline_defconfig b/configs/sandbox_nocmdline_defconfig
new file mode 100644
index 0000000..0317311
--- /dev/null
+++ b/configs/sandbox_nocmdline_defconfig
@@ -0,0 +1,2 @@
+#include "sandbox_defconfig"
+# CONFIG_CMDLINE is not set
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index a48ef1f..2a8e79a 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -78,7 +78,6 @@
CONFIG_CMD_NVEDIT_SELECT=y
CONFIG_LOOPW=y
CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
@@ -100,8 +99,8 @@
CONFIG_CMD_RARP=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index f446962..91a09ba 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -57,7 +57,6 @@
CONFIG_CMD_NVEDIT_SELECT=y
CONFIG_LOOPW=y
CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
@@ -78,8 +77,8 @@
CONFIG_CMD_RARP=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig
index cda2526..84df2b8 100644
--- a/configs/sandbox_vpl_defconfig
+++ b/configs/sandbox_vpl_defconfig
@@ -4,7 +4,6 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
-CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
@@ -14,6 +13,7 @@
CONFIG_TPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_SPL=y
CONFIG_PCI=y
@@ -68,7 +68,6 @@
CONFIG_CMD_NVEDIT_SELECT=y
CONFIG_LOOPW=y
CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
@@ -89,8 +88,8 @@
CONFIG_CMD_RARP=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
index 84cec35..090dc04 100644
--- a/configs/seaboard_defconfig
+++ b/configs/seaboard_defconfig
@@ -6,8 +6,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard"
-CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SPL_STACK=0xffffc
+CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_TEGRA20=y
CONFIG_TARGET_SEABOARD=y
diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig
index e755702..6211588 100644
--- a/configs/seeed_npi_imx6ull_defconfig
+++ b/configs/seeed_npi_imx6ull_defconfig
@@ -10,10 +10,10 @@
CONFIG_MX6ULL=y
CONFIG_TARGET_NPI_IMX6ULL=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-seeed-npi-imx6ull-dev-board"
-CONFIG_SPL_TEXT_BASE=0x908000
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0x908000
CONFIG_SPL=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x90000000
@@ -44,9 +44,9 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eth0"
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_NETMASK=y
CONFIG_NETMASK="255.255.255.0"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 9d59914..9ac40b9 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -51,9 +51,9 @@
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_LBA48=y
diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig
index d1b1c03..031fdc0 100644
--- a/configs/silinux_ek874_defconfig
+++ b/configs/silinux_ek874_defconfig
@@ -1,84 +1,43 @@
+#include <configs/renesas_rcar3.config>
+
CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_RCAR_GEN3=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3F0000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774c0-ek874"
CONFIG_SPL_TEXT_BASE=0xe6318000
-CONFIG_RCAR_GEN3=y
CONFIG_TARGET_SILINUX_EK874=y
-CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe631f000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
-CONFIG_SYS_LOAD_ADDR=0x58000000
-CONFIG_REMAKE_ELF=y
-CONFIG_FIT=y
-CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774c0-ek874.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb"
-CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
-CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_BITBANGMII=y
-CONFIG_BITBANGMII_MULTI=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_REALTEK=y
CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
CONFIG_SOC_DEVICE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_RENESAS_RPC_SPI=y
CONFIG_TEE=y
CONFIG_OPTEE=y
CONFIG_USB=y
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index feca2ce..53597e9 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -1,41 +1,25 @@
+#include <configs/renesas_rcar2.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_ARCH_RENESAS=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x100000
-CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
-CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7794-silk"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Silk"
CONFIG_R8A7794=y
CONFIG_TARGET_SILK=y
-CONFIG_SYS_MONITOR_LEN=262144
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xe6340000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
-CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_ENV_ADDR=0xC0000
-CONFIG_PCI=y
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_BOOTDELAY=3
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -45,65 +29,16 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_SDRAM=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)"
-CONFIG_PARTITION_UUIDS=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_SH_MMCIF=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_SH_ETHER=y
-CONFIG_PCI_RCAR_GEN2=y
-CONFIG_PINCTRL=y
-CONFIG_PINCONF=y
-CONFIG_PINCTRL_PFC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SH_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_STORAGE=y
-CONFIG_SYS_TIMER_COUNTS_DOWN=y
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index 5e54e7f..aa8adf5 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -57,8 +57,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SOURCE is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig
index 2677ba7..b1c77c7 100644
--- a/configs/smdkv310_defconfig
+++ b/configs/smdkv310_defconfig
@@ -12,8 +12,8 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x4200
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310"
-CONFIG_SPL_TEXT_BASE=0x02021410
CONFIG_SYS_MONITOR_LEN=262144
+CONFIG_SPL_TEXT_BASE=0x02021410
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_SPL=y
CONFIG_IDENT_STRING=" for SMDKC210/V310"
diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig
index bd6879c..8c4f707 100644
--- a/configs/socfpga_agilex_atf_defconfig
+++ b/configs/socfpga_agilex_atf_defconfig
@@ -12,9 +12,9 @@
CONFIG_ENV_OFFSET=0x200
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
-CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
index 29bb091..eaa2161 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_defconfig
@@ -11,9 +11,9 @@
CONFIG_ENV_OFFSET=0x200
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
-CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig
index 983e3ac..2883480 100644
--- a/configs/socfpga_agilex_vab_defconfig
+++ b/configs/socfpga_agilex_vab_defconfig
@@ -12,9 +12,9 @@
CONFIG_ENV_OFFSET=0x200
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
-CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index 6d27dee..7b3b022 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
-CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0xffe2b000
+CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
CONFIG_IDENT_STRING="socfpga_arria10"
CONFIG_SPL_FS_FAT=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index b0c0906..9185af2 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
CONFIG_TIMESTAMP=y
CONFIG_FIT=y
diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig
index a20b1b0..0b5c5a7 100644
--- a/configs/socfpga_chameleonv3_defconfig
+++ b/configs/socfpga_chameleonv3_defconfig
@@ -4,8 +4,8 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x4400
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
-CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM=y
CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 5ab48db..69a9909 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
CONFIG_TIMESTAMP=y
CONFIG_FIT=y
diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig
index cf4e8eb..5b320e0 100644
--- a/configs/socfpga_dbm_soc1_defconfig
+++ b/configs/socfpga_dbm_soc1_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y
CONFIG_TIMESTAMP=y
CONFIG_FIT=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index c16004f..04b051c 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
CONFIG_TIMESTAMP=y
CONFIG_FIT=y
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index 005d575..703af3f 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y
CONFIG_TIMESTAMP=y
CONFIG_FIT=y
diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig
index bf463f3..76c41b2 100644
--- a/configs/socfpga_de10_standard_defconfig
+++ b/configs/socfpga_de10_standard_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_standard"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_TERASIC_DE10_STANDARD=y
CONFIG_TIMESTAMP=y
CONFIG_FIT=y
diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig
index c8985ed..8cb158a 100644
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y
# CONFIG_EFI_LOADER is not set
CONFIG_TIMESTAMP=y
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 74994e3..231cf6b 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -9,10 +9,10 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
CONFIG_SPL_STACK=0xfffffff8
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_IS1=y
# CONFIG_EFI_LOADER is not set
CONFIG_TIMESTAMP=y
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index fdf0775..7aa2db6 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y
CONFIG_TIMESTAMP=y
CONFIG_FIT=y
diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig
index 557adb4..5e92717 100644
--- a/configs/socfpga_n5x_atf_defconfig
+++ b/configs/socfpga_n5x_atf_defconfig
@@ -12,9 +12,9 @@
CONFIG_ENV_OFFSET=0x200
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk"
-CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig
index 8615bb4..593325c 100644
--- a/configs/socfpga_n5x_defconfig
+++ b/configs/socfpga_n5x_defconfig
@@ -11,9 +11,9 @@
CONFIG_ENV_OFFSET=0x200
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk"
-CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig
index dbd5470..e3d52fe 100644
--- a/configs/socfpga_n5x_vab_defconfig
+++ b/configs/socfpga_n5x_vab_defconfig
@@ -12,9 +12,9 @@
CONFIG_ENV_OFFSET=0x200
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk"
-CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index 4665c09..dc6d66a 100644
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -10,11 +10,11 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
# CONFIG_SPL_MMC is not set
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 2487f0a..869ba3d 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
CONFIG_TIMESTAMP=y
CONFIG_FIT=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index e8a9ade..31b4064 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -8,9 +8,9 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
CONFIG_FIT=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index c415248..cade0d4 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -10,10 +10,10 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
CONFIG_SPL_STACK=0xfffffff8
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_SR1500=y
CONFIG_ENV_OFFSET_REDUND=0xF0000
CONFIG_SYS_MEMTEST_START=0x00000000
diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig
index 471b921..d3a358c 100644
--- a/configs/socfpga_stratix10_atf_defconfig
+++ b/configs/socfpga_stratix10_atf_defconfig
@@ -12,9 +12,9 @@
CONFIG_ENV_OFFSET=0x200
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk"
-CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig
index 99c33e6..3ea8259 100644
--- a/configs/socfpga_stratix10_defconfig
+++ b/configs/socfpga_stratix10_defconfig
@@ -11,9 +11,9 @@
CONFIG_ENV_OFFSET=0x200
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk"
-CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
CONFIG_SPL_BSS_MAX_SIZE=0x100000
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 094e918..df8391d 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -10,9 +10,9 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga"
-CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y
CONFIG_ENV_OFFSET_REDUND=0x110000
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index e99d0a9..93d2736 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -55,11 +55,11 @@
CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
-CONFIG_CMD_SNTP=y
# CONFIG_CMD_HASH is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig
index c5de56a..473b04a 100644
--- a/configs/som-db5800-som-6867_defconfig
+++ b/configs/som-db5800-som-6867_defconfig
@@ -35,8 +35,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTSTAGE=y
diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
index c350892..1c70d1d 100644
--- a/configs/starfive_visionfive2_defconfig
+++ b/configs/starfive_visionfive2_defconfig
@@ -10,12 +10,12 @@
CONFIG_ENV_OFFSET=0xf0000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="jh7110-starfive-visionfive-2"
-CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x8180000
+CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_SPL_BSS_START_ADDR=0x8040000
CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SYS_BOOTM_LEN=0x4000000
@@ -56,6 +56,9 @@
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC_SIZE=0x400000
+CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig
index 21437d8..4346ecd 100644
--- a/configs/stm32746g-eval_defconfig
+++ b/configs/stm32746g-eval_defconfig
@@ -27,16 +27,16 @@
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_ARM_PL180_MMCI=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig
index 26e430a..2756ad5 100644
--- a/configs/stm32746g-eval_spl_defconfig
+++ b/configs/stm32746g-eval_spl_defconfig
@@ -10,11 +10,11 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="stm32746g-eval"
-CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_SYS_LOAD_ADDR=0x8009000
CONFIG_SPL_SIZE_LIMIT=0x9000
CONFIG_STM32F7=y
@@ -44,8 +44,8 @@
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
@@ -53,8 +53,8 @@
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_OF_TRANSLATE=y
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index 2afe511..35a489c 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -27,16 +27,16 @@
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_ARM_PL180_MMCI=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig
index 3ad86a0..6826b1c 100644
--- a/configs/stm32f746-disco_spl_defconfig
+++ b/configs/stm32f746-disco_spl_defconfig
@@ -10,11 +10,11 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco"
-CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_SYS_LOAD_ADDR=0x8009000
CONFIG_SPL_SIZE_LIMIT=0x9000
CONFIG_STM32F7=y
@@ -44,8 +44,8 @@
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
@@ -53,8 +53,8 @@
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_OF_TRANSLATE=y
diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig
index cb7c6d2..1e09c22 100644
--- a/configs/stm32f769-disco_defconfig
+++ b/configs/stm32f769-disco_defconfig
@@ -26,16 +26,16 @@
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_ARM_PL180_MMCI=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig
index 9071904..787571d 100644
--- a/configs/stm32f769-disco_spl_defconfig
+++ b/configs/stm32f769-disco_spl_defconfig
@@ -10,11 +10,11 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco"
-CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_SYS_LOAD_ADDR=0x8009000
CONFIG_SPL_SIZE_LIMIT=0x9000
CONFIG_STM32F7=y
@@ -43,8 +43,8 @@
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
-CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
@@ -52,8 +52,8 @@
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_OF_TRANSLATE=y
diff --git a/configs/stm32mp13_dhcor_defconfig b/configs/stm32mp13_dhcor_defconfig
index 1ca057c..ff948b9 100644
--- a/configs/stm32mp13_dhcor_defconfig
+++ b/configs/stm32mp13_dhcor_defconfig
@@ -1,149 +1,46 @@
+#include <configs/stm32mp_dhsom.config>
+
CONFIG_ARM=y
CONFIG_ARCH_STM32MP=y
CONFIG_TFABOOT=y
CONFIG_SYS_MALLOC_F_LEN=0x1c0000
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000
-CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x3E0000
-CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp135f-dhcor-dhsbc"
-CONFIG_SYS_BOOTM_LEN=0x2000000
-CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_STM32MP13X=y
CONFIG_DDR_CACHEABLE_SIZE=0x8000000
-CONFIG_CMD_STM32KEY=y
CONFIG_TARGET_ST_STM32MP13X=y
CONFIG_ENV_OFFSET_REDUND=0x3F0000
-CONFIG_CMD_STM32PROG=y
CONFIG_STM32MP15_PWR=y
# CONFIG_ARMV7_NONSEC is not set
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE_RECORD_COUNT=100
CONFIG_BOOTDELAY=3
-CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_PROMPT="STM32MP> "
-# CONFIG_CMD_ELF is not set
CONFIG_CMD_ASKENV=y
-# CONFIG_CMD_EXPORTENV is not set
CONFIG_CMD_ERASEENV=y
-CONFIG_CMD_EEPROM=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_UNZIP=y
-CONFIG_CMD_CLK=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_FUSE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_LSBLK=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_CAT=y
CONFIG_CMD_SETEXPR_FMT=y
CONFIG_CMD_XXD=y
-CONFIG_CMD_DHCP6=y
-CONFIG_CMD_TFTPPUT=y
-CONFIG_SYS_DISABLE_AUTOLOAD=y
-CONFIG_CMD_WGET=y
-CONFIG_CMD_BOOTCOUNT=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
CONFIG_CMD_RNG=y
-CONFIG_CMD_TIMER=y
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_BTRFS=y
-CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_LOG=y
CONFIG_CMD_UBI=y
-# CONFIG_ISO_PARTITION is not set
-CONFIG_OF_LIVE=y
-CONFIG_OF_UPSTREAM=y
CONFIG_ENV_IS_NOWHERE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=50000000
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_TSIZE=y
-CONFIG_PROT_TCP_SACK=y
-CONFIG_IPV6=y
-CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
CONFIG_CLK_SCMI=y
CONFIG_SET_DFU_ALT_INFO=y
-CONFIG_GPIO_HOG=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_STM32F7=y
-CONFIG_LED=y
-CONFIG_LED_GPIO=y
-CONFIG_STM32_FMC2_EBI=y
-CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
-CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_STM32_SDMMC2=y
-CONFIG_MTD=y
-CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_REALTEK=y
-CONFIG_DWC_ETH_QOS=y
-CONFIG_PHY=y
-CONFIG_PHY_STM32_USBPHYC=y
-CONFIG_PINCONF=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_STPMIC1=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_DM_REGULATOR_STPMIC1=y
CONFIG_DM_REGULATOR_SCMI=y
CONFIG_RESET_SCMI=y
CONFIG_DM_RNG=y
CONFIG_RNG_STM32=y
-CONFIG_DM_RTC=y
-CONFIG_RTC_STM32=y
-CONFIG_SERIAL_RX_BUFFER=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_STM32_QSPI=y
-CONFIG_STM32_SPI=y
CONFIG_SYSRESET_PSCI=y
CONFIG_TEE=y
CONFIG_OPTEE=y
# CONFIG_OPTEE_TA_AVB is not set
-CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
CONFIG_USB_ONBOARD_HUB=y
CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="dh"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0483
-CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_WDT=y
-CONFIG_WDT_STM32MP=y
-CONFIG_FAT_WRITE=y
CONFIG_ERRNO_STR=y
diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
index 0b5ada7..4e17120 100644
--- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
@@ -5,9 +5,9 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x280000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-ctouch2"
-CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x30000000
+CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_SPL=y
diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
index 7a5a75f..3f7eebd 100644
--- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
@@ -5,9 +5,9 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x280000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-edimm2.2"
-CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x30000000
+CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_SPL=y
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
index 38aa867..b32f71d 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
@@ -5,9 +5,9 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x280000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0-of7"
-CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x30000000
+CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_SPL=y
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
index b0c272b..8a16216 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
@@ -5,9 +5,9 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x280000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0"
-CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x30000000
+CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_SPL=y
diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
index 8914b64..1c0d0d0 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -7,9 +7,9 @@
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
-CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x30000000
+CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_SPL=y
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index a92c615d..b730bf7 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -1,181 +1,11 @@
+#include <configs/stm32mp15_dhsom.config>
+
CONFIG_ARM=y
CONFIG_ARCH_STM32MP=y
-CONFIG_SYS_MALLOC_F_LEN=0x3000
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
-CONFIG_SF_DEFAULT_SPEED=50000000
-CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x1000
-CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp157c-dhcom-pdk2"
-CONFIG_SPL_TEXT_BASE=0x2FFC2500
-CONFIG_SPL_MMC=y
-CONFIG_BOOTCOUNT_BOOTLIMIT=3
-CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C
-CONFIG_SPL_STACK=0x30000000
-CONFIG_SYS_BOOTM_LEN=0x2000000
-CONFIG_SYS_LOAD_ADDR=0xc2000000
-CONFIG_SPL=y
-CONFIG_CMD_STM32KEY=y
-CONFIG_CMD_STBOARD=y
-CONFIG_TARGET_DH_STM32MP1_PDK2=y
-CONFIG_CMD_STM32PROG=y
-CONFIG_CMD_STM32PROG_OTP=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
-# CONFIG_ARMV7_VIRT is not set
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
-CONFIG_HAS_BOARD_SIZE_LIMIT=y
-CONFIG_BOARD_SIZE_LIMIT=1441792
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_BOOTDELAY=1
-CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
-CONFIG_SYS_PBSIZE=1050
-CONFIG_CONSOLE_MUX=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_FOOTPRINT_LIMIT=y
-CONFIG_SPL_MAX_FOOTPRINT=0x3db00
-CONFIG_SPL_BOOTCOUNT_LIMIT=y
-CONFIG_SPL_LEGACY_IMAGE_FORMAT=y
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_SYS_MALLOC=y
-CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
-CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xc0300000
-CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
-CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER=y
-CONFIG_SPL_RAM_DEVICE=y
-CONFIG_SPL_SPI_FLASH_MTD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
-CONFIG_SYS_PROMPT="STM32MP> "
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_EXPORTENV is not set
-CONFIG_CMD_EEPROM=y
CONFIG_SYS_I2C_EEPROM_BUS=3
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_UNZIP=y
-CONFIG_CMD_ADC=y
-CONFIG_CMD_CLK=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_FUSE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP6=y
-CONFIG_CMD_TFTPPUT=y
-CONFIG_SYS_DISABLE_AUTOLOAD=y
-CONFIG_CMD_WGET=y
-CONFIG_CMD_BOOTCOUNT=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_TIMER=y
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_BTRFS=y
-CONFIG_CMD_EXT4_WRITE=y
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_ISO_PARTITION is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
-CONFIG_OF_LIVE=y
-CONFIG_OF_UPSTREAM=y
CONFIG_OF_LIST="st/stm32mp157c-dhcom-pdk2 st/stm32mp153c-dhcom-drc02 st/stm32mp157c-dhcom-picoitx"
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_ENV_IS_NOWHERE=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_TSIZE=y
-CONFIG_USE_SERVERIP=y
-CONFIG_SERVERIP="192.168.1.1"
-CONFIG_PROT_TCP_SACK=y
-CONFIG_IPV6=y
-CONFIG_STM32_ADC=y
-CONFIG_SPL_BLOCK_CACHE=y
-CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
-CONFIG_GPIO_HOG=y
-CONFIG_DM_HWSPINLOCK=y
-CONFIG_HWSPINLOCK_STM32=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_STM32F7=y
-CONFIG_LED=y
-CONFIG_LED_GPIO=y
-CONFIG_STM32_FMC2_EBI=y
-CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
-CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_STM32_SDMMC2=y
-CONFIG_MTD=y
-CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_SPI_FLASH_MTD=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
-CONFIG_DWC_ETH_QOS=y
-CONFIG_KS8851_MLL=y
-CONFIG_PHY=y
-CONFIG_SPL_PHY=y
-CONFIG_PHY_STM32_USBPHYC=y
-CONFIG_PINCONF=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_STMFX=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_STPMIC1=y
-CONFIG_DM_REGULATOR=y
-CONFIG_SPL_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_DM_REGULATOR_STM32_VREFBUF=y
-CONFIG_DM_REGULATOR_STPMIC1=y
-CONFIG_SPL_DM_REGULATOR_STPMIC1=y
-CONFIG_REMOTEPROC_STM32_COPRO=y
-CONFIG_DM_RTC=y
-CONFIG_RTC_STM32=y
-CONFIG_SERIAL_RX_BUFFER=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_STM32_QSPI=y
-CONFIG_STM32_SPI=y
-CONFIG_SYSRESET_SYSCON=y
-CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
-CONFIG_SPL_DM_USB_GADGET=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_USB_GADGET=y
-CONFIG_SPL_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="dh"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0483
-CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_SPL_DFU=y
-CONFIG_WDT=y
-CONFIG_WDT_STM32MP=y
-CONFIG_FAT_WRITE=y
-# CONFIG_BINMAN_FDT is not set
diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index 4162eda..42a5965 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -1,181 +1,11 @@
+#include <configs/stm32mp15_dhsom.config>
+
CONFIG_ARM=y
CONFIG_ARCH_STM32MP=y
-CONFIG_SYS_MALLOC_F_LEN=0x3000
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
-CONFIG_SF_DEFAULT_SPEED=50000000
-CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x1000
-CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp157a-dhcor-avenger96"
-CONFIG_SPL_TEXT_BASE=0x2FFC2500
-CONFIG_SPL_MMC=y
-CONFIG_BOOTCOUNT_BOOTLIMIT=3
-CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C
-CONFIG_SPL_STACK=0x30000000
-CONFIG_SYS_BOOTM_LEN=0x2000000
-CONFIG_SYS_LOAD_ADDR=0xc2000000
-CONFIG_SPL=y
-CONFIG_CMD_STM32KEY=y
-CONFIG_CMD_STBOARD=y
-CONFIG_TARGET_DH_STM32MP1_PDK2=y
-CONFIG_CMD_STM32PROG=y
-CONFIG_CMD_STM32PROG_OTP=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
-# CONFIG_ARMV7_VIRT is not set
-CONFIG_HAS_BOARD_SIZE_LIMIT=y
-CONFIG_BOARD_SIZE_LIMIT=1441792
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_BOOTDELAY=1
-CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
-CONFIG_SYS_PBSIZE=1050
-CONFIG_CONSOLE_MUX=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_FOOTPRINT_LIMIT=y
-CONFIG_SPL_MAX_FOOTPRINT=0x3db00
-CONFIG_SPL_BOOTCOUNT_LIMIT=y
-CONFIG_SPL_LEGACY_IMAGE_FORMAT=y
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_SYS_MALLOC=y
-CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
-CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xc0300000
-CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
-CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER=y
-CONFIG_SPL_RAM_DEVICE=y
-CONFIG_SPL_SPI_FLASH_MTD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
-CONFIG_SYS_PROMPT="STM32MP> "
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_EXPORTENV is not set
-CONFIG_CMD_EEPROM=y
CONFIG_SYS_I2C_EEPROM_BUS=2
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_UNZIP=y
-CONFIG_CMD_ADC=y
-CONFIG_CMD_CLK=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_FUSE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP6=y
-CONFIG_CMD_TFTPPUT=y
-CONFIG_SYS_DISABLE_AUTOLOAD=y
-CONFIG_CMD_WGET=y
-CONFIG_CMD_BOOTCOUNT=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_TIMER=y
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_BTRFS=y
-CONFIG_CMD_EXT4_WRITE=y
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_ISO_PARTITION is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
-CONFIG_OF_LIVE=y
-CONFIG_OF_UPSTREAM=y
CONFIG_OF_LIST="st/stm32mp157a-dhcor-avenger96 st/stm32mp151a-dhcor-testbench st/stm32mp153c-dhcor-drc-compact"
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_ENV_IS_NOWHERE=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_TSIZE=y
-CONFIG_USE_SERVERIP=y
-CONFIG_SERVERIP="192.168.1.1"
-CONFIG_PROT_TCP_SACK=y
-CONFIG_IPV6=y
-CONFIG_STM32_ADC=y
-CONFIG_SPL_BLOCK_CACHE=y
-CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
-CONFIG_GPIO_HOG=y
-CONFIG_DM_HWSPINLOCK=y
-CONFIG_HWSPINLOCK_STM32=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_STM32F7=y
-CONFIG_LED=y
-CONFIG_LED_GPIO=y
-CONFIG_STM32_FMC2_EBI=y
-CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x53
-CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_STM32_SDMMC2=y
-CONFIG_MTD=y
-CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_SPI_FLASH_MTD=y
-CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_DWC_ETH_QOS=y
-CONFIG_KS8851_MLL=y
-CONFIG_PHY=y
-CONFIG_SPL_PHY=y
-CONFIG_PHY_STM32_USBPHYC=y
-CONFIG_PINCONF=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_STMFX=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_STPMIC1=y
-CONFIG_DM_REGULATOR=y
-CONFIG_SPL_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_DM_REGULATOR_STM32_VREFBUF=y
-CONFIG_DM_REGULATOR_STPMIC1=y
-CONFIG_SPL_DM_REGULATOR_STPMIC1=y
-CONFIG_REMOTEPROC_STM32_COPRO=y
-CONFIG_DM_RTC=y
-CONFIG_RTC_STM32=y
-CONFIG_SERIAL_RX_BUFFER=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_STM32_QSPI=y
-CONFIG_STM32_SPI=y
-CONFIG_SYSRESET_SYSCON=y
-CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
-CONFIG_SPL_DM_USB_GADGET=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_USB_GADGET=y
-CONFIG_SPL_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="dh"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0483
-CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_SPL_DFU=y
-CONFIG_WDT=y
-CONFIG_WDT_STM32MP=y
-CONFIG_FAT_WRITE=y
-# CONFIG_BINMAN_FDT is not set
diff --git a/configs/stm32mp15_dhsom.config b/configs/stm32mp15_dhsom.config
new file mode 100644
index 0000000..efc1495
--- /dev/null
+++ b/configs/stm32mp15_dhsom.config
@@ -0,0 +1,70 @@
+#include <configs/stm32mp_dhsom.config>
+
+# CONFIG_ARMV7_VIRT is not set
+# CONFIG_BINMAN_FDT is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_PARTITION_UUIDS is not set
+# CONFIG_SPL_PINCTRL_FULL is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_BOARD_SIZE_LIMIT=1441792
+CONFIG_BOOTCOUNT_BOOTLIMIT=3
+CONFIG_BOOTDELAY=1
+CONFIG_CMD_ADC=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_STBOARD=y
+CONFIG_CMD_STM32PROG_OTP=y
+CONFIG_CONSOLE_MUX=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
+CONFIG_DM_HWSPINLOCK=y
+CONFIG_DM_REGULATOR_STM32_VREFBUF=y
+CONFIG_HAS_BOARD_SIZE_LIMIT=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_HWSPINLOCK_STM32=y
+CONFIG_KS8851_MLL=y
+CONFIG_PHY_ANEG_TIMEOUT=20000
+CONFIG_PINCTRL_STMFX=y
+CONFIG_REMOTEPROC_STM32_COPRO=y
+CONFIG_SERVERIP="192.168.1.1"
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_SPL=y
+CONFIG_SPL_BLOCK_CACHE=y
+CONFIG_SPL_BOOTCOUNT_LIMIT=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xc0300000
+CONFIG_SPL_DFU=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_SPL_DM_REGULATOR_STPMIC1=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_SPL_DM_SPI_FLASH=y
+CONFIG_SPL_DM_USB_GADGET=y
+CONFIG_SPL_ENV_IS_NOWHERE=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_FOOTPRINT_LIMIT=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_LEGACY_IMAGE_FORMAT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000
+CONFIG_SPL_MAX_FOOTPRINT=0x3db00
+CONFIG_SPL_MMC=y
+CONFIG_SPL_MTD=y
+CONFIG_SPL_PHY=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_SPI=y
+CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_STACK=0x30000000
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
+CONFIG_SPL_TEXT_BASE=0x2FFC2500
+CONFIG_SPL_USB_GADGET=y
+CONFIG_STM32_ADC=y
+CONFIG_SYSRESET_SYSCON=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C
+CONFIG_SYS_MALLOC_F_LEN=0x3000
+CONFIG_SYS_PBSIZE=1050
+CONFIG_PREBOOT="run dh_preboot"
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
+CONFIG_TARGET_DH_STM32MP1_PDK2=y
+CONFIG_USE_SERVERIP=y
diff --git a/configs/stm32mp_dhsom.config b/configs/stm32mp_dhsom.config
new file mode 100644
index 0000000..01d65cf
--- /dev/null
+++ b/configs/stm32mp_dhsom.config
@@ -0,0 +1,105 @@
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_CMD_BOOTCOUNT=y
+CONFIG_CMD_BTRFS=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_DHCP6=y
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_STM32KEY=y
+CONFIG_CMD_STM32PROG=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_UNZIP=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_WGET=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MTD=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_REGULATOR_STPMIC1=y
+CONFIG_DM_RTC=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_ENV_SIZE=0x4000
+CONFIG_FAT_WRITE=y
+CONFIG_FIT=y
+CONFIG_GPIO_HOG=y
+CONFIG_I2C_EEPROM=y
+CONFIG_IPV6=y
+CONFIG_IP_DEFRAG=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MTD=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM=y
+CONFIG_PHY=y
+CONFIG_PHY_STM32_USBPHYC=y
+CONFIG_PINCONF=y
+CONFIG_PMIC_STPMIC1=y
+CONFIG_PROT_TCP_SACK=y
+CONFIG_RTC_STM32=y
+CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_SPI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_STM32_FMC2_EBI=y
+CONFIG_STM32_QSPI=y
+CONFIG_STM32_SDMMC2=y
+CONFIG_STM32_SPI=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
+CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_SYS_I2C_STM32F7=y
+CONFIG_SYS_LOAD_ADDR=0xc2000000
+CONFIG_SYS_PROMPT="STM32MP> "
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_TFTP_TSIZE=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_MANUFACTURER="dh"
+CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
+CONFIG_USB_GADGET_VENDOR_NUM=0x0483
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_WDT=y
+CONFIG_WDT_STM32MP=y
diff --git a/configs/stout_defconfig b/configs/stout_defconfig
index e2ca0ae..a25a562 100644
--- a/configs/stout_defconfig
+++ b/configs/stout_defconfig
@@ -1,41 +1,25 @@
+#include <configs/renesas_rcar2.config>
+
CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_ARCH_RENESAS=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
-CONFIG_ARCH_RENESAS=y
CONFIG_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_LEN=0x100000
-CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
-CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7790-stout"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Stout"
CONFIG_R8A7790=y
CONFIG_TARGET_STOUT=y
-CONFIG_SYS_MONITOR_LEN=262144
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xe6340000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
-CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_ENV_ADDR=0xC0000
-CONFIG_PCI=y
-# CONFIG_EFI_LOADER is not set
-CONFIG_FIT=y
-CONFIG_BOOTDELAY=3
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -45,64 +29,15 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_SDRAM=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)"
-CONFIG_PARTITION_UUIDS=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_SH_ETHER=y
-CONFIG_PCI_RCAR_GEN2=y
-CONFIG_PINCTRL=y
-CONFIG_PINCONF=y
-CONFIG_PINCTRL_PFC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
CONFIG_SH_SCIF_CLK_FREQ=52000000
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SH_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_STORAGE=y
-CONFIG_SYS_TIMER_COUNTS_DOWN=y
diff --git a/configs/surface-rt_defconfig b/configs/surface-rt_defconfig
index c1fd4a5..b5c84b4 100644
--- a/configs/surface-rt_defconfig
+++ b/configs/surface-rt_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-microsoft-surface-rt"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_TEGRA30=y
CONFIG_TARGET_SURFACE_RT=y
diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig
index 26a37d2..5e840ff 100644
--- a/configs/tec-ng_defconfig
+++ b/configs/tec-ng_defconfig
@@ -7,8 +7,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_TEGRA30=y
CONFIG_TARGET_TEC_NG=y
diff --git a/configs/tec_defconfig b/configs/tec_defconfig
index 5fd214d..3d46c9e 100644
--- a/configs/tec_defconfig
+++ b/configs/tec_defconfig
@@ -6,8 +6,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x1FFE0000
CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec"
-CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SPL_STACK=0xffffc
+CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_TEGRA20=y
CONFIG_TARGET_TEC=y
diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
index bd5dd98..fed54bc 100644
--- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
+++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
@@ -35,8 +35,8 @@
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_TIME=y
diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig
index e93178a..af81e78 100644
--- a/configs/theadorable-x86-conga-qa3-e3845_defconfig
+++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig
@@ -34,8 +34,8 @@
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_TIME=y
diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig
index 4905ba6..0c9e609 100644
--- a/configs/theadorable-x86-dfi-bt700_defconfig
+++ b/configs/theadorable-x86-dfi-bt700_defconfig
@@ -32,8 +32,8 @@
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_TIME=y
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index 5a075c5..f957167 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -13,9 +13,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
-CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40020000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
@@ -48,8 +48,8 @@
CONFIG_CMD_PCI=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig
index cecd261..5e3a46b 100644
--- a/configs/tools-only_defconfig
+++ b/configs/tools-only_defconfig
@@ -4,27 +4,27 @@
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_PCI=y
-CONFIG_SANDBOX_SDL=n
-CONFIG_EFI_LOADER=n
+# CONFIG_SANDBOX_SDL is not set
+# CONFIG_EFI_LOADER is not set
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_TIMESTAMP=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
-CONFIG_BOOTSTD_FULL=n
-CONFIG_BOOTMETH_CROS=n
-CONFIG_BOOTMETH_VBE=n
+# CONFIG_BOOTSTD_FULL is not set
+# CONFIG_BOOTMETH_CROS is not set
+# CONFIG_BOOTMETH_VBE is not set
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
-CONFIG_CMD_BOOTD=n
-CONFIG_CMD_BOOTM=n
-CONFIG_CMD_BOOTI=n
-CONFIG_CMD_ELF=n
-CONFIG_CMD_EXTENSION=n
-CONFIG_CMD_DATE=n
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_BOOTI is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_EXTENSION is not set
+# CONFIG_CMD_DATE is not set
CONFIG_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NO_NET=y
-CONFIG_ACPIGEN=n
+# CONFIG_ACPIGEN is not set
CONFIG_AXI=y
CONFIG_AXI_SANDBOX=y
CONFIG_SANDBOX_GPIO=y
@@ -33,8 +33,8 @@
CONFIG_SOUND=y
CONFIG_SYSRESET=y
CONFIG_TIMER=y
-CONFIG_VIRTIO_MMIO=n
-CONFIG_VIRTIO_PCI=n
-CONFIG_VIRTIO_SANDBOX=n
-CONFIG_GENERATE_ACPI_TABLE=n
+# CONFIG_VIRTIO_MMIO is not set
+# CONFIG_VIRTIO_PCI is not set
+# CONFIG_VIRTIO_SANDBOX is not set
+# CONFIG_GENERATE_ACPI_TABLE is not set
CONFIG_TOOLS_MKEFICAPSULE=y
diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig
index b3d2e5c..70bec3b 100644
--- a/configs/total_compute_defconfig
+++ b/configs/total_compute_defconfig
@@ -18,14 +18,10 @@
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=5
-CONFIG_BOOTCOMMAND="if part number mmc 0 vbmeta is_avb; then echo MMC with vbmeta partition detected.; echo starting Android Verified boot.; avb init 0; if avb verify; then set bootargs $bootargs $avb_bootargs; part start mmc 0 boot boot_start; part size mmc 0 boot boot_size; mmc read ${load_addr} ${boot_start} ${boot_size}; bootm ${load_addr} ${load_addr} ${fdt_addr_r}; else; echo AVB verification failed.; exit; fi; elif part number mmc 0 system is_non_avb_android; then booti ${kernel_addr_r} ${initrd_addr_r} ${fdt_addr_r};else; echo Booting FIT image.; bootm ${load_addr} ${load_addr} ${fdt_addr_r}; fi;"
CONFIG_SYS_CBSIZE=512
CONFIG_SYS_PBSIZE=544
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_AVB_VERIFY=y
-CONFIG_AVB_BUF_ADDR=0x90000000
-CONFIG_AVB_BUF_SIZE=0x10000000
CONFIG_SYS_PROMPT="TOTAL_COMPUTE# "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
@@ -39,7 +35,6 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
-CONFIG_CMD_AVB=y
CONFIG_CMD_UBI=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
diff --git a/configs/transformer_t20_defconfig b/configs/transformer_t20_defconfig
index df993c3..b693665 100644
--- a/configs/transformer_t20_defconfig
+++ b/configs/transformer_t20_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_DEFAULT_DEVICE_TREE="tegra20-asus-tf101"
-CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SPL_STACK=0xffffc
+CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_LOAD_ADDR=0x2000000
CONFIG_TEGRA20=y
CONFIG_TARGET_TRANSFORMER_T20=y
diff --git a/configs/transformer_t30_defconfig b/configs/transformer_t30_defconfig
index 9102dcc..c5f0bc2 100644
--- a/configs/transformer_t30_defconfig
+++ b/configs/transformer_t30_defconfig
@@ -9,8 +9,8 @@
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf201"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_TEGRA30=y
CONFIG_TARGET_TRANSFORMER_T30=y
diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig
index c797275..c04fc1a 100644
--- a/configs/trimslice_defconfig
+++ b/configs/trimslice_defconfig
@@ -8,8 +8,8 @@
CONFIG_ENV_OFFSET=0xFE000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice"
-CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SPL_STACK=0xffffc
+CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_TEGRA20=y
CONFIG_TARGET_TRIMSLICE=y
diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig
index 3a32bc8..10f6055 100644
--- a/configs/tuge1_defconfig
+++ b/configs/tuge1_defconfig
@@ -119,8 +119,8 @@
CONFIG_CMD_I2C=y
CONFIG_LOADS_ECHO=y
CONFIG_SYS_LOADS_BAUD_CHANGE=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_JFFS2=y
diff --git a/configs/turris_1x_nor_defconfig b/configs/turris_1x_nor_defconfig
index 52819b1..a96fae1 100644
--- a/configs/turris_1x_nor_defconfig
+++ b/configs/turris_1x_nor_defconfig
@@ -46,8 +46,8 @@
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_WDT=y
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BTRFS=y
CONFIG_CMD_EXT2=y
diff --git a/configs/turris_1x_sdcard_defconfig b/configs/turris_1x_sdcard_defconfig
index ec4717e..719a394 100644
--- a/configs/turris_1x_sdcard_defconfig
+++ b/configs/turris_1x_sdcard_defconfig
@@ -6,10 +6,10 @@
CONFIG_NR_DRAM_BANKS=5
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xffe04500
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index dd1a45b..bdcc740 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -19,9 +19,9 @@
CONFIG_ENV_OFFSET=0xF0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig
index c12b8e9..816ac8f 100644
--- a/configs/tuxx1_defconfig
+++ b/configs/tuxx1_defconfig
@@ -133,8 +133,8 @@
CONFIG_CMD_I2C=y
CONFIG_LOADS_ECHO=y
CONFIG_SYS_LOADS_BAUD_CHANGE=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_JFFS2=y
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index 0aed619..a0fea87 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -6,11 +6,11 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref"
-CONFIG_SPL_TEXT_BASE=0x00040000
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x100000
+CONFIG_SPL_TEXT_BASE=0x00040000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0x85000000
@@ -50,7 +50,6 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="zImage"
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_GATEWAYIP=y
CONFIG_GATEWAYIP="192.168.11.1"
CONFIG_USE_IPADDR=y
@@ -61,6 +60,7 @@
CONFIG_ROOTPATH="/nfs/root/path"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.11.1"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_GPIO_UNIPHIER=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
index 1939fa1..12647bb 100644
--- a/configs/uniphier_v7_defconfig
+++ b/configs/uniphier_v7_defconfig
@@ -6,11 +6,11 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka"
-CONFIG_SPL_TEXT_BASE=0x00100000
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x100000
+CONFIG_SPL_TEXT_BASE=0x00100000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0x85000000
@@ -51,7 +51,6 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="zImage"
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_GATEWAYIP=y
CONFIG_GATEWAYIP="192.168.11.1"
CONFIG_USE_IPADDR=y
@@ -62,6 +61,7 @@
CONFIG_ROOTPATH="/nfs/root/path"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.11.1"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_GPIO_UNIPHIER=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index 5dfd428..e77d793 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -38,7 +38,6 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="Image"
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USE_GATEWAYIP=y
CONFIG_GATEWAYIP="192.168.11.1"
CONFIG_USE_IPADDR=y
@@ -49,6 +48,7 @@
CONFIG_ROOTPATH="/nfs/root/path"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.11.1"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_GPIO_UNIPHIER=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index b23e273..d7fb61c 100644
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -29,8 +29,8 @@
CONFIG_CMD_NAND=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)"
CONFIG_OF_CONTROL=y
diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig
index 821fa33..dfe821b 100644
--- a/configs/venice2_defconfig
+++ b/configs/venice2_defconfig
@@ -8,8 +8,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_TEGRA124=y
CONFIG_TARGET_VENICE2=y
diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig
index 77a8738..1357f5f 100644
--- a/configs/ventana_defconfig
+++ b/configs/ventana_defconfig
@@ -6,8 +6,8 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana"
-CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SPL_STACK=0xffffc
+CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_TEGRA20=y
CONFIG_TARGET_VENTANA=y
diff --git a/configs/verdin-am62_a53_defconfig b/configs/verdin-am62_a53_defconfig
index ff2771e..49fb979 100644
--- a/configs/verdin-am62_a53_defconfig
+++ b/configs/verdin-am62_a53_defconfig
@@ -15,13 +15,13 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am625-verdin-wifi-dev"
-CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80c80000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
@@ -102,8 +102,8 @@
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eth0"
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
diff --git a/configs/verdin-am62_r5_defconfig b/configs/verdin-am62_r5_defconfig
index 4a7da1a..220469a 100644
--- a/configs/verdin-am62_r5_defconfig
+++ b/configs/verdin-am62_r5_defconfig
@@ -12,13 +12,13 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am625-verdin-r5"
-CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_TEXT_BASE=0x43c00000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x43c3b000
CONFIG_SPL_BSS_MAX_SIZE=0x3000
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index abb458d..b54028f 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -9,7 +9,6 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-verdin-wifi-dev"
-CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_VERDIN_IMX8MM=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -17,6 +16,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
@@ -29,7 +29,6 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_OF_SYSTEM_SETUP=y
@@ -89,8 +88,8 @@
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eth0"
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig
index 661761f..ec76cff 100644
--- a/configs/verdin-imx8mp_defconfig
+++ b/configs/verdin-imx8mp_defconfig
@@ -13,7 +13,6 @@
CONFIG_SYS_I2C_MXC_I2C4=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-verdin-wifi-dev"
-CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_VERDIN_IMX8MP=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
@@ -23,6 +22,7 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
@@ -38,7 +38,6 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_OF_SYSTEM_SETUP=y
@@ -102,8 +101,8 @@
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eth0"
CONFIG_VERSION_VARIABLE=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig
index ea1d7c9..86087d4 100644
--- a/configs/vinco_defconfig
+++ b/configs/vinco_defconfig
@@ -33,8 +33,8 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index 368b389..0b5ad85 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -16,10 +16,10 @@
CONFIG_CMD_MAX6957=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x100000
-CONFIG_SPL_TEXT_BASE=0x00000000
CONFIG_SYS_MONITOR_LEN=262144
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xfff8
+CONFIG_SPL_TEXT_BASE=0x00000000
CONFIG_SYS_LOAD_ADDR=0x80008000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x120000
diff --git a/configs/x3_t30_defconfig b/configs/x3_t30_defconfig
index 53b1fd9..c8da5b4 100644
--- a/configs/x3_t30_defconfig
+++ b/configs/x3_t30_defconfig
@@ -8,8 +8,8 @@
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-lg-p880"
-CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_TEGRA30=y
CONFIG_TARGET_X3_T30=y
diff --git a/configs/x530_defconfig b/configs/x530_defconfig
index c1fb90d..89612be 100644
--- a/configs/x530_defconfig
+++ b/configs/x530_defconfig
@@ -13,9 +13,9 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530"
-CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x40023000
CONFIG_SPL_BSS_MAX_SIZE=0x4000
@@ -48,8 +48,8 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/xilinx_mbv32_smode_defconfig b/configs/xilinx_mbv32_smode_defconfig
index 741724f..820681d 100644
--- a/configs/xilinx_mbv32_smode_defconfig
+++ b/configs/xilinx_mbv32_smode_defconfig
@@ -2,13 +2,13 @@
CONFIG_SYS_MALLOC_LEN=0xe00000
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x21200000
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81200000
CONFIG_ENV_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv32"
-CONFIG_SPL_STACK=0x20200000
-CONFIG_SPL_BSS_START_ADDR=0x24000000
+CONFIG_SPL_STACK=0x80200000
+CONFIG_SPL_BSS_START_ADDR=0x84000000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
-CONFIG_SYS_LOAD_ADDR=0x20200000
+CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_SPL_SIZE_LIMIT=0x40000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x40600000
@@ -16,12 +16,12 @@
CONFIG_SYS_CLK_FREQ=100000000
CONFIG_BOOT_SCRIPT_OFFSET=0x0
CONFIG_TARGET_XILINX_MBV=y
-CONFIG_SPL_OPENSBI_LOAD_ADDR=0x20100000
+CONFIG_SPL_OPENSBI_LOAD_ADDR=0x80100000
CONFIG_RISCV_SMODE=y
# CONFIG_SPL_SMP is not set
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x20200000
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
diff --git a/configs/xilinx_mbv64_defconfig b/configs/xilinx_mbv64_defconfig
new file mode 100644
index 0000000..aad9c3f
--- /dev/null
+++ b/configs/xilinx_mbv64_defconfig
@@ -0,0 +1,44 @@
+CONFIG_RISCV=y
+CONFIG_SYS_MALLOC_LEN=0xe00000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81200000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv64"
+CONFIG_SPL_STACK=0x80200000
+CONFIG_SPL_BSS_START_ADDR=0x84000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SYS_LOAD_ADDR=0x80200000
+CONFIG_SPL_SIZE_LIMIT=0x40000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0x40600000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SYS_CLK_FREQ=100000000
+CONFIG_BOOT_SCRIPT_OFFSET=0x0
+CONFIG_DEBUG_UART=y
+CONFIG_TARGET_XILINX_MBV=y
+CONFIG_ARCH_RV64I=y
+# CONFIG_SPL_SMP is not set
+CONFIG_REMAKE_ELF=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_BOARD_LATE_INIT is not set
+CONFIG_SPL_MAX_SIZE=0x40000
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
+# CONFIG_CMD_MII is not set
+CONFIG_CMD_TIMER=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DM_MTD=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_XILINX_UARTLITE=y
+CONFIG_XILINX_TIMER=y
+# CONFIG_BINMAN_FDT is not set
+CONFIG_PANIC_HANG=y
+CONFIG_SPL_GZIP=y
diff --git a/configs/xilinx_mbv64_smode_defconfig b/configs/xilinx_mbv64_smode_defconfig
new file mode 100644
index 0000000..628e0ed
--- /dev/null
+++ b/configs/xilinx_mbv64_smode_defconfig
@@ -0,0 +1,48 @@
+CONFIG_RISCV=y
+CONFIG_SYS_MALLOC_LEN=0xe00000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81200000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv64"
+CONFIG_SPL_STACK=0x80200000
+CONFIG_SPL_BSS_START_ADDR=0x84000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SYS_LOAD_ADDR=0x80200000
+CONFIG_SPL_SIZE_LIMIT=0x40000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0x40600000
+CONFIG_DEBUG_UART_CLOCK=1000000
+CONFIG_SYS_CLK_FREQ=100000000
+CONFIG_BOOT_SCRIPT_OFFSET=0x0
+CONFIG_TARGET_XILINX_MBV=y
+CONFIG_SPL_OPENSBI_LOAD_ADDR=0x80100000
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+# CONFIG_SPL_SMP is not set
+CONFIG_REMAKE_ELF=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_BOARD_LATE_INIT is not set
+CONFIG_SPL_MAX_SIZE=0x40000
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x2
+# CONFIG_CMD_MII is not set
+CONFIG_CMD_TIMER=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DM_MTD=y
+CONFIG_DEBUG_UART_UARTLITE=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_XILINX_UARTLITE=y
+# CONFIG_RISCV_TIMER is not set
+CONFIG_XILINX_TIMER=y
+# CONFIG_BINMAN_FDT is not set
+CONFIG_PANIC_HANG=y
+CONFIG_SPL_GZIP=y
diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig
index 899776e..a9320de 100644
--- a/configs/xilinx_versal_net_virt_defconfig
+++ b/configs/xilinx_versal_net_virt_defconfig
@@ -69,10 +69,10 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SIMPLE_PM_BUS=y
CONFIG_CLK_VERSAL=y
@@ -128,7 +128,6 @@
CONFIG_SOC_DEVICE=y
CONFIG_SOC_XILINX_VERSAL_NET=y
CONFIG_SPI=y
-CONFIG_SPI_ADVANCE=y
CONFIG_DM_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_CADENCE_OSPI_VERSAL=y
diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index 32c6bcd..f220cc0 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -68,10 +68,10 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SIMPLE_PM_BUS=y
CONFIG_CLK_VERSAL=y
@@ -129,7 +129,6 @@
CONFIG_XILINX_UARTLITE=y
CONFIG_SOC_XILINX_VERSAL=y
CONFIG_SPI=y
-CONFIG_SPI_ADVANCE=y
CONFIG_DM_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_HAS_CQSPI_REF_CLK=y
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
index eaaf105..e00b386 100644
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -92,9 +92,9 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SIMPLE_PM_BUS=y
CONFIG_DFU_TIMEOUT=y
@@ -144,7 +144,6 @@
CONFIG_POWER_DOMAIN=y
CONFIG_ARM_DCC=y
CONFIG_ZYNQ_SERIAL=y
-CONFIG_SPI_ADVANCE=y
CONFIG_ZYNQ_SPI=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig
index dd4df0b..5757a0c 100644
--- a/configs/xilinx_zynqmp_kria_defconfig
+++ b/configs/xilinx_zynqmp_kria_defconfig
@@ -117,9 +117,9 @@
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_FAT_DEVICE_AND_PART=":auto"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SIMPLE_PM_BUS=y
CONFIG_SATA=y
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index ff8ab34..f3d83a2 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -118,9 +118,9 @@
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_FAT_DEVICE_AND_PART=":auto"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SIMPLE_PM_BUS=y
CONFIG_SATA=y
@@ -208,7 +208,6 @@
CONFIG_ZYNQ_SERIAL=y
CONFIG_SOC_XILINX_ZYNQMP=y
CONFIG_SPI=y
-CONFIG_SPI_ADVANCE=y
CONFIG_ZYNQ_SPI=y
CONFIG_ZYNQMP_GQSPI=y
CONFIG_SYSRESET=y
diff --git a/doc/api/fs.rst b/doc/api/fs.rst
new file mode 100644
index 0000000..38c8b0d
--- /dev/null
+++ b/doc/api/fs.rst
@@ -0,0 +1,7 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+File system API
+===============
+
+.. kernel-doc:: include/fs.h
+ :internal:
diff --git a/doc/api/index.rst b/doc/api/index.rst
index 9f7f23f..a108718 100644
--- a/doc/api/index.rst
+++ b/doc/api/index.rst
@@ -12,6 +12,7 @@
dm
efi
event
+ fs
getopt
interrupt
led
diff --git a/doc/board/coolpi/genbook_cm5_rk3588.rst b/doc/board/coolpi/genbook_cm5_rk3588.rst
new file mode 100644
index 0000000..a02e561
--- /dev/null
+++ b/doc/board/coolpi/genbook_cm5_rk3588.rst
@@ -0,0 +1,68 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+GenBook
+=======
+Cool Pi GenBook is a laptop powered by RK3588, it works with a
+carrier board connect with CM5.
+
+Specification:
+* Rockchip RK3588
+* LPDDR5X 8/32 GB
+* eMMC 64 GB
+* SPI Nor 8 MB
+* HDMI Type A out x 1
+* USB 3.0 Host x 1
+* USB-C 3.0 with DisplayPort AltMode
+* PCIE M.2 E Key for RTL8852BE Wireless connection
+* PCIE M.2 M Key for NVME connection
+* eDP panel with 1920x1080
+
+Here is the step-by-step to compile and boot to U-Boot on GenBook.
+
+Get the TF-A and DDR init (TPL) binaries
+----------------------------------------
+
+.. prompt:: bash
+
+ > cd u-boot
+ > export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
+ > export BL31=../rkbin/bin/rk35/rk3588_bl31_v1.46.elf
+ > make coolpi-genbook-cm5-rk3588_defconfig
+ > make CROSS_COMPILE=aarch64-linux-gnu-
+
+This will build ``u-boot-rockchip.bin`` for eMMC and ``u-boot-rockchip-spi.bin`` for SPI Nor.
+
+Write u-boot to eMMC or SPI Nor from a Linux system on the laptop
+-----------------------------------------------------------------
+
+Copy ``u-boot-rockchip.bin`` and ``u-boot-rockchip-spi.bin`` to the laptop.
+
+eMMC
+~~~~
+
+.. prompt:: bash
+
+ dd if=u-boot-rockchip.bin of=/dev/mmcblk0 bs=512 seek=64
+
+SPI Nor
+~~~~~~~
+
+.. prompt:: bash
+
+ dd if=u-boot-rockchip-spi.bin of=/dev/mtdblock0
+
+``upgrade_tool`` allows to flash the on-board SPI Nor via the USB TypeC interface
+with help of the Rockchip loader binary.
+
+To enter the USB flashing mode, connect the laptop and your HOST PC with a USB-C
+cable, reset the laptop with ``Loader Key`` pressed.
+On your PC, check with ``lsusb -d 2207:350b``).
+
+To flash U-Boot on the SPI Nor with ``upgrade_tool``:
+
+.. prompt:: bash
+
+ upgrade_tool db rk3588/MiniLoaderAll.bin
+ upgrade_tool ssd // Input 5 for SPINOR download mode
+ upgrade_tool wl 0 u-boot-rockchip-spi.bin
+ upgrade_tool rd
diff --git a/doc/board/coolpi/index.rst b/doc/board/coolpi/index.rst
new file mode 100644
index 0000000..9c9593f
--- /dev/null
+++ b/doc/board/coolpi/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Cool Pi
+=================
+
+.. toctree::
+ :maxdepth: 2
+
+ genbook_cm5_rk3588
diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
index a177265..f52b24f 100644
--- a/doc/board/coreboot/coreboot.rst
+++ b/doc/board/coreboot/coreboot.rst
@@ -182,3 +182,9 @@
boot as a coreboot payload, based on a known-good build of coreboot.
To update the `coreboot.rom` file which is used, see ``tools/Dockerfile``
+
+Editing CMOS RAM settings
+-------------------------
+
+U-Boot supports creating a configuration editor to edit coreboot CMOS-RAM
+settings. See :ref:`cedit_cb_load`.
diff --git a/doc/board/emulation/index.rst b/doc/board/emulation/index.rst
index 0419d72..f890816 100644
--- a/doc/board/emulation/index.rst
+++ b/doc/board/emulation/index.rst
@@ -8,7 +8,6 @@
acpi
blkdev
- ../../usage/semihosting
qemu-arm
qemu-mips
qemu-ppce500
@@ -16,3 +15,7 @@
qemu-sbsa
qemu-x86
qemu-xtensa
+
+Also see
+
+* :doc:`../../usage/semihosting`
diff --git a/doc/board/emulation/qemu-riscv.rst b/doc/board/emulation/qemu-riscv.rst
index 8a5eb1e..8388e13 100644
--- a/doc/board/emulation/qemu-riscv.rst
+++ b/doc/board/emulation/qemu-riscv.rst
@@ -171,3 +171,8 @@
CONFIG_DEBUG_UART_NS16550=y
CONFIG_DEBUG_UART_BASE=0x10000000
CONFIG_DEBUG_UART_CLOCK=3686400
+
+To provide a debug UART in main U-Boot the SBI DBCN extension can be used
+instead::
+
+ CONFIG_DEBUG_SBI_CONSOLE=y
diff --git a/doc/board/index.rst b/doc/board/index.rst
index ca5246e..b54c174 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -23,6 +23,7 @@
bsh/index
cloos/index
congatec/index
+ coolpi/index
coreboot/index
emcraft/index
emulation/index
@@ -43,6 +44,7 @@
phytec/index
purism/index
qualcomm/index
+ qnap/index
renesas/index
rockchip/index
samsung/index
diff --git a/doc/board/qnap/index.rst b/doc/board/qnap/index.rst
new file mode 100644
index 0000000..652ea11
--- /dev/null
+++ b/doc/board/qnap/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Qnap
+====
+
+.. toctree::
+ :maxdepth: 2
+
+ ts433.rst
diff --git a/doc/board/qnap/ts433.rst b/doc/board/qnap/ts433.rst
new file mode 100644
index 0000000..1e1bfbb
--- /dev/null
+++ b/doc/board/qnap/ts433.rst
@@ -0,0 +1,91 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Qnap TS433 Devices
+=================================
+
+This allows U-Boot to boot the Qnap TS433 NAS
+
+Preparing the serial
+--------------------
+
+Qnap devices run their serial console with a 115200 baudrate. As the
+binary DDR-init and maskrom-downloader expect a 1500000 rate, it is
+necessary to adapt the binaries if their output is needed.
+
+This can be done with a binary provided in the rkbin repository.
+First the ddrbin_param.txt in the rkbin repo needs to be modified:
+
+.. code-block:: bash
+
+ diff --git a/tools/ddrbin_param.txt b/tools/ddrbin_param.txt
+ index 0dfdd318..82ade7e7 100644
+ --- a/tools/ddrbin_param.txt
+ +++ b/tools/ddrbin_param.txt
+ @@ -11,7 +11,7 @@ lp5_freq=
+
+ uart id=
+ uart iomux=
+ -uart baudrate=
+ +uart baudrate=115200
+
+ sr_idle=
+ pd_idle=
+
+And after that the ddrbin_tool binary can be used to modify apply this
+modification and also a new maskrom downloader can be build:
+
+.. code-block:: bash
+
+ $ tools/ddrbin_tool rk3568 tools/ddrbin_param.txt bin/rk35/rk3568_ddr_1560MHz_v1.21.bin
+ $ tools/boot_merger RKBOOT/RK3568MINIALL.ini
+
+Building U-Boot
+---------------
+
+.. code-block:: bash
+
+ $ export CROSS_COMPILE=aarch64-linux-gnu-
+ $ export BL31=../rkbin/bin/rk35/rk3568_bl31_v1.34.elf
+ $ export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3568_ddr_1056MHz_v1.13.bin
+ $ make qnap-ts433-rk3568_defconfig
+ $ make
+
+This will build ``u-boot-rockchip.bin`` which can be written to the
+on-board eMMC.
+
+Image installation
+------------------
+
+The Qnap thankfully provides an easily accessible serial header as well as
+a very user-friendly jumper-header to bring the device into maskrom mode.
+
+To access both, the drive trays need to be removed. Looking at the board,
+through the upper cutout of the metal frame the white 4-port serial-header
+can be seen next to a barcode sticker. It's pinout is as follows:
+
+.. code-block:: none
+
+ ,_ _.
+ |1234| 1=TX 2=VCC
+ `----' 3=RX 4=GND
+
+
+Directly below it, the mentioned 2-pin jumper header can be seen.
+
+To write your u-boot to the device, it needs to be powered off first. Then
+a jumper or suitable cable needs to be used to connect the two pins of the
+maskrom header. Turning on the device now will start it in maskrom mode.
+
+It is important that the jumper gets removed after that stop and before
+actually trying to write to the emmc.
+
+The front usb-port needs to be connected to the host with an USB-A-to-A
+cable to allow flashing.
+
+The flashing itself is done via rkdeveloptool, which can be found for
+example as package of that name in Debian-based distributions:
+
+.. code-block:: bash
+
+ $ rkdeveloptool db rk356x_spl_loader_v1.21.113.bin
+ $ rkdeveloptool wl 64 u-boot-rockchip.bin
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 7b11a2e..9bab86d 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -65,6 +65,7 @@
- FriendlyElec NanoPi R2C (nanopi-r2c-rk3328)
- FriendlyElec NanoPi R2C Plus (nanopi-r2c-plus-rk3328)
- FriendlyElec NanoPi R2S (nanopi-r2s-rk3328)
+ - FriendlyElec NanoPi R2S Plus (nanopi-r2s-plus-rk3328)
- Pine64 Rock64 (rock64-rk3328)
- Radxa ROCK Pi E (rock-pi-e-rk3328)
- Xunlong Orange Pi R1 Plus (orangepi-r1-plus-rk3328)
@@ -119,6 +120,7 @@
- FriendlyElec NanoPi R5S (nanopi-r5s-rk3568)
- Generic RK3566/RK3568 (generic-rk3568)
- Hardkernel ODROID-M1 (odroid-m1-rk3568)
+ - QNAP TS-433 (qnap-ts433-rk3568)
- Radxa E25 Carrier Board (radxa-e25-rk3568)
- Radxa ROCK 3A (rock-3a-rk3568)
- Radxa ROCK 3B (rock-3b-rk3568)
@@ -147,6 +149,7 @@
- Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588)
- Yanyi Tech CoolPi 4 Model B (coolpi-4b-rk3588s)
- Yanyi Tech CoolPi CM5 EVB (coolpi-cm5-evb-rk3588)
+ - Yanyi Tech CoolPi CM5 GenBook (coolpi-cm5-genbook-rk3588)
* rv1108
- Rockchip Evb-rv1108 (evb-rv1108)
diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst
index c3513f0..5d01f48 100644
--- a/doc/board/ti/k3.rst
+++ b/doc/board/ti/k3.rst
@@ -32,19 +32,22 @@
am62ax_sk
am62x_sk
- ../beagle/am62x_beagleplay
- ../phytec/phycore-am62x
- ../toradex/verdin-am62
am62px_sk
am64x_evm
am65x_evm
j7200_evm
- ../beagle/j721e_beagleboneai64
j721e_evm
j721s2_evm
j722s_evm
j784s4_evm
+K3 SoC based boards in other sections
+
+* :doc:`../beagle/am62x_beagleplay`
+* :doc:`../beagle/j721e_beagleboneai64`
+* :doc:`../phytec/phycore-am62x`
+* :doc:`../toradex/verdin-am62`
+
Boot Flow Overview
------------------
diff --git a/doc/conf.py b/doc/conf.py
index ced3a67..c50daf8 100644
--- a/doc/conf.py
+++ b/doc/conf.py
@@ -560,13 +560,9 @@
# Grouping the document tree into PDF files. List of tuples
# (source start file, target name, title, author, options).
#
-# See the Sphinx chapter of https://ralsina.me/static/manual.pdf
-#
-# FIXME: Do not add the index file here; the result will be too big. Adding
-# multiple PDF files here actually tries to get the cross-referencing right
-# *between* PDF files.
+# See https://rst2pdf.org/static/manual.html#sphinx
pdf_documents = [
- ('uboot-documentation', u'U-Boot', u'U-Boot', u'J. Random Bozo'),
+ ('index', u'U-Boot', u'Das U-Boot', u'The U-Boot development community'),
]
# kernel-doc extension configuration for running Sphinx directly (e.g. by Read
diff --git a/doc/develop/cedit.rst b/doc/develop/cedit.rst
index 310be88..1ac55ab 100644
--- a/doc/develop/cedit.rst
+++ b/doc/develop/cedit.rst
@@ -172,4 +172,4 @@
For now, reading and writing settings is not automatic. See the
:doc:`../usage/cmd/cedit` for how to do this on the command line or in a
-script.
+script. For x86 devices, see :ref:`cedit_cb_load`.
diff --git a/doc/develop/devicetree/control.rst b/doc/develop/devicetree/control.rst
index 211f7e4..0233945 100644
--- a/doc/develop/devicetree/control.rst
+++ b/doc/develop/devicetree/control.rst
@@ -89,7 +89,7 @@
Resyncing with devicetree-rebasing
----------------------------------
-The `devicetree-rebasing repository`_ maintains a fork cum mirror copy of
+The `devicetree-rebasing repository`_ maintains a mirror copy of
devicetree files along with the bindings synced at every Linux kernel major
release or intermediate release candidates. The U-Boot maintainers regularly
sync the `dts/upstream/` subtree from the devicetree-rebasing repo whenever
diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst
index faec644..1548d26 100644
--- a/doc/develop/release_cycle.rst
+++ b/doc/develop/release_cycle.rst
@@ -51,11 +51,11 @@
Current Status
--------------
-* U-Boot v2025.01-rc1 was released on Mon 28 October 2024.
+* U-Boot v2024.10 was released on Mon 07 October 2024.
* The Merge Window for the next release (v2025.01) is **closed**.
-* The next branch is now **closed**.
+* The next branch is now **open**.
* Release "v2025.01" is scheduled for 06 January 2025.
@@ -69,7 +69,7 @@
* U-Boot v2025.01-rc1 was released on Mon 28 October 2024.
-.. * U-Boot v2025.01-rc2 was released on Mon 11 November 2024.
+* U-Boot v2025.01-rc2 was released on Mon 11 November 2024.
.. * U-Boot v2025.01-rc3 was released on Mon 25 November 2024.
diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst
index 0760ca9..48d6110 100644
--- a/doc/develop/uefi/uefi.rst
+++ b/doc/develop/uefi/uefi.rst
@@ -681,8 +681,8 @@
As of U-Boot v2020.10 UEFI variables cannot be set at runtime. The U-Boot
command 'efidebug' can be used to set the variables.
-UEFI HTTP Boot
-~~~~~~~~~~~~~~
+UEFI HTTP Boot using the legacy TCP stack
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
HTTP Boot provides the capability for system deployment and configuration
over the network. HTTP Boot can be activated by specifying::
@@ -715,6 +715,47 @@
setenv httpserverip 192.168.1.1
+UEFI HTTP(s) Boot using lwIP
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Similar to the above U-Boot can do EFI HTTP boot using lwIP. If we combine this
+with Mbed TLS we can also download from https://
+
+HTTP(s) Boot can be activated by specifying::
+
+ CONFIG_EFI_HTTP_BOOT
+ CONFIG_NET_LWIP
+ CONFIG_WGET_HTTPS
+
+For QEMU targets there's a Kconfig that supports this by default::
+
+ make qemu_arm64_lwip_defconfig
+
+The commands and functionality are similar to the legacy stack, with the notable
+exception of not having to define an "httpserverip" if you are trying to resolve
+an IP. However, lwIP code doesn't yet support redirects::
+
+ => efidebug boot add -u 1 netinst https://cdimage.debian.org/cdimage/weekly-builds/arm64/iso-cd/debian-testing-arm64-netinst.iso
+ => dhcp
+ DHCP client bound to address 10.0.2.15 (3 ms)
+ => efidebug boot order 1
+ => bootefi bootmgr
+
+ HTTP server error 302
+ Loading Boot0001 'netinst' failed
+ EFI boot manager: Cannot load any image
+
+If the url you specified isn't a redirect::
+
+ => efidebug boot add -u 1 netinst https://download.rockylinux.org/pub/rocky/9/isos/aarch64/Rocky-9.4-aarch64-minimal.iso
+ => dhcp
+ => bootefi bootmgr
+ #######################################
+
+If the downloaded file extension is .iso or .img file, efibootmgr tries to
+mount the image and boot with the default file(e.g. EFI/BOOT/BOOTAA64.EFI).
+If the downloaded file is PE-COFF image, load the downloaded file and
+start it.
+
Executing the built in hello world application
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt
index 40dde59..13e0327 100644
--- a/doc/sphinx/requirements.txt
+++ b/doc/sphinx/requirements.txt
@@ -1,25 +1,26 @@
-alabaster==0.7.16
-Babel==2.15.0
-certifi==2024.7.4
-charset-normalizer==3.3.2
-docutils==0.20.1
-idna==3.7
+alabaster==1.0.0
+babel==2.16.0
+certifi==2024.8.30
+charset-normalizer==3.4.0
+docutils==0.21.2
+idna==3.10
imagesize==1.4.1
Jinja2==3.1.4
-MarkupSafe==2.1.5
+MarkupSafe==3.0.2
packaging==24.1
+pip==24.2
Pygments==2.18.0
requests==2.32.3
six==1.16.0
snowballstemmer==2.2.0
-Sphinx==7.3.7
-sphinx-prompt==1.8.0
-sphinx-rtd-theme==2.0.0
-sphinxcontrib-applehelp==1.0.8
-sphinxcontrib-devhelp==1.0.6
-sphinxcontrib-htmlhelp==2.0.5
+Sphinx==8.1.3
+sphinx-prompt==1.9.0
+sphinx-rtd-theme==3.0.1
+sphinxcontrib-applehelp==2.0.0
+sphinxcontrib-devhelp==2.0.0
+sphinxcontrib-htmlhelp==2.1.0
sphinxcontrib-jquery==4.1
sphinxcontrib-jsmath==1.0.1
-sphinxcontrib-qthelp==1.0.7
-sphinxcontrib-serializinghtml==1.1.10
-urllib3==2.2.2
+sphinxcontrib-qthelp==2.0.0
+sphinxcontrib-serializinghtml==2.0.0
+urllib3==2.2.3
diff --git a/doc/usage/cmd/cbcmos.rst b/doc/usage/cmd/cbcmos.rst
new file mode 100644
index 0000000..9395cf1
--- /dev/null
+++ b/doc/usage/cmd/cbcmos.rst
@@ -0,0 +1,45 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+cbcmos
+======
+
+Synopis
+-------
+
+::
+
+ cbcmos check [<dev>]
+ cbcmos update [<dev>]
+
+
+Description
+-----------
+
+This checks or updates the CMOS-RAM checksum value against the CMOS-RAM
+contents. It is used with coreboot, which provides information about where to
+find the checksum and what part of the CMOS RAM it covers.
+
+If `<dev>` is provided then the named real-time clock (RTC) device is used.
+Otherwise the default RTC is used.
+
+Example
+-------
+
+This shows checking and updating a checksum across bytes 38 and 39 of the
+CMOS RAM::
+
+ => rtc read 38 2
+ 00000038: 71 00 q.
+ => cbc check
+ => rtc write 38 66
+ => rtc read 38 2
+ 00000038: 66 00 f.
+ => cbc check
+ Checksum 7100 error: calculated 6600
+ => cbc update
+ Checksum 6600 written
+ => cbc check
+ =>
+
+See also :ref:`cedit_cb_load` which shows an example that includes the
+configuration editor.
diff --git a/doc/usage/cmd/cbsysinfo.rst b/doc/usage/cmd/cbsysinfo.rst
index 80d8ba1..28f61d9 100644
--- a/doc/usage/cmd/cbsysinfo.rst
+++ b/doc/usage/cmd/cbsysinfo.rst
@@ -23,3 +23,102 @@
::
=> cbsysinfo
+ Coreboot table at 500, size 5c4, records 1d (dec 29), decoded to 000000007dce4520, forwarded to 000000007ff9a000
+
+ CPU KHz : 0
+ Serial I/O port: 00000000
+ base : 00000000
+ pointer : 000000007ff9a370
+ type : 1
+ base : 000003f8
+ baud : 0d115200
+ regwidth : 1
+ input_hz : 0d1843200
+ PCI addr : 00000010
+ Mem ranges : 7
+ id: type || base || size
+ 0: 10:table 0000000000000000 0000000000001000
+ 1: 01:ram 0000000000001000 000000000009f000
+ 2: 02:reserved 00000000000a0000 0000000000060000
+ 3: 01:ram 0000000000100000 000000007fe6d000
+ 4: 10:table 000000007ff6d000 0000000000093000
+ 5: 02:reserved 00000000fec00000 0000000000001000
+ 6: 02:reserved 00000000ff800000 0000000000800000
+ option_table: 000000007ff9a018
+ Bit Len Cfg ID Name
+ 0 180 r 0 reserved_memory
+ 180 1 e 4 boot_option 0:Fallback 1:Normal
+ 184 4 h 0 reboot_counter
+ 190 8 r 0 reserved_century
+ 1b8 8 r 0 reserved_ibm_ps2_century
+ 1c0 1 e 1 power_on_after_fail 0:Disable 1:Enable
+ 1c4 4 e 6 debug_level 5:Notice 6:Info 7:Debug 8:Spew
+ 1d0 80 r 0 vbnv
+ 3f0 10 h 0 check_sum
+ CMOS start : 1c0
+ CMOS end : 1cf
+ CMOS csum loc: 3f0
+ VBNV start : ffffffff
+ VBNV size : ffffffff
+ CB version : 4.21-5-g7e6eae9679e3-dirty
+ Extra :
+ Build : Thu Sep 07 14:52:41 UTC 2023
+ Time : 14:52:41
+ Framebuffer : 000000007ff9a410
+ Phys addr : fd000000
+ X res : 0d800
+ X res : 0d600
+ Bytes / line: c80
+ Bpp : 0d32
+ pos/size red 16/8, green 8/8, blue 0/8, reserved 24/8
+ GPIOs : 0
+ id: port polarity val name
+ MACs : 0d10
+ 0: 12:00:00:00:28:00
+ 1: 00:00:00:fd:00:00
+ 2: 20:03:00:00:58:02
+ 3: 80:0c:00:00:20:10
+ 4: 08:00:08:18:08:00
+ 5: 16:00:00:00:10:00
+ 6: 00:d0:fd:7f:00:00
+ 7: 17:00:00:00:10:00
+ 8: 00:e0:fd:7f:00:00
+ 9: 37:00:00:00:10:00
+ Multiboot tab: 0000000000000000
+ CB header : 000000007ff9a000
+ CB mainboard: 000000007ff9a344
+ vendor : 0: Emulation
+ part_number : 10: QEMU x86 i440fx/piix4
+ vboot handoff: 0000000000000000
+ size : 0
+ vdat addr : 0000000000000000
+ size : 0
+ SMBIOS : 7ff6d000
+ size : 8000
+ ROM MTRR : 0
+ Tstamp table: 000000007ffdd000
+ CBmem cons : 000000007ffde000
+ Size : 1fff8
+ Cursor : 3332
+ MRC cache : 0000000000000000
+ ACPI GNVS : 0000000000000000
+ Board ID : ffffffff
+ RAM code : ffffffff
+ WiFi calib : 0000000000000000
+ Ramoops buff: 0
+ size : 0
+ SF size : 0
+ SF sector : 0
+ SF erase cmd: 0
+ FMAP offset : 0
+ CBFS offset : 200
+ CBFS size : 3ffe00
+ Boot media size: 400000
+ MTC start : 0
+ MTC size : 0
+ Chrome OS VPD: 0000000000000000
+ RSDP : 000000007ff75000
+ Unimpl. : 10 37 40
+ =>
+
+Note that "Unimpl." shows tags which U-Boot does not currently implement.
diff --git a/doc/usage/cmd/cedit.rst b/doc/usage/cmd/cedit.rst
index f29f1b3..e54ea20 100644
--- a/doc/usage/cmd/cedit.rst
+++ b/doc/usage/cmd/cedit.rst
@@ -18,6 +18,7 @@
cedit write_env [-v]
cedit read_env [-v]
cedit write_cmos [-v] [dev]
+ cedit cb_load
Description
-----------
@@ -92,6 +93,13 @@
Normally the first RTC device is used to hold the data. You can specify a
different device by name using the `dev` parameter.
+.. _cedit_cb_load:
+
+cedit cb_load
+~~~~~~~~~~~~~
+
+This is supported only on x86 devices booted from coreboot. It creates a new
+configuration editor which can be used to edit CMOS settings.
Example
-------
@@ -158,3 +166,71 @@
=> cedit write_cmos rtc@43
=>
+
+This example shows editing coreboot CMOS-RAM settings. A script could be used
+to automate this::
+
+ => cbsysinfo
+ Coreboot table at 500, size 5c4, records 1d (dec 29), decoded to 000000007dce3f40, forwarded to 000000007ff9a000
+
+ CPU KHz : 0
+ Serial I/O port: 00000000
+ base : 00000000
+ pointer : 000000007ff9a370
+ type : 1
+ base : 000003f8
+ baud : 0d115200
+ regwidth : 1
+ input_hz : 0d1843200
+ PCI addr : 00000010
+ Mem ranges : 7
+ id: type || base || size
+ 0: 10:table 0000000000000000 0000000000001000
+ 1: 01:ram 0000000000001000 000000000009f000
+ 2: 02:reserved 00000000000a0000 0000000000060000
+ 3: 01:ram 0000000000100000 000000007fe6d000
+ 4: 10:table 000000007ff6d000 0000000000093000
+ 5: 02:reserved 00000000fec00000 0000000000001000
+ 6: 02:reserved 00000000ff800000 0000000000800000
+ option_table: 000000007ff9a018
+ Bit Len Cfg ID Name
+ 0 180 r 0 reserved_memory
+ 180 1 e 4 boot_option 0:Fallback 1:Normal
+ 184 4 h 0 reboot_counter
+ 190 8 r 0 reserved_century
+ 1b8 8 r 0 reserved_ibm_ps2_century
+ 1c0 1 e 1 power_on_after_fail 0:Disable 1:Enable
+ 1c4 4 e 6 debug_level 5:Notice 6:Info 7:Debug 8:Spew
+ 1d0 80 r 0 vbnv
+ 3f0 10 h 0 check_sum
+ CMOS start : 1c0
+ CMOS end : 1cf
+ CMOS csum loc: 3f0
+ VBNV start : ffffffff
+ VBNV size : ffffffff
+ ...
+ Unimpl. : 10 37 40
+
+Check that the CMOS RAM checksum is correct, then create a configuration editor
+and load the settings from CMOS RAM::
+
+ => cbcmos check
+ => cedit cb
+ => cedit read_cmos
+
+Now run the cedit. In this case the user selected 'save' so `cedit run` returns
+success::
+
+ => if cedit run; then cedit write_cmos -v; fi
+ Write 2 bytes from offset 30 to 38
+ => echo $?
+ 0
+
+Update the checksum in CMOS RAM::
+
+ => cbcmos check
+ Checksum 6100 error: calculated 7100
+ => cbcmos update
+ Checksum 7100 written
+ => cbcmos check
+ =>
diff --git a/doc/usage/cmd/sb.rst b/doc/usage/cmd/sb.rst
new file mode 100644
index 0000000..37431af
--- /dev/null
+++ b/doc/usage/cmd/sb.rst
@@ -0,0 +1,79 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+ single: sbi (command)
+
+sbi command
+===========
+
+Synopsis
+--------
+
+::
+
+ sb handoff
+ sb map
+ sb state
+
+Description
+-----------
+
+The *sb* command is used to display information about sandbox's internal
+operation. See :doc:`/arch/sandbox/index` for more information.
+
+sb handoff
+~~~~~~~~~~
+
+This shows information about any handoff information received from SPL. If
+U-Boot is started from an SPL build, it shows a valid magic number.
+
+sb map
+~~~~~~
+
+This shows any mappings between sandbox's emulated RAM and the underlying host
+address-space.
+
+Fields shown are:
+
+Addr
+ Address in emulated RAM
+
+Mapping
+ Equivalent address in the host address-space. While sandbox requests address
+ ``0x10000000`` from the OS, this is not always available.
+
+Refcnt
+ Shows the number of references to this mapping.
+
+sb state
+~~~~~~~~
+
+This shows basic information about the sandbox state, currently just the
+command-line with which sandbox was started.
+
+Example
+-------
+
+This shows checking for the presence of SPL-handoff information. For this to
+work, ``u-boot-spl`` must be run, with build that enables ``CONFIG_SPL``, such
+as ``sandbox_spl``::
+
+ => sb handoff
+ SPL handoff magic 14f93c7b
+
+This shows output from the *sb map* subcommand, with a single mapping::
+
+ Sandbox memory-mapping
+ Addr Mapping Refcnt
+ ff000000 000056185b46d6d0 2
+
+This shows output from the *sb state* subcommand::
+
+ => sb state
+ Arguments:
+ /tmp/b/sandbox/u-boot -D
+
+Configuration
+-------------
+
+The *sb handoff* command is only supported if CONFIG_HANDOFF is enabled.
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index db71711..cb7a23f 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -43,6 +43,7 @@
cmd/bootz
cmd/button
cmd/cat
+ cmd/cbcmos
cmd/cbsysinfo
cmd/cedit
cmd/cli
@@ -103,6 +104,7 @@
cmd/reset
cmd/rng
cmd/saves
+ cmd/sb
cmd/sbi
cmd/scmi
cmd/scp03
diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c
index 2fd794f..23392d3 100644
--- a/drivers/bios_emulator/besys.c
+++ b/drivers/bios_emulator/besys.c
@@ -49,6 +49,7 @@
#define __io
#include <asm/io.h>
+#include <pci.h>
#include "biosemui.h"
/*------------------------- Global Variables ------------------------------*/
@@ -434,32 +435,27 @@
if ((function == _BE_env.vgaInfo.function) &&
(device == _BE_env.vgaInfo.device) &&
(bus == _BE_env.vgaInfo.bus)) {
+ pci_dev_t bdf = PCI_BDF(bus, device, function);
switch (func) {
case REG_READ_BYTE:
- pci_read_config_byte(_BE_env.vgaInfo.pcidev, regOffset,
- &val8);
+ pci_read_config_byte(bdf, regOffset, &val8);
return val8;
case REG_READ_WORD:
- pci_read_config_word(_BE_env.vgaInfo.pcidev, regOffset,
- &val16);
+ pci_read_config_word(bdf, regOffset, &val16);
return val16;
case REG_READ_DWORD:
- pci_read_config_dword(_BE_env.vgaInfo.pcidev, regOffset,
- &val32);
+ pci_read_config_dword(bdf, regOffset, &val32);
return val32;
case REG_WRITE_BYTE:
- pci_write_config_byte(_BE_env.vgaInfo.pcidev, regOffset,
- value);
+ pci_write_config_byte(bdf, regOffset, value);
return 0;
case REG_WRITE_WORD:
- pci_write_config_word(_BE_env.vgaInfo.pcidev, regOffset,
- value);
+ pci_write_config_word(bdf, regOffset, value);
return 0;
case REG_WRITE_DWORD:
- pci_write_config_dword(_BE_env.vgaInfo.pcidev,
- regOffset, value);
+ pci_write_config_dword(bdf, regOffset, value);
return 0;
}
diff --git a/drivers/bios_emulator/include/x86emu.h b/drivers/bios_emulator/include/x86emu.h
index d2650a8..cfdcd7b 100644
--- a/drivers/bios_emulator/include/x86emu.h
+++ b/drivers/bios_emulator/include/x86emu.h
@@ -54,7 +54,7 @@
#if defined(CONFIG_ARM)
#define GAS_LINE_COMMENT "@"
-#elif defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_X86)
+#elif defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_X86) || defined(CONFIG_RISCV)
#define GAS_LINE_COMMENT "#"
#elif defined (CONFIG_SH)
#define GAS_LINE_COMMENT "!"
diff --git a/drivers/cache/cache-sifive-ccache.c b/drivers/cache/cache-sifive-ccache.c
index cc00b80..2ff5ca7 100644
--- a/drivers/cache/cache-sifive-ccache.c
+++ b/drivers/cache/cache-sifive-ccache.c
@@ -14,8 +14,17 @@
#define SIFIVE_CCACHE_WAY_ENABLE 0x008
+#define SIFIVE_CCACHE_TRUNKCLOCKGATE 0x1000
+#define SIFIVE_CCACHE_TRUNKCLOCKGATE_DISABLE BIT(0)
+#define SIFIVE_CCACHE_REGIONCLOCKGATE_DISABLE BIT(1)
+
struct sifive_ccache {
void __iomem *base;
+ bool has_cg;
+};
+
+struct sifive_ccache_quirks {
+ bool has_cg;
};
static int sifive_ccache_enable(struct udevice *dev)
@@ -30,6 +39,14 @@
writel(ways - 1, priv->base + SIFIVE_CCACHE_WAY_ENABLE);
+ if (priv->has_cg) {
+ /* enable clock gating bits */
+ config = readl(priv->base + SIFIVE_CCACHE_TRUNKCLOCKGATE);
+ config &= ~(SIFIVE_CCACHE_TRUNKCLOCKGATE_DISABLE |
+ SIFIVE_CCACHE_REGIONCLOCKGATE_DISABLE);
+ writel(config, priv->base + SIFIVE_CCACHE_TRUNKCLOCKGATE);
+ }
+
return 0;
}
@@ -50,7 +67,9 @@
static int sifive_ccache_probe(struct udevice *dev)
{
struct sifive_ccache *priv = dev_get_priv(dev);
+ const struct sifive_ccache_quirks *quirk = (void *)dev_get_driver_data(dev);
+ priv->has_cg = quirk->has_cg;
priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -EINVAL;
@@ -58,10 +77,18 @@
return 0;
}
+static const struct sifive_ccache_quirks fu540_ccache = {
+ .has_cg = false,
+};
+
+static const struct sifive_ccache_quirks ccache0 = {
+ .has_cg = true,
+};
+
static const struct udevice_id sifive_ccache_ids[] = {
- { .compatible = "sifive,fu540-c000-ccache" },
- { .compatible = "sifive,fu740-c000-ccache" },
- { .compatible = "sifive,ccache0" },
+ { .compatible = "sifive,fu540-c000-ccache", .data = (ulong)&fu540_ccache },
+ { .compatible = "sifive,fu740-c000-ccache", .data = (ulong)&fu540_ccache },
+ { .compatible = "sifive,ccache0", .data = (ulong)&ccache0 },
{}
};
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c
index 4f1dfbc..aa38c0f 100644
--- a/drivers/clk/renesas/clk-rcar-gen3.c
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -579,23 +579,24 @@
struct cpg_mssr_info *info =
(struct cpg_mssr_info *)dev_get_driver_data(parent);
struct udevice *cdev, *rdev;
- struct driver *drv;
+ struct driver *cdrv, *rdrv;
int ret;
- drv = lists_driver_lookup_name("clk_gen3");
- if (!drv)
+ cdrv = lists_driver_lookup_name("clk_gen3");
+ if (!cdrv)
return -ENOENT;
- ret = device_bind_with_driver_data(parent, drv, "clk_gen3", (ulong)info,
+
+ rdrv = lists_driver_lookup_name("rst_gen3");
+ if (!rdrv)
+ return -ENOENT;
+
+ ret = device_bind_with_driver_data(parent, cdrv, "clk_gen3", (ulong)info,
dev_ofnode(parent), &cdev);
if (ret)
return ret;
- drv = lists_driver_lookup_name("rst_gen3");
- if (!drv)
- return -ENOENT;
-
- ret = device_bind_with_driver_data(parent, drv, "rst_gen3", (ulong)cdev,
+ ret = device_bind_with_driver_data(parent, rdrv, "rst_gen3", (ulong)cdev,
dev_ofnode(parent), &rdev);
if (ret)
device_unbind(cdev);
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 7ae0884..f846a35 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -304,6 +304,17 @@
return uclass_find_device_by_namelen(id, name, strlen(name), devp);
}
+struct udevice *uclass_try_first_device(enum uclass_id id)
+{
+ struct uclass *uc;
+
+ uc = uclass_find(id);
+ if (!uc || list_empty(&uc->dev_head))
+ return NULL;
+
+ return list_first_entry(&uc->dev_head, struct udevice, uclass_node);
+}
+
int uclass_find_next_free_seq(struct uclass *uc)
{
struct udevice *dev;
diff --git a/drivers/iommu/apple_dart.c b/drivers/iommu/apple_dart.c
index 611ac7c..3e9e7819 100644
--- a/drivers/iommu/apple_dart.c
+++ b/drivers/iommu/apple_dart.c
@@ -73,6 +73,8 @@
u64 *l1, *l2;
int bypass, shift;
+ struct lmb io_lmb;
+
dma_addr_t dvabase;
dma_addr_t dvaend;
@@ -123,7 +125,7 @@
off = (phys_addr_t)addr - paddr;
psize = ALIGN(size + off, DART_PAGE_SIZE);
- dva = lmb_alloc(psize, DART_PAGE_SIZE);
+ dva = io_lmb_alloc(&priv->io_lmb, psize, DART_PAGE_SIZE);
idx = dva / DART_PAGE_SIZE;
for (i = 0; i < psize / DART_PAGE_SIZE; i++) {
@@ -159,7 +161,7 @@
(unsigned long)&priv->l2[idx + i]);
priv->flush_tlb(priv);
- lmb_free(dva, psize);
+ io_lmb_free(&priv->io_lmb, dva, psize);
}
static struct iommu_ops apple_dart_ops = {
@@ -173,7 +175,7 @@
dma_addr_t addr;
phys_addr_t l2;
int ntte, nl1, nl2;
- int sid, i;
+ int ret, sid, i;
u32 params2, params4;
priv->base = dev_read_addr_ptr(dev);
@@ -212,7 +214,13 @@
priv->dvabase = DART_PAGE_SIZE;
priv->dvaend = SZ_4G - DART_PAGE_SIZE;
- lmb_add(priv->dvabase, priv->dvaend - priv->dvabase);
+ ret = io_lmb_setup(&priv->io_lmb);
+ if (ret)
+ return ret;
+ ret = io_lmb_add(&priv->io_lmb, priv->dvabase,
+ priv->dvaend - priv->dvabase);
+ if (ret)
+ return -EINVAL;
/* Disable translations. */
for (sid = 0; sid < priv->nsid; sid++)
@@ -294,6 +302,8 @@
}
priv->flush_tlb(priv);
+ io_lmb_teardown(&priv->io_lmb);
+
return 0;
}
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index f5c9868..ec841fb 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -1134,12 +1134,10 @@
offset /= 2;
if (nor->flags & SNOR_F_HAS_STACKED) {
- if (offset >= (mtd->size / 2)) {
- offset = offset - (mtd->size / 2);
+ if (offset >= (mtd->size / 2))
nor->spi->flags |= SPI_XFER_U_PAGE;
- } else {
+ else
nor->spi->flags &= ~SPI_XFER_U_PAGE;
- }
}
#ifdef CONFIG_SPI_FLASH_BAR
ret = write_bar(nor, addr);
@@ -1588,23 +1586,22 @@
dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len);
if ((nor->flags & SNOR_F_HAS_PARALLEL) && (offset & 1)) {
- /* We can hit this case when we use file system like ubifs */
+ /* We can hit this case when we use file system like ubifs */
from--;
len++;
is_ofst_odd = true;
}
while (len) {
- if (nor->addr_width == 3) {
- if (nor->flags & SNOR_F_HAS_PARALLEL) {
- bank = (u32)from / (SZ_16M << 0x01);
- rem_bank_len = ((SZ_16M << 0x01) *
- (bank + 1)) - from;
- } else {
- bank = (u32)from / SZ_16M;
- rem_bank_len = (SZ_16M * (bank + 1)) - from;
- }
- }
+ bank = (u32)from / SZ_16M;
+ if (nor->flags & SNOR_F_HAS_PARALLEL)
+ bank /= 2;
+
+ rem_bank_len = SZ_16M * (bank + 1);
+ if (nor->flags & SNOR_F_HAS_PARALLEL)
+ rem_bank_len *= 2;
+ rem_bank_len -= from;
+
offset = from;
if (nor->flags & SNOR_F_HAS_STACKED) {
@@ -1619,13 +1616,11 @@
if (nor->flags & SNOR_F_HAS_PARALLEL)
offset /= 2;
- if (nor->addr_width == 3) {
#ifdef CONFIG_SPI_FLASH_BAR
- ret = write_bar(nor, offset);
- if (ret < 0)
- return log_ret(ret);
+ ret = write_bar(nor, offset);
+ if (ret < 0)
+ return log_ret(ret);
#endif
- }
if (len < rem_bank_len)
read_len = len;
@@ -1635,10 +1630,6 @@
if (read_len == 0)
return -EIO;
- ret = spi_nor_wait_till_ready(nor);
- if (ret)
- goto read_err;
-
ret = nor->read(nor, offset, read_len, buf);
if (ret == 0) {
/* We shouldn't see 0-length reads */
@@ -1977,9 +1968,9 @@
return ret;
*retlen += 1; /* We've written only one actual byte */
- ++buf;
- --len;
- ++to;
+ buf++;
+ len--;
+ to++;
}
for (i = 0; i < len; ) {
@@ -1999,7 +1990,7 @@
page_offset = do_div(aux, nor->page_size);
}
- offset = (to + i);
+ offset = to + i;
if (nor->flags & SNOR_F_HAS_PARALLEL)
offset /= 2;
@@ -2012,21 +2003,16 @@
}
}
- if (nor->addr_width == 3) {
#ifdef CONFIG_SPI_FLASH_BAR
- ret = write_bar(nor, offset);
- if (ret < 0)
- return ret;
+ ret = write_bar(nor, offset);
+ if (ret < 0)
+ return ret;
#endif
- }
+
/* the size of data remaining on the first page */
page_remain = min_t(size_t,
nor->page_size - page_offset, len - i);
- ret = spi_nor_wait_till_ready(nor);
- if (ret)
- goto write_err;
-
write_enable(nor);
/*
* On DTR capable flashes like Micron Xcella the writes cannot
@@ -2086,10 +2072,6 @@
if (ret)
goto write_err;
- ret = write_disable(nor);
- if (ret)
- goto write_err;
-
*retlen += written;
i += written;
}
@@ -2130,10 +2112,6 @@
if (ret)
return ret;
- ret = write_disable(nor);
- if (ret)
- return ret;
-
ret = read_sr(nor);
if (!(ret > 0 && (ret & SR_QUAD_EN_MX))) {
dev_err(nor->dev, "Macronix Quad bit not set\n");
@@ -2195,7 +2173,7 @@
return -EINVAL;
}
- return write_disable(nor);
+ return 0;
}
#endif
@@ -3069,13 +3047,6 @@
const struct flash_info *info,
struct spi_nor_flash_parameter *params)
{
-#if CONFIG_IS_ENABLED(DM_SPI) && CONFIG_IS_ENABLED(SPI_ADVANCE)
- struct udevice *dev = nor->spi->dev;
- u64 flash_size[SNOR_FLASH_CNT_MAX] = {0};
- u32 idx = 0, i = 0;
- int rc;
-#endif
-
/* Set legacy flash parameters as default. */
memset(params, 0, sizeof(*params));
@@ -3194,62 +3165,71 @@
spi_nor_post_sfdp_fixups(nor, params);
}
-#if CONFIG_IS_ENABLED(DM_SPI) && CONFIG_IS_ENABLED(SPI_ADVANCE)
- /*
- * The flashes that are connected in stacked mode should be of same make.
- * Except the flash size all other properties are identical for all the
- * flashes connected in stacked mode.
- * The flashes that are connected in parallel mode should be identical.
- */
- while (i < SNOR_FLASH_CNT_MAX) {
- rc = ofnode_read_u64_index(dev_ofnode(dev), "stacked-memories",
- idx, &flash_size[i]);
- if (rc == -EINVAL) {
- break;
- } else if (rc == -EOVERFLOW) {
- idx++;
- } else {
- idx++;
- i++;
- if (!(nor->flags & SNOR_F_HAS_STACKED))
- nor->flags |= SNOR_F_HAS_STACKED;
- if (!(nor->spi->flags & SPI_XFER_STACKED))
- nor->spi->flags |= SPI_XFER_STACKED;
+
+#if CONFIG_IS_ENABLED(DM_SPI)
+ if (CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL)) {
+ u64 flash_size[SNOR_FLASH_CNT_MAX] = { 0 };
+ struct udevice *dev = nor->spi->dev;
+ u32 idx = 0, i = 0;
+ int rc;
+
+ /*
+ * The flashes that are connected in stacked mode should be of same make.
+ * Except the flash size all other properties are identical for all the
+ * flashes connected in stacked mode.
+ * The flashes that are connected in parallel mode should be identical.
+ */
+ while (i < SNOR_FLASH_CNT_MAX) {
+ rc = ofnode_read_u64_index(dev_ofnode(dev), "stacked-memories",
+ idx, &flash_size[i]);
+ if (rc == -EINVAL) {
+ break;
+ } else if (rc == -EOVERFLOW) {
+ idx++;
+ } else {
+ idx++;
+ i++;
+ if (!(nor->flags & SNOR_F_HAS_STACKED))
+ nor->flags |= SNOR_F_HAS_STACKED;
+ if (!(nor->spi->flags & SPI_XFER_STACKED))
+ nor->spi->flags |= SPI_XFER_STACKED;
+ }
}
- }
- i = 0;
- idx = 0;
- while (i < SNOR_FLASH_CNT_MAX) {
- rc = ofnode_read_u64_index(dev_ofnode(dev), "parallel-memories",
- idx, &flash_size[i]);
- if (rc == -EINVAL) {
- break;
- } else if (rc == -EOVERFLOW) {
- idx++;
- } else {
- idx++;
- i++;
- if (!(nor->flags & SNOR_F_HAS_PARALLEL))
- nor->flags |= SNOR_F_HAS_PARALLEL;
+ i = 0;
+ idx = 0;
+ while (i < SNOR_FLASH_CNT_MAX) {
+ rc = ofnode_read_u64_index(dev_ofnode(dev), "parallel-memories",
+ idx, &flash_size[i]);
+ if (rc == -EINVAL) {
+ break;
+ } else if (rc == -EOVERFLOW) {
+ idx++;
+ } else {
+ idx++;
+ i++;
+ if (!(nor->flags & SNOR_F_HAS_PARALLEL))
+ nor->flags |= SNOR_F_HAS_PARALLEL;
+ }
}
- }
- if (nor->flags & (SNOR_F_HAS_STACKED | SNOR_F_HAS_PARALLEL)) {
- params->size = 0;
- for (idx = 0; idx < SNOR_FLASH_CNT_MAX; idx++)
- params->size += flash_size[idx];
- }
- /*
- * In parallel-memories the erase operation is
- * performed on both the flashes simultaneously
- * so, double the erasesize.
- */
- if (nor->flags & SNOR_F_HAS_PARALLEL) {
- nor->mtd.erasesize <<= 1;
- params->page_size <<= 1;
+ if (nor->flags & (SNOR_F_HAS_STACKED | SNOR_F_HAS_PARALLEL)) {
+ params->size = 0;
+ for (idx = 0; idx < SNOR_FLASH_CNT_MAX; idx++)
+ params->size += flash_size[idx];
+ }
+ /*
+ * In parallel-memories the erase operation is
+ * performed on both the flashes simultaneously
+ * so, double the erasesize.
+ */
+ if (nor->flags & SNOR_F_HAS_PARALLEL) {
+ nor->mtd.erasesize <<= 1;
+ params->page_size <<= 1;
+ }
}
#endif
+
spi_nor_late_init_fixups(nor, params);
return 0;
@@ -3599,19 +3579,6 @@
mtd->erasesize = info->sector_size;
}
- if ((JEDEC_MFR(info) == SNOR_MFR_SST) && info->flags & SECT_4K) {
- nor->erase_opcode = SPINOR_OP_BE_4K;
- /*
- * In parallel-memories the erase operation is
- * performed on both the flashes simultaneously
- * so, double the erasesize.
- */
- if (nor->flags & SNOR_F_HAS_PARALLEL)
- mtd->erasesize = 4096 * 2;
- else
- mtd->erasesize = 4096;
- }
-
return 0;
}
@@ -4606,7 +4573,6 @@
#else
/* Configure the BAR - discover bank cmds and read current bank */
nor->addr_width = 3;
- set_4byte(nor, info, 0);
ret = read_bar(nor, info);
if (ret < 0)
return ret;
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index a1d53cf..6ee7dc1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -127,6 +127,14 @@
This option is an SPL-variant of the PINCTRL_GENERIC option.
See the help of PINCTRL_GENERIC for details.
+config TPL_PINCTRL_GENERIC
+ bool "Support generic pin controllers in TPL"
+ depends on TPL_PINCTRL_FULL
+ default y
+ help
+ This option is a TPL-variant of the PINCTRL_GENERIC option.
+ See the help of PINCTRL_GENERIC for details.
+
config SPL_PINMUX
bool "Support pin multiplexing controllers in SPL"
depends on SPL_PINCTRL_GENERIC
diff --git a/drivers/pinctrl/rockchip/Kconfig b/drivers/pinctrl/rockchip/Kconfig
index dc4ba34..8aa9dca 100644
--- a/drivers/pinctrl/rockchip/Kconfig
+++ b/drivers/pinctrl/rockchip/Kconfig
@@ -14,4 +14,11 @@
help
This option is an SPL-variant of the PINCTRL_ROCKCHIP option.
+config TPL_PINCTRL_ROCKCHIP
+ bool "Support Rockchip pin controllers in TPL"
+ depends on ARCH_ROCKCHIP && TPL_PINCTRL_GENERIC
+ default y
+ help
+ This option is a TPL-variant of the PINCTRL_ROCKCHIP option.
+
endif
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index 51cacf3..bcdeda9 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -309,6 +309,7 @@
((unsigned long)pccb->pdata[5] << 16) |
((unsigned long)pccb->pdata[6] << 8) |
((unsigned long)pccb->pdata[7]);
+ *capacity += 1;
return 0;
}
@@ -332,6 +333,7 @@
((uint64_t)pccb->pdata[5] << 16) |
((uint64_t)pccb->pdata[6] << 8) |
((uint64_t)pccb->pdata[7]);
+ *capacity += 1;
*blksz = ((uint64_t)pccb->pdata[8] << 56) |
((uint64_t)pccb->pdata[9] << 48) |
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index fa817ec..fd5cb36 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -20,12 +20,6 @@
if SPI
-config SPI_ADVANCE
- bool "Enable the advance feature"
- help
- Enable the SPI advance feature support. By default this is disabled.
- If you intend to use the advance feature support you should enable.
-
config DM_SPI
bool "Enable Driver Model for SPI drivers"
depends on DM
@@ -615,6 +609,12 @@
This option is used to enable ZynqMP QSPI controller driver which
is used to communicate with qspi flash devices.
+config SPI_STACKED_PARALLEL
+ bool "Enable support for stacked or parallel memories"
+ help
+ Enable support for stacked/or parallel memories. This functionality
+ may appear on Xilinx hardware. By default this is disabled.
+
endif # if DM_SPI
config FSL_ESPI
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 4aad324..e43dbb4 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -813,7 +813,7 @@
priv->is_parallel = false;
priv->is_stacked = false;
- slave->flags &= ~SPI_XFER_MASK;
+ slave->flags &= ~SPI_XFER_LOWER;
spi_release_bus(slave);
return 0;
diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index 1d19b26..4251bf2 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -870,8 +870,8 @@
priv->bus = 0;
if (priv->is_parallel) {
- if (slave->flags & SPI_XFER_MASK)
- priv->bus = (slave->flags & SPI_XFER_MASK) >> 8;
+ if (slave->flags & SPI_XFER_LOWER)
+ priv->bus = 1;
if (zynqmp_qspi_update_stripe(op))
priv->stripe = 1;
}
@@ -890,7 +890,7 @@
zynqmp_qspi_chipselect(priv, 0);
priv->is_parallel = false;
- slave->flags &= ~SPI_XFER_MASK;
+ slave->flags &= ~SPI_XFER_LOWER;
return ret;
}
diff --git a/drivers/video/vesa.c b/drivers/video/vesa.c
index ab756ac..e96f674 100644
--- a/drivers/video/vesa.c
+++ b/drivers/video/vesa.c
@@ -8,21 +8,26 @@
#include <pci.h>
#include <vesa.h>
#include <video.h>
+#if defined(CONFIG_X86)
#include <asm/mtrr.h>
+#endif
static int vesa_video_probe(struct udevice *dev)
{
- struct video_uc_plat *plat = dev_get_uclass_plat(dev);
- ulong fbbase;
int ret;
ret = vesa_setup_video(dev, NULL);
if (ret)
return log_ret(ret);
+#if defined(CONFIG_X86)
+ struct video_uc_plat *plat = dev_get_uclass_plat(dev);
+ ulong fbbase;
+
/* Use write-combining for the graphics memory, 256MB */
fbbase = IS_ENABLED(CONFIG_VIDEO_COPY) ? plat->copy_base : plat->base;
mtrr_set_next_var(MTRR_TYPE_WRCOMB, fbbase, 256 << 20);
+#endif
return 0;
}
diff --git a/dts/upstream/src/arm/nxp/imx/imx6dl-dhcom-pdk2.dts b/dts/upstream/src/arm/nxp/imx/imx6dl-dhcom-pdk2.dts
new file mode 100644
index 0000000..3823592
--- /dev/null
+++ b/dts/upstream/src/arm/nxp/imx/imx6dl-dhcom-pdk2.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2024 Marek Vasut <marex@denx.de>
+ *
+ * DHCOM iMX6 variant:
+ * DHCM-iMX6DL-C080-R102-F0819-E-SD-RTC-T-HS-I-01D2
+ * DHCOM PCB number: 493-400 or newer
+ * PDK2 PCB number: 516-400 or newer
+ */
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-dhcom-som.dtsi"
+#include "imx6qdl-dhcom-pdk2.dtsi"
+
+/ {
+ model = "DH electronics i.MX6DL DHCOM on Premium Developer Kit (2)";
+ compatible = "dh,imx6dl-dhcom-pdk2", "dh,imx6dl-dhcom-som",
+ "fsl,imx6dl";
+};
diff --git a/dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts b/dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts
new file mode 100644
index 0000000..cb81ba3
--- /dev/null
+++ b/dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include "rk3328-nanopi-r2s.dts"
+
+/ {
+ compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328";
+ model = "FriendlyElec NanoPi R2S Plus";
+
+ aliases {
+ mmc1 = &emmc;
+ };
+};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ mmc-hs200-1_8v;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ supports-emmc;
+ status = "okay";
+};
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts
index 6a99816..e601d92 100644
--- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts
+++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts
@@ -6,49 +6,474 @@
/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include "rk3568.dtsi"
/ {
model = "Qnap TS-433-4G NAS System 4-Bay";
compatible = "qnap,ts433", "rockchip,rk3568";
+
+ aliases {
+ ethernet0 = &gmac0;
+ mmc0 = &sdhci;
+ rtc0 = &rtc_rv8263;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <©_button_pin>, <&reset_button_pin>;
+ pinctrl-names = "default";
+
+ key-copy {
+ label = "copy";
+ gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_COPY>;
+ };
+
+ key-reset {
+ label = "reset";
+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_DISK;
+ gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "disk-activity";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd1_led_pin>;
+ };
+
+ led-1 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_DISK;
+ gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "disk-activity";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd2_led_pin>;
+ };
+
+ led-2 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_DISK;
+ gpios = <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "disk-activity";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd3_led_pin>;
+ };
+
+ led-3 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_DISK;
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "disk-activity";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd4_led_pin>;
+ };
+ };
+
+ dc_12v: regulator-dc-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc3v3_pcie: regulator-vcc3v3-pcie {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc3v3_sys: regulator-vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_host: regulator-vcc5v0-host {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vcc5v0_host";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
+ vcc5v0_otg: regulator-vcc5v0-otg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_otg_en>;
+ regulator-name = "vcc5v0_otg";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
+ vcc5v0_sys: regulator-vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_usb: regulator-vcc5v0-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+};
+
+/* connected to usb_host0_xhci */
+&combphy0 {
+ status = "okay";
+};
+
+/* connected to sata1 */
+&combphy1 {
+ status = "okay";
+};
+
+/* connected to sata2 */
+&combphy2 {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpu>;
};
+&cpu1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-handle = <&rgmii_phy0>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
- rx_delay = <0x2f>;
- tx_delay = <0x3c>;
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&i2c0 {
+ status = "okay";
+
pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ system-power-controller;
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ wakeup-source;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-name = "vdd_gpu";
+ regulator-always-on;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_npu: DCDC_REG4 {
+ regulator-name = "vdd_npu";
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG5 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_image: LDO_REG1 {
+ regulator-name = "vdda0v9_image";
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v9: LDO_REG2 {
+ regulator-name = "vdda_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_pmu: LDO_REG3 {
+ regulator-name = "vdda0v9_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vccio_acodec: LDO_REG4 {
+ regulator-name = "vccio_acodec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG6 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca_1v8: LDO_REG7 {
+ regulator-name = "vcca_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pmu: LDO_REG8 {
+ regulator-name = "vcca1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca1v8_image: LDO_REG9 {
+ regulator-name = "vcca1v8_image";
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3: SWITCH_REG1 {
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sd: SWITCH_REG2 {
+ regulator-name = "vcc3v3_sd";
+ /*
+ * turning this off, breaks access to both
+ * PCIe controllers, refclk generator perhaps
+ */
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+
+ vdd_cpu: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1390000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
};
};
&i2c1 {
status = "okay";
- rtc@51 {
+ rtc_rv8263: rtc@51 {
compatible = "microcrystal,rv8263";
reg = <0x51>;
wakeup-source;
};
+
+ /* eeprom for vital-product-data on the mainboard */
+ eeprom@54 {
+ compatible = "giantec,gt24c04a", "atmel,24c04";
+ reg = <0x54>;
+ label = "VPD_MB";
+ num-addresses = <2>;
+ pagesize = <16>;
+ read-only;
+ };
+
+ /* eeprom for vital-product-data on the backplane */
+ eeprom@56 {
+ compatible = "giantec,gt24c04a", "atmel,24c04";
+ reg = <0x56>;
+ label = "VPD_BP";
+ num-addresses = <2>;
+ pagesize = <16>;
+ read-only;
+ };
};
&mdio0 {
@@ -59,12 +484,82 @@
};
&pcie30phy {
+ data-lanes = <1 2>;
status = "okay";
};
+/* Connected to a JMicron AHCI SATA controller */
&pcie3x1 {
- /* The downstream dts has: rockchip,bifurcation, XXX: find out what this is about */
reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+ status = "okay";
+};
+
+/* Connected to the 2.5G NIC for the upper network jack */
+&pcie3x2 {
+ num-lanes = <1>;
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+ status = "okay";
+};
+
+&pinctrl {
+ keys {
+ copy_button_pin: copy-button-pin {
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ reset_button_pin: reset-button-pin {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ leds {
+ hdd1_led_pin: hdd1-led-pin {
+ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ hdd2_led_pin: hdd2-led-pin {
+ rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ hdd3_led_pin: hdd3-led-pin {
+ rockchip,pins = <1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ hdd4_led_pin: hdd4_led-pin {
+ rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc5v0_otg_en: vcc5v0-otg-en {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ vccio4-supply = <&vcc_1v8>;
+ vccio6-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
status = "okay";
};
@@ -75,6 +570,20 @@
status = "okay";
};
+&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
+/*
+ * Connected to an MCU, that provides access to more LEDs,
+ * buzzer, fan control and more.
+ */
+&uart0 {
+ status = "okay";
+};
+
/*
* Pins available on CN3 connector at TTL voltage level (3V3).
* ,_ _.
@@ -84,3 +593,53 @@
&uart2 {
status = "okay";
};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+/* connected to usb_host0_xhci */
+&usb2phy0_otg {
+ phy-supply = <&vcc5v0_otg>;
+ status = "okay";
+};
+
+&usb2phy1 {
+ status = "okay";
+};
+
+/* connected to usb_host1_ehci/ohci */
+&usb2phy1_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+/* connected to usb_host0_ehci/ohci */
+&usb2phy1_otg {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+/* right port backside */
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+/* front port */
+&usb_host0_xhci {
+ dr_mode = "host";
+ status = "okay";
+};
+
+/* left port backside */
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
diff --git a/dts/upstream/src/arm64/rockchip/rk3588-coolpi-cm5-genbook.dts b/dts/upstream/src/arm64/rockchip/rk3588-coolpi-cm5-genbook.dts
new file mode 100644
index 0000000..6418286
--- /dev/null
+++ b/dts/upstream/src/arm64/rockchip/rk3588-coolpi-cm5-genbook.dts
@@ -0,0 +1,349 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include "rk3588-coolpi-cm5.dtsi"
+
+/ {
+ model = "CoolPi CM5 GenBook";
+ compatible = "coolpi,pi-cm5-genbook", "coolpi,pi-cm5", "rockchip,rk3588";
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&bl_en>;
+ power-supply = <&vcc12v_dcin>;
+ pwms = <&pwm6 0 25000 0>;
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <9800000>;
+ voltage-max-design-microvolt = <4350000>;
+ voltage-min-design-microvolt = <3000000>;
+ };
+
+ charger: dc-charger {
+ compatible = "gpio-charger";
+ charger-type = "mains";
+ gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>;
+ };
+
+ leds: leds {
+ compatible = "gpio-leds";
+
+ heartbeat_led: led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ wlan_led: led-1 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_WLAN;
+ gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ };
+
+ charging_red: led-2 {
+ function = LED_FUNCTION_CHARGING;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc_sys: vcc-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <7000000>;
+ regulator-max-microvolt = <7000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <7000000>;
+ regulator-max-microvolt = <7000000>;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_lcd: vcc3v3-lcd-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_lcd";
+ enable-active-high;
+ gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcdpwr_en>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ vcc5v0_usb: vcc5v0-usb-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-boot-on;
+ regulator-always-on;
+ enable-active-high;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_pwren>;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc5v0_usb_host0: vcc5v0_usb30_host: vcc5v0-usb-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+ regulator-always-on;
+ enable-active-high;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_host_pwren>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+};
+
+&i2c4 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4m3_xfer>;
+
+ cw2015@62 {
+ compatible = "cellwise,cw2015";
+ reg = <0x62>;
+
+ cellwise,battery-profile = /bits/ 8 <
+ 0x17 0x67 0x69 0x63 0x63 0x62 0x62 0x5F
+ 0x52 0x73 0x4C 0x5A 0x5B 0x4B 0x42 0x3A
+ 0x33 0x2D 0x29 0x28 0x2E 0x31 0x3C 0x49
+ 0x2C 0x2C 0x0C 0xCD 0x30 0x51 0x50 0x66
+ 0x74 0x74 0x75 0x78 0x41 0x1B 0x84 0x5F
+ 0x0B 0x34 0x1C 0x45 0x89 0x92 0xA0 0x13
+ 0x2C 0x55 0xAB 0xCB 0x80 0x5E 0x7B 0xCB
+ 0x2F 0x00 0x64 0xA5 0xB5 0x10 0x18 0x21
+ >;
+
+ cellwise,monitor-interval-ms = <3000>;
+ monitored-battery = <&battery>;
+ power-supplies = <&charger>;
+ };
+};
+
+&i2c5 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c5m3_xfer>;
+
+ touchpad: touchpad@2c {
+ compatible = "hid-over-i2c";
+ reg = <0x2c>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <RK_PD6 IRQ_TYPE_LEVEL_LOW>;
+ hid-descr-addr = <0x0020>;
+ };
+};
+
+&gmac0 {
+ status = "disabled";
+};
+
+/* M.2 E-Key */
+&pcie2x1l0 {
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_clkreq &pcie_wake &pcie_rst &wifi_pwron &bt_pwron>;
+ status = "okay";
+};
+
+&pcie2x1l2 {
+ status = "disabled";
+};
+
+&pcie30phy {
+ status = "okay";
+};
+
+/* M.2 M-Key ssd */
+&pcie3x4 {
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+ status = "okay";
+};
+
+&pinctrl {
+ lcd {
+ lcdpwr_en: lcdpwr-en {
+ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ bl_en: bl-en {
+ rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb_pwren: usb-pwren {
+ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ usb_otg_pwren: usb-otg-pwren {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ usb_host_pwren: usb-host-pwren {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ wifi {
+ bt_pwron: bt-pwron {
+ rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ pcie_clkreq: pcie-clkreq {
+ rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ pcie_rst: pcie-rst {
+ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ wifi_pwron: wifi-pwron {
+ rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ pcie_wake: pcie-wake {
+ rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm6 {
+ pinctrl-0 = <&pwm6m1_pins>;
+ status = "okay";
+};
+
+&sdmmc {
+ status = "disabled";
+};
+
+&sfc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspim2_pins>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0x0>;
+ spi-max-frequency = <100000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ phy-supply = <&vcc5v0_usb_host0>;
+ status = "okay";
+};
+
+&u2phy3_host {
+ phy-supply = <&vcc5v0_usb>;
+ status = "okay";
+};
+
+&usbdp_phy1 {
+ status = "okay";
+};
+
+/* For Keypad */
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+/* Type C port */
+&usb_host0_xhci {
+ dr_mode = "peripheral";
+ maximum-speed = "high-speed";
+ status = "okay";
+};
+
+/* connected to a HUB for camera and BT */
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+/* USB A out */
+&usb_host1_xhci {
+ dr_mode = "host";
+ status = "okay";
+};
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 76f7102..cc150cf 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -2046,24 +2046,23 @@
unsigned int fpos = 0;
int status;
loff_t actread;
- struct ext2fs_node *diro = (struct ext2fs_node *) dir;
#ifdef DEBUG
if (name != NULL)
printf("Iterate dir %s\n", name);
#endif /* of DEBUG */
- if (!diro->inode_read) {
- status = ext4fs_read_inode(diro->data, diro->ino, &diro->inode);
+ if (!dir->inode_read) {
+ status = ext4fs_read_inode(dir->data, dir->ino, &dir->inode);
if (status == 0)
return 0;
}
/* Search the file. */
- while (fpos < le32_to_cpu(diro->inode.size)) {
+ while (fpos < le32_to_cpu(dir->inode.size)) {
struct ext2_dirent dirent;
- status = ext4fs_read_file(diro, fpos,
- sizeof(struct ext2_dirent),
- (char *)&dirent, &actread);
+ status = ext4fs_read_file(dir, fpos,
+ sizeof(struct ext2_dirent),
+ (char *)&dirent, &actread);
if (status < 0)
return 0;
@@ -2077,7 +2076,7 @@
struct ext2fs_node *fdiro;
int type = FILETYPE_UNKNOWN;
- status = ext4fs_read_file(diro,
+ status = ext4fs_read_file(dir,
fpos +
sizeof(struct ext2_dirent),
dirent.namelen, filename,
@@ -2089,7 +2088,7 @@
if (!fdiro)
return 0;
- fdiro->data = diro->data;
+ fdiro->data = dir->data;
fdiro->ino = le32_to_cpu(dirent.inode);
filename[dirent.namelen] = '\0';
@@ -2104,7 +2103,7 @@
else if (dirent.filetype == FILETYPE_REG)
type = FILETYPE_REG;
} else {
- status = ext4fs_read_inode(diro->data,
+ status = ext4fs_read_inode(dir->data,
le32_to_cpu
(dirent.inode),
&fdiro->inode);
@@ -2138,35 +2137,6 @@
*fnode = fdiro;
return 1;
}
- } else {
- if (fdiro->inode_read == 0) {
- status = ext4fs_read_inode(diro->data,
- le32_to_cpu(
- dirent.inode),
- &fdiro->inode);
- if (status == 0) {
- free(fdiro);
- return 0;
- }
- fdiro->inode_read = 1;
- }
- switch (type) {
- case FILETYPE_DIRECTORY:
- printf("<DIR> ");
- break;
- case FILETYPE_SYMLINK:
- printf("<SYM> ");
- break;
- case FILETYPE_REG:
- printf(" ");
- break;
- default:
- printf("< ? > ");
- break;
- }
- printf("%10u %s\n",
- le32_to_cpu(fdiro->inode.size),
- filename);
}
free(fdiro);
}
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 15587e9..1727da2 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -21,17 +21,36 @@
*/
#include <blk.h>
+#include <div64.h>
+#include <errno.h>
#include <ext_common.h>
#include <ext4fs.h>
-#include "ext4_common.h"
-#include <div64.h>
#include <malloc.h>
#include <part.h>
#include <u-boot/uuid.h>
+#include "ext4_common.h"
int ext4fs_symlinknest;
struct ext_filesystem ext_fs;
+/**
+ * struct ext4_dir_stream - ext4 directory stream
+ *
+ * @parent: partition data used by fs layer.
+ * This field must be at the beginning of the structure.
+ * All other fields are private to the ext4 driver.
+ * @root: root directory node
+ * @dir: directory node
+ * @dirent: directory stream entry
+ * @fpos: file position in directory
+ */
+struct ext4_dir_stream {
+ struct fs_dir_stream parent;
+ char *dirname;
+ struct fs_dirent dirent;
+ unsigned int fpos;
+};
+
struct ext_filesystem *get_fs(void)
{
return &ext_fs;
@@ -182,39 +201,161 @@
return 0;
}
-int ext4fs_ls(const char *dirname)
+int ext4fs_opendir(const char *dirname, struct fs_dir_stream **dirsp)
{
- struct ext2fs_node *dirnode = NULL;
- int status;
+ struct ext4_dir_stream *dirs;
+ struct ext2fs_node *dir = NULL;
+ int ret;
- if (dirname == NULL)
- return 0;
+ *dirsp = NULL;
- status = ext4fs_find_file(dirname, &ext4fs_root->diropen, &dirnode,
- FILETYPE_DIRECTORY);
- if (status != 1) {
- printf("** Can not find directory. **\n");
- if (dirnode)
- ext4fs_free_node(dirnode, &ext4fs_root->diropen);
- return 1;
+ dirs = calloc(1, sizeof(struct ext4_dir_stream));
+ if (!dirs)
+ return -ENOMEM;
+ dirs->dirname = strdup(dirname);
+ if (!dirs->dirname) {
+ free(dirs);
+ return -ENOMEM;
}
- ext4fs_iterate_dir(dirnode, NULL, NULL, NULL);
- ext4fs_free_node(dirnode, &ext4fs_root->diropen);
+ ret = ext4fs_find_file(dirname, &ext4fs_root->diropen, &dir,
+ FILETYPE_DIRECTORY);
+ if (ret == 1) {
+ ret = 0;
+ *dirsp = (struct fs_dir_stream *)dirs;
+ } else {
+ free(dirs->dirname);
+ free(dirs);
+ ret = -ENOENT;
+ }
- return 0;
+ if (dir)
+ ext4fs_free_node(dir, &ext4fs_root->diropen);
+
+ return ret;
}
+int ext4fs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp)
+{
+ struct ext4_dir_stream *dirs = (struct ext4_dir_stream *)fs_dirs;
+ struct fs_dirent *dent = &dirs->dirent;
+ struct ext2fs_node *dir = NULL;
+ int ret;
+ loff_t actread;
+ struct ext2fs_node fdiro;
+ int len;
+ struct ext2_dirent dirent;
+
+ *dentp = NULL;
+
+ ret = ext4fs_find_file(dirs->dirname, &ext4fs_root->diropen, &dir,
+ FILETYPE_DIRECTORY);
+ if (ret != 1) {
+ ret = -ENOENT;
+ goto out;
+ }
+ if (!dir->inode_read) {
+ ret = ext4fs_read_inode(dir->data, dir->ino, &dir->inode);
+ if (!ret) {
+ ret = -EIO;
+ goto out;
+ }
+ }
+
+ if (dirs->fpos >= le32_to_cpu(dir->inode.size))
+ return -ENOENT;
+
+ memset(dent, 0, sizeof(struct fs_dirent));
+
+ while (dirs->fpos < le32_to_cpu(dir->inode.size)) {
+ ret = ext4fs_read_file(dir, dirs->fpos,
+ sizeof(struct ext2_dirent),
+ (char *)&dirent, &actread);
+ if (ret < 0)
+ return -ret;
+
+ if (!dirent.direntlen)
+ return -EIO;
+
+ if (dirent.namelen)
+ break;
+
+ dirs->fpos += le16_to_cpu(dirent.direntlen);
+ }
+
+ len = min(FS_DIRENT_NAME_LEN - 1, (int)dirent.namelen);
+
+ ret = ext4fs_read_file(dir, dirs->fpos + sizeof(struct ext2_dirent),
+ len, dent->name, &actread);
+ if (ret < 0)
+ goto out;
+ dent->name[len] = '\0';
+
+ fdiro.data = dir->data;
+ fdiro.ino = le32_to_cpu(dirent.inode);
+
+ ret = ext4fs_read_inode(dir->data, fdiro.ino, &fdiro.inode);
+ if (!ret) {
+ ret = -EIO;
+ goto out;
+ }
+
+ switch (le16_to_cpu(fdiro.inode.mode) & FILETYPE_INO_MASK) {
+ case FILETYPE_INO_DIRECTORY:
+ dent->type = FS_DT_DIR;
+ break;
+ case FILETYPE_INO_SYMLINK:
+ dent->type = FS_DT_LNK;
+ break;
+ case FILETYPE_INO_REG:
+ dent->type = FS_DT_REG;
+ break;
+ default:
+ dent->type = FILETYPE_UNKNOWN;
+ }
+
+ rtc_to_tm(fdiro.inode.atime, &dent->access_time);
+ rtc_to_tm(fdiro.inode.ctime, &dent->create_time);
+ rtc_to_tm(fdiro.inode.mtime, &dent->change_time);
+
+ dirs->fpos += le16_to_cpu(dirent.direntlen);
+ dent->size = fdiro.inode.size;
+ *dentp = dent;
+ ret = 0;
+
+out:
+ if (dir)
+ ext4fs_free_node(dir, &ext4fs_root->diropen);
+
+ return ret;
+}
+
+void ext4fs_closedir(struct fs_dir_stream *fs_dirs)
+{
+ struct ext4_dir_stream *dirs = (struct ext4_dir_stream *)fs_dirs;
+
+ if (!dirs)
+ return;
+
+ free(dirs->dirname);
+ free(dirs);
+}
+
int ext4fs_exists(const char *filename)
{
struct ext2fs_node *dirnode = NULL;
int filetype;
+ int ret;
if (!filename)
return 0;
- return ext4fs_find_file1(filename, &ext4fs_root->diropen, &dirnode,
- &filetype);
+ ret = ext4fs_find_file1(filename, &ext4fs_root->diropen, &dirnode,
+ &filetype);
+ if (dirnode)
+ ext4fs_free_node(dirnode, &ext4fs_root->diropen);
+
+ return ret;
}
int ext4fs_size(const char *filename, loff_t *size)
diff --git a/fs/fs.c b/fs/fs.c
index e2915e7..1afa0fb 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -220,7 +220,7 @@
.null_dev_desc_ok = false,
.probe = ext4fs_probe,
.close = ext4fs_close,
- .ls = ext4fs_ls,
+ .ls = fs_ls_generic,
.exists = ext4fs_exists,
.size = ext4fs_size,
.read = ext4_read_file,
@@ -232,7 +232,9 @@
.ln = fs_ln_unsupported,
#endif
.uuid = ext4fs_uuid,
- .opendir = fs_opendir_unsupported,
+ .opendir = ext4fs_opendir,
+ .readdir = ext4fs_readdir,
+ .closedir = ext4fs_closedir,
.unlink = fs_unlink_unsupported,
.mkdir = fs_mkdir_unsupported,
},
diff --git a/include/alist.h b/include/alist.h
index 68d268f..b00d9ea 100644
--- a/include/alist.h
+++ b/include/alist.h
@@ -72,6 +72,21 @@
}
/**
+ * alist_calc_index() - Calculate the index of an item in the list
+ *
+ * The returned element number will be -1 if the list is empty or the pointer
+ * pointers to before the list starts.
+ *
+ * If the pointer points to after the last item, the calculated element-number
+ * will be returned, even though it is greater than lst->count
+ *
+ * @lst: alist to check
+ * @ptr: pointer to check
+ * Return: element number of the pointer
+ */
+int alist_calc_index(const struct alist *lst, const void *ptr);
+
+/**
* alist_err() - Check if the alist is still valid
*
* @lst: List to check
@@ -116,7 +131,12 @@
return lst->data + index * lst->obj_size;
}
-/** get an entry as a constant */
+/**
+ * alist_get() - get an entry as a constant
+ *
+ * Use as (to obtain element 2 of the list):
+ * const struct my_struct *ptr = alist_get(lst, 2, struct my_struct)
+ */
#define alist_get(_lst, _index, _struct) \
((const _struct *)alist_get_ptr(_lst, _index))
@@ -151,8 +171,9 @@
* alist_add_placeholder() - Add a new item to the end of the list
*
* @lst: alist to add to
- * Return: Pointer to the newly added position. Note that this is not inited so
- * the caller must copy the requested struct to the returned pointer
+ * Return: Pointer to the newly added position, or NULL if out of memory. Note
+ * that this is not inited so the caller must copy the requested struct to the
+ * returned pointer
*/
void *alist_add_placeholder(struct alist *lst);
@@ -184,7 +205,113 @@
#define alist_add(_lst, _obj) \
((typeof(_obj) *)alist_add_ptr(_lst, &(_obj)))
+/** get next entry as a constant */
+#define alist_next(_lst, _objp) \
+ ((const typeof(_objp))alist_next_ptrd(_lst, _objp))
+
+/** get next entry, which can be written to */
+#define alist_nextw(_lst, _objp) \
+ ((typeof(_objp))alist_next_ptrd(_lst, _objp))
+
+/**
+ * alist_next_ptrd() - Get a pointer to the next list element
+ *
+ * This returns NULL if the requested element is beyond lst->count
+ *
+ * @lst: List to check
+ * @ptr: Pointer to current element (must be valid)
+ * Return: Pointer to next element, or NULL if @ptr is the last
+ */
+const void *alist_next_ptrd(const struct alist *lst, const void *ptr);
+
+/**
+ * alist_chk_ptr() - Check whether a pointer is within a list
+ *
+ * Checks if the pointer points to an existing element of the list. The pointer
+ * must point to the start of an element, either in the list, or just outside of
+ * it. This function is only useful for handling for() loops
+ *
+ * Return: true if @ptr is within the list (0..count-1), else false
+ */
+bool alist_chk_ptr(const struct alist *lst, const void *ptr);
+
+/**
+ * alist_start() - Get the start of the list (first element)
+ *
+ * Note that this will always return ->data even if it is not NULL
+ *
+ * Usage:
+ * const struct my_struct *obj; # 'const' is optional
+ *
+ * alist_start(&lst, struct my_struct)
+ */
+#define alist_start(_lst, _struct) \
+ ((_struct *)(_lst)->data)
+
/**
+ * alist_end() - Get the end of the list (just after last element)
+ *
+ * Usage:
+ * const struct my_struct *obj; # 'const' is optional
+ *
+ * alist_end(&lst, struct my_struct)
+ */
+#define alist_end(_lst, _struct) \
+ ((_struct *)(_lst)->data + (_lst)->count)
+
+/**
+ * alist_for_each() - Iterate over an alist (with constant pointer)
+ *
+ * Use as:
+ * const struct my_struct *obj; # 'const' is optional
+ *
+ * alist_for_each(obj, &lst) {
+ * obj->...
+ * }
+ */
+#define alist_for_each(_pos, _lst) \
+ for (_pos = alist_start(_lst, typeof(*(_pos))); \
+ _pos < alist_end(_lst, typeof(*(_pos))); \
+ _pos++)
+
+/**
+ * alist_for_each_filter() - version which sets up a 'from' pointer too
+ *
+ * This is used for filtering out information in the list. It works by iterating
+ * through the list, copying elements down over the top of elements to be
+ * deleted.
+ *
+ * In this example, 'from' iterates through the list from start to end,, 'to'
+ * also begins at the start, but only increments if the element at 'from' should
+ * be kept. This provides an O(n) filtering operation. Note that
+ * alist_update_end() must be called after the loop, to update the count.
+ *
+ * alist_for_each_filter(from, to, &lst) {
+ * if (from->val != 2)
+ * *to++ = *from;
+ * }
+ * alist_update_end(&lst, to);
+ */
+#define alist_for_each_filter(_pos, _from, _lst) \
+ for (_pos = _from = alist_start(_lst, typeof(*(_pos))); \
+ _pos < alist_end(_lst, typeof(*(_pos))); \
+ _pos++)
+
+/**
+ * alist_update_end() - Set the element count based on a given pointer
+ *
+ * Set the given element as the final one
+ */
+void alist_update_end(struct alist *lst, const void *end);
+
+/**
+ * alist_empty() - Empty an alist
+ *
+ * This removes all entries from the list, without changing the allocated size
+ */
+void alist_empty(struct alist *lst);
+
+/**
* alist_init() - Set up a new object list
*
* Sets up a list of objects, initially empty
@@ -197,6 +324,12 @@
*/
bool alist_init(struct alist *lst, uint obj_size, uint alloc_size);
+/**
+ * alist_init_struct() - Typed version of alist_init()
+ *
+ * Use as:
+ * alist_init(&lst, struct my_struct);
+ */
#define alist_init_struct(_lst, _struct) \
alist_init(_lst, sizeof(_struct), 0)
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index bf593d9..26277b9 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -545,8 +545,10 @@
#if CONFIG_IS_ENABLED(BLOBLIST)
#define gd_bloblist() gd->bloblist
+#define gd_set_bloblist(_val) gd->bloblist = (_val)
#else
#define gd_bloblist() NULL
+#define gd_set_bloblist(_val)
#endif
#if CONFIG_IS_ENABLED(BOOTSTAGE)
diff --git a/include/configs/genbook-cm5-rk3588.h b/include/configs/genbook-cm5-rk3588.h
new file mode 100644
index 0000000..194f974
--- /dev/null
+++ b/include/configs/genbook-cm5-rk3588.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __GENBOOK_CM5_RK3588_H
+#define __GENBOOK_CM5_RK3588_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
+/*
+ * As a laptop, there is no sdmmc, and we want to
+ * set usb the highest boot priority for third-part
+ * os installation.
+ */
+#define BOOT_TARGETS "usb mmc0"
+
+#include <configs/rk3588_common.h>
+
+#endif /* __GENBOOK_CM5_RK3588_H */
diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h
index 53fb8c9..260a504 100644
--- a/include/configs/imx93_evk.h
+++ b/include/configs/imx93_evk.h
@@ -27,6 +27,12 @@
#define BOOTENV
#endif
+#ifdef CONFIG_SYS_MMC_ENV_DEV
+#define IMX93_EVK_MMC_ENV_DEV CONFIG_SYS_MMC_ENV_DEV
+#else
+#define IMX93_EVK_MMC_ENV_DEV 0
+#endif
+
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
@@ -42,7 +48,7 @@
"boot_fit=no\0" \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"bootm_size=0x10000000\0" \
- "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
+ "mmcdev=" __stringify(IMX93_EVK_MMC_ENV_DEV)"\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
"mmcautodetect=yes\0" \
diff --git a/include/configs/qnap_ts433.h b/include/configs/qnap_ts433.h
new file mode 100644
index 0000000..aee4546
--- /dev/null
+++ b/include/configs/qnap_ts433.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __QNAP_TS433_H
+#define __QNAP_TS433_H
+
+#define ROCKCHIP_DEVICE_SETTINGS
+
+#include <configs/rk3568_common.h>
+
+#endif
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 9b8ab3c..d5550a4 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -13,7 +13,9 @@
#ifndef CONFIG_XPL_BUILD
+#ifndef BOOT_TARGETS
#define BOOT_TARGETS "mmc1 mmc0 nvme scsi usb pxe dhcp spi"
+#endif
#ifdef CONFIG_ARM64
#define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0"
diff --git a/include/configs/stm32mp15_dh_dhsom.h b/include/configs/stm32mp15_dh_dhsom.h
index 2797fc6..c004a8c 100644
--- a/include/configs/stm32mp15_dh_dhsom.h
+++ b/include/configs/stm32mp15_dh_dhsom.h
@@ -18,6 +18,8 @@
#endif
#define STM32MP_BOARD_EXTRA_ENV \
+ "dh_preboot=" \
+ "run dh_testbench_backward_compat\0" \
"dh_update_sd_to_emmc=" /* Install U-Boot from SD to eMMC */ \
"setexpr loadaddr1 ${loadaddr} + 0x1000000 && " \
"load mmc 0:4 ${loadaddr1} boot/u-boot-spl.stm32 && " \
@@ -61,7 +63,20 @@
"stdout=serial\0" \
"stderr=serial\0" \
"update_sf=run dh_update_sd_to_sf\0" \
- "usb_pgood_delay=1000\0"
+ "usb_pgood_delay=1000\0" \
+ /* Old testbench-only backward compatibility environment */ \
+ "dh_testbench_backward_compat=" \
+ "test ${board_name} = \"dh,stm32mp15xx-dhcor-testbench\" && " \
+ "run load_bootenv importbootenv\0" \
+ "importbootenv=" \
+ "echo Importing environment from DHupdate.ini...;" \
+ "env import -t ${loadaddr} ${filesize}\0" \
+ "load_bootenv=" \
+ "usb reset && " \
+ "load usb ${usbdev}:${usbpart} ${loadaddr} DHupdate.ini && " \
+ "echo \"--> Update: found DHupdate.ini (${filesize} bytes)\"\0" \
+ "usbdev=0\0" \
+ "usbpart=1\0"
#include <configs/stm32mp15_common.h>
diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h
index a8bd8e2..5cc0166 100644
--- a/include/configs/total_compute.h
+++ b/include/configs/total_compute.h
@@ -11,37 +11,6 @@
/* Link Definitions */
-/* AP non-secure UART base address */
-#define UART0_BASE 0x2A400000
-
-/* PL011 Serial Configuration */
-#define CFG_PL011_CLOCK 7372800
-
-/* Miscellaneous configurable options */
-
-/* Physical Memory Map */
-#define PHYS_SDRAM_1 0x80000000
-/* Top 48MB reserved for secure world use */
-#define DRAM_SEC_SIZE 0x03000000
-#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
-#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
-
-#define PHYS_SDRAM_2 0x8080000000
-#define PHYS_SDRAM_2_SIZE 0x180000000
-
-#define CFG_EXTRA_ENV_SETTINGS \
- "bootm_size=0x20000000\0" \
- "load_addr=0xa0000000\0" \
- "kernel_addr_r=0x80080000\0" \
- "initrd_addr_r=0x88000000\0" \
- "fdt_addr_r=0x83000000\0"
-/*
- * If vbmeta partition is present, boot Android with verification using AVB.
- * Else if system partition is present (no vbmeta partition), boot Android
- * without verification (for development purposes).
- * Else boot FIT image.
- */
-
#define CFG_SYS_FLASH_BASE 0x0C000000
#endif /* __TOTAL_COMPUTE_H */
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 456eef7..c279304 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -436,6 +436,17 @@
struct udevice **devp);
/**
+ * uclass_try_first_device()- See if there is a device for a uclass
+ *
+ * If the uclass exists, this returns the first device on that uclass, without
+ * probing it. If the uclass does not exist, it gives up
+ *
+ * @id: Uclass ID to check
+ * Return: Pointer to device, if found, else NULL
+ */
+struct udevice *uclass_try_first_device(enum uclass_id id);
+
+/**
* uclass_probe_all() - Probe all devices based on an uclass ID
*
* This function probes all devices associated with a uclass by
diff --git a/include/dt-bindings/clock/r9a07g044-cpg.h b/include/dt-bindings/clock/r9a07g044-cpg.h
deleted file mode 100644
index 0bb17ff..0000000
--- a/include/dt-bindings/clock/r9a07g044-cpg.h
+++ /dev/null
@@ -1,220 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- */
-#ifndef __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__
-#define __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__
-
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
-
-/* R9A07G044 CPG Core Clocks */
-#define R9A07G044_CLK_I 0
-#define R9A07G044_CLK_I2 1
-#define R9A07G044_CLK_G 2
-#define R9A07G044_CLK_S0 3
-#define R9A07G044_CLK_S1 4
-#define R9A07G044_CLK_SPI0 5
-#define R9A07G044_CLK_SPI1 6
-#define R9A07G044_CLK_SD0 7
-#define R9A07G044_CLK_SD1 8
-#define R9A07G044_CLK_M0 9
-#define R9A07G044_CLK_M1 10
-#define R9A07G044_CLK_M2 11
-#define R9A07G044_CLK_M3 12
-#define R9A07G044_CLK_M4 13
-#define R9A07G044_CLK_HP 14
-#define R9A07G044_CLK_TSU 15
-#define R9A07G044_CLK_ZT 16
-#define R9A07G044_CLK_P0 17
-#define R9A07G044_CLK_P1 18
-#define R9A07G044_CLK_P2 19
-#define R9A07G044_CLK_AT 20
-#define R9A07G044_OSCCLK 21
-#define R9A07G044_CLK_P0_DIV2 22
-
-/* R9A07G044 Module Clocks */
-#define R9A07G044_CA55_SCLK 0
-#define R9A07G044_CA55_PCLK 1
-#define R9A07G044_CA55_ATCLK 2
-#define R9A07G044_CA55_GICCLK 3
-#define R9A07G044_CA55_PERICLK 4
-#define R9A07G044_CA55_ACLK 5
-#define R9A07G044_CA55_TSCLK 6
-#define R9A07G044_GIC600_GICCLK 7
-#define R9A07G044_IA55_CLK 8
-#define R9A07G044_IA55_PCLK 9
-#define R9A07G044_MHU_PCLK 10
-#define R9A07G044_SYC_CNT_CLK 11
-#define R9A07G044_DMAC_ACLK 12
-#define R9A07G044_DMAC_PCLK 13
-#define R9A07G044_OSTM0_PCLK 14
-#define R9A07G044_OSTM1_PCLK 15
-#define R9A07G044_OSTM2_PCLK 16
-#define R9A07G044_MTU_X_MCK_MTU3 17
-#define R9A07G044_POE3_CLKM_POE 18
-#define R9A07G044_GPT_PCLK 19
-#define R9A07G044_POEG_A_CLKP 20
-#define R9A07G044_POEG_B_CLKP 21
-#define R9A07G044_POEG_C_CLKP 22
-#define R9A07G044_POEG_D_CLKP 23
-#define R9A07G044_WDT0_PCLK 24
-#define R9A07G044_WDT0_CLK 25
-#define R9A07G044_WDT1_PCLK 26
-#define R9A07G044_WDT1_CLK 27
-#define R9A07G044_WDT2_PCLK 28
-#define R9A07G044_WDT2_CLK 29
-#define R9A07G044_SPI_CLK2 30
-#define R9A07G044_SPI_CLK 31
-#define R9A07G044_SDHI0_IMCLK 32
-#define R9A07G044_SDHI0_IMCLK2 33
-#define R9A07G044_SDHI0_CLK_HS 34
-#define R9A07G044_SDHI0_ACLK 35
-#define R9A07G044_SDHI1_IMCLK 36
-#define R9A07G044_SDHI1_IMCLK2 37
-#define R9A07G044_SDHI1_CLK_HS 38
-#define R9A07G044_SDHI1_ACLK 39
-#define R9A07G044_GPU_CLK 40
-#define R9A07G044_GPU_AXI_CLK 41
-#define R9A07G044_GPU_ACE_CLK 42
-#define R9A07G044_ISU_ACLK 43
-#define R9A07G044_ISU_PCLK 44
-#define R9A07G044_H264_CLK_A 45
-#define R9A07G044_H264_CLK_P 46
-#define R9A07G044_CRU_SYSCLK 47
-#define R9A07G044_CRU_VCLK 48
-#define R9A07G044_CRU_PCLK 49
-#define R9A07G044_CRU_ACLK 50
-#define R9A07G044_MIPI_DSI_PLLCLK 51
-#define R9A07G044_MIPI_DSI_SYSCLK 52
-#define R9A07G044_MIPI_DSI_ACLK 53
-#define R9A07G044_MIPI_DSI_PCLK 54
-#define R9A07G044_MIPI_DSI_VCLK 55
-#define R9A07G044_MIPI_DSI_LPCLK 56
-#define R9A07G044_LCDC_CLK_A 57
-#define R9A07G044_LCDC_CLK_P 58
-#define R9A07G044_LCDC_CLK_D 59
-#define R9A07G044_SSI0_PCLK2 60
-#define R9A07G044_SSI0_PCLK_SFR 61
-#define R9A07G044_SSI1_PCLK2 62
-#define R9A07G044_SSI1_PCLK_SFR 63
-#define R9A07G044_SSI2_PCLK2 64
-#define R9A07G044_SSI2_PCLK_SFR 65
-#define R9A07G044_SSI3_PCLK2 66
-#define R9A07G044_SSI3_PCLK_SFR 67
-#define R9A07G044_SRC_CLKP 68
-#define R9A07G044_USB_U2H0_HCLK 69
-#define R9A07G044_USB_U2H1_HCLK 70
-#define R9A07G044_USB_U2P_EXR_CPUCLK 71
-#define R9A07G044_USB_PCLK 72
-#define R9A07G044_ETH0_CLK_AXI 73
-#define R9A07G044_ETH0_CLK_CHI 74
-#define R9A07G044_ETH1_CLK_AXI 75
-#define R9A07G044_ETH1_CLK_CHI 76
-#define R9A07G044_I2C0_PCLK 77
-#define R9A07G044_I2C1_PCLK 78
-#define R9A07G044_I2C2_PCLK 79
-#define R9A07G044_I2C3_PCLK 80
-#define R9A07G044_SCIF0_CLK_PCK 81
-#define R9A07G044_SCIF1_CLK_PCK 82
-#define R9A07G044_SCIF2_CLK_PCK 83
-#define R9A07G044_SCIF3_CLK_PCK 84
-#define R9A07G044_SCIF4_CLK_PCK 85
-#define R9A07G044_SCI0_CLKP 86
-#define R9A07G044_SCI1_CLKP 87
-#define R9A07G044_IRDA_CLKP 88
-#define R9A07G044_RSPI0_CLKB 89
-#define R9A07G044_RSPI1_CLKB 90
-#define R9A07G044_RSPI2_CLKB 91
-#define R9A07G044_CANFD_PCLK 92
-#define R9A07G044_GPIO_HCLK 93
-#define R9A07G044_ADC_ADCLK 94
-#define R9A07G044_ADC_PCLK 95
-#define R9A07G044_TSU_PCLK 96
-
-/* R9A07G044 Resets */
-#define R9A07G044_CA55_RST_1_0 0
-#define R9A07G044_CA55_RST_1_1 1
-#define R9A07G044_CA55_RST_3_0 2
-#define R9A07G044_CA55_RST_3_1 3
-#define R9A07G044_CA55_RST_4 4
-#define R9A07G044_CA55_RST_5 5
-#define R9A07G044_CA55_RST_6 6
-#define R9A07G044_CA55_RST_7 7
-#define R9A07G044_CA55_RST_8 8
-#define R9A07G044_CA55_RST_9 9
-#define R9A07G044_CA55_RST_10 10
-#define R9A07G044_CA55_RST_11 11
-#define R9A07G044_CA55_RST_12 12
-#define R9A07G044_GIC600_GICRESET_N 13
-#define R9A07G044_GIC600_DBG_GICRESET_N 14
-#define R9A07G044_IA55_RESETN 15
-#define R9A07G044_MHU_RESETN 16
-#define R9A07G044_DMAC_ARESETN 17
-#define R9A07G044_DMAC_RST_ASYNC 18
-#define R9A07G044_SYC_RESETN 19
-#define R9A07G044_OSTM0_PRESETZ 20
-#define R9A07G044_OSTM1_PRESETZ 21
-#define R9A07G044_OSTM2_PRESETZ 22
-#define R9A07G044_MTU_X_PRESET_MTU3 23
-#define R9A07G044_POE3_RST_M_REG 24
-#define R9A07G044_GPT_RST_C 25
-#define R9A07G044_POEG_A_RST 26
-#define R9A07G044_POEG_B_RST 27
-#define R9A07G044_POEG_C_RST 28
-#define R9A07G044_POEG_D_RST 29
-#define R9A07G044_WDT0_PRESETN 30
-#define R9A07G044_WDT1_PRESETN 31
-#define R9A07G044_WDT2_PRESETN 32
-#define R9A07G044_SPI_RST 33
-#define R9A07G044_SDHI0_IXRST 34
-#define R9A07G044_SDHI1_IXRST 35
-#define R9A07G044_GPU_RESETN 36
-#define R9A07G044_GPU_AXI_RESETN 37
-#define R9A07G044_GPU_ACE_RESETN 38
-#define R9A07G044_ISU_ARESETN 39
-#define R9A07G044_ISU_PRESETN 40
-#define R9A07G044_H264_X_RESET_VCP 41
-#define R9A07G044_H264_CP_PRESET_P 42
-#define R9A07G044_CRU_CMN_RSTB 43
-#define R9A07G044_CRU_PRESETN 44
-#define R9A07G044_CRU_ARESETN 45
-#define R9A07G044_MIPI_DSI_CMN_RSTB 46
-#define R9A07G044_MIPI_DSI_ARESET_N 47
-#define R9A07G044_MIPI_DSI_PRESET_N 48
-#define R9A07G044_LCDC_RESET_N 49
-#define R9A07G044_SSI0_RST_M2_REG 50
-#define R9A07G044_SSI1_RST_M2_REG 51
-#define R9A07G044_SSI2_RST_M2_REG 52
-#define R9A07G044_SSI3_RST_M2_REG 53
-#define R9A07G044_SRC_RST 54
-#define R9A07G044_USB_U2H0_HRESETN 55
-#define R9A07G044_USB_U2H1_HRESETN 56
-#define R9A07G044_USB_U2P_EXL_SYSRST 57
-#define R9A07G044_USB_PRESETN 58
-#define R9A07G044_ETH0_RST_HW_N 59
-#define R9A07G044_ETH1_RST_HW_N 60
-#define R9A07G044_I2C0_MRST 61
-#define R9A07G044_I2C1_MRST 62
-#define R9A07G044_I2C2_MRST 63
-#define R9A07G044_I2C3_MRST 64
-#define R9A07G044_SCIF0_RST_SYSTEM_N 65
-#define R9A07G044_SCIF1_RST_SYSTEM_N 66
-#define R9A07G044_SCIF2_RST_SYSTEM_N 67
-#define R9A07G044_SCIF3_RST_SYSTEM_N 68
-#define R9A07G044_SCIF4_RST_SYSTEM_N 69
-#define R9A07G044_SCI0_RST 70
-#define R9A07G044_SCI1_RST 71
-#define R9A07G044_IRDA_RST 72
-#define R9A07G044_RSPI0_RST 73
-#define R9A07G044_RSPI1_RST 74
-#define R9A07G044_RSPI2_RST 75
-#define R9A07G044_CANFD_RSTP_N 76
-#define R9A07G044_CANFD_RSTC_N 77
-#define R9A07G044_GPIO_RSTN 78
-#define R9A07G044_GPIO_PORT_RESETN 79
-#define R9A07G044_GPIO_SPARE_RESETN 80
-#define R9A07G044_ADC_PRESETN 81
-#define R9A07G044_ADC_ADRST_N 82
-#define R9A07G044_TSU_PRESETN 83
-
-#endif /* __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__ */
diff --git a/include/dt-bindings/interrupt-controller/irqc-rzg2l.h b/include/dt-bindings/interrupt-controller/irqc-rzg2l.h
deleted file mode 100644
index 34ce778..0000000
--- a/include/dt-bindings/interrupt-controller/irqc-rzg2l.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
-/*
- * This header provides constants for Renesas RZ/G2L family IRQC bindings.
- *
- * Copyright (C) 2022 Renesas Electronics Corp.
- *
- */
-
-#ifndef __DT_BINDINGS_IRQC_RZG2L_H
-#define __DT_BINDINGS_IRQC_RZG2L_H
-
-/* NMI maps to SPI0 */
-#define RZG2L_NMI 0
-
-/* IRQ0-7 map to SPI1-8 */
-#define RZG2L_IRQ0 1
-#define RZG2L_IRQ1 2
-#define RZG2L_IRQ2 3
-#define RZG2L_IRQ3 4
-#define RZG2L_IRQ4 5
-#define RZG2L_IRQ5 6
-#define RZG2L_IRQ6 7
-#define RZG2L_IRQ7 8
-
-#endif /* __DT_BINDINGS_IRQC_RZG2L_H */
diff --git a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
deleted file mode 100644
index c78ed5e..0000000
--- a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
-/*
- * This header provides constants for Renesas RZ/G2L family pinctrl bindings.
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- *
- */
-
-#ifndef __DT_BINDINGS_RZG2L_PINCTRL_H
-#define __DT_BINDINGS_RZG2L_PINCTRL_H
-
-#define RZG2L_PINS_PER_PORT 8
-
-/*
- * Create the pin index from its bank and position numbers and store in
- * the upper 16 bits the alternate function identifier
- */
-#define RZG2L_PORT_PINMUX(b, p, f) ((b) * RZG2L_PINS_PER_PORT + (p) | ((f) << 16))
-
-/* Convert a port and pin label to its global pin index */
-#define RZG2L_GPIO(port, pin) ((port) * RZG2L_PINS_PER_PORT + (pin))
-
-#endif /* __DT_BINDINGS_RZG2L_PINCTRL_H */
diff --git a/include/efi.h b/include/efi.h
index 84640cf..c559fda 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -669,4 +669,38 @@
*/
void efi_show_tables(struct efi_system_table *systab);
+/**
+ * efi_get_basename() - Get the default filename to use when loading
+ *
+ * E.g. this function returns BOOTAA64.EFI for an aarch target
+ *
+ * Return: Default EFI filename
+ */
+const char *efi_get_basename(void);
+
+#ifdef CONFIG_SANDBOX
+#include <asm/state.h>
+#endif
+
+static inline bool efi_use_host_arch(void)
+{
+#ifdef CONFIG_SANDBOX
+ struct sandbox_state *state = state_get_current();
+
+ return state->native;
+#else
+ return false;
+#endif
+}
+
+/**
+ * efi_get_pxe_arch() - Get the architecture value for PXE
+ *
+ * See:
+ * http://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml
+ *
+ * Return: Architecture value
+ */
+int efi_get_pxe_arch(void);
+
#endif /* _LINUX_EFI_H */
diff --git a/include/efi_default_filename.h b/include/efi_default_filename.h
deleted file mode 100644
index 7793298..0000000
--- a/include/efi_default_filename.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * When a boot option does not provide a file path the EFI file to be
- * booted is \EFI\BOOT\$(BOOTEFI_NAME).EFI. The architecture specific
- * file name is defined in this include.
- *
- * Copyright (c) 2022, Heinrich Schuchardt <xypron.glpk@gmx.de>
- * Copyright (c) 2022, Linaro Limited
- */
-
-#ifndef _EFI_DEFAULT_FILENAME_H
-#define _EFI_DEFAULT_FILENAME_H
-
-#include <host_arch.h>
-
-#undef BOOTEFI_NAME
-
-#ifdef CONFIG_SANDBOX
-
-#if HOST_ARCH == HOST_ARCH_X86_64
-#define BOOTEFI_NAME "BOOTX64.EFI"
-#elif HOST_ARCH == HOST_ARCH_X86
-#define BOOTEFI_NAME "BOOTIA32.EFI"
-#elif HOST_ARCH == HOST_ARCH_AARCH64
-#define BOOTEFI_NAME "BOOTAA64.EFI"
-#elif HOST_ARCH == HOST_ARCH_ARM
-#define BOOTEFI_NAME "BOOTARM.EFI"
-#elif HOST_ARCH == HOST_ARCH_RISCV32
-#define BOOTEFI_NAME "BOOTRISCV32.EFI"
-#elif HOST_ARCH == HOST_ARCH_RISCV64
-#define BOOTEFI_NAME "BOOTRISCV64.EFI"
-#else
-#error Unsupported UEFI architecture
-#endif
-
-#else
-
-#if defined(CONFIG_ARM64)
-#define BOOTEFI_NAME "BOOTAA64.EFI"
-#elif defined(CONFIG_ARM)
-#define BOOTEFI_NAME "BOOTARM.EFI"
-#elif defined(CONFIG_X86_64)
-#define BOOTEFI_NAME "BOOTX64.EFI"
-#elif defined(CONFIG_X86)
-#define BOOTEFI_NAME "BOOTIA32.EFI"
-#elif defined(CONFIG_ARCH_RV32I)
-#define BOOTEFI_NAME "BOOTRISCV32.EFI"
-#elif defined(CONFIG_ARCH_RV64I)
-#define BOOTEFI_NAME "BOOTRISCV64.EFI"
-#else
-#error Unsupported UEFI architecture
-#endif
-
-#endif
-
-#endif
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 291eca5..39809ea 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -858,7 +858,7 @@
struct efi_device_path *efi_dp_from_eth(void);
struct efi_device_path *efi_dp_from_mem(uint32_t mem_type,
uint64_t start_address,
- uint64_t end_address);
+ size_t size);
/* Determine the last device path node that is not the end node. */
const struct efi_device_path *efi_dp_last_node(
const struct efi_device_path *dp);
diff --git a/include/expo.h b/include/expo.h
index 8cb3726..3c383d2 100644
--- a/include/expo.h
+++ b/include/expo.h
@@ -762,4 +762,12 @@
*/
int expo_build(ofnode root, struct expo **expp);
+/**
+ * cb_expo_build() - Build an expo for coreboot CMOS RAM
+ *
+ * @expp: Returns the expo created
+ * Return: 0 if OK, -ve on error
+ */
+int cb_expo_build(struct expo **expp);
+
#endif /*__EXPO_H */
diff --git a/include/ext4fs.h b/include/ext4fs.h
index 41f9eb8..fe3fb30 100644
--- a/include/ext4fs.h
+++ b/include/ext4fs.h
@@ -27,6 +27,7 @@
#ifndef __EXT4__
#define __EXT4__
#include <ext_common.h>
+#include <fs.h>
struct disk_partition;
@@ -218,4 +219,7 @@
void ext_cache_init(struct ext_block_cache *cache);
void ext_cache_fini(struct ext_block_cache *cache);
int ext_cache_read(struct ext_block_cache *cache, lbaint_t block, int size);
+int ext4fs_opendir(const char *dirname, struct fs_dir_stream **dirsp);
+int ext4fs_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp);
+void ext4fs_closedir(struct fs_dir_stream *dirs);
#endif
diff --git a/include/ext_common.h b/include/ext_common.h
index b09bbde..6e17fbd 100644
--- a/include/ext_common.h
+++ b/include/ext_common.h
@@ -173,20 +173,38 @@
__le32 bg_reserved;
};
-/* The ext2 inode. */
+/**
+ * struct ext2_inode - ext2 inode
+ *
+ * For details see Linux file
+ * Documentation/filesystems/ext4/inodes.rst.
+ */
struct ext2_inode {
+ /** @mode: file mode */
__le16 mode;
+ /** @uid: lower 16 bits of owner UID */
__le16 uid;
+ /** @size: lower 32 bits of file size */
__le32 size;
+ /** @atime: last access time */
__le32 atime;
+ /** @ctime: last change time */
__le32 ctime;
+ /** @mtime: last modification time */
__le32 mtime;
+ /** @dtime: deletion time */
__le32 dtime;
+ /** @gid: lower 16 bits of group ID */
__le16 gid;
+ /** @nlinks: number of hard links */
__le16 nlinks;
- __le32 blockcnt; /* Blocks of either 512 or block_size bytes */
+ /** @blockcnt: lower 32 bit of block count */
+ __le32 blockcnt;
+ /** @flags: inode flags */
__le32 flags;
+ /** @osd1: operating system specific data */
__le32 osd1;
+ /** @b: block map or extent tree */
union {
struct datablocks {
__le32 dir_blocks[INDIRECT_BLOCKS];
@@ -197,10 +215,19 @@
char symlink[60];
char inline_data[60];
} b;
+ /** @version: file version (for NFS) */
__le32 version;
+ /** @acl: lower 32 bit of extended attribute block */
__le32 acl;
- __le32 size_high; /* previously dir_acl, but never used */
+ /** @size_high - dir_acl on ext2/3, upper 32 size bits on ext4
+ *
+ * In ext2/3 this field was named i_dir_acl, though it was usually set
+ * to zero and never used.
+ */
+ __le32 size_high;
+ /** @fragment_addr - (obsolete) fragment address */
__le32 fragment_addr;
+ /** @osd2: operating system specific data */
__le32 osd2[3];
};
diff --git a/include/fs.h b/include/fs.h
index ef540e7..6372756 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -25,7 +25,7 @@
* do_fat_fsload - Run the fatload command
*
* @cmdtp: Command information for fatload
- * @flag: Command flags (CMD_FLAG_...)
+ * @flag: Command flags (CMD_FLAG\_...)
* @argc: Number of arguments
* @argv: List of arguments
* Return: result (see enum command_ret_t)
@@ -37,7 +37,7 @@
* do_ext2load - Run the ext2load command
*
* @cmdtp: Command information for ext2load
- * @flag: Command flags (CMD_FLAG_...)
+ * @flag: Command flags (CMD_FLAG\_...)
* @argc: Number of arguments
* @argv: List of arguments
* Return: result (see enum command_ret_t)
@@ -145,7 +145,7 @@
* @offset: offset in the file from where to start reading
* @len: the number of bytes to read. Use 0 to read entire file.
* @actread: returns the actual number of bytes read
- * Return: 0 if OK with valid *actread, -1 on error conditions
+ * Return: 0 if OK with valid @actread, -1 on error conditions
*/
int fs_read(const char *filename, ulong addr, loff_t offset, loff_t len,
loff_t *actread);
@@ -160,7 +160,7 @@
* @offset: offset in the file from where to start writing
* @len: the number of bytes to write
* @actwrite: returns the actual number of bytes written
- * Return: 0 if OK with valid *actwrite, -1 on error conditions
+ * Return: 0 if OK with valid @actwrite, -1 on error conditions
*/
int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len,
loff_t *actwrite);
@@ -186,57 +186,73 @@
unsigned int type;
/** @size: file size */
loff_t size;
- /** @flags: attribute flags (FS_ATTR_*) */
+ /** @attr: attribute flags (FS_ATTR_*) */
u32 attr;
- /** create_time: time of creation */
+ /** @create_time: time of creation */
struct rtc_time create_time;
- /** access_time: time of last access */
+ /** @access_time: time of last access */
struct rtc_time access_time;
- /** change_time: time of last modification */
+ /** @change_time: time of last modification */
struct rtc_time change_time;
- /** name: file name */
+ /** @name: file name */
char name[FS_DIRENT_NAME_LEN];
};
-/* Note: fs_dir_stream should be treated as opaque to the user of fs layer */
+/**
+ * struct fs_dir_stream - Structure representing an opened directory
+ *
+ * Struct fs_dir_stream should be treated opaque to the user of fs layer.
+ * The fields @desc and @part are used by the fs layer.
+ * File system drivers pass additional private fields with the pointers
+ * to this structure.
+ *
+ * @desc: block device descriptor
+ * @part: partition number
+ */
struct fs_dir_stream {
- /* private to fs. layer: */
struct blk_desc *desc;
int part;
};
-/*
+/**
* fs_opendir - Open a directory
*
- * @filename: the path to directory to open
- * Return: a pointer to the directory stream or NULL on error and errno
- * set appropriately
+ * .. note::
+ * The returned struct fs_dir_stream should be treated opaque to the
+ * user of the fs layer.
+ *
+ * @filename: path to the directory to open
+ * Return:
+ * A pointer to the directory stream or NULL on error and errno set
+ * appropriately
*/
struct fs_dir_stream *fs_opendir(const char *filename);
-/*
+/**
* fs_readdir - Read the next directory entry in the directory stream.
*
- * Works in an analogous way to posix readdir(). The previously returned
- * directory entry is no longer valid after calling fs_readdir() again.
+ * fs_readir works in an analogous way to posix readdir().
+ * The previously returned directory entry is no longer valid after calling
+ * fs_readdir() again.
* After fs_closedir() is called, the returned directory entry is no
* longer valid.
*
* @dirs: the directory stream
- * Return: the next directory entry (only valid until next fs_readdir() or
- * fs_closedir() call, do not attempt to free()) or NULL if the end of
- * the directory is reached.
+ * Return:
+ * the next directory entry (only valid until next fs_readdir() or
+ * fs_closedir() call, do not attempt to free()) or NULL if the end of
+ * the directory is reached.
*/
struct fs_dirent *fs_readdir(struct fs_dir_stream *dirs);
-/*
+/**
* fs_closedir - close a directory stream
*
* @dirs: the directory stream
*/
void fs_closedir(struct fs_dir_stream *dirs);
-/*
+/**
* fs_unlink - delete a file or directory
*
* If a given name is a directory, it will be deleted only if it's empty
@@ -246,7 +262,7 @@
*/
int fs_unlink(const char *filename);
-/*
+/**
* fs_mkdir - Create a directory
*
* @filename: Name of directory to create
@@ -292,7 +308,7 @@
* do_fs_types - List supported filesystems.
*
* @cmdtp: Command information for fstypes
- * @flag: Command flags (CMD_FLAG_...)
+ * @flag: Command flags (CMD_FLAG\_...)
* @argc: Number of arguments
* @argv: List of arguments
* Return: result (see enum command_ret_t)
diff --git a/include/imx8image.h b/include/imx8image.h
index 85fb642..6b95e93 100644
--- a/include/imx8image.h
+++ b/include/imx8image.h
@@ -146,6 +146,7 @@
enum imx8image_cmd {
CMD_INVALID,
CMD_BOOT_FROM,
+ CMD_DCD_SKIP,
CMD_FUSE_VERSION,
CMD_SW_VERSION,
CMD_MSG_BLOCK,
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 655a6d1..b8b207f 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -308,7 +308,7 @@
SNOR_F_BROKEN_RESET = BIT(6),
SNOR_F_SOFT_RESET = BIT(7),
SNOR_F_IO_MODE_EN_VOLATILE = BIT(8),
-#if defined(CONFIG_SPI_ADVANCE)
+#if defined(CONFIG_SPI_STACKED_PARALLEL)
SNOR_F_HAS_STACKED = BIT(9),
SNOR_F_HAS_PARALLEL = BIT(10),
#else
diff --git a/include/lmb.h b/include/lmb.h
index 2201d6f..f221f0c 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -156,6 +156,57 @@
return lmb_alloc_addr(addr, len) == addr ? 0 : -1;
}
+/**
+ * io_lmb_setup() - Initialize LMB struct
+ * @io_lmb: IO LMB to initialize
+ *
+ * Returns: 0 on success, negative error code on failure
+ */
+int io_lmb_setup(struct lmb *io_lmb);
+
+/**
+ * io_lmb_teardown() - Tear LMB struct down
+ * @io_lmb: IO LMB to teardown
+ */
+void io_lmb_teardown(struct lmb *io_lmb);
+
+/**
+ * io_lmb_add() - Add an IOVA range for allocations
+ * @io_lmb: LMB to add the space to
+ * @base: Base Address of region to add
+ * @size: Size of the region to add
+ *
+ * Add the IOVA space [base, base + size] to be managed by io_lmb.
+ *
+ * Returns: 0 if the region addition was successful, -1 on failure
+ */
+long io_lmb_add(struct lmb *io_lmb, phys_addr_t base, phys_size_t size);
+
+/**
+ * io_lmb_alloc() - Allocate specified IO memory address with specified alignment
+ * @io_lmb: LMB to alloc from
+ * @size: Size of the region requested
+ * @align: Required address and size alignment
+ *
+ * Allocate a region of IO memory. The base parameter is used to specify the
+ * base address of the requested region.
+ *
+ * Return: base IO address on success, 0 on error
+ */
+phys_addr_t io_lmb_alloc(struct lmb *io_lmb, phys_size_t size, ulong align);
+
+/**
+ * io_lmb_free() - Free up a region of IOVA space
+ * @io_lmb: LMB to return the IO address space to
+ * @base: Base Address of region to be freed
+ * @size: Size of the region to be freed
+ *
+ * Free up a region of IOVA space.
+ *
+ * Return: 0 if successful, -1 on failure
+ */
+long io_lmb_free(struct lmb *io_lmb, phys_addr_t base, phys_size_t size);
+
#endif /* __KERNEL__ */
#endif /* _LINUX_LMB_H */
diff --git a/include/log.h b/include/log.h
index bf81a27..4f6d6a2 100644
--- a/include/log.h
+++ b/include/log.h
@@ -106,6 +106,8 @@
LOGC_EXPO,
/** @LOGC_CONSOLE: Related to the console and stdio */
LOGC_CONSOLE,
+ /** @LOGC_TEST: Related to testing */
+ LOGC_TEST,
/** @LOGC_COUNT: Number of log categories */
LOGC_COUNT,
/** @LOGC_END: Sentinel value for lists of log categories */
diff --git a/include/menu.h b/include/menu.h
index 6571c39..6cede89 100644
--- a/include/menu.h
+++ b/include/menu.h
@@ -13,6 +13,7 @@
void (*display_statusline)(struct menu *),
void (*item_data_print)(void *),
char *(*item_choice)(void *),
+ bool (*need_reprint)(void *),
void *item_choice_data);
int menu_default_set(struct menu *m, char *item_key);
int menu_get_choice(struct menu *m, void **choice);
@@ -39,6 +40,7 @@
struct bootmenu_data {
int delay; /* delay for autoboot */
int active; /* active menu entry */
+ int last_active; /* last active menu entry */
int count; /* total count of menu entries */
struct bootmenu_entry *first; /* first menu entry */
};
diff --git a/include/spi.h b/include/spi.h
index 3a92d02..6944773 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -41,12 +41,6 @@
#define SPI_3BYTE_MODE 0x0
#define SPI_4BYTE_MODE 0x1
-/* SPI transfer flags */
-#define SPI_XFER_STRIPE (1 << 6)
-#define SPI_XFER_MASK (3 << 8)
-#define SPI_XFER_LOWER (1 << 8)
-#define SPI_XFER_UPPER (2 << 8)
-
/* Max no. of CS supported per spi device */
#define SPI_CS_CNT_MAX 2
@@ -169,6 +163,8 @@
#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
#define SPI_XFER_U_PAGE BIT(4)
#define SPI_XFER_STACKED BIT(5)
+#define SPI_XFER_LOWER BIT(6)
+
/*
* Flag indicating that the spi-controller has multi chip select
* capability and can assert/de-assert more than one chip select
diff --git a/include/test/compression.h b/include/test/compression.h
deleted file mode 100644
index 02fcfa4..0000000
--- a/include/test/compression.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2017 Google, Inc
- * Written by Simon Glass <sjg@chromium.org>
- */
-
-#ifndef __TEST_COMPRESSION_H__
-#define __TEST_COMPRESSION_H__
-
-#include <test/test.h>
-
-/* Declare a new compression test */
-#define COMPRESSION_TEST(_name, _flags) \
- UNIT_TEST(_name, _flags, compression_test)
-
-#endif /* __TEST_ENV_H__ */
diff --git a/include/test/test.h b/include/test/test.h
index 92eec2e..21c0478 100644
--- a/include/test/test.h
+++ b/include/test/test.h
@@ -29,6 +29,7 @@
* @of_other: Live tree for the other FDT
* @runs_per_test: Number of times to run each test (typically 1)
* @force_run: true to run tests marked with the UTF_MANUAL flag
+ * @old_bloblist: stores the old gd->bloblist pointer
* @expect_str: Temporary string used to hold expected string value
* @actual_str: Temporary string used to hold actual string value
*/
@@ -50,6 +51,7 @@
struct device_node *of_other;
int runs_per_test;
bool force_run;
+ void *old_bloblist;
char expect_str[512];
char actual_str[512];
};
@@ -73,6 +75,7 @@
UTF_MANUAL = BIT(8),
UTF_ETH_BOOTDEV = BIT(9), /* enable Ethernet bootdevs */
UTF_SF_BOOTDEV = BIT(10), /* enable SPI flash bootdevs */
+ UFT_BLOBLIST = BIT(11), /* test changes gd->bloblist */
};
/**
diff --git a/include/vsprintf.h b/include/vsprintf.h
index fe95147..9da6ce7 100644
--- a/include/vsprintf.h
+++ b/include/vsprintf.h
@@ -45,6 +45,19 @@
unsigned long hextoul(const char *cp, char **endp);
/**
+ * hex_strtoull - convert a string in hex to an unsigned long long
+ *
+ * @cp: The string to be converted
+ * @endp: Updated to point to the first character not converted
+ * Return: value decoded from string (0 if invalid)
+ *
+ * Converts a hex string to an unsigned long long. If there are invalid
+ * characters at the end these are ignored. In the worst case, if all characters
+ * are invalid, 0 is returned
+ */
+unsigned long long hextoull(const char *cp, char **endp);
+
+/**
* dec_strtoul - convert a string in decimal to an unsigned long
*
* @cp: The string to be converted
diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c
index 6473d95..150f750 100644
--- a/lib/acpi/acpi_table.c
+++ b/lib/acpi/acpi_table.c
@@ -420,7 +420,7 @@
static int acpi_write_spcr(struct acpi_ctx *ctx, const struct acpi_writer *entry)
{
struct serial_device_info serial_info = {0};
- ulong serial_address, serial_offset;
+ u64 serial_address, serial_offset;
struct acpi_table_header *header;
struct acpi_spcr *spcr;
struct udevice *dev;
@@ -473,7 +473,7 @@
}
serial_width = serial_info.reg_width * 8;
- serial_offset = serial_info.reg_offset << serial_info.reg_shift;
+ serial_offset = ((u64)serial_info.reg_offset) << serial_info.reg_shift;
serial_address = serial_info.addr + serial_offset;
/* Encode register access size */
@@ -495,7 +495,7 @@
break;
}
- debug("UART type %u @ %lx\n", spcr->interface_type, serial_address);
+ debug("UART type %u @ %llx\n", spcr->interface_type, serial_address);
/* Fill GAS */
spcr->serial_port.space_id = space_id;
diff --git a/lib/alist.c b/lib/alist.c
index b7928ca..4ce651f 100644
--- a/lib/alist.c
+++ b/lib/alist.c
@@ -41,6 +41,11 @@
memset(lst, '\0', sizeof(struct alist));
}
+void alist_empty(struct alist *lst)
+{
+ lst->count = 0;
+}
+
/**
* alist_expand_to() - Expand a list to the given size
*
@@ -106,6 +111,42 @@
return lst->data + index * lst->obj_size;
}
+int alist_calc_index(const struct alist *lst, const void *ptr)
+{
+ uint index;
+
+ if (!lst->count || ptr < lst->data)
+ return -1;
+
+ index = (ptr - lst->data) / lst->obj_size;
+
+ return index;
+}
+
+void alist_update_end(struct alist *lst, const void *ptr)
+{
+ int index;
+
+ index = alist_calc_index(lst, ptr);
+ lst->count = index == -1 ? 0 : index;
+}
+
+bool alist_chk_ptr(const struct alist *lst, const void *ptr)
+{
+ int index = alist_calc_index(lst, ptr);
+
+ return index >= 0 && index < lst->count;
+}
+
+const void *alist_next_ptrd(const struct alist *lst, const void *ptr)
+{
+ int index = alist_calc_index(lst, ptr);
+
+ assert(index != -1);
+
+ return alist_get_ptr(lst, index + 1);
+}
+
void *alist_ensure_ptr(struct alist *lst, uint index)
{
uint minsize = index + 1;
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 066f0ca..58d4978 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -567,6 +567,16 @@
No additional space will be required in the resulting U-Boot binary
when this option is enabled.
+config BOOTEFI_TESTAPP_COMPILE
+ bool "Compile an EFI test app for testing"
+ default y
+ help
+ This compiles an app designed for testing. It is packed into an image
+ by the test.py testing frame in the setup_efi_image() function.
+
+ No additional space will be required in the resulting U-Boot binary
+ when this option is enabled.
+
endif
source "lib/efi/Kconfig"
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 00d1896..87131ab 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -20,6 +20,7 @@
ifeq ($(CONFIG_GENERATE_ACPI_TABLE),)
apps-y += dtbdump
endif
+apps-$(CONFIG_BOOTEFI_TESTAPP_COMPILE) += testapp
obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o
obj-$(CONFIG_EFI_BOOTMGR) += efi_bootmgr.o
diff --git a/lib/efi_loader/dtbdump.c b/lib/efi_loader/dtbdump.c
index 9f1d8fb..a3d59a2 100644
--- a/lib/efi_loader/dtbdump.c
+++ b/lib/efi_loader/dtbdump.c
@@ -225,7 +225,7 @@
* @systable: system table
* Return: device tree or NULL
*/
-void *get_dtb(struct efi_system_table *systable)
+static void *get_dtb(struct efi_system_table *systable)
{
void *dtb = NULL;
efi_uintn_t i;
@@ -246,7 +246,7 @@
* @pos: UTF-16 string
* Return: pointer to first non-whitespace
*/
-u16 *skip_whitespace(u16 *pos)
+static u16 *skip_whitespace(u16 *pos)
{
for (; *pos && *pos <= 0x20; ++pos)
;
@@ -260,7 +260,7 @@
* @keyword: keyword to be searched
* Return: true fi @string starts with the keyword
*/
-bool starts_with(u16 *string, u16 *keyword)
+static bool starts_with(u16 *string, u16 *keyword)
{
for (; *keyword; ++string, ++keyword) {
if (*string != *keyword)
@@ -272,7 +272,7 @@
/**
* do_help() - print help
*/
-void do_help(void)
+static void do_help(void)
{
error(u"dump - print device-tree\r\n");
error(u"load <dtb> - load device-tree from file\r\n");
@@ -332,7 +332,7 @@
* @filename: file name
* Return: status code
*/
-efi_status_t do_load(u16 *filename)
+static efi_status_t do_load(u16 *filename)
{
struct efi_dt_fixup_protocol *dt_fixup_prot;
struct efi_simple_file_system_protocol *file_system;
@@ -469,7 +469,7 @@
* @filename: file name
* Return: status code
*/
-efi_status_t do_save(u16 *filename)
+static efi_status_t do_save(u16 *filename)
{
struct efi_simple_file_system_protocol *file_system;
efi_uintn_t dtb_size;
diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
index a3aa2b8..8c51a6e 100644
--- a/lib/efi_loader/efi_bootmgr.c
+++ b/lib/efi_loader/efi_bootmgr.c
@@ -11,10 +11,10 @@
#include <blkmap.h>
#include <charset.h>
#include <dm.h>
+#include <efi.h>
#include <log.h>
#include <malloc.h>
#include <net.h>
-#include <efi_default_filename.h>
#include <efi_loader.h>
#include <efi_variable.h>
#include <asm/unaligned.h>
@@ -82,8 +82,12 @@
&efi_simple_file_system_protocol_guid, &rem);
if (handle) {
if (rem->type == DEVICE_PATH_TYPE_END) {
- full_path = efi_dp_from_file(device_path,
- "/EFI/BOOT/" BOOTEFI_NAME);
+ char fname[30];
+
+ snprintf(fname, sizeof(fname), "/EFI/BOOT/%s",
+ efi_get_basename());
+ full_path = efi_dp_from_file(device_path, fname);
+
} else {
full_path = efi_dp_dup(device_path);
}
@@ -385,7 +389,7 @@
* @ctx: event context
* Return: status code
*/
-efi_status_t efi_bootmgr_release_uridp(struct uridp_context *ctx)
+static efi_status_t efi_bootmgr_release_uridp(struct uridp_context *ctx)
{
efi_status_t ret = EFI_SUCCESS;
efi_status_t ret2 = EFI_SUCCESS;
diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index 9de3b95..ee387e1 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -977,7 +977,7 @@
/* Construct a device-path for memory-mapped image */
struct efi_device_path *efi_dp_from_mem(uint32_t memory_type,
uint64_t start_address,
- uint64_t end_address)
+ size_t size)
{
struct efi_device_path_memory *mdp;
void *buf, *start;
@@ -992,7 +992,7 @@
mdp->dp.length = sizeof(*mdp);
mdp->memory_type = memory_type;
mdp->start_address = start_address;
- mdp->end_address = end_address;
+ mdp->end_address = start_address + size;
buf = &mdp[1];
*((struct efi_device_path *)buf) = END;
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 93a9a5a..1f3de0a 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -561,11 +561,9 @@
{
struct efi_disk_obj *disk;
struct blk_desc *desc;
- int diskid;
efi_status_t ret;
desc = dev_get_uclass_plat(dev);
- diskid = desc->devnum;
ret = efi_disk_add_dev(NULL, NULL, desc,
NULL, 0, &disk, agent_handle);
@@ -608,7 +606,6 @@
struct disk_part *part_data;
struct disk_partition *info;
unsigned int part;
- int diskid;
struct efi_handler *handler;
struct efi_device_path *dp_parent;
struct efi_disk_obj *disk;
@@ -618,7 +615,6 @@
return -1;
desc = dev_get_uclass_plat(dev_get_parent(dev));
- diskid = desc->devnum;
part_data = dev_get_uclass_plat(dev);
part = part_data->partnum;
diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c
index c92d8cc..95b3c89 100644
--- a/lib/efi_loader/efi_file.c
+++ b/lib/efi_loader/efi_file.c
@@ -864,8 +864,16 @@
}
ret = efi_get_file_size(fh, &file_size);
- if (ret != EFI_SUCCESS)
- goto error;
+ if (ret != EFI_SUCCESS) {
+ if (!fh->isdir)
+ goto error;
+ /*
+ * Some file drivers don't implement fs_size() for
+ * directories. Use a dummy non-zero value.
+ */
+ file_size = 4096;
+ ret = EFI_SUCCESS;
+ }
memset(info, 0, required_size);
@@ -976,14 +984,16 @@
}
free(new_file_name);
/* Check for truncation */
- ret = efi_get_file_size(fh, &file_size);
- if (ret != EFI_SUCCESS)
- goto out;
- if (file_size != info->file_size) {
- /* TODO: we do not support truncation */
- EFI_PRINT("Truncation not supported\n");
- ret = EFI_ACCESS_DENIED;
- goto out;
+ if (!fh->isdir) {
+ ret = efi_get_file_size(fh, &file_size);
+ if (ret != EFI_SUCCESS)
+ goto out;
+ if (file_size != info->file_size) {
+ /* TODO: we do not support truncation */
+ EFI_PRINT("Truncation not supported\n");
+ ret = EFI_ACCESS_DENIED;
+ goto out;
+ }
}
/*
* We do not care for the other attributes
diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c
index 00167bd..bf96f61 100644
--- a/lib/efi_loader/efi_helper.c
+++ b/lib/efi_loader/efi_helper.c
@@ -12,18 +12,89 @@
#include <mapmem.h>
#include <dm.h>
#include <fs.h>
+#include <efi.h>
#include <efi_api.h>
#include <efi_load_initrd.h>
#include <efi_loader.h>
#include <efi_variable.h>
+#include <host_arch.h>
#include <linux/libfdt.h>
#include <linux/list.h>
+#undef BOOTEFI_NAME
+
+#if HOST_ARCH == HOST_ARCH_X86_64
+#define HOST_BOOTEFI_NAME "BOOTX64.EFI"
+#define HOST_PXE_ARCH 0x6
+#elif HOST_ARCH == HOST_ARCH_X86
+#define HOST_BOOTEFI_NAME "BOOTIA32.EFI"
+#define HOST_PXE_ARCH 0x7
+#elif HOST_ARCH == HOST_ARCH_AARCH64
+#define HOST_BOOTEFI_NAME "BOOTAA64.EFI"
+#define HOST_PXE_ARCH 0xb
+#elif HOST_ARCH == HOST_ARCH_ARM
+#define HOST_BOOTEFI_NAME "BOOTARM.EFI"
+#define HOST_PXE_ARCH 0xa
+#elif HOST_ARCH == HOST_ARCH_RISCV32
+#define HOST_BOOTEFI_NAME "BOOTRISCV32.EFI"
+#define HOST_PXE_ARCH 0x19
+#elif HOST_ARCH == HOST_ARCH_RISCV64
+#define HOST_BOOTEFI_NAME "BOOTRISCV64.EFI"
+#define HOST_PXE_ARCH 0x1b
+#else
+#error Unsupported Host architecture
+#endif
+
+#if defined(CONFIG_SANDBOX)
+#define BOOTEFI_NAME "BOOTSBOX.EFI"
+#elif defined(CONFIG_ARM64)
+#define BOOTEFI_NAME "BOOTAA64.EFI"
+#elif defined(CONFIG_ARM)
+#define BOOTEFI_NAME "BOOTARM.EFI"
+#elif defined(CONFIG_X86_64)
+#define BOOTEFI_NAME "BOOTX64.EFI"
+#elif defined(CONFIG_X86)
+#define BOOTEFI_NAME "BOOTIA32.EFI"
+#elif defined(CONFIG_ARCH_RV32I)
+#define BOOTEFI_NAME "BOOTRISCV32.EFI"
+#elif defined(CONFIG_ARCH_RV64I)
+#define BOOTEFI_NAME "BOOTRISCV64.EFI"
+#else
+#error Unsupported UEFI architecture
+#endif
+
#if defined(CONFIG_CMD_EFIDEBUG) || defined(CONFIG_EFI_LOAD_FILE2_INITRD)
/* GUID used by Linux to identify the LoadFile2 protocol with the initrd */
const efi_guid_t efi_lf2_initrd_guid = EFI_INITRD_MEDIA_GUID;
#endif
+const char *efi_get_basename(void)
+{
+ return efi_use_host_arch() ? HOST_BOOTEFI_NAME : BOOTEFI_NAME;
+}
+
+int efi_get_pxe_arch(void)
+{
+ if (efi_use_host_arch())
+ return HOST_PXE_ARCH;
+
+ /* http://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml */
+ if (IS_ENABLED(CONFIG_ARM64))
+ return 0xb;
+ else if (IS_ENABLED(CONFIG_ARM))
+ return 0xa;
+ else if (IS_ENABLED(CONFIG_X86_64))
+ return 0x6;
+ else if (IS_ENABLED(CONFIG_X86))
+ return 0x7;
+ else if (IS_ENABLED(CONFIG_ARCH_RV32I))
+ return 0x19;
+ else if (IS_ENABLED(CONFIG_ARCH_RV64I))
+ return 0x1b;
+
+ return -EINVAL;
+}
+
/**
* efi_create_current_boot_var() - Return Boot#### name were #### is replaced by
* the value of BootCurrent
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 9f3f087..d2f5d56 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -521,7 +521,6 @@
efi_status_t efi_free_pages(uint64_t memory, efi_uintn_t pages)
{
u64 len;
- uint flags;
long status;
efi_status_t ret;
@@ -536,18 +535,17 @@
return EFI_INVALID_PARAMETER;
}
- flags = LMB_NOOVERWRITE | LMB_NONOTIFY;
len = (u64)pages << EFI_PAGE_SHIFT;
+ /*
+ * The 'memory' variable for sandbox holds a pointer which has already
+ * been mapped with map_sysmem() from efi_allocate_pages(). Convert
+ * it back to an address LMB understands
+ */
status = lmb_free_flags(map_to_sysmem((void *)(uintptr_t)memory), len,
- flags);
+ LMB_NOOVERWRITE);
if (status)
return EFI_NOT_FOUND;
- ret = efi_add_memory_map_pg(memory, pages, EFI_CONVENTIONAL_MEMORY,
- false);
- if (ret != EFI_SUCCESS)
- return EFI_NOT_FOUND;
-
return ret;
}
diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index 45f451e..866a529 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -789,7 +789,7 @@
/**
* tcg2_uninit - remove the final event table and free efi memory on failures
*/
-void tcg2_uninit(void)
+static void tcg2_uninit(void)
{
efi_status_t ret;
diff --git a/lib/efi_loader/smbiosdump.c b/lib/efi_loader/smbiosdump.c
index 2f0b91a..d7f2ba3 100644
--- a/lib/efi_loader/smbiosdump.c
+++ b/lib/efi_loader/smbiosdump.c
@@ -289,7 +289,7 @@
* @len: length of buffer
* Return: checksum
*/
-u8 checksum(void *buf, int len)
+static u8 checksum(void *buf, int len)
{
u8 ret = 0;
@@ -304,7 +304,7 @@
*
* Return: status code
*/
-efi_status_t do_check(void)
+static efi_status_t do_check(void)
{
struct smbios3_entry *smbios3_anchor;
void *table, *table_end;
@@ -401,7 +401,7 @@
* @buf: buffer to write
* @size: size of the buffer
*/
-efi_status_t save_file(u16 *filename, void *buf, efi_uintn_t size)
+static efi_status_t save_file(u16 *filename, void *buf, efi_uintn_t size)
{
efi_uintn_t ret;
struct efi_simple_file_system_protocol *file_system;
diff --git a/lib/efi_loader/testapp.c b/lib/efi_loader/testapp.c
new file mode 100644
index 0000000..804ca7e
--- /dev/null
+++ b/lib/efi_loader/testapp.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * EFI test application
+ *
+ * Copyright 2024 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * This test program is used to test the invocation of an EFI application.
+ * It writes a few messages to the console and then exits boot services
+ */
+
+#include <efi_api.h>
+
+static const efi_guid_t loaded_image_guid = EFI_LOADED_IMAGE_PROTOCOL_GUID;
+
+static struct efi_system_table *systable;
+static struct efi_boot_services *boottime;
+static struct efi_simple_text_output_protocol *con_out;
+
+/**
+ * efi_main() - entry point of the EFI application.
+ *
+ * @handle: handle of the loaded image
+ * @systab: system table
+ * Return: status code
+ */
+efi_status_t EFIAPI efi_main(efi_handle_t handle,
+ struct efi_system_table *systab)
+{
+ struct efi_loaded_image *loaded_image;
+ efi_status_t ret;
+
+ systable = systab;
+ boottime = systable->boottime;
+ con_out = systable->con_out;
+
+ /* Get the loaded image protocol */
+ ret = boottime->open_protocol(handle, &loaded_image_guid,
+ (void **)&loaded_image, NULL, NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (ret != EFI_SUCCESS) {
+ con_out->output_string
+ (con_out, u"Cannot open loaded image protocol\r\n");
+ goto out;
+ }
+
+ /* UEFI requires CR LF */
+ con_out->output_string(con_out, u"U-Boot test app for EFI_LOADER\r\n");
+
+out:
+ con_out->output_string(con_out, u"Exiting test app\n");
+ ret = boottime->exit(handle, ret, 0, NULL);
+
+ /* We should never arrive here */
+ return ret;
+}
diff --git a/lib/lmb.c b/lib/lmb.c
index 9423301..74ffa9f 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -27,96 +27,11 @@
#define MAP_OP_FREE (u8)0x2
#define MAP_OP_ADD (u8)0x3
-static struct lmb lmb;
-
-static bool lmb_should_notify(enum lmb_flags flags)
-{
- return !lmb.test && !(flags & LMB_NONOTIFY) &&
- CONFIG_IS_ENABLED(EFI_LOADER);
-}
-
-static int __maybe_unused lmb_map_update_notify(phys_addr_t addr,
- phys_size_t size,
- u8 op, enum lmb_flags flags)
-{
- u64 efi_addr;
- u64 pages;
- efi_status_t status;
-
- if (op != MAP_OP_RESERVE && op != MAP_OP_FREE && op != MAP_OP_ADD) {
- log_err("Invalid map update op received (%d)\n", op);
- return -1;
- }
-
- if (!lmb_should_notify(flags))
- return 0;
-
- efi_addr = (uintptr_t)map_sysmem(addr, 0);
- pages = efi_size_in_pages(size + (efi_addr & EFI_PAGE_MASK));
- efi_addr &= ~EFI_PAGE_MASK;
-
- status = efi_add_memory_map_pg(efi_addr, pages,
- op == MAP_OP_RESERVE ?
- EFI_BOOT_SERVICES_DATA :
- EFI_CONVENTIONAL_MEMORY,
- false);
- if (status != EFI_SUCCESS) {
- log_err("%s: LMB Map notify failure %lu\n", __func__,
- status & ~EFI_ERROR_MASK);
- return -1;
- }
-
- return 0;
-}
-
-static void lmb_print_region_flags(enum lmb_flags flags)
-{
- u64 bitpos;
- const char *flag_str[] = { "none", "no-map", "no-overwrite", "no-notify" };
-
- do {
- bitpos = flags ? fls(flags) - 1 : 0;
- assert_noisy(bitpos < ARRAY_SIZE(flag_str));
- printf("%s", flag_str[bitpos]);
- flags &= ~(1ull << bitpos);
- puts(flags ? ", " : "\n");
- } while (flags);
-}
-
-static void lmb_dump_region(struct alist *lmb_rgn_lst, char *name)
-{
- struct lmb_region *rgn = lmb_rgn_lst->data;
- unsigned long long base, size, end;
- enum lmb_flags flags;
- int i;
-
- printf(" %s.count = 0x%x\n", name, lmb_rgn_lst->count);
-
- for (i = 0; i < lmb_rgn_lst->count; i++) {
- base = rgn[i].base;
- size = rgn[i].size;
- end = base + size - 1;
- flags = rgn[i].flags;
-
- printf(" %s[%d]\t[0x%llx-0x%llx], 0x%08llx bytes flags: ",
- name, i, base, end, size);
- lmb_print_region_flags(flags);
- }
-}
-
-void lmb_dump_all_force(void)
-{
- printf("lmb_dump_all:\n");
- lmb_dump_region(&lmb.free_mem, "memory");
- lmb_dump_region(&lmb.used_mem, "reserved");
-}
-
-void lmb_dump_all(void)
-{
-#ifdef DEBUG
- lmb_dump_all_force();
-#endif
-}
+/*
+ * The following low level LMB functions must not access the global LMB memory
+ * map since they are also used to manage IOVA memory maps in iommu drivers like
+ * apple_dart.
+ */
static long lmb_addrs_overlap(phys_addr_t base1, phys_size_t size1,
phys_addr_t base2, phys_size_t size2)
@@ -205,117 +120,6 @@
lmb_remove_region(lmb_rgn_lst, r2);
}
-static void lmb_reserve_uboot_region(void)
-{
- int bank;
- ulong end, bank_end;
- phys_addr_t rsv_start;
-
- rsv_start = gd->start_addr_sp - CONFIG_STACK_SIZE;
- end = gd->ram_top;
-
- /*
- * Reserve memory from aligned address below the bottom of U-Boot stack
- * until end of RAM area to prevent LMB from overwriting that memory.
- */
- debug("## Current stack ends at 0x%08lx ", (ulong)rsv_start);
-
- /* adjust sp by 16K to be safe */
- rsv_start -= SZ_16K;
- for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
- if (!gd->bd->bi_dram[bank].size ||
- rsv_start < gd->bd->bi_dram[bank].start)
- continue;
- /* Watch out for RAM at end of address space! */
- bank_end = gd->bd->bi_dram[bank].start +
- gd->bd->bi_dram[bank].size - 1;
- if (rsv_start > bank_end)
- continue;
- if (bank_end > end)
- bank_end = end - 1;
-
- lmb_reserve_flags(rsv_start, bank_end - rsv_start + 1,
- LMB_NOOVERWRITE);
-
- if (gd->flags & GD_FLG_SKIP_RELOC)
- lmb_reserve_flags((phys_addr_t)(uintptr_t)_start,
- gd->mon_len, LMB_NOOVERWRITE);
-
- break;
- }
-}
-
-static void lmb_reserve_common(void *fdt_blob)
-{
- lmb_reserve_uboot_region();
-
- if (CONFIG_IS_ENABLED(OF_LIBFDT) && fdt_blob)
- boot_fdt_add_mem_rsv_regions(fdt_blob);
-}
-
-static __maybe_unused void lmb_reserve_common_spl(void)
-{
- phys_addr_t rsv_start;
- phys_size_t rsv_size;
-
- /*
- * Assume a SPL stack of 16KB. This must be
- * more than enough for the SPL stage.
- */
- if (IS_ENABLED(CONFIG_SPL_STACK_R_ADDR)) {
- rsv_start = gd->start_addr_sp - 16384;
- rsv_size = 16384;
- lmb_reserve_flags(rsv_start, rsv_size, LMB_NOOVERWRITE);
- }
-
- if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) {
- /* Reserve the bss region */
- rsv_start = (phys_addr_t)(uintptr_t)__bss_start;
- rsv_size = (phys_addr_t)(uintptr_t)__bss_end -
- (phys_addr_t)(uintptr_t)__bss_start;
- lmb_reserve_flags(rsv_start, rsv_size, LMB_NOOVERWRITE);
- }
-}
-
-/**
- * lmb_add_memory() - Add memory range for LMB allocations
- *
- * Add the entire available memory range to the pool of memory that
- * can be used by the LMB module for allocations.
- *
- * Return: None
- */
-void lmb_add_memory(void)
-{
- int i;
- phys_size_t size;
- u64 ram_top = gd->ram_top;
- struct bd_info *bd = gd->bd;
-
- if (CONFIG_IS_ENABLED(LMB_ARCH_MEM_MAP))
- return lmb_arch_add_memory();
-
- /* Assume a 4GB ram_top if not defined */
- if (!ram_top)
- ram_top = 0x100000000ULL;
-
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
- size = bd->bi_dram[i].size;
- if (size) {
- lmb_add(bd->bi_dram[i].start, size);
-
- /*
- * Reserve memory above ram_top as
- * no-overwrite so that it cannot be
- * allocated
- */
- if (bd->bi_dram[i].start >= ram_top)
- lmb_reserve_flags(bd->bi_dram[i].start, size,
- LMB_NOOVERWRITE);
- }
- }
-}
-
static long lmb_resize_regions(struct alist *lmb_rgn_lst,
unsigned long idx_start,
phys_addr_t base, phys_size_t size)
@@ -475,29 +279,10 @@
return 0;
}
-static long lmb_add_region(struct alist *lmb_rgn_lst, phys_addr_t base,
- phys_size_t size)
-{
- return lmb_add_region_flags(lmb_rgn_lst, base, size, LMB_NONE);
-}
-
-/* This routine may be called with relocation disabled. */
-long lmb_add(phys_addr_t base, phys_size_t size)
-{
- long ret;
- struct alist *lmb_rgn_lst = &lmb.free_mem;
-
- ret = lmb_add_region(lmb_rgn_lst, base, size);
- if (ret)
- return ret;
-
- return lmb_map_update_notify(base, size, MAP_OP_ADD, LMB_NONE);
-}
-
-static long _lmb_free(phys_addr_t base, phys_size_t size)
+static long _lmb_free(struct alist *lmb_rgn_lst, phys_addr_t base,
+ phys_size_t size)
{
struct lmb_region *rgn;
- struct alist *lmb_rgn_lst = &lmb.used_mem;
phys_addr_t rgnbegin, rgnend;
phys_addr_t end = base + size - 1;
int i;
@@ -545,6 +330,332 @@
rgn[i].flags);
}
+static long lmb_overlaps_region(struct alist *lmb_rgn_lst, phys_addr_t base,
+ phys_size_t size)
+{
+ unsigned long i;
+ struct lmb_region *rgn = lmb_rgn_lst->data;
+
+ for (i = 0; i < lmb_rgn_lst->count; i++) {
+ phys_addr_t rgnbase = rgn[i].base;
+ phys_size_t rgnsize = rgn[i].size;
+ if (lmb_addrs_overlap(base, size, rgnbase, rgnsize))
+ break;
+ }
+
+ return (i < lmb_rgn_lst->count) ? i : -1;
+}
+
+static phys_addr_t lmb_align_down(phys_addr_t addr, phys_size_t size)
+{
+ return addr & ~(size - 1);
+}
+
+/*
+ * IOVA LMB memory maps using lmb pointers instead of the global LMB memory map.
+ */
+
+int io_lmb_setup(struct lmb *io_lmb)
+{
+ int ret;
+
+ ret = alist_init(&io_lmb->free_mem, sizeof(struct lmb_region),
+ (uint)LMB_ALIST_INITIAL_SIZE);
+ if (!ret) {
+ log_debug("Unable to initialise the list for LMB free IOVA\n");
+ return -ENOMEM;
+ }
+
+ ret = alist_init(&io_lmb->used_mem, sizeof(struct lmb_region),
+ (uint)LMB_ALIST_INITIAL_SIZE);
+ if (!ret) {
+ log_debug("Unable to initialise the list for LMB used IOVA\n");
+ return -ENOMEM;
+ }
+
+ io_lmb->test = false;
+
+ return 0;
+}
+
+void io_lmb_teardown(struct lmb *io_lmb)
+{
+ alist_uninit(&io_lmb->free_mem);
+ alist_uninit(&io_lmb->used_mem);
+}
+
+long io_lmb_add(struct lmb *io_lmb, phys_addr_t base, phys_size_t size)
+{
+ return lmb_add_region_flags(&io_lmb->free_mem, base, size, LMB_NONE);
+}
+
+/* derived and simplified from _lmb_alloc_base() */
+phys_addr_t io_lmb_alloc(struct lmb *io_lmb, phys_size_t size, ulong align)
+{
+ long i, rgn;
+ phys_addr_t base = 0;
+ phys_addr_t res_base;
+ struct lmb_region *lmb_used = io_lmb->used_mem.data;
+ struct lmb_region *lmb_memory = io_lmb->free_mem.data;
+
+ for (i = io_lmb->free_mem.count - 1; i >= 0; i--) {
+ phys_addr_t lmbbase = lmb_memory[i].base;
+ phys_size_t lmbsize = lmb_memory[i].size;
+
+ if (lmbsize < size)
+ continue;
+ base = lmb_align_down(lmbbase + lmbsize - size, align);
+
+ while (base && lmbbase <= base) {
+ rgn = lmb_overlaps_region(&io_lmb->used_mem, base, size);
+ if (rgn < 0) {
+ /* This area isn't reserved, take it */
+ if (lmb_add_region_flags(&io_lmb->used_mem, base,
+ size, LMB_NONE) < 0)
+ return 0;
+
+ return base;
+ }
+
+ res_base = lmb_used[rgn].base;
+ if (res_base < size)
+ break;
+ base = lmb_align_down(res_base - size, align);
+ }
+ }
+ return 0;
+}
+
+long io_lmb_free(struct lmb *io_lmb, phys_addr_t base, phys_size_t size)
+{
+ return _lmb_free(&io_lmb->used_mem, base, size);
+}
+
+/*
+ * Low level LMB functions are used to manage IOVA memory maps for the Apple
+ * dart iommu. They must not access the global LMB memory map.
+ * So keep the global LMB variable declaration unreachable from them.
+ */
+
+static struct lmb lmb;
+
+static bool lmb_should_notify(enum lmb_flags flags)
+{
+ return !lmb.test && !(flags & LMB_NONOTIFY) &&
+ CONFIG_IS_ENABLED(EFI_LOADER);
+}
+
+static int lmb_map_update_notify(phys_addr_t addr, phys_size_t size, u8 op,
+ enum lmb_flags flags)
+{
+ u64 efi_addr;
+ u64 pages;
+ efi_status_t status;
+
+ if (op != MAP_OP_RESERVE && op != MAP_OP_FREE && op != MAP_OP_ADD) {
+ log_err("Invalid map update op received (%d)\n", op);
+ return -1;
+ }
+
+ if (!lmb_should_notify(flags))
+ return 0;
+
+ efi_addr = (uintptr_t)map_sysmem(addr, 0);
+ pages = efi_size_in_pages(size + (efi_addr & EFI_PAGE_MASK));
+ efi_addr &= ~EFI_PAGE_MASK;
+
+ status = efi_add_memory_map_pg(efi_addr, pages,
+ op == MAP_OP_RESERVE ?
+ EFI_BOOT_SERVICES_DATA :
+ EFI_CONVENTIONAL_MEMORY,
+ false);
+ if (status != EFI_SUCCESS) {
+ log_err("%s: LMB Map notify failure %lu\n", __func__,
+ status & ~EFI_ERROR_MASK);
+ return -1;
+ }
+ unmap_sysmem((void *)(uintptr_t)efi_addr);
+
+ return 0;
+}
+
+static void lmb_print_region_flags(enum lmb_flags flags)
+{
+ u64 bitpos;
+ const char *flag_str[] = { "none", "no-map", "no-overwrite", "no-notify" };
+
+ do {
+ bitpos = flags ? fls(flags) - 1 : 0;
+ assert_noisy(bitpos < ARRAY_SIZE(flag_str));
+ printf("%s", flag_str[bitpos]);
+ flags &= ~(1ull << bitpos);
+ puts(flags ? ", " : "\n");
+ } while (flags);
+}
+
+static void lmb_dump_region(struct alist *lmb_rgn_lst, char *name)
+{
+ struct lmb_region *rgn = lmb_rgn_lst->data;
+ unsigned long long base, size, end;
+ enum lmb_flags flags;
+ int i;
+
+ printf(" %s.count = 0x%x\n", name, lmb_rgn_lst->count);
+
+ for (i = 0; i < lmb_rgn_lst->count; i++) {
+ base = rgn[i].base;
+ size = rgn[i].size;
+ end = base + size - 1;
+ flags = rgn[i].flags;
+
+ printf(" %s[%d]\t[0x%llx-0x%llx], 0x%08llx bytes flags: ",
+ name, i, base, end, size);
+ lmb_print_region_flags(flags);
+ }
+}
+
+void lmb_dump_all_force(void)
+{
+ printf("lmb_dump_all:\n");
+ lmb_dump_region(&lmb.free_mem, "memory");
+ lmb_dump_region(&lmb.used_mem, "reserved");
+}
+
+void lmb_dump_all(void)
+{
+#ifdef DEBUG
+ lmb_dump_all_force();
+#endif
+}
+
+static void lmb_reserve_uboot_region(void)
+{
+ int bank;
+ ulong end, bank_end;
+ phys_addr_t rsv_start;
+
+ rsv_start = gd->start_addr_sp - CONFIG_STACK_SIZE;
+ end = gd->ram_top;
+
+ /*
+ * Reserve memory from aligned address below the bottom of U-Boot stack
+ * until end of RAM area to prevent LMB from overwriting that memory.
+ */
+ debug("## Current stack ends at 0x%08lx ", (ulong)rsv_start);
+
+ for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+ if (!gd->bd->bi_dram[bank].size ||
+ rsv_start < gd->bd->bi_dram[bank].start)
+ continue;
+ /* Watch out for RAM at end of address space! */
+ bank_end = gd->bd->bi_dram[bank].start +
+ gd->bd->bi_dram[bank].size - 1;
+ if (rsv_start > bank_end)
+ continue;
+ if (bank_end > end)
+ bank_end = end - 1;
+
+ lmb_reserve_flags(rsv_start, bank_end - rsv_start + 1,
+ LMB_NOOVERWRITE);
+
+ if (gd->flags & GD_FLG_SKIP_RELOC)
+ lmb_reserve_flags((phys_addr_t)(uintptr_t)_start,
+ gd->mon_len, LMB_NOOVERWRITE);
+
+ break;
+ }
+}
+
+static void lmb_reserve_common(void *fdt_blob)
+{
+ lmb_reserve_uboot_region();
+
+ if (CONFIG_IS_ENABLED(OF_LIBFDT) && fdt_blob)
+ boot_fdt_add_mem_rsv_regions(fdt_blob);
+}
+
+static __maybe_unused void lmb_reserve_common_spl(void)
+{
+ phys_addr_t rsv_start;
+ phys_size_t rsv_size;
+
+ /*
+ * Assume a SPL stack of 16KB. This must be
+ * more than enough for the SPL stage.
+ */
+ if (IS_ENABLED(CONFIG_SPL_STACK_R_ADDR)) {
+ rsv_start = gd->start_addr_sp - 16384;
+ rsv_size = 16384;
+ lmb_reserve_flags(rsv_start, rsv_size, LMB_NOOVERWRITE);
+ }
+
+ if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) {
+ /* Reserve the bss region */
+ rsv_start = (phys_addr_t)(uintptr_t)__bss_start;
+ rsv_size = (phys_addr_t)(uintptr_t)__bss_end -
+ (phys_addr_t)(uintptr_t)__bss_start;
+ lmb_reserve_flags(rsv_start, rsv_size, LMB_NOOVERWRITE);
+ }
+}
+
+/**
+ * lmb_add_memory() - Add memory range for LMB allocations
+ *
+ * Add the entire available memory range to the pool of memory that
+ * can be used by the LMB module for allocations.
+ *
+ * Return: None
+ */
+void lmb_add_memory(void)
+{
+ int i;
+ phys_size_t size;
+ u64 ram_top = gd->ram_top;
+ struct bd_info *bd = gd->bd;
+
+ if (CONFIG_IS_ENABLED(LMB_ARCH_MEM_MAP))
+ return lmb_arch_add_memory();
+
+ /* Assume a 4GB ram_top if not defined */
+ if (!ram_top)
+ ram_top = 0x100000000ULL;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ size = bd->bi_dram[i].size;
+ if (size) {
+ lmb_add(bd->bi_dram[i].start, size);
+
+ /*
+ * Reserve memory above ram_top as
+ * no-overwrite so that it cannot be
+ * allocated
+ */
+ if (bd->bi_dram[i].start >= ram_top)
+ lmb_reserve_flags(bd->bi_dram[i].start, size,
+ LMB_NOOVERWRITE);
+ }
+ }
+}
+
+static long lmb_add_region(struct alist *lmb_rgn_lst, phys_addr_t base,
+ phys_size_t size)
+{
+ return lmb_add_region_flags(lmb_rgn_lst, base, size, LMB_NONE);
+}
+
+/* This routine may be called with relocation disabled. */
+long lmb_add(phys_addr_t base, phys_size_t size)
+{
+ long ret;
+ struct alist *lmb_rgn_lst = &lmb.free_mem;
+
+ ret = lmb_add_region(lmb_rgn_lst, base, size);
+ if (ret)
+ return ret;
+
+ return lmb_map_update_notify(base, size, MAP_OP_ADD, LMB_NONE);
+}
+
/**
* lmb_free_flags() - Free up a region of memory
* @base: Base Address of region to be freed
@@ -560,7 +671,7 @@
{
long ret;
- ret = _lmb_free(base, size);
+ ret = _lmb_free(&lmb.used_mem, base, size);
if (ret < 0)
return ret;
@@ -589,27 +700,6 @@
return lmb_reserve_flags(base, size, LMB_NONE);
}
-static long lmb_overlaps_region(struct alist *lmb_rgn_lst, phys_addr_t base,
- phys_size_t size)
-{
- unsigned long i;
- struct lmb_region *rgn = lmb_rgn_lst->data;
-
- for (i = 0; i < lmb_rgn_lst->count; i++) {
- phys_addr_t rgnbase = rgn[i].base;
- phys_size_t rgnsize = rgn[i].size;
- if (lmb_addrs_overlap(base, size, rgnbase, rgnsize))
- break;
- }
-
- return (i < lmb_rgn_lst->count) ? i : -1;
-}
-
-static phys_addr_t lmb_align_down(phys_addr_t addr, phys_size_t size)
-{
- return addr & ~(size - 1);
-}
-
static phys_addr_t _lmb_alloc_base(phys_size_t size, ulong align,
phys_addr_t max_addr, enum lmb_flags flags)
{
diff --git a/lib/lwip/Makefile b/lib/lwip/Makefile
index dfcd700..19e5c68 100644
--- a/lib/lwip/Makefile
+++ b/lib/lwip/Makefile
@@ -53,3 +53,6 @@
lwip/src/core/timeouts.o \
lwip/src/core/udp.o \
lwip/src/netif/ethernet.o
+
+obj-$(CONFIG_MBEDTLS_LIB_TLS) += lwip/src/apps/altcp_tls/altcp_tls_mbedtls.o \
+ lwip/src/apps/altcp_tls/altcp_tls_mbedtls_mem.o
diff --git a/lib/lwip/lwip/src/apps/altcp_tls/altcp_tls_mbedtls.c b/lib/lwip/lwip/src/apps/altcp_tls/altcp_tls_mbedtls.c
index a8c2fc2..6643b05 100644
--- a/lib/lwip/lwip/src/apps/altcp_tls/altcp_tls_mbedtls.c
+++ b/lib/lwip/lwip/src/apps/altcp_tls/altcp_tls_mbedtls.c
@@ -70,7 +70,6 @@
/* @todo: which includes are really needed? */
#include "mbedtls/entropy.h"
#include "mbedtls/ctr_drbg.h"
-#include "mbedtls/certs.h"
#include "mbedtls/x509.h"
#include "mbedtls/ssl.h"
#include "mbedtls/net_sockets.h"
@@ -81,8 +80,6 @@
#include "mbedtls/ssl_cache.h"
#include "mbedtls/ssl_ticket.h"
-#include "mbedtls/ssl_internal.h" /* to call mbedtls_flush_output after ERR_MEM */
-
#include <string.h>
#ifndef ALTCP_MBEDTLS_ENTROPY_PTR
@@ -109,6 +106,7 @@
u8_t pkey_count;
u8_t pkey_max;
mbedtls_x509_crt *ca;
+ char host[256];
#if defined(MBEDTLS_SSL_CACHE_C) && ALTCP_MBEDTLS_USE_SESSION_CACHE
/** Inter-connection cache for fast connection startup */
struct mbedtls_ssl_cache_context cache;
@@ -132,6 +130,16 @@
static err_t altcp_mbedtls_handle_rx_appldata(struct altcp_pcb *conn, altcp_mbedtls_state_t *state);
static int altcp_mbedtls_bio_send(void *ctx, const unsigned char *dataptr, size_t size);
+static void
+altcp_mbedtls_flush_output(altcp_mbedtls_state_t *state)
+{
+ if (state->ssl_context.MBEDTLS_PRIVATE(out_left) != 0) {
+ int flushed = mbedtls_ssl_send_alert_message(&state->ssl_context, 0, 0);
+ if (flushed) {
+ LWIP_DEBUGF(ALTCP_MBEDTLS_DEBUG, ("mbedtls_ssl_send_alert_message failed: %d\n", flushed));
+ }
+ }
+}
/* callback functions from inner/lower connection: */
@@ -524,14 +532,14 @@
LWIP_ASSERT("state", state != NULL);
LWIP_ASSERT("pcb mismatch", conn->inner_conn == inner_conn);
/* calculate TLS overhead part to not send it to application */
- overhead = state->overhead_bytes_adjust + state->ssl_context.out_left;
+ overhead = state->overhead_bytes_adjust + state->ssl_context.MBEDTLS_PRIVATE(out_left);
if ((unsigned)overhead > len) {
overhead = len;
}
/* remove ACKed bytes from overhead adjust counter */
state->overhead_bytes_adjust -= len;
/* try to send more if we failed before (may increase overhead adjust counter) */
- mbedtls_ssl_flush_output(&state->ssl_context);
+ altcp_mbedtls_flush_output(state);
/* remove calculated overhead from ACKed bytes len */
app_len = len - (u16_t)overhead;
/* update application write counter and inform application */
@@ -559,7 +567,7 @@
if (conn->state) {
altcp_mbedtls_state_t *state = (altcp_mbedtls_state_t *)conn->state;
/* try to send more if we failed before */
- mbedtls_ssl_flush_output(&state->ssl_context);
+ altcp_mbedtls_flush_output(state);
if (altcp_mbedtls_handle_rx_appldata(conn, state) == ERR_ABRT) {
return ERR_ABRT;
}
@@ -635,6 +643,7 @@
/* tell mbedtls about our I/O functions */
mbedtls_ssl_set_bio(&state->ssl_context, conn, altcp_mbedtls_bio_send, altcp_mbedtls_bio_recv, NULL);
+ mbedtls_ssl_set_hostname(&state->ssl_context, config->host);
altcp_mbedtls_setup_callbacks(conn, inner_conn);
conn->inner_conn = inner_conn;
conn->fns = &altcp_mbedtls_functions;
@@ -683,7 +692,7 @@
if (session && conn && conn->state) {
altcp_mbedtls_state_t *state = (altcp_mbedtls_state_t *)conn->state;
int ret = -1;
- if (session->data.start)
+ if (session->data.MBEDTLS_PRIVATE(start))
ret = mbedtls_ssl_set_session(&state->ssl_context, &session->data);
return ret < 0 ? ERR_VAL : ERR_OK;
}
@@ -776,7 +785,7 @@
struct altcp_tls_config *conf;
mbedtls_x509_crt *mem;
- if (TCP_WND < MBEDTLS_SSL_MAX_CONTENT_LEN) {
+ if (TCP_WND < MBEDTLS_SSL_IN_CONTENT_LEN || TCP_WND < MBEDTLS_SSL_OUT_CONTENT_LEN) {
LWIP_DEBUGF(ALTCP_MBEDTLS_DEBUG|LWIP_DBG_LEVEL_SERIOUS,
("altcp_tls: TCP_WND is smaller than the RX decrypion buffer, connection RX might stall!\n"));
}
@@ -900,7 +909,7 @@
return ERR_VAL;
}
- ret = mbedtls_pk_parse_key(pkey, (const unsigned char *) privkey, privkey_len, privkey_pass, privkey_pass_len);
+ ret = mbedtls_pk_parse_key(pkey, (const unsigned char *) privkey, privkey_len, privkey_pass, privkey_pass_len, mbedtls_ctr_drbg_random, &altcp_tls_entropy_rng->ctr_drbg);
if (ret != 0) {
LWIP_DEBUGF(ALTCP_MBEDTLS_DEBUG, ("mbedtls_pk_parse_public_key failed: %d\n", ret));
mbedtls_x509_crt_free(srvcert);
@@ -944,7 +953,7 @@
}
static struct altcp_tls_config *
-altcp_tls_create_config_client_common(const u8_t *ca, size_t ca_len, int is_2wayauth)
+altcp_tls_create_config_client_common(const u8_t *ca, size_t ca_len, int is_2wayauth, char *host)
{
int ret;
struct altcp_tls_config *conf = altcp_tls_create_config(0, (is_2wayauth) ? 1 : 0, (is_2wayauth) ? 1 : 0, ca != NULL);
@@ -966,13 +975,15 @@
mbedtls_ssl_conf_ca_chain(&conf->conf, conf->ca, NULL);
}
+ strlcpy(conf->host, host, sizeof(conf->host));
+
return conf;
}
struct altcp_tls_config *
-altcp_tls_create_config_client(const u8_t *ca, size_t ca_len)
+altcp_tls_create_config_client(const u8_t *ca, size_t ca_len, char *host)
{
- return altcp_tls_create_config_client_common(ca, ca_len, 0);
+ return altcp_tls_create_config_client_common(ca, ca_len, 0, host);
}
struct altcp_tls_config *
@@ -988,7 +999,7 @@
return NULL;
}
- conf = altcp_tls_create_config_client_common(ca, ca_len, 1);
+ conf = altcp_tls_create_config_client_common(ca, ca_len, 1, NULL);
if (conf == NULL) {
return NULL;
}
@@ -1003,7 +1014,7 @@
}
mbedtls_pk_init(conf->pkey);
- ret = mbedtls_pk_parse_key(conf->pkey, privkey, privkey_len, privkey_pass, privkey_pass_len);
+ ret = mbedtls_pk_parse_key(conf->pkey, privkey, privkey_len, privkey_pass, privkey_pass_len, mbedtls_ctr_drbg_random, &altcp_tls_entropy_rng->ctr_drbg);
if (ret != 0) {
LWIP_DEBUGF(ALTCP_MBEDTLS_DEBUG, ("mbedtls_pk_parse_key failed: %d 0x%x\n", ret, -1*ret));
altcp_tls_free_config(conf);
@@ -1189,7 +1200,7 @@
size_t ret;
#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
/* @todo: adjust ssl_added to real value related to negotiated cipher */
- size_t max_frag_len = mbedtls_ssl_get_max_frag_len(&state->ssl_context);
+ size_t max_frag_len = mbedtls_ssl_get_max_in_record_payload(&state->ssl_context);
max_len = LWIP_MIN(max_frag_len, max_len);
#endif
/* Adjust sndbuf of inner_conn with what added by SSL */
@@ -1232,9 +1243,9 @@
/* HACK: if there is something left to send, try to flush it and only
allow sending more if this succeeded (this is a hack because neither
returning 0 nor MBEDTLS_ERR_SSL_WANT_WRITE worked for me) */
- if (state->ssl_context.out_left) {
- mbedtls_ssl_flush_output(&state->ssl_context);
- if (state->ssl_context.out_left) {
+ if (state->ssl_context.MBEDTLS_PRIVATE(out_left)) {
+ altcp_mbedtls_flush_output(state);
+ if (state->ssl_context.MBEDTLS_PRIVATE(out_left)) {
return ERR_MEM;
}
}
@@ -1284,6 +1295,8 @@
while (size_left) {
u16_t write_len = (u16_t)LWIP_MIN(size_left, 0xFFFF);
err_t err = altcp_write(conn->inner_conn, (const void *)dataptr, write_len, apiflags);
+ /* try to send data... */
+ altcp_output(conn->inner_conn);
if (err == ERR_OK) {
written += write_len;
size_left -= write_len;
diff --git a/lib/lwip/lwip/src/core/tcp_out.c b/lib/lwip/lwip/src/core/tcp_out.c
index 64579ee5..6dbc5f9 100644
--- a/lib/lwip/lwip/src/core/tcp_out.c
+++ b/lib/lwip/lwip/src/core/tcp_out.c
@@ -1255,14 +1255,6 @@
LWIP_ASSERT("don't call tcp_output for listen-pcbs",
pcb->state != LISTEN);
- /* First, check if we are invoked by the TCP input processing
- code. If so, we do not output anything. Instead, we rely on the
- input processing code to call us when input processing is done
- with. */
- if (tcp_input_pcb == pcb) {
- return ERR_OK;
- }
-
wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd);
seg = pcb->unsent;
diff --git a/lib/lwip/lwip/src/include/lwip/altcp_tls.h b/lib/lwip/lwip/src/include/lwip/altcp_tls.h
index fcb784d..fb06182 100644
--- a/lib/lwip/lwip/src/include/lwip/altcp_tls.h
+++ b/lib/lwip/lwip/src/include/lwip/altcp_tls.h
@@ -92,7 +92,7 @@
/** @ingroup altcp_tls
* Create an ALTCP_TLS client configuration handle
*/
-struct altcp_tls_config *altcp_tls_create_config_client(const u8_t *cert, size_t cert_len);
+struct altcp_tls_config *altcp_tls_create_config_client(const u8_t *cert, size_t cert_len, char *host);
/** @ingroup altcp_tls
* Create an ALTCP_TLS client configuration handle with two-way server/client authentication
diff --git a/lib/lwip/u-boot/lwipopts.h b/lib/lwip/u-boot/lwipopts.h
index 9d61862..88d6faf 100644
--- a/lib/lwip/u-boot/lwipopts.h
+++ b/lib/lwip/u-boot/lwipopts.h
@@ -154,4 +154,10 @@
#define MEMP_MEM_INIT 1
#define MEM_LIBC_MALLOC 1
+#if defined(CONFIG_MBEDTLS_LIB_TLS)
+#define LWIP_ALTCP 1
+#define LWIP_ALTCP_TLS 1
+#define LWIP_ALTCP_TLS_MBEDTLS 1
+#endif
+
#endif /* LWIP_UBOOT_LWIPOPTS_H */
diff --git a/lib/mbedtls/Kconfig b/lib/mbedtls/Kconfig
index d71adc3..78167ff 100644
--- a/lib/mbedtls/Kconfig
+++ b/lib/mbedtls/Kconfig
@@ -430,4 +430,16 @@
endif # MBEDTLS_LIB_X509
+config MBEDTLS_LIB_TLS
+ bool "MbedTLS TLS library"
+ depends on RSA_PUBLIC_KEY_PARSER_MBEDTLS
+ depends on X509_CERTIFICATE_PARSER_MBEDTLS
+ depends on ASYMMETRIC_PUBLIC_KEY_MBEDTLS
+ depends on ASN1_DECODER_MBEDTLS
+ depends on ASYMMETRIC_PUBLIC_KEY_MBEDTLS
+ depends on MBEDTLS_LIB_CRYPTO
+ help
+ Enable MbedTLS TLS library. Required for HTTPs support
+ in wget
+
endif # MBEDTLS_LIB
diff --git a/lib/mbedtls/Makefile b/lib/mbedtls/Makefile
index 83cb3c2..ce0a61e 100644
--- a/lib/mbedtls/Makefile
+++ b/lib/mbedtls/Makefile
@@ -26,6 +26,7 @@
$(MBEDTLS_LIB_DIR)/platform_util.o \
$(MBEDTLS_LIB_DIR)/constant_time.o \
$(MBEDTLS_LIB_DIR)/md.o
+
mbedtls_lib_crypto-$(CONFIG_$(SPL_)MD5_MBEDTLS) += $(MBEDTLS_LIB_DIR)/md5.o
mbedtls_lib_crypto-$(CONFIG_$(SPL_)SHA1_MBEDTLS) += $(MBEDTLS_LIB_DIR)/sha1.o
mbedtls_lib_crypto-$(CONFIG_$(SPL_)SHA256_MBEDTLS) += \
@@ -54,3 +55,33 @@
$(MBEDTLS_LIB_DIR)/x509_crt.o
mbedtls_lib_x509-$(CONFIG_$(SPL_)PKCS7_MESSAGE_PARSER_MBEDTLS) += \
$(MBEDTLS_LIB_DIR)/pkcs7.o
+
+#mbedTLS TLS support
+obj-$(CONFIG_MBEDTLS_LIB_TLS) += mbedtls_lib_tls.o
+mbedtls_lib_tls-y := \
+ $(MBEDTLS_LIB_DIR)/mps_reader.o \
+ $(MBEDTLS_LIB_DIR)/mps_trace.o \
+ $(MBEDTLS_LIB_DIR)/net_sockets.o \
+ $(MBEDTLS_LIB_DIR)/pk_ecc.o \
+ $(MBEDTLS_LIB_DIR)/ssl_cache.o \
+ $(MBEDTLS_LIB_DIR)/ssl_ciphersuites.o \
+ $(MBEDTLS_LIB_DIR)/ssl_client.o \
+ $(MBEDTLS_LIB_DIR)/ssl_cookie.o \
+ $(MBEDTLS_LIB_DIR)/ssl_debug_helpers_generated.o \
+ $(MBEDTLS_LIB_DIR)/ssl_msg.o \
+ $(MBEDTLS_LIB_DIR)/ssl_ticket.o \
+ $(MBEDTLS_LIB_DIR)/ssl_tls.o \
+ $(MBEDTLS_LIB_DIR)/ssl_tls12_client.o \
+ $(MBEDTLS_LIB_DIR)/hmac_drbg.o \
+ $(MBEDTLS_LIB_DIR)/ctr_drbg.o \
+ $(MBEDTLS_LIB_DIR)/entropy.o \
+ $(MBEDTLS_LIB_DIR)/entropy_poll.o \
+ $(MBEDTLS_LIB_DIR)/aes.o \
+ $(MBEDTLS_LIB_DIR)/cipher.o \
+ $(MBEDTLS_LIB_DIR)/cipher_wrap.o \
+ $(MBEDTLS_LIB_DIR)/ecdh.o \
+ $(MBEDTLS_LIB_DIR)/ecdsa.o \
+ $(MBEDTLS_LIB_DIR)/ecp.o \
+ $(MBEDTLS_LIB_DIR)/ecp_curves.o \
+ $(MBEDTLS_LIB_DIR)/ecp_curves_new.o \
+ $(MBEDTLS_LIB_DIR)/gcm.o \
diff --git a/lib/mbedtls/mbedtls_def_config.h b/lib/mbedtls/mbedtls_def_config.h
index 1af911c..d27f017 100644
--- a/lib/mbedtls/mbedtls_def_config.h
+++ b/lib/mbedtls/mbedtls_def_config.h
@@ -87,4 +87,56 @@
#endif /* #if defined CONFIG_MBEDTLS_LIB_X509 */
+#if IS_ENABLED(CONFIG_MBEDTLS_LIB_TLS)
+#include "rtc.h"
+
+/* Generic options */
+#define MBEDTLS_ENTROPY_HARDWARE_ALT
+#define MBEDTLS_HAVE_TIME
+#define MBEDTLS_PLATFORM_MS_TIME_ALT
+#define MBEDTLS_PLATFORM_TIME_MACRO rtc_mktime
+#define MBEDTLS_PLATFORM_C
+#define MBEDTLS_SSL_CLI_C
+#define MBEDTLS_SSL_TLS_C
+#define MBEDTLS_CIPHER_C
+#define MBEDTLS_MD_C
+#define MBEDTLS_CTR_DRBG_C
+#define MBEDTLS_AES_C
+#define MBEDTLS_ENTROPY_C
+#define MBEDTLS_NO_PLATFORM_ENTROPY
+#define MBEDTLS_SSL_PROTO_TLS1_2
+#define MBEDTLS_SSL_SERVER_NAME_INDICATION
+#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+
+/* RSA */
+#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+#define MBEDTLS_GCM_C
+
+/* ECDSA */
+#define MBEDTLS_ECDSA_C
+#define MBEDTLS_ECDH_C
+#define MBEDTLS_ECDSA_DETERMINISTIC
+#define MBEDTLS_HMAC_DRBG_C
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+#define MBEDTLS_CAN_ECDH
+#define MBEDTLS_PK_CAN_ECDSA_SIGN
+#define MBEDTLS_ECP_C
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+
+#endif /* #if defined CONFIG_MBEDTLS_LIB_TLS */
+
#endif /* #if defined CONFIG_MBEDTLS_LIB */
diff --git a/lib/strto.c b/lib/strto.c
index f83ac67..206d1e9 100644
--- a/lib/strto.c
+++ b/lib/strto.c
@@ -78,6 +78,11 @@
return simple_strtoul(cp, endp, 16);
}
+unsigned long long hextoull(const char *cp, char **endp)
+{
+ return simple_strtoull(cp, endp, 16);
+}
+
ulong dectoul(const char *cp, char **endp)
{
return simple_strtoul(cp, endp, 10);
diff --git a/lib/uuid.c b/lib/uuid.c
index c6a27b7..538a1ba 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -35,6 +35,7 @@
#ifdef USE_HOSTCC
/* polyfill hextoul to avoid pulling in strto.c */
#define hextoul(cp, endp) strtoul(cp, endp, 16)
+#define hextoull(cp, endp) strtoull(cp, endp, 16)
#endif
int uuid_str_valid(const char *uuid)
@@ -312,7 +313,7 @@
tmp16 = cpu_to_be16(hextoul(uuid_str + 19, NULL));
memcpy(uuid_bin + 8, &tmp16, 2);
- tmp64 = cpu_to_be64(hextoul(uuid_str + 24, NULL));
+ tmp64 = cpu_to_be64(hextoull(uuid_str + 24, NULL));
memcpy(uuid_bin + 10, (char *)&tmp64 + 2, 6);
return 0;
@@ -339,7 +340,7 @@
tmp16 = cpu_to_le16(hextoul(uuid_str + 19, NULL));
memcpy(uuid_bin + 8, &tmp16, 2);
- tmp64 = cpu_to_le64(hextoul(uuid_str + 24, NULL));
+ tmp64 = cpu_to_le64(hextoull(uuid_str + 24, NULL));
memcpy(uuid_bin + 10, &tmp64, 6);
return 0;
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index e580286..c7340a0 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -308,7 +308,7 @@
return buf;
}
-#if CONFIG_IS_ENABLED(EFI_DEVICE_PATH_TO_TEXT)
+#if CONFIG_IS_ENABLED(EFI_DEVICE_PATH_TO_TEXT) && !defined(API_BUILD)
static char *device_path_string(char *buf, char *end, void *dp, int field_width,
int precision, int flags)
{
diff --git a/net/lwip/Kconfig b/net/lwip/Kconfig
index 8a67de4..a9ae9bf 100644
--- a/net/lwip/Kconfig
+++ b/net/lwip/Kconfig
@@ -37,7 +37,7 @@
config LWIP_TCP_WND
int "Value of TCP_WND"
- default 8000 if ARCH_QEMU
+ default 32768 if ARCH_QEMU
default 3000000
help
Default value for TCP_WND in the lwIP configuration
diff --git a/net/lwip/wget.c b/net/lwip/wget.c
index b495ebd..ba85798 100644
--- a/net/lwip/wget.c
+++ b/net/lwip/wget.c
@@ -7,13 +7,17 @@
#include <efi_loader.h>
#include <image.h>
#include <lwip/apps/http_client.h>
+#include "lwip/altcp_tls.h"
#include <lwip/timeouts.h>
+#include <rng.h>
#include <mapmem.h>
#include <net.h>
#include <time.h>
+#include <dm/uclass.h>
#define SERVER_NAME_SIZE 200
#define HTTP_PORT_DEFAULT 80
+#define HTTPS_PORT_DEFAULT 443
#define PROGRESS_PRINT_STEP_BYTES (100 * 1024)
enum done_state {
@@ -32,18 +36,56 @@
enum done_state done;
};
-static int parse_url(char *url, char *host, u16 *port, char **path)
+bool wget_validate_uri(char *uri);
+
+int mbedtls_hardware_poll(void *data, unsigned char *output, size_t len,
+ size_t *olen)
+{
+ struct udevice *dev;
+ u64 rng = 0;
+ int ret;
+
+ *olen = 0;
+
+ ret = uclass_get_device(UCLASS_RNG, 0, &dev);
+ if (ret) {
+ log_err("Failed to get an rng: %d\n", ret);
+ return ret;
+ }
+ ret = dm_rng_read(dev, &rng, sizeof(rng));
+ if (ret)
+ return ret;
+
+ memcpy(output, &rng, len);
+ *olen = sizeof(rng);
+
+ return 0;
+}
+
+static int parse_url(char *url, char *host, u16 *port, char **path,
+ bool *is_https)
{
char *p, *pp;
long lport;
+ size_t prefix_len = 0;
+ if (!wget_validate_uri(url)) {
+ log_err("Invalid URL. Use http(s)://\n");
+ return -EINVAL;
+ }
+
+ *is_https = false;
+ *port = HTTP_PORT_DEFAULT;
+ prefix_len = strlen("http://");
p = strstr(url, "http://");
if (!p) {
- log_err("only http:// is supported\n");
- return -EINVAL;
+ p = strstr(url, "https://");
+ prefix_len = strlen("https://");
+ *port = HTTPS_PORT_DEFAULT;
+ *is_https = true;
}
- p += strlen("http://");
+ p += prefix_len;
/* Parse hostname */
pp = strchr(p, ':');
@@ -67,9 +109,8 @@
if (lport > 65535)
return -EINVAL;
*port = (u16)lport;
- } else {
- *port = HTTP_PORT_DEFAULT;
}
+
if (*pp != '/')
return -EINVAL;
*path = pp;
@@ -210,12 +251,16 @@
static int wget_loop(struct udevice *udev, ulong dst_addr, char *uri)
{
char server_name[SERVER_NAME_SIZE];
+#if defined CONFIG_WGET_HTTPS
+ altcp_allocator_t tls_allocator;
+#endif
httpc_connection_t conn;
httpc_state_t *state;
struct netif *netif;
struct wget_ctx ctx;
char *path;
u16 port;
+ bool is_https;
ctx.daddr = dst_addr;
ctx.saved_daddr = dst_addr;
@@ -224,7 +269,7 @@
ctx.prevsize = 0;
ctx.start_time = 0;
- if (parse_url(uri, server_name, &port, &path))
+ if (parse_url(uri, server_name, &port, &path, &is_https))
return CMD_RET_USAGE;
netif = net_lwip_new_netif(udev);
@@ -232,6 +277,22 @@
return -1;
memset(&conn, 0, sizeof(conn));
+#if defined CONFIG_WGET_HTTPS
+ if (is_https) {
+ tls_allocator.alloc = &altcp_tls_alloc;
+ tls_allocator.arg =
+ altcp_tls_create_config_client(NULL, 0, server_name);
+
+ if (!tls_allocator.arg) {
+ log_err("error: Cannot create a TLS connection\n");
+ net_lwip_remove_netif(netif);
+ return -1;
+ }
+
+ conn.altcp_allocator = &tls_allocator;
+ }
+#endif
+
conn.result_fn = httpc_result_cb;
ctx.path = path;
if (httpc_get_file_dns(server_name, port, path, &conn, httpc_recv_cb,
@@ -316,6 +377,7 @@
char c;
bool ret = true;
char *str_copy, *s, *authority;
+ size_t prefix_len = 0;
for (c = 0x1; c < 0x21; c++) {
if (strchr(uri, c)) {
@@ -323,15 +385,21 @@
return false;
}
}
+
if (strchr(uri, 0x7f)) {
log_err("invalid character is used\n");
return false;
}
- if (strncmp(uri, "http://", 7)) {
- log_err("only http:// is supported\n");
+ if (!strncmp(uri, "http://", strlen("http://"))) {
+ prefix_len = strlen("http://");
+ } else if (!strncmp(uri, "https://", strlen("https://"))) {
+ prefix_len = strlen("https://");
+ } else {
+ log_err("only http(s):// is supported\n");
return false;
}
+
str_copy = strdup(uri);
if (!str_copy)
return false;
diff --git a/net/wget.c b/net/wget.c
index 635f82e..361817a 100644
--- a/net/wget.c
+++ b/net/wget.c
@@ -26,7 +26,6 @@
static const char bootfile3[] = " HTTP/1.0\r\n\r\n";
static const char http_eom[] = "\r\n\r\n";
static const char http_ok[] = "200";
-static const char content_len[] = "Content-Length";
static const char linefeed[] = "\r\n";
static struct in_addr web_server_ip;
static int our_port;
@@ -46,7 +45,6 @@
#define PKTQ_SZ (PKTBUFSRX / 4)
static struct pkt_qd pkt_q[PKTQ_SZ];
static int pkt_q_idx;
-static unsigned long content_length;
static unsigned int packets;
static unsigned int initial_data_seq_num;
@@ -251,17 +249,6 @@
"wget: Connected Pkt %p hlen %x\n",
pkt, hlen);
- pos = strstr((char *)pkt, content_len);
- if (!pos) {
- content_length = -1;
- } else {
- pos += sizeof(content_len) + 2;
- strict_strtoul(pos, 10, &content_length);
- debug_cond(DEBUG_WGET,
- "wget: Connected Len %lu\n",
- content_length);
- }
-
net_boot_file_size = 0;
if (len > hlen) {
diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped
index 56cc5d4..e465948 100644
--- a/scripts/dtc/pylibfdt/libfdt.i_shipped
+++ b/scripts/dtc/pylibfdt/libfdt.i_shipped
@@ -1037,7 +1037,7 @@
fdt_string(fdt1, fdt32_to_cpu($1->nameoff)));
buff = PyByteArray_FromStringAndSize(
(const char *)($1 + 1), fdt32_to_cpu($1->len));
- resultobj = SWIG_Python_AppendOutput(resultobj, buff);
+ resultobj = SWIG_AppendOutput(resultobj, buff);
}
}
@@ -1076,7 +1076,7 @@
%typemap(argout) int *depth {
PyObject *val = Py_BuildValue("i", *arg$argnum);
- resultobj = SWIG_Python_AppendOutput(resultobj, val);
+ resultobj = SWIG_AppendOutput(resultobj, val);
}
%apply int *depth { int *depth };
@@ -1092,7 +1092,7 @@
if (PyTuple_GET_SIZE(resultobj) == 0)
resultobj = val;
else
- resultobj = SWIG_Python_AppendOutput(resultobj, val);
+ resultobj = SWIG_AppendOutput(resultobj, val);
}
}
diff --git a/test/Makefile b/test/Makefile
index 145c952..47a07d6 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -4,14 +4,8 @@
obj-y += test-main.o
-ifneq ($(CONFIG_$(XPL_)BLOBLIST),)
-obj-$(CONFIG_$(XPL_)CMDLINE) += bloblist.o
-obj-$(CONFIG_$(XPL_)CMDLINE) += bootm.o
-endif
obj-$(CONFIG_$(XPL_)CMDLINE) += cmd/
obj-$(CONFIG_$(XPL_)CMDLINE) += cmd_ut.o
-obj-$(CONFIG_$(XPL_)CMDLINE) += command_ut.o
-obj-$(CONFIG_$(XPL_)UT_COMPRESSION) += compression.o
obj-y += dm/
obj-$(CONFIG_FUZZ) += fuzz/
ifndef CONFIG_SANDBOX_VPL
@@ -20,16 +14,12 @@
ifneq ($(CONFIG_HUSH_PARSER),)
obj-$(CONFIG_$(XPL_)CMDLINE) += hush/
endif
-obj-$(CONFIG_$(XPL_)CMDLINE) += print_ut.o
-obj-$(CONFIG_$(XPL_)CMDLINE) += str_ut.o
-obj-$(CONFIG_UT_TIME) += time_ut.o
obj-y += ut.o
ifeq ($(CONFIG_XPL_BUILD),)
obj-y += boot/
obj-$(CONFIG_UNIT_TEST) += common/
obj-y += log/
-obj-$(CONFIG_$(XPL_)UT_UNICODE) += unicode_ut.o
else
obj-$(CONFIG_SPL_UT_LOAD) += image/
endif
diff --git a/test/boot/Makefile b/test/boot/Makefile
index d8eded2..63487e8 100644
--- a/test/boot/Makefile
+++ b/test/boot/Makefile
@@ -10,6 +10,9 @@
obj-$(CONFIG_CEDIT) += cedit.o
endif
+ifdef CONFIG_SANDBOX
+obj-$(CONFIG_$(XPL_)CMDLINE) += bootm.o
+endif
obj-$(CONFIG_MEASURED_BOOT) += measurement.o
ifdef CONFIG_OF_LIVE
diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c
index 369105c..8c44afd 100644
--- a/test/boot/bootdev.c
+++ b/test/boot/bootdev.c
@@ -221,6 +221,10 @@
/* Use the environment variable to override it */
ut_assertok(env_set("boot_targets", "mmc1 mmc2 usb"));
ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow));
+
+ /* get the usb device which has a backing file (flash1.img) */
+ ut_asserteq(0, bootflow_scan_next(&iter, &bflow));
+
ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
ut_asserteq(5, iter.num_devs);
ut_asserteq_str("mmc1.bootdev", iter.dev_used[0]->name);
@@ -260,7 +264,11 @@
ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow));
ut_asserteq(2, iter.num_devs);
- /* Now scan past mmc1 and make sure that the 3 USB devices show up */
+ /*
+ * Now scan past mmc1 and make sure that the 3 USB devices show up. The
+ * first one has a backing file so returns success
+ */
+ ut_asserteq(0, bootflow_scan_next(&iter, &bflow));
ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
ut_asserteq(6, iter.num_devs);
ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name);
@@ -322,6 +330,10 @@
/* 3 MMC and 3 USB bootdevs: MMC should come before USB */
ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow));
+
+ /* get the usb device which has a backing file (flash1.img) */
+ ut_asserteq(0, bootflow_scan_next(&iter, &bflow));
+
ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
ut_asserteq(6, iter.num_devs);
ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name);
@@ -339,6 +351,10 @@
bootflow_iter_uninit(&iter);
ut_assertok(bootflow_scan_first(NULL, NULL, &iter, BOOTFLOWIF_HUNT,
&bflow));
+
+ /* get the usb device which has a backing file (flash1.img) */
+ ut_asserteq(0, bootflow_scan_next(&iter, &bflow));
+
ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
ut_asserteq(7, iter.num_devs);
ut_asserteq_str("usb_mass_storage.lun0.bootdev",
@@ -630,7 +646,7 @@
ut_assertok(bootdev_next_label(&iter, &dev, &mflags));
ut_assert_nextline("scanning bus for devices...");
ut_assert_skip_to_line(
- " Capacity: 1.9 MB = 0.0 GB (4095 x 512)");
+ " Capacity: 2.0 MB = 0.0 GB (4096 x 512)");
ut_assert_console_end();
ut_assertnonnull(dev);
ut_asserteq_str("scsi.id0lun0.bootdev", dev->name);
diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c
index 0d4e966..9397328 100644
--- a/test/boot/bootflow.c
+++ b/test/boot/bootflow.c
@@ -12,7 +12,8 @@
#include <bootstd.h>
#include <cli.h>
#include <dm.h>
-#include <efi_default_filename.h>
+#include <efi.h>
+#include <efi_loader.h>
#include <expo.h>
#ifdef CONFIG_SANDBOX
#include <asm/test.h>
@@ -31,6 +32,9 @@
extern U_BOOT_DRIVER(bootmeth_cros);
extern U_BOOT_DRIVER(bootmeth_2script);
+/* Use this as the vendor for EFI to tell the app to exit boot services */
+static u16 __efi_runtime_data test_vendor[] = u"U-Boot testing";
+
static int inject_response(struct unit_test_state *uts)
{
/*
@@ -184,8 +188,9 @@
ut_assert_nextline(" 3 efi media mmc 0 mmc1.bootdev.whole ");
ut_assert_nextline(" ** No partition found, err=-2: No such file or directory");
ut_assert_nextline(" 4 extlinux ready mmc 1 mmc1.bootdev.part_1 /extlinux/extlinux.conf");
- ut_assert_nextline(" 5 efi fs mmc 1 mmc1.bootdev.part_1 /EFI/BOOT/"
- BOOTEFI_NAME);
+ ut_assert_nextline(
+ " 5 efi fs mmc 1 mmc1.bootdev.part_1 /EFI/BOOT/%s",
+ efi_get_basename());
ut_assert_skip_to_line("Scanning bootdev 'mmc0.bootdev':");
ut_assert_skip_to_line(
@@ -370,7 +375,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_iter, UTF_DM | UTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_iter, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
#if defined(CONFIG_SANDBOX) && defined(CONFIG_BOOTMETH_GLOBAL)
/* Check using the system bootdev */
@@ -533,7 +538,7 @@
order[2] = mmc_dev;
- /* Enable the mmc4 node since we need a second bootflow */
+ /* Enable the requested mmc node since we need a second bootflow */
root = oftree_root(oftree_default());
node = ofnode_find_subnode(root, mmc_dev);
ut_assert(ofnode_valid(node));
@@ -542,7 +547,7 @@
/* Enable the script bootmeth too */
ut_assertok(uclass_first_device_err(UCLASS_BOOTSTD, &bootstd));
ut_assertok(device_bind(bootstd, DM_DRIVER_REF(bootmeth_2script),
- "bootmeth_script", 0, ofnode_null(), &dev));
+ "script", 0, ofnode_null(), &dev));
/* Enable the cros bootmeth if needed */
if (IS_ENABLED(CONFIG_BOOTMETH_CROS) && bind_cros_android) {
@@ -1216,3 +1221,66 @@
return 0;
}
BOOTSTD_TEST(bootflow_android, UTF_CONSOLE);
+
+/* Test EFI bootmeth */
+static int bootflow_efi(struct unit_test_state *uts)
+{
+ static const char *order[] = {"mmc1", "usb", NULL};
+ struct bootstd_priv *std;
+ struct udevice *bootstd;
+ const char **old_order;
+
+ ut_assertok(uclass_first_device_err(UCLASS_BOOTSTD, &bootstd));
+ std = dev_get_priv(bootstd);
+ old_order = std->bootdev_order;
+ std->bootdev_order = order;
+
+ /* disable ethernet since the hunter will run dhcp */
+ test_set_eth_enable(false);
+
+ /* make USB scan without delays */
+ test_set_skip_delays(true);
+
+ bootstd_reset_usb();
+
+ ut_assertok(run_command("bootflow scan", 0));
+ ut_assert_skip_to_line(
+ "Bus usb@1: scanning bus usb@1 for devices... 5 USB Device(s) found");
+
+ ut_assertok(run_command("bootflow list", 0));
+
+ ut_assert_nextlinen("Showing all");
+ ut_assert_nextlinen("Seq");
+ ut_assert_nextlinen("---");
+ ut_assert_nextlinen(" 0 extlinux");
+ ut_assert_nextlinen(
+ " 1 efi ready usb_mass_ 1 usb_mass_storage.lun0.boo /EFI/BOOT/BOOTSBOX.EFI");
+ ut_assert_nextlinen("---");
+ ut_assert_skip_to_line("(2 bootflows, 2 valid)");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("bootflow select 1", 0));
+ ut_assert_console_end();
+
+ systab.fw_vendor = test_vendor;
+
+ ut_asserteq(1, run_command("bootflow boot", 0));
+ ut_assert_nextline(
+ "** Booting bootflow 'usb_mass_storage.lun0.bootdev.part_1' with efi");
+ if (IS_ENABLED(CONFIG_LOGF_FUNC))
+ ut_assert_skip_to_line(" efi_run_image() Booting /\\EFI\\BOOT\\BOOTSBOX.EFI");
+ else
+ ut_assert_skip_to_line("Booting /\\EFI\\BOOT\\BOOTSBOX.EFI");
+
+ /* TODO: Why the \r ? */
+ ut_assert_nextline("U-Boot test app for EFI_LOADER\r");
+ ut_assert_nextline("Exiting test app");
+ ut_assert_nextline("Boot failed (err=-14)");
+
+ ut_assert_console_end();
+
+ ut_assertok(bootstd_test_drop_bootdev_order(uts));
+
+ return 0;
+}
+BOOTSTD_TEST(bootflow_efi, UTF_CONSOLE);
diff --git a/test/bootm.c b/test/boot/bootm.c
similarity index 91%
rename from test/bootm.c
rename to test/boot/bootm.c
index 26c1555..52b83f1 100644
--- a/test/bootm.c
+++ b/test/boot/bootm.c
@@ -26,12 +26,15 @@
{
char buf[BUF_SIZE];
+ /* This tests relies on GD_FLG_SILENT not being set */
+ gd->flags &= ~GD_FLG_SILENT;
+
*buf = '\0';
- ut_assertok(bootm_process_cmdline(buf, BUF_SIZE, true));
+ ut_assertok(bootm_process_cmdline(buf, BUF_SIZE, BOOTM_CL_ALL));
ut_asserteq_str("", buf);
strcpy(buf, "test");
- ut_assertok(bootm_process_cmdline(buf, BUF_SIZE, true));
+ ut_assertok(bootm_process_cmdline(buf, BUF_SIZE, BOOTM_CL_ALL));
ut_asserteq_str("test", buf);
return 0;
@@ -43,23 +46,26 @@
{
char buf[BUF_SIZE];
+ /* This tests relies on GD_FLG_SILENT not being set */
+ gd->flags &= ~GD_FLG_SILENT;
+
/* Zero buffer size */
*buf = '\0';
- ut_asserteq(-ENOSPC, bootm_process_cmdline(buf, 0, true));
+ ut_asserteq(-ENOSPC, bootm_process_cmdline(buf, 0, BOOTM_CL_ALL));
/* Buffer string not terminated */
memset(buf, 'a', BUF_SIZE);
- ut_asserteq(-ENOSPC, bootm_process_cmdline(buf, BUF_SIZE, true));
+ ut_asserteq(-ENOSPC, bootm_process_cmdline(buf, BUF_SIZE, BOOTM_CL_ALL));
/* Not enough space to copy string */
memset(buf, '\0', BUF_SIZE);
memset(buf, 'a', BUF_SIZE / 2);
- ut_asserteq(-ENOSPC, bootm_process_cmdline(buf, BUF_SIZE, true));
+ ut_asserteq(-ENOSPC, bootm_process_cmdline(buf, BUF_SIZE, BOOTM_CL_ALL));
/* Just enough space */
memset(buf, '\0', BUF_SIZE);
memset(buf, 'a', BUF_SIZE / 2 - 1);
- ut_assertok(bootm_process_cmdline(buf, BUF_SIZE, true));
+ ut_assertok(bootm_process_cmdline(buf, BUF_SIZE, BOOTM_CL_ALL));
return 0;
}
@@ -70,6 +76,9 @@
{
char buf[BUF_SIZE];
+ /* This tests relies on GD_FLG_SILENT not being set */
+ gd->flags &= ~GD_FLG_SILENT;
+
/* 'silent_linux' not set should do nothing */
env_set("silent_linux", NULL);
strcpy(buf, CONSOLE_STR);
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index fe7a216..5e4a204 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -5,6 +5,7 @@
obj-y += cmd_ut_cmd.o
+obj-$(CONFIG_$(XPL_)CMDLINE) += command.o
ifdef CONFIG_HUSH_PARSER
obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o
endif
@@ -15,6 +16,7 @@
obj-$(CONFIG_X86) += cpuid.o msr.o
obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
obj-$(CONFIG_CMD_BDI) += bdinfo.o
+obj-$(CONFIG_COREBOOT_SYSINFO) += coreboot.o
obj-$(CONFIG_CMD_FDT) += fdt.o
obj-$(CONFIG_CONSOLE_TRUETYPE) += font.o
obj-$(CONFIG_CMD_HISTORY) += history.o
diff --git a/test/cmd/command.c b/test/cmd/command.c
new file mode 100644
index 0000000..5ec93d4
--- /dev/null
+++ b/test/cmd/command.c
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2012, The Chromium Authors
+ */
+
+#define DEBUG
+
+#include <command.h>
+#include <env.h>
+#include <log.h>
+#include <string.h>
+#include <linux/errno.h>
+#include <test/cmd.h>
+#include <test/ut.h>
+
+static const char test_cmd[] = "setenv list 1\n setenv list ${list}2; "
+ "setenv list ${list}3\0"
+ "setenv list ${list}4";
+
+static int command_test(struct unit_test_state *uts)
+{
+ char long_str[CONFIG_SYS_CBSIZE + 42];
+
+ printf("%s: Testing commands\n", __func__);
+ run_command("env default -f -a", 0);
+
+ /* commands separated by \n */
+ run_command_list("setenv list 1\n setenv list ${list}1", -1, 0);
+ ut_assert(!strcmp("11", env_get("list")));
+
+ /* command followed by \n and nothing else */
+ run_command_list("setenv list 1${list}\n", -1, 0);
+ ut_assert(!strcmp("111", env_get("list")));
+
+ /* a command string with \0 in it. Stuff after \0 should be ignored */
+ run_command("setenv list", 0);
+ run_command_list(test_cmd, sizeof(test_cmd), 0);
+ ut_assert(!strcmp("123", env_get("list")));
+
+ /*
+ * a command list where we limit execution to only the first command
+ * using the length parameter.
+ */
+ run_command_list("setenv list 1\n setenv list ${list}2; "
+ "setenv list ${list}3", strlen("setenv list 1"), 0);
+ ut_assert(!strcmp("1", env_get("list")));
+
+ ut_asserteq(1, run_command("false", 0));
+ ut_assertok(run_command("echo", 0));
+ ut_asserteq(1, run_command_list("false", -1, 0));
+ ut_assertok(run_command_list("echo", -1, 0));
+
+#ifdef CONFIG_HUSH_PARSER
+ run_command("setenv foo 'setenv black 1\nsetenv adder 2'", 0);
+ run_command("run foo", 0);
+ ut_assertnonnull(env_get("black"));
+ ut_asserteq(0, strcmp("1", env_get("black")));
+ ut_assertnonnull(env_get("adder"));
+ ut_asserteq(0, strcmp("2", env_get("adder")));
+#endif
+
+ ut_assertok(run_command("", 0));
+ ut_assertok(run_command(" ", 0));
+
+ ut_asserteq(1, run_command("'", 0));
+
+ /* Variadic function test-cases */
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wformat-zero-length"
+ ut_assertok(run_commandf(""));
+#pragma GCC diagnostic pop
+ ut_assertok(run_commandf(" "));
+ ut_asserteq(1, run_commandf("'"));
+
+ ut_assertok(run_commandf("env %s %s", "delete -f", "list"));
+ /*
+ * Expected: "## Error: "list" not defined"
+ * (disabled to avoid pytest bailing out)
+ *
+ * ut_asserteq(1, run_commandf("printenv list"));
+ */
+
+ memset(long_str, 'x', sizeof(long_str));
+ ut_asserteq(-ENOSPC, run_commandf("Truncation case: %s", long_str));
+
+ if (IS_ENABLED(CONFIG_HUSH_PARSER)) {
+ ut_assertok(run_commandf("env %s %s %s %s", "delete -f",
+ "adder", "black", "foo"));
+ ut_assertok(run_commandf(
+ "setenv foo 'setenv %s 1\nsetenv %s 2'",
+ "black", "adder"));
+ ut_assertok(run_command("run foo", 0));
+ ut_assertnonnull(env_get("black"));
+ ut_asserteq(0, strcmp("1", env_get("black")));
+ ut_assertnonnull(env_get("adder"));
+ ut_asserteq(0, strcmp("2", env_get("adder")));
+ }
+
+ /* Clean up before exit */
+ ut_assertok(run_command("env default -f -a", 0));
+
+ /* put back the FDT environment */
+ ut_assertok(env_set("from_fdt", "yes"));
+
+ printf("%s: Everything went swimmingly\n", __func__);
+ return 0;
+}
+CMD_TEST(command_test, 0);
diff --git a/test/cmd/coreboot.c b/test/cmd/coreboot.c
new file mode 100644
index 0000000..a99898d
--- /dev/null
+++ b/test/cmd/coreboot.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for coreboot commands
+ *
+ * Copyright 2023 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <cedit.h>
+#include <command.h>
+#include <dm.h>
+#include <expo.h>
+#include <rtc.h>
+#include <test/cedit-test.h>
+#include <test/cmd.h>
+#include <test/test.h>
+#include <test/ut.h>
+#include "../../boot/scene_internal.h"
+
+enum {
+ CSUM_LOC = 0x3f0 / 8,
+};
+
+/**
+ * test_cmd_cbsysinfo() - test the cbsysinfo command produces expected output
+ *
+ * This includes ensuring that the coreboot build has the expected options
+ * enabled
+ */
+static int test_cmd_cbsysinfo(struct unit_test_state *uts)
+{
+ ut_assertok(run_command("cbsysinfo", 0));
+ ut_assert_nextlinen("Coreboot table at");
+
+ /* Make sure CMOS options are enabled */
+ ut_assert_skip_to_line(
+ " 1c0 1 e 1 power_on_after_fail 0:Disable 1:Enable");
+ ut_assert_skip_to_line("CMOS start : 1c0");
+ ut_assert_nextline(" CMOS end : 1cf");
+ ut_assert_nextline(" CMOS csum loc: 3f0");
+
+ /* Make sure the linear frame buffer is enabled */
+ ut_assert_skip_to_linen("Framebuffer");
+ ut_assert_nextlinen(" Phys addr");
+
+ ut_assert_skip_to_line("Chrome OS VPD: 00000000");
+ ut_assert_nextlinen("RSDP");
+ ut_assert_nextlinen("Unimpl.");
+ ut_assert_console_end();
+
+ return 0;
+}
+CMD_TEST(test_cmd_cbsysinfo, UTF_CONSOLE);
+
+/* test cbcmos command */
+static int test_cmd_cbcmos(struct unit_test_state *uts)
+{
+ u16 old_csum, new_csum;
+ struct udevice *dev;
+
+ /* initially the checksum should be correct */
+ ut_assertok(run_command("cbcmos check", 0));
+ ut_assert_console_end();
+
+ /* make a change to the checksum */
+ ut_assertok(uclass_first_device_err(UCLASS_RTC, &dev));
+ ut_assertok(rtc_read16(dev, CSUM_LOC, &old_csum));
+ ut_assertok(rtc_write16(dev, CSUM_LOC, old_csum + 1));
+
+ /* now the command should fail */
+ ut_asserteq(1, run_command("cbcmos check", 0));
+ ut_assert_nextline("Checksum %04x error: calculated %04x",
+ old_csum + 1, old_csum);
+ ut_assert_console_end();
+
+ /* now get it to fix the checksum */
+ ut_assertok(run_command("cbcmos update", 0));
+ ut_assert_nextline("Checksum %04x written", old_csum);
+ ut_assert_console_end();
+
+ /* check the RTC looks right */
+ ut_assertok(rtc_read16(dev, CSUM_LOC, &new_csum));
+ ut_asserteq(old_csum, new_csum);
+ ut_assert_console_end();
+
+ return 0;
+}
+CMD_TEST(test_cmd_cbcmos, UTF_CONSOLE);
+
+/* test 'cedit cb_load' command */
+static int test_cmd_cedit_cb_load(struct unit_test_state *uts)
+{
+ struct scene_obj_menu *menu;
+ struct video_priv *vid_priv;
+ struct scene_obj_txt *txt;
+ struct scene *scn;
+ struct expo *exp;
+ int scn_id;
+
+ ut_assertok(run_command("cedit cb_load", 0));
+ ut_assertok(run_command("cedit read_cmos", 0));
+ ut_assert_console_end();
+
+ exp = cur_exp;
+ scn_id = cedit_prepare(exp, &vid_priv, &scn);
+ ut_assert(scn_id > 0);
+ ut_assertnonnull(scn);
+
+ /* just do a very basic test that the first menu is present */
+ menu = scene_obj_find(scn, scn->highlight_id, SCENEOBJT_NONE);
+ ut_assertnonnull(menu);
+
+ txt = scene_obj_find(scn, menu->title_id, SCENEOBJT_NONE);
+ ut_assertnonnull(txt);
+ ut_asserteq_str("Boot option", expo_get_str(exp, txt->str_id));
+
+ return 0;
+}
+CMD_TEST(test_cmd_cedit_cb_load, UTF_CONSOLE);
diff --git a/test/cmd/mem_copy.c b/test/cmd/mem_copy.c
index 1ba0ceb..67eca32 100644
--- a/test/cmd/mem_copy.c
+++ b/test/cmd/mem_copy.c
@@ -21,7 +21,7 @@
static int do_test(struct unit_test_state *uts,
const char *suffix, int d, int s, int count)
{
- const long addr = 0x1000;
+ const long addr = CONFIG_SYS_LOAD_ADDR + 0x1000;
u8 shadow[BUF_SIZE];
u8 *buf;
int i, w, bytes;
diff --git a/test/cmd_ut.c b/test/cmd_ut.c
index 53fddeb..195b7ea 100644
--- a/test/cmd_ut.c
+++ b/test/cmd_ut.c
@@ -99,25 +99,15 @@
U_BOOT_CMD_MKENT(setexpr, CONFIG_SYS_MAXARGS, 1, do_ut_setexpr, "",
""),
#endif
- U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_ut_print, "", ""),
-#ifdef CONFIG_UT_TIME
- U_BOOT_CMD_MKENT(time, CONFIG_SYS_MAXARGS, 1, do_ut_time, "", ""),
-#endif
-#if CONFIG_IS_ENABLED(UT_UNICODE) && !defined(API_BUILD)
- U_BOOT_CMD_MKENT(unicode, CONFIG_SYS_MAXARGS, 1, do_ut_unicode, "", ""),
-#endif
#ifdef CONFIG_MEASURED_BOOT
U_BOOT_CMD_MKENT(measurement, CONFIG_SYS_MAXARGS, 1, do_ut_measurement,
"", ""),
#endif
#ifdef CONFIG_SANDBOX
- U_BOOT_CMD_MKENT(compression, CONFIG_SYS_MAXARGS, 1, do_ut_compression,
- "", ""),
U_BOOT_CMD_MKENT(bloblist, CONFIG_SYS_MAXARGS, 1, do_ut_bloblist,
"", ""),
U_BOOT_CMD_MKENT(bootm, CONFIG_SYS_MAXARGS, 1, do_ut_bootm, "", ""),
#endif
- U_BOOT_CMD_MKENT(str, CONFIG_SYS_MAXARGS, 1, do_ut_str, "", ""),
#ifdef CONFIG_CMD_ADDRMAP
U_BOOT_CMD_MKENT(addrmap, CONFIG_SYS_MAXARGS, 1, do_ut_addrmap, "", ""),
#endif
@@ -207,9 +197,7 @@
#ifdef CONFIG_CMDLINE
"\ncmd - test various commands"
#endif
-#ifdef CONFIG_SANDBOX
- "\ncompression - compressors and bootm decompression"
-#endif
+ "\ncommon - tests for common/ directory"
#ifdef CONFIG_UT_DM
"\ndm - driver model"
#endif
@@ -244,21 +232,10 @@
#ifdef CONFIG_CMD_PCI_MPS
"\npci_mps - PCI Express Maximum Payload Size"
#endif
- "\nprint - printing things to the console"
"\nsetexpr - setexpr command"
-#ifdef CONFIG_SANDBOX
- "\nstr - basic test of string functions"
-#endif
#ifdef CONFIG_CMD_SEAMA
"\nseama - seama command parameters loading and decoding"
#endif
-#ifdef CONFIG_UT_TIME
- "\ntime - very basic test of time functions"
-#endif
-#if defined(CONFIG_UT_UNICODE) && \
- !defined(CONFIG_XPL_BUILD) && !defined(API_BUILD)
- "\nunicode - Unicode functions"
-#endif
);
U_BOOT_CMD(
diff --git a/test/command_ut.c b/test/command_ut.c
deleted file mode 100644
index 2b8d28d..0000000
--- a/test/command_ut.c
+++ /dev/null
@@ -1,104 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2012, The Chromium Authors
- */
-
-#define DEBUG
-
-#include <command.h>
-#include <env.h>
-#include <log.h>
-#include <string.h>
-#include <linux/errno.h>
-
-static const char test_cmd[] = "setenv list 1\n setenv list ${list}2; "
- "setenv list ${list}3\0"
- "setenv list ${list}4";
-
-static int do_ut_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
-{
- char long_str[CONFIG_SYS_CBSIZE + 42];
-
- printf("%s: Testing commands\n", __func__);
- run_command("env default -f -a", 0);
-
- /* commands separated by \n */
- run_command_list("setenv list 1\n setenv list ${list}1", -1, 0);
- assert(!strcmp("11", env_get("list")));
-
- /* command followed by \n and nothing else */
- run_command_list("setenv list 1${list}\n", -1, 0);
- assert(!strcmp("111", env_get("list")));
-
- /* a command string with \0 in it. Stuff after \0 should be ignored */
- run_command("setenv list", 0);
- run_command_list(test_cmd, sizeof(test_cmd), 0);
- assert(!strcmp("123", env_get("list")));
-
- /*
- * a command list where we limit execution to only the first command
- * using the length parameter.
- */
- run_command_list("setenv list 1\n setenv list ${list}2; "
- "setenv list ${list}3", strlen("setenv list 1"), 0);
- assert(!strcmp("1", env_get("list")));
-
- assert(run_command("false", 0) == 1);
- assert(run_command("echo", 0) == 0);
- assert(run_command_list("false", -1, 0) == 1);
- assert(run_command_list("echo", -1, 0) == 0);
-
-#ifdef CONFIG_HUSH_PARSER
- run_command("setenv foo 'setenv black 1\nsetenv adder 2'", 0);
- run_command("run foo", 0);
- assert(env_get("black") != NULL);
- assert(!strcmp("1", env_get("black")));
- assert(env_get("adder") != NULL);
- assert(!strcmp("2", env_get("adder")));
-#endif
-
- assert(run_command("", 0) == 0);
- assert(run_command(" ", 0) == 0);
-
- assert(run_command("'", 0) == 1);
-
- /* Variadic function test-cases */
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wformat-zero-length"
- assert(run_commandf("") == 0);
-#pragma GCC diagnostic pop
- assert(run_commandf(" ") == 0);
- assert(run_commandf("'") == 1);
-
- assert(run_commandf("env %s %s", "delete -f", "list") == 0);
- /* Expected: "Error: "list" not defined" */
- assert(run_commandf("printenv list") == 1);
-
- memset(long_str, 'x', sizeof(long_str));
- assert(run_commandf("Truncation case: %s", long_str) == -ENOSPC);
-
- if (IS_ENABLED(CONFIG_HUSH_PARSER)) {
- assert(run_commandf("env %s %s %s %s", "delete -f", "adder",
- "black", "foo") == 0);
- assert(run_commandf("setenv foo 'setenv %s 1\nsetenv %s 2'",
- "black", "adder") == 0);
- run_command("run foo", 0);
- assert(env_get("black"));
- assert(!strcmp("1", env_get("black")));
- assert(env_get("adder"));
- assert(!strcmp("2", env_get("adder")));
- }
-
- /* Clean up before exit */
- run_command("env default -f -a", 0);
-
- printf("%s: Everything went swimmingly\n", __func__);
- return 0;
-}
-
-U_BOOT_CMD(
- ut_cmd, 5, 1, do_ut_cmd,
- "Very basic test of command parsers",
- ""
-);
diff --git a/test/common.sh b/test/common.sh
deleted file mode 100644
index 904d579..0000000
--- a/test/common.sh
+++ /dev/null
@@ -1,20 +0,0 @@
-#!/bin/sh
-
-OUTPUT_DIR=sandbox
-
-fail() {
- echo "Test failed: $1"
- if [ -n ${tmp} ]; then
- rm ${tmp}
- fi
- exit 1
-}
-
-build_uboot() {
- echo "Build sandbox"
- OPTS="O=${OUTPUT_DIR} $1"
- NUM_CPUS=$(nproc)
- echo ${OPTS}
- make ${OPTS} sandbox_config
- make ${OPTS} -s -j${NUM_CPUS}
-}
diff --git a/test/common/Makefile b/test/common/Makefile
index 12c65f8..53c4f16 100644
--- a/test/common/Makefile
+++ b/test/common/Makefile
@@ -1,6 +1,10 @@
# SPDX-License-Identifier: GPL-2.0+
obj-y += cmd_ut_common.o
obj-$(CONFIG_AUTOBOOT) += test_autoboot.o
+ifneq ($(CONFIG_$(XPL_)BLOBLIST),)
+obj-$(CONFIG_$(XPL_)CMDLINE) += bloblist.o
+endif
obj-$(CONFIG_CYCLIC) += cyclic.o
obj-$(CONFIG_EVENT_DYNAMIC) += event.o
obj-y += cread.o
+obj-$(CONFIG_$(XPL_)CMDLINE) += print.o
diff --git a/test/bloblist.c b/test/common/bloblist.c
similarity index 95%
rename from test/bloblist.c
rename to test/common/bloblist.c
index fd85c7a..4bca621 100644
--- a/test/bloblist.c
+++ b/test/common/bloblist.c
@@ -6,13 +6,10 @@
#include <bloblist.h>
#include <log.h>
#include <mapmem.h>
-#include <asm/global_data.h>
#include <test/suites.h>
#include <test/test.h>
#include <test/ut.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/* Declare a new bloblist test */
#define BLOBLIST_TEST(_name, _flags) \
UNIT_TEST(_name, _flags, bloblist_test)
@@ -94,7 +91,7 @@
return 1;
}
-BLOBLIST_TEST(bloblist_test_init, 0);
+BLOBLIST_TEST(bloblist_test_init, UFT_BLOBLIST);
static int bloblist_test_blob(struct unit_test_state *uts)
{
@@ -134,7 +131,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_blob, 0);
+BLOBLIST_TEST(bloblist_test_blob, UFT_BLOBLIST);
/* Check bloblist_ensure_size_ret() */
static int bloblist_test_blob_ensure(struct unit_test_state *uts)
@@ -168,7 +165,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_blob_ensure, 0);
+BLOBLIST_TEST(bloblist_test_blob_ensure, UFT_BLOBLIST);
static int bloblist_test_bad_blob(struct unit_test_state *uts)
{
@@ -184,7 +181,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_bad_blob, 0);
+BLOBLIST_TEST(bloblist_test_bad_blob, UFT_BLOBLIST);
static int bloblist_test_checksum(struct unit_test_state *uts)
{
@@ -257,7 +254,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_checksum, 0);
+BLOBLIST_TEST(bloblist_test_checksum, UFT_BLOBLIST);
/* Test the 'bloblist info' command */
static int bloblist_test_cmd_info(struct unit_test_state *uts)
@@ -278,7 +275,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_cmd_info, UTF_CONSOLE);
+BLOBLIST_TEST(bloblist_test_cmd_info, UFT_BLOBLIST | UTF_CONSOLE);
/* Test the 'bloblist list' command */
static int bloblist_test_cmd_list(struct unit_test_state *uts)
@@ -300,7 +297,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_cmd_list, UTF_CONSOLE);
+BLOBLIST_TEST(bloblist_test_cmd_list, UFT_BLOBLIST | UTF_CONSOLE);
/* Test alignment of bloblist blobs */
static int bloblist_test_align(struct unit_test_state *uts)
@@ -358,7 +355,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_align, 0);
+BLOBLIST_TEST(bloblist_test_align, UFT_BLOBLIST);
/* Test relocation of a bloblist */
static int bloblist_test_reloc(struct unit_test_state *uts)
@@ -392,7 +389,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_reloc, 0);
+BLOBLIST_TEST(bloblist_test_reloc, UFT_BLOBLIST);
/* Test expansion of a blob */
static int bloblist_test_grow(struct unit_test_state *uts)
@@ -445,7 +442,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_grow, 0);
+BLOBLIST_TEST(bloblist_test_grow, UFT_BLOBLIST);
/* Test shrinking of a blob */
static int bloblist_test_shrink(struct unit_test_state *uts)
@@ -495,7 +492,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_shrink, 0);
+BLOBLIST_TEST(bloblist_test_shrink, UFT_BLOBLIST);
/* Test failing to adjust a blob size */
static int bloblist_test_resize_fail(struct unit_test_state *uts)
@@ -530,7 +527,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_resize_fail, 0);
+BLOBLIST_TEST(bloblist_test_resize_fail, UFT_BLOBLIST);
/* Test expanding the last blob in a bloblist */
static int bloblist_test_resize_last(struct unit_test_state *uts)
@@ -581,7 +578,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_resize_last, 0);
+BLOBLIST_TEST(bloblist_test_resize_last, UFT_BLOBLIST);
/* Check a completely full bloblist */
static int bloblist_test_blob_maxsize(struct unit_test_state *uts)
@@ -604,7 +601,7 @@
return 0;
}
-BLOBLIST_TEST(bloblist_test_blob_maxsize, 0);
+BLOBLIST_TEST(bloblist_test_blob_maxsize, UFT_BLOBLIST);
int do_ut_bloblist(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/test/print_ut.c b/test/common/print.c
similarity index 94%
rename from test/print_ut.c
rename to test/common/print.c
index f5e607b..f1eb907 100644
--- a/test/print_ut.c
+++ b/test/common/print.c
@@ -11,7 +11,7 @@
#include <version_string.h>
#include <stdio.h>
#include <vsprintf.h>
-#include <test/suites.h>
+#include <test/common.h>
#include <test/test.h>
#include <test/ut.h>
@@ -20,9 +20,6 @@
#define FAKE_BUILD_TAG "jenkins-u-boot-denx_uboot_dm-master-build-aarch64" \
"and a lot more text to come"
-/* Declare a new print test */
-#define PRINT_TEST(_name, _flags) UNIT_TEST(_name, _flags, print_test)
-
#if CONFIG_IS_ENABLED(LIB_UUID)
/* Test printing GUIDs */
static int print_guid(struct unit_test_state *uts)
@@ -59,7 +56,7 @@
return 0;
}
-PRINT_TEST(print_guid, 0);
+COMMON_TEST(print_guid, 0);
#endif
#if CONFIG_IS_ENABLED(EFI_LOADER) && !defined(API_BUILD)
@@ -95,7 +92,7 @@
return 0;
}
-PRINT_TEST(print_efi_ut, 0);
+COMMON_TEST(print_efi_ut, 0);
#endif
static int print_printf(struct unit_test_state *uts)
@@ -163,7 +160,7 @@
return 0;
}
-PRINT_TEST(print_printf, 0);
+COMMON_TEST(print_printf, 0);
static int print_display_buffer(struct unit_test_state *uts)
{
@@ -238,7 +235,7 @@
return 0;
}
-PRINT_TEST(print_display_buffer, UTF_CONSOLE);
+COMMON_TEST(print_display_buffer, UTF_CONSOLE);
static int print_hexdump_line(struct unit_test_state *uts)
{
@@ -264,7 +261,7 @@
return 0;
}
-PRINT_TEST(print_hexdump_line, UTF_CONSOLE);
+COMMON_TEST(print_hexdump_line, UTF_CONSOLE);
static int print_do_hex_dump(struct unit_test_state *uts)
{
@@ -350,7 +347,7 @@
return 0;
}
-PRINT_TEST(print_do_hex_dump, UTF_CONSOLE);
+COMMON_TEST(print_do_hex_dump, UTF_CONSOLE);
static int snprint(struct unit_test_state *uts)
{
@@ -376,12 +373,4 @@
ut_asserteq(8, ret);
return 0;
}
-PRINT_TEST(snprint, 0);
-
-int do_ut_print(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
-{
- struct unit_test *tests = UNIT_TEST_SUITE_START(print_test);
- const int n_ents = UNIT_TEST_SUITE_COUNT(print_test);
-
- return cmd_ut_category("print", "print_", tests, n_ents, argc, argv);
-}
+COMMON_TEST(snprint, 0);
diff --git a/test/dm/core.c b/test/dm/core.c
index e0c5b9e..7371d3f 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -1351,3 +1351,25 @@
return 0;
}
DM_TEST(dm_test_dev_get_mem, UTF_SCAN_FDT);
+
+/* Test uclass_try_first_device() */
+static int dm_test_try_first_device(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+
+ /* Check that it doesn't create a device or uclass */
+ ut_assertnull(uclass_find(UCLASS_TEST));
+ ut_assertnull(uclass_try_first_device(UCLASS_TEST));
+ ut_assertnull(uclass_try_first_device(UCLASS_TEST));
+ ut_assertnull(uclass_find(UCLASS_TEST));
+
+ /* Create a test device */
+ ut_assertok(device_bind_by_name(uts->root, false, &driver_info_manual,
+ &dev));
+ dev = uclass_try_first_device(UCLASS_TEST);
+ ut_assertnonnull(dev);
+ ut_asserteq(UCLASS_TEST, device_get_uclass_id(dev));
+
+ return 0;
+}
+DM_TEST(dm_test_try_first_device, 0);
diff --git a/test/lib/Makefile b/test/lib/Makefile
index a54387a..f516d00 100644
--- a/test/lib/Makefile
+++ b/test/lib/Makefile
@@ -2,6 +2,9 @@
#
# (C) Copyright 2018
# Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
+
+obj-$(CONFIG_$(XPL_)UT_COMPRESSION) += compression.o
+
ifeq ($(CONFIG_XPL_BUILD),)
obj-y += cmd_ut_lib.o
obj-y += abuf.o
@@ -11,9 +14,10 @@
obj-y += hexdump.o
obj-$(CONFIG_SANDBOX) += kconfig.o
obj-y += lmb.o
-obj-y += longjmp.o
+obj-$(CONFIG_HAVE_SETJMP) += longjmp.o
obj-$(CONFIG_CONSOLE_RECORD) += test_print.o
obj-$(CONFIG_SSCANF) += sscanf.o
+obj-$(CONFIG_$(XPL_)CMDLINE) += str.o
obj-y += string.o
obj-y += strlcat.o
obj-$(CONFIG_ERRNO_STR) += test_errno_str.o
@@ -23,6 +27,8 @@
obj-$(CONFIG_GETOPT) += getopt.o
obj-$(CONFIG_CRC8) += test_crc8.o
obj-$(CONFIG_UT_LIB_CRYPT) += test_crypt.o
+obj-$(CONFIG_UT_TIME) += time.o
+obj-$(CONFIG_$(XPL_)UT_UNICODE) += unicode.o
obj-$(CONFIG_LIB_UUID) += uuid.o
else
obj-$(CONFIG_SANDBOX) += kconfig_spl.o
diff --git a/test/lib/alist.c b/test/lib/alist.c
index d41845c..0bf2457 100644
--- a/test/lib/alist.c
+++ b/test/lib/alist.c
@@ -240,3 +240,256 @@
return 0;
}
LIB_TEST(lib_test_alist_add, 0);
+
+/* Test alist_next() */
+static int lib_test_alist_next(struct unit_test_state *uts)
+{
+ const struct my_struct *ptr;
+ struct my_struct data, *ptr2;
+ struct alist lst;
+ ulong start;
+
+ start = ut_check_free();
+
+ ut_assert(alist_init_struct(&lst, struct my_struct));
+ data.val = 123;
+ data.other_val = 0;
+ alist_add(&lst, data);
+
+ data.val = 321;
+ alist_add(&lst, data);
+
+ data.val = 789;
+ alist_add(&lst, data);
+
+ ptr = alist_get(&lst, 0, struct my_struct);
+ ut_assertnonnull(ptr);
+ ut_asserteq(123, ptr->val);
+
+ ptr = alist_next(&lst, ptr);
+ ut_assertnonnull(ptr);
+ ut_asserteq(321, ptr->val);
+
+ ptr2 = (struct my_struct *)ptr;
+ ptr2 = alist_nextw(&lst, ptr2);
+ ut_assertnonnull(ptr2);
+
+ ptr = alist_next(&lst, ptr);
+ ut_assertnonnull(ptr);
+ ut_asserteq(789, ptr->val);
+ ut_asserteq_ptr(ptr, ptr2);
+ ptr2->val = 89;
+ ut_asserteq(89, ptr->val);
+
+ ptr = alist_next(&lst, ptr);
+ ut_assertnull(ptr);
+
+ alist_uninit(&lst);
+
+ /* Check for memory leaks */
+ ut_assertok(ut_check_delta(start));
+
+ return 0;
+}
+LIB_TEST(lib_test_alist_next, 0);
+
+/* Test alist_for_each() */
+static int lib_test_alist_for_each(struct unit_test_state *uts)
+{
+ const struct my_struct *ptr;
+ struct my_struct data, *ptr2;
+ struct alist lst;
+ ulong start;
+ int sum;
+
+ start = ut_check_free();
+
+ ut_assert(alist_init_struct(&lst, struct my_struct));
+ ut_asserteq_ptr(NULL, alist_end(&lst, struct my_struct));
+
+ sum = 0;
+ alist_for_each(ptr, &lst)
+ sum++;
+ ut_asserteq(0, sum);
+
+ alist_for_each(ptr, &lst)
+ sum++;
+ ut_asserteq(0, sum);
+
+ /* add three items */
+ data.val = 1;
+ data.other_val = 0;
+ alist_add(&lst, data);
+
+ ptr = lst.data;
+ ut_asserteq_ptr(ptr + 1, alist_end(&lst, struct my_struct));
+
+ data.val = 2;
+ alist_add(&lst, data);
+ ut_asserteq_ptr(ptr + 2, alist_end(&lst, struct my_struct));
+
+ data.val = 3;
+ alist_add(&lst, data);
+ ut_asserteq_ptr(ptr + 3, alist_end(&lst, struct my_struct));
+
+ /* check alist_chk_ptr() */
+ ut_asserteq(true, alist_chk_ptr(&lst, ptr + 2));
+ ut_asserteq(false, alist_chk_ptr(&lst, ptr + 3));
+ ut_asserteq(false, alist_chk_ptr(&lst, ptr + 4));
+ ut_asserteq(true, alist_chk_ptr(&lst, ptr));
+ ut_asserteq(false, alist_chk_ptr(&lst, ptr - 1));
+
+ /* sum all items */
+ sum = 0;
+ alist_for_each(ptr, &lst)
+ sum += ptr->val;
+ ut_asserteq(6, sum);
+
+ /* increment all items */
+ alist_for_each(ptr2, &lst)
+ ptr2->val += 1;
+
+ /* sum all items again */
+ sum = 0;
+ alist_for_each(ptr, &lst)
+ sum += ptr->val;
+ ut_asserteq(9, sum);
+
+ ptr = lst.data;
+ ut_asserteq_ptr(ptr + 3, alist_end(&lst, struct my_struct));
+
+ /* empty the list and try again */
+ alist_empty(&lst);
+ ut_asserteq_ptr(ptr, alist_end(&lst, struct my_struct));
+ ut_assertnull(alist_get(&lst, 0, struct my_struct));
+
+ sum = 0;
+ alist_for_each(ptr, &lst)
+ sum += ptr->val;
+ ut_asserteq(0, sum);
+
+ alist_uninit(&lst);
+
+ /* Check for memory leaks */
+ ut_assertok(ut_check_delta(start));
+
+ return 0;
+}
+LIB_TEST(lib_test_alist_for_each, 0);
+
+/* Test alist_empty() */
+static int lib_test_alist_empty(struct unit_test_state *uts)
+{
+ struct my_struct data;
+ struct alist lst;
+ ulong start;
+
+ start = ut_check_free();
+
+ ut_assert(alist_init_struct(&lst, struct my_struct));
+ ut_asserteq(0, lst.count);
+ data.val = 1;
+ data.other_val = 0;
+ alist_add(&lst, data);
+ ut_asserteq(1, lst.count);
+ ut_asserteq(4, lst.alloc);
+
+ alist_empty(&lst);
+ ut_asserteq(0, lst.count);
+ ut_asserteq(4, lst.alloc);
+ ut_assertnonnull(lst.data);
+ ut_asserteq(sizeof(data), lst.obj_size);
+
+ alist_uninit(&lst);
+
+ /* Check for memory leaks */
+ ut_assertok(ut_check_delta(start));
+
+ return 0;
+}
+LIB_TEST(lib_test_alist_empty, 0);
+
+static int lib_test_alist_filter(struct unit_test_state *uts)
+{
+ struct my_struct *from, *to, *ptr;
+ struct my_struct data;
+ struct alist lst;
+ ulong start;
+ int count;
+
+ start = ut_check_free();
+
+ ut_assert(alist_init_struct(&lst, struct my_struct));
+ data.val = 1;
+ data.other_val = 0;
+ alist_add(&lst, data);
+
+ data.val = 2;
+ alist_add(&lst, data);
+
+ data.val = 3;
+ alist_add(&lst, data);
+ ptr = lst.data;
+
+ /* filter out all values except 2 */
+ alist_for_each_filter(from, to, &lst) {
+ if (from->val != 2)
+ *to++ = *from;
+ }
+ alist_update_end(&lst, to);
+
+ ut_asserteq(2, lst.count);
+ ut_assertnonnull(lst.data);
+
+ ut_asserteq(1, alist_get(&lst, 0, struct my_struct)->val);
+ ut_asserteq(3, alist_get(&lst, 1, struct my_struct)->val);
+ ut_asserteq_ptr(ptr + 3, from);
+ ut_asserteq_ptr(ptr + 2, to);
+
+ /* filter out nothing */
+ alist_for_each_filter(from, to, &lst) {
+ if (from->val != 2)
+ *to++ = *from;
+ }
+ alist_update_end(&lst, to);
+ ut_asserteq_ptr(ptr + 2, from);
+ ut_asserteq_ptr(ptr + 2, to);
+
+ ut_asserteq(2, lst.count);
+ ut_assertnonnull(lst.data);
+
+ ut_asserteq(1, alist_get(&lst, 0, struct my_struct)->val);
+ ut_asserteq(3, alist_get(&lst, 1, struct my_struct)->val);
+
+ /* filter out everything */
+ alist_for_each_filter(from, to, &lst) {
+ if (from->val == 2)
+ *to++ = *from;
+ }
+ alist_update_end(&lst, to);
+ ut_asserteq_ptr(ptr + 2, from);
+ ut_asserteq_ptr(ptr, to);
+
+ /* filter out everything (nop) */
+ count = 0;
+ alist_for_each_filter(from, to, &lst) {
+ if (from->val == 2)
+ *to++ = *from;
+ count++;
+ }
+ alist_update_end(&lst, to);
+ ut_asserteq_ptr(ptr, from);
+ ut_asserteq_ptr(ptr, to);
+ ut_asserteq(0, count);
+
+ ut_asserteq(0, lst.count);
+ ut_assertnonnull(lst.data);
+
+ alist_uninit(&lst);
+
+ /* Check for memory leaks */
+ ut_assertok(ut_check_delta(start));
+
+ return 0;
+}
+LIB_TEST(lib_test_alist_filter, 0);
diff --git a/test/compression.c b/test/lib/compression.c
similarity index 94%
rename from test/compression.c
rename to test/lib/compression.c
index 618a193..31b6e5b 100644
--- a/test/compression.c
+++ b/test/lib/compression.c
@@ -23,8 +23,7 @@
#include <linux/lzo.h>
#include <linux/zstd.h>
-#include <test/compression.h>
-#include <test/suites.h>
+#include <test/lib.h>
#include <test/ut.h>
static const char plain[] =
@@ -471,40 +470,40 @@
return run_test(uts, "gzip", compress_using_gzip,
uncompress_using_gzip);
}
-COMPRESSION_TEST(compression_test_gzip, 0);
+LIB_TEST(compression_test_gzip, 0);
static int compression_test_bzip2(struct unit_test_state *uts)
{
return run_test(uts, "bzip2", compress_using_bzip2,
uncompress_using_bzip2);
}
-COMPRESSION_TEST(compression_test_bzip2, 0);
+LIB_TEST(compression_test_bzip2, 0);
static int compression_test_lzma(struct unit_test_state *uts)
{
return run_test(uts, "lzma", compress_using_lzma,
uncompress_using_lzma);
}
-COMPRESSION_TEST(compression_test_lzma, 0);
+LIB_TEST(compression_test_lzma, 0);
static int compression_test_lzo(struct unit_test_state *uts)
{
return run_test(uts, "lzo", compress_using_lzo, uncompress_using_lzo);
}
-COMPRESSION_TEST(compression_test_lzo, 0);
+LIB_TEST(compression_test_lzo, 0);
static int compression_test_lz4(struct unit_test_state *uts)
{
return run_test(uts, "lz4", compress_using_lz4, uncompress_using_lz4);
}
-COMPRESSION_TEST(compression_test_lz4, 0);
+LIB_TEST(compression_test_lz4, 0);
static int compression_test_zstd(struct unit_test_state *uts)
{
return run_test(uts, "zstd", compress_using_zstd,
uncompress_using_zstd);
}
-COMPRESSION_TEST(compression_test_zstd, 0);
+LIB_TEST(compression_test_zstd, 0);
static int compress_using_none(struct unit_test_state *uts,
void *in, unsigned long in_size,
@@ -570,50 +569,40 @@
{
return run_bootm_test(uts, IH_COMP_GZIP, compress_using_gzip);
}
-COMPRESSION_TEST(compression_test_bootm_gzip, 0);
+LIB_TEST(compression_test_bootm_gzip, 0);
static int compression_test_bootm_bzip2(struct unit_test_state *uts)
{
return run_bootm_test(uts, IH_COMP_BZIP2, compress_using_bzip2);
}
-COMPRESSION_TEST(compression_test_bootm_bzip2, 0);
+LIB_TEST(compression_test_bootm_bzip2, 0);
static int compression_test_bootm_lzma(struct unit_test_state *uts)
{
return run_bootm_test(uts, IH_COMP_LZMA, compress_using_lzma);
}
-COMPRESSION_TEST(compression_test_bootm_lzma, 0);
+LIB_TEST(compression_test_bootm_lzma, 0);
static int compression_test_bootm_lzo(struct unit_test_state *uts)
{
return run_bootm_test(uts, IH_COMP_LZO, compress_using_lzo);
}
-COMPRESSION_TEST(compression_test_bootm_lzo, 0);
+LIB_TEST(compression_test_bootm_lzo, 0);
static int compression_test_bootm_lz4(struct unit_test_state *uts)
{
return run_bootm_test(uts, IH_COMP_LZ4, compress_using_lz4);
}
-COMPRESSION_TEST(compression_test_bootm_lz4, 0);
+LIB_TEST(compression_test_bootm_lz4, 0);
static int compression_test_bootm_zstd(struct unit_test_state *uts)
{
return run_bootm_test(uts, IH_COMP_ZSTD, compress_using_zstd);
}
-COMPRESSION_TEST(compression_test_bootm_zstd, 0);
+LIB_TEST(compression_test_bootm_zstd, 0);
static int compression_test_bootm_none(struct unit_test_state *uts)
{
return run_bootm_test(uts, IH_COMP_NONE, compress_using_none);
}
-COMPRESSION_TEST(compression_test_bootm_none, 0);
-
-int do_ut_compression(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
-{
- struct unit_test *tests = UNIT_TEST_SUITE_START(compression_test);
- const int n_ents = UNIT_TEST_SUITE_COUNT(compression_test);
-
- return cmd_ut_category("compression", "compression_test_",
- tests, n_ents, argc, argv);
-}
+LIB_TEST(compression_test_bootm_none, 0);
diff --git a/test/str_ut.c b/test/lib/str.c
similarity index 92%
rename from test/str_ut.c
rename to test/lib/str.c
index 96e0489..3cc9dfe 100644
--- a/test/str_ut.c
+++ b/test/lib/str.c
@@ -4,7 +4,7 @@
*/
#include <vsprintf.h>
-#include <test/suites.h>
+#include <test/lib.h>
#include <test/test.h>
#include <test/ut.h>
@@ -19,9 +19,6 @@
static const char str6[] = "0778octal is seldom used";
static const char str7[] = "707it is a piece of computing history";
-/* Declare a new str test */
-#define STR_TEST(_name, _flags) UNIT_TEST(_name, _flags, str_test)
-
static int str_upper(struct unit_test_state *uts)
{
char out[TEST_STR_SIZE];
@@ -58,7 +55,7 @@
return 0;
}
-STR_TEST(str_upper, 0);
+LIB_TEST(str_upper, 0);
static int run_strtoul(struct unit_test_state *uts, const char *str, int base,
ulong expect_val, int expect_endp_offset, bool upper)
@@ -112,7 +109,7 @@
return 0;
}
-STR_TEST(str_simple_strtoul, 0);
+LIB_TEST(str_simple_strtoul, 0);
static int run_strtoull(struct unit_test_state *uts, const char *str, int base,
unsigned long long expect_val, int expect_endp_offset,
@@ -175,7 +172,7 @@
return 0;
}
-STR_TEST(str_simple_strtoull, 0);
+LIB_TEST(str_simple_strtoull, 0);
static int str_hextoul(struct unit_test_state *uts)
{
@@ -187,7 +184,7 @@
return 0;
}
-STR_TEST(str_hextoul, 0);
+LIB_TEST(str_hextoul, 0);
static int str_dectoul(struct unit_test_state *uts)
{
@@ -199,7 +196,7 @@
return 0;
}
-STR_TEST(str_dectoul, 0);
+LIB_TEST(str_dectoul, 0);
static int str_itoa(struct unit_test_state *uts)
{
@@ -219,7 +216,7 @@
return 0;
}
-STR_TEST(str_itoa, 0);
+LIB_TEST(str_itoa, 0);
static int str_xtoa(struct unit_test_state *uts)
{
@@ -239,7 +236,7 @@
return 0;
}
-STR_TEST(str_xtoa, 0);
+LIB_TEST(str_xtoa, 0);
static int str_trailing(struct unit_test_state *uts)
{
@@ -271,7 +268,7 @@
return 0;
}
-STR_TEST(str_trailing, 0);
+LIB_TEST(str_trailing, 0);
static int test_str_to_list(struct unit_test_state *uts)
{
@@ -351,12 +348,4 @@
return 0;
}
-STR_TEST(test_str_to_list, 0);
-
-int do_ut_str(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
-{
- struct unit_test *tests = UNIT_TEST_SUITE_START(str_test);
- const int n_ents = UNIT_TEST_SUITE_COUNT(str_test);
-
- return cmd_ut_category("str", "str_", tests, n_ents, argc, argv);
-}
+LIB_TEST(test_str_to_list, 0);
diff --git a/test/lib/time.c b/test/lib/time.c
new file mode 100644
index 0000000..b99e738
--- /dev/null
+++ b/test/lib/time.c
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <errno.h>
+#include <time.h>
+#include <linux/delay.h>
+#include <test/lib.h>
+#include <test/ut.h>
+
+static int test_get_timer(struct unit_test_state *uts)
+{
+ ulong base, start, next, diff;
+ int iter;
+
+ base = get_timer(0);
+ start = get_timer(0);
+ for (iter = 0; iter < 10; iter++) {
+ do {
+ next = get_timer(0);
+ } while (start == next);
+
+ ut_asserteq(start + 1, next);
+ start++;
+ }
+
+ /*
+ * Check that get_timer(base) matches our elapsed time, allowing that
+ * an extra millisecond may have passed.
+ */
+ diff = get_timer(base);
+ ut_assert(diff == iter || diff == iter + 1);
+
+ return 0;
+}
+LIB_TEST(test_get_timer, 0);
+
+static int test_timer_get_us(struct unit_test_state *uts)
+{
+ ulong prev, next, min = 1000000;
+ long delta;
+ int iter;
+
+ /* Find the minimum delta we can measure, in microseconds */
+ prev = timer_get_us();
+ for (iter = 0; iter < 100; ) {
+ next = timer_get_us();
+ if (next != prev) {
+ delta = next - prev;
+ ut_assert(delta >= 0);
+ if (delta) {
+ if (delta < min)
+ min = delta;
+ prev = next;
+ iter++;
+ }
+ }
+ }
+
+ ut_asserteq(1, min);
+
+ return 0;
+}
+LIB_TEST(test_timer_get_us, 0);
+
+static int test_time_comparison(struct unit_test_state *uts)
+{
+ ulong start_us, end_us, delta_us;
+ long error;
+ ulong start;
+
+ start = get_timer(0);
+ start_us = timer_get_us();
+ while (get_timer(start) < 1000)
+ ;
+ end_us = timer_get_us();
+ delta_us = end_us - start_us;
+ error = delta_us - 1000000;
+ printf("%s: Microsecond time for 1 second: %lu, error = %ld\n",
+ __func__, delta_us, error);
+ ut_assert(abs(error) <= 1000);
+
+ return 0;
+}
+LIB_TEST(test_time_comparison, 0);
+
+static int test_udelay(struct unit_test_state *uts)
+{
+ long error;
+ ulong start, delta;
+ int iter;
+
+ start = get_timer(0);
+ for (iter = 0; iter < 1000; iter++)
+ udelay(1000);
+ delta = get_timer(start);
+ error = delta - 1000;
+ printf("%s: Delay time for 1000 udelay(1000): %lu ms, error = %ld\n",
+ __func__, delta, error);
+ ut_assert(abs(error) <= 100);
+
+ return 0;
+}
+LIB_TEST(test_udelay, 0);
diff --git a/test/unicode_ut.c b/test/lib/unicode.c
similarity index 92%
rename from test/unicode_ut.c
rename to test/lib/unicode.c
index 13e29c9..673470c 100644
--- a/test/unicode_ut.c
+++ b/test/lib/unicode.c
@@ -11,13 +11,10 @@
#include <errno.h>
#include <log.h>
#include <malloc.h>
+#include <test/lib.h>
#include <test/test.h>
-#include <test/suites.h>
#include <test/ut.h>
-/* Linker list entry for a Unicode test */
-#define UNICODE_TEST(_name) UNIT_TEST(_name, 0, unicode_test)
-
/* Constants c1-c4 and d1-d4 encode the same letters */
/* Six characters translating to one utf-8 byte each. */
@@ -64,7 +61,7 @@
ut_asserteq(6, u16_strlen(c4));
return 0;
}
-UNICODE_TEST(unicode_test_u16_strlen);
+LIB_TEST(unicode_test_u16_strlen, 0);
static int unicode_test_u16_strnlen(struct unit_test_state *uts)
{
@@ -75,7 +72,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_u16_strnlen);
+LIB_TEST(unicode_test_u16_strnlen, 0);
static int unicode_test_u16_strdup(struct unit_test_state *uts)
{
@@ -87,7 +84,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_u16_strdup);
+LIB_TEST(unicode_test_u16_strdup, 0);
static int unicode_test_u16_strcpy(struct unit_test_state *uts)
{
@@ -100,7 +97,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_u16_strcpy);
+LIB_TEST(unicode_test_u16_strcpy, 0);
/* U-Boot uses UTF-16 strings in the EFI context only. */
#if CONFIG_IS_ENABLED(EFI_LOADER) && !defined(API_BUILD)
@@ -173,7 +170,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_string16);
+LIB_TEST(unicode_test_string16, 0);
#endif
static int unicode_test_utf8_get(struct unit_test_state *uts)
@@ -218,7 +215,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf8_get);
+LIB_TEST(unicode_test_utf8_get, 0);
static int unicode_test_utf8_put(struct unit_test_state *uts)
{
@@ -256,7 +253,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf8_put);
+LIB_TEST(unicode_test_utf8_put, 0);
static int unicode_test_utf8_utf16_strlen(struct unit_test_state *uts)
{
@@ -272,7 +269,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf8_utf16_strlen);
+LIB_TEST(unicode_test_utf8_utf16_strlen, 0);
static int unicode_test_utf8_utf16_strnlen(struct unit_test_state *uts)
{
@@ -290,7 +287,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf8_utf16_strnlen);
+LIB_TEST(unicode_test_utf8_utf16_strnlen, 0);
/**
* ut_u16_strcmp() - Compare to u16 strings.
@@ -354,7 +351,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf8_utf16_strcpy);
+LIB_TEST(unicode_test_utf8_utf16_strcpy, 0);
static int unicode_test_utf8_utf16_strncpy(struct unit_test_state *uts)
{
@@ -398,7 +395,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf8_utf16_strncpy);
+LIB_TEST(unicode_test_utf8_utf16_strncpy, 0);
static int unicode_test_utf16_get(struct unit_test_state *uts)
{
@@ -424,7 +421,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf16_get);
+LIB_TEST(unicode_test_utf16_get, 0);
static int unicode_test_utf16_put(struct unit_test_state *uts)
{
@@ -452,7 +449,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf16_put);
+LIB_TEST(unicode_test_utf16_put, 0);
static int unicode_test_utf16_strnlen(struct unit_test_state *uts)
{
@@ -470,7 +467,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf16_strnlen);
+LIB_TEST(unicode_test_utf16_strnlen, 0);
static int unicode_test_utf16_utf8_strlen(struct unit_test_state *uts)
{
@@ -486,7 +483,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf16_utf8_strlen);
+LIB_TEST(unicode_test_utf16_utf8_strlen, 0);
static int unicode_test_utf16_utf8_strnlen(struct unit_test_state *uts)
{
@@ -498,7 +495,7 @@
ut_asserteq(12, utf16_utf8_strnlen(c4, 3));
return 0;
}
-UNICODE_TEST(unicode_test_utf16_utf8_strnlen);
+LIB_TEST(unicode_test_utf16_utf8_strnlen, 0);
static int unicode_test_utf16_utf8_strcpy(struct unit_test_state *uts)
{
@@ -543,7 +540,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf16_utf8_strcpy);
+LIB_TEST(unicode_test_utf16_utf8_strcpy, 0);
static int unicode_test_utf16_utf8_strncpy(struct unit_test_state *uts)
{
@@ -587,7 +584,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf16_utf8_strncpy);
+LIB_TEST(unicode_test_utf16_utf8_strncpy, 0);
static int unicode_test_utf_to_lower(struct unit_test_state *uts)
{
@@ -604,7 +601,7 @@
#endif
return 0;
}
-UNICODE_TEST(unicode_test_utf_to_lower);
+LIB_TEST(unicode_test_utf_to_lower, 0);
static int unicode_test_utf_to_upper(struct unit_test_state *uts)
{
@@ -621,7 +618,7 @@
#endif
return 0;
}
-UNICODE_TEST(unicode_test_utf_to_upper);
+LIB_TEST(unicode_test_utf_to_upper, 0);
static int unicode_test_u16_strcasecmp(struct unit_test_state *uts)
{
@@ -646,7 +643,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_u16_strcasecmp);
+LIB_TEST(unicode_test_u16_strcasecmp, 0);
static int unicode_test_u16_strncmp(struct unit_test_state *uts)
{
@@ -659,7 +656,7 @@
ut_assert(u16_strcmp(u"deghi", u"abcdef") > 0);
return 0;
}
-UNICODE_TEST(unicode_test_u16_strncmp);
+LIB_TEST(unicode_test_u16_strncmp, 0);
static int unicode_test_u16_strsize(struct unit_test_state *uts)
{
@@ -669,7 +666,7 @@
ut_asserteq_64(u16_strsize(c4), 14);
return 0;
}
-UNICODE_TEST(unicode_test_u16_strsize);
+LIB_TEST(unicode_test_u16_strsize, 0);
static int unicode_test_utf_to_cp(struct unit_test_state *uts)
{
@@ -698,7 +695,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf_to_cp);
+LIB_TEST(unicode_test_utf_to_cp, 0);
static void utf8_to_cp437_stream_helper(const char *in, char *out)
{
@@ -729,7 +726,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf8_to_cp437_stream);
+LIB_TEST(unicode_test_utf8_to_cp437_stream, 0);
static void utf8_to_utf32_stream_helper(const char *in, s32 *out)
{
@@ -778,7 +775,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_utf8_to_utf32_stream);
+LIB_TEST(unicode_test_utf8_to_utf32_stream, 0);
#ifdef CONFIG_EFI_LOADER
static int unicode_test_efi_create_indexed_name(struct unit_test_state *uts)
@@ -795,7 +792,7 @@
return 0;
}
-UNICODE_TEST(unicode_test_efi_create_indexed_name);
+LIB_TEST(unicode_test_efi_create_indexed_name, 0);
#endif
static int unicode_test_u16_strlcat(struct unit_test_state *uts)
@@ -846,13 +843,4 @@
return 0;
}
-UNICODE_TEST(unicode_test_u16_strlcat);
-
-int do_ut_unicode(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
-{
- struct unit_test *tests = UNIT_TEST_SUITE_START(unicode_test);
- const int n_ents = UNIT_TEST_SUITE_COUNT(unicode_test);
-
- return cmd_ut_category("Unicode", "unicode_test_",
- tests, n_ents, argc, argv);
-}
+LIB_TEST(unicode_test_u16_strlcat, 0);
diff --git a/test/py/conftest.py b/test/py/conftest.py
index 46a410c..d9f074f 100644
--- a/test/py/conftest.py
+++ b/test/py/conftest.py
@@ -23,6 +23,7 @@
import pytest
import re
from _pytest.runner import runtestprotocol
+import subprocess
import sys
from u_boot_spawn import BootFail, Timeout, Unexpected, handle_exception
@@ -65,12 +66,16 @@
parser.addoption('--build-dir', default=None,
help='U-Boot build directory (O=)')
+ parser.addoption('--build-dir-extra', default=None,
+ help='U-Boot build directory for extra build (O=)')
parser.addoption('--result-dir', default=None,
help='U-Boot test result/tmp directory')
parser.addoption('--persistent-data-dir', default=None,
help='U-Boot test persistent generated data directory')
parser.addoption('--board-type', '--bd', '-B', default='sandbox',
help='U-Boot board type')
+ parser.addoption('--board-type-extra', '--bde', default='sandbox',
+ help='U-Boot extra board type')
parser.addoption('--board-identity', '--id', default='na',
help='U-Boot board identity/instance')
parser.addoption('--build', default=False, action='store_true',
@@ -80,6 +85,9 @@
parser.addoption('--gdbserver', default=None,
help='Run sandbox under gdbserver. The argument is the channel '+
'over which gdbserver should communicate, e.g. localhost:1234')
+ parser.addoption('--role', help='U-Boot board role (for Labgrid-sjg)')
+ parser.addoption('--use-running-system', default=False, action='store_true',
+ help="Assume that U-Boot is ready and don't wait for a prompt")
def run_build(config, source_dir, build_dir, board_type, log):
"""run_build: Build U-Boot
@@ -125,26 +133,71 @@
Returns:
tuple:
str: Board type (U-Boot build name)
+ str: Extra board type (where two U-Boot builds are needed)
str: Identity for the lab board
str: Build directory
+ str: Extra build directory (where two U-Boot builds are needed)
str: Source directory
"""
- board_type = config.getoption('board_type')
- board_identity = config.getoption('board_identity')
+ role = config.getoption('role')
+
+ # Get a few provided parameters
build_dir = config.getoption('build_dir')
+ build_dir_extra = config.getoption('build_dir_extra')
+ if role:
+ # When using a role, build_dir and build_dir_extra are normally not set,
+ # since they are picked up from Labgrid-sjg via the u-boot-test-getrole
+ # script
+ board_identity = role
+ cmd = ['u-boot-test-getrole', role, '--configure']
+ env = os.environ.copy()
+ if build_dir:
+ env['U_BOOT_BUILD_DIR'] = build_dir
+ if build_dir_extra:
+ env['U_BOOT_BUILD_DIR_EXTRA'] = build_dir_extra
+ proc = subprocess.run(cmd, capture_output=True, encoding='utf-8',
+ env=env)
+ if proc.returncode:
+ raise ValueError(proc.stderr)
+ # For debugging
+ # print('conftest: lab:', proc.stdout)
+ vals = {}
+ for line in proc.stdout.splitlines():
+ item, value = line.split(' ', maxsplit=1)
+ k = item.split(':')[-1]
+ vals[k] = value
+ # For debugging
+ # print('conftest: lab info:', vals)
+
+ # Read the build directories here, in case none were provided in the
+ # command-line arguments
+ (board_type, board_type_extra, default_build_dir,
+ default_build_dir_extra, source_dir) = (vals['board'],
+ vals['board_extra'], vals['build_dir'], vals['build_dir_extra'],
+ vals['source_dir'])
+ else:
+ board_type = config.getoption('board_type')
+ board_type_extra = config.getoption('board_type_extra')
+ board_identity = config.getoption('board_identity')
+
+ source_dir = os.path.dirname(os.path.dirname(TEST_PY_DIR))
+ default_build_dir = source_dir + '/build-' + board_type
+ default_build_dir_extra = source_dir + '/build-' + board_type_extra
- source_dir = os.path.dirname(os.path.dirname(TEST_PY_DIR))
- default_build_dir = source_dir + '/build-' + board_type
+ # Use the provided command-line arguments if present, else fall back to
if not build_dir:
build_dir = default_build_dir
+ if not build_dir_extra:
+ build_dir_extra = default_build_dir_extra
- return board_type, board_identity, build_dir, source_dir
+ return (board_type, board_type_extra, board_identity, build_dir,
+ build_dir_extra, source_dir)
def pytest_xdist_setupnodes(config, specs):
"""Clear out any 'done' file from a previous build"""
global build_done_file
- build_dir = get_details(config)[2]
+ build_dir = get_details(config)[3]
build_done_file = Path(build_dir) / 'build.done'
if build_done_file.exists():
@@ -184,7 +237,8 @@
global console
global ubconfig
- board_type, board_identity, build_dir, source_dir = get_details(config)
+ (board_type, board_type_extra, board_identity, build_dir, build_dir_extra,
+ source_dir) = get_details(config)
board_type_filename = board_type.replace('-', '_')
board_identity_filename = board_identity.replace('-', '_')
@@ -249,20 +303,25 @@
ubconfig.test_py_dir = TEST_PY_DIR
ubconfig.source_dir = source_dir
ubconfig.build_dir = build_dir
+ ubconfig.build_dir_extra = build_dir_extra
ubconfig.result_dir = result_dir
ubconfig.persistent_data_dir = persistent_data_dir
ubconfig.board_type = board_type
+ ubconfig.board_type_extra = board_type_extra
ubconfig.board_identity = board_identity
ubconfig.gdbserver = gdbserver
+ ubconfig.use_running_system = config.getoption('use_running_system')
ubconfig.dtb = build_dir + '/arch/sandbox/dts/test.dtb'
ubconfig.connection_ok = True
env_vars = (
'board_type',
+ 'board_type_extra',
'board_identity',
'source_dir',
'test_py_dir',
'build_dir',
+ 'build_dir_extra',
'result_dir',
'persistent_data_dir',
)
diff --git a/test/py/tests/bootstd/flash1.img.xz b/test/py/tests/bootstd/flash1.img.xz
new file mode 100644
index 0000000..29b78c6
--- /dev/null
+++ b/test/py/tests/bootstd/flash1.img.xz
Binary files differ
diff --git a/test/py/tests/test_eficonfig/test_eficonfig.py b/test/py/tests/test_eficonfig/test_eficonfig.py
index 1d8e033..d98de52 100644
--- a/test/py/tests/test_eficonfig/test_eficonfig.py
+++ b/test/py/tests/test_eficonfig/test_eficonfig.py
@@ -117,7 +117,7 @@
press_up_down_enter_and_wait(0, 0, True, 'Quit')
# Press the enter key to select 'Description:' entry, then enter Description
- press_up_down_enter_and_wait(0, 0, True, 'enter description:')
+ press_up_down_enter_and_wait(0, 0, True, 'Enter description:')
# Send Description user input, press ENTER key to complete
send_user_input_and_wait('test 1', 'Quit')
@@ -166,7 +166,7 @@
press_up_down_enter_and_wait(0, 0, True, 'Quit')
# Press the enter key to select 'Description:' entry, then enter Description
- press_up_down_enter_and_wait(0, 0, True, 'enter description:')
+ press_up_down_enter_and_wait(0, 0, True, 'Enter description:')
# Send Description user input, press ENTER key to complete
send_user_input_and_wait('test 2', 'Quit')
@@ -278,7 +278,7 @@
u_boot_console.p.expect([i])
# Press the enter key to select 'Description:' entry, then enter Description
- press_up_down_enter_and_wait(0, 0, True, 'enter description:')
+ press_up_down_enter_and_wait(0, 0, True, 'Enter description:')
# Send Description user input, press ENTER key to complete
send_user_input_and_wait('test 3', 'Quit')
diff --git a/test/py/tests/test_env.py b/test/py/tests/test_env.py
index 00bcccd..4471db7 100644
--- a/test/py/tests/test_env.py
+++ b/test/py/tests/test_env.py
@@ -488,7 +488,7 @@
assert 'Loading Environment from EXT4... OK' in response
response = c.run_command('ext4ls host 0:0')
- assert '8192 uboot.env' in response
+ assert '8192 uboot.env' in response
response = c.run_command('env info')
assert 'env_valid = valid' in response
diff --git a/test/py/tests/test_fs/test_basic.py b/test/py/tests/test_fs/test_basic.py
index 71f3e86..b5f4704 100644
--- a/test/py/tests/test_fs/test_basic.py
+++ b/test/py/tests/test_fs/test_basic.py
@@ -33,10 +33,7 @@
# In addition, test with a nonexistent directory to see if we crash.
output = u_boot_console.run_command(
'%sls host 0:0 invalid_d' % fs_type)
- if fs_type == 'ext4':
- assert('Can not find directory' in output)
- else:
- assert('' == output)
+ assert('' == output)
def test_fs2(self, u_boot_console, fs_obj_basic):
"""
diff --git a/test/py/tests/test_spi.py b/test/py/tests/test_spi.py
index 3160d58..44e5473 100644
--- a/test/py/tests/test_spi.py
+++ b/test/py/tests/test_spi.py
@@ -693,4 +693,16 @@
u_boot_console, 'read', offset, size, addr, 1, error_msg, EXPECTED_READ
)
+ # Read to relocation address
+ output = u_boot_console.run_command('bdinfo')
+ m = re.search(r'relocaddr\s*= (.+)', output)
+ res_area = int(m.group(1), 16)
+
+ start = 0
+ size = 0x2000
+ error_msg = 'ERROR: trying to overwrite reserved memory'
+ flash_ops(
+ u_boot_console, 'read', start, size, res_area, 1, error_msg, EXPECTED_READ
+ )
+
i = i + 1
diff --git a/test/py/tests/test_usb.py b/test/py/tests/test_usb.py
index fb3d20f..2397fd3 100644
--- a/test/py/tests/test_usb.py
+++ b/test/py/tests/test_usb.py
@@ -288,6 +288,47 @@
if not part_detect:
pytest.skip('No %s partition detected' % fs.upper())
+def usb_fatload_fatwrite(u_boot_console, fs, x, part):
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ size = random.randint(4, 1 * 1024 * 1024)
+ output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
+ m = re.search('==> (.+?)', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ expected_crc32 = m.group(1)
+
+ file = '%s_%d' % ('uboot_test', size)
+ output = u_boot_console.run_command(
+ '%swrite usb %d:%s %x %s %x' % (fs, x, part, addr, file, size)
+ )
+ assert 'Unable to write' not in output
+ assert 'Error' not in output
+ assert 'overflow' not in output
+ expected_text = '%d bytes written' % size
+ assert expected_text in output
+
+ alignment = int(
+ u_boot_console.config.buildconfig.get(
+ 'config_sys_cacheline_size', 128
+ )
+ )
+ offset = random.randrange(alignment, 1024, alignment)
+ output = u_boot_console.run_command(
+ '%sload usb %d:%s %x %s' % (fs, x, part, addr + offset, file)
+ )
+ assert 'Invalid FAT entry' not in output
+ assert 'Unable to read file' not in output
+ assert 'Misaligned buffer address' not in output
+ expected_text = '%d bytes read' % size
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr + offset)
+ )
+ assert expected_crc32 in output
+
+ return file, size, expected_crc32
+
@pytest.mark.buildconfigspec('cmd_usb')
@pytest.mark.buildconfigspec('cmd_fat')
@pytest.mark.buildconfigspec('cmd_memory')
@@ -309,49 +350,11 @@
for part in partitions:
part_detect = 1
- addr = u_boot_utils.find_ram_base(u_boot_console)
- size = random.randint(4, 1 * 1024 * 1024)
- output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
- m = re.search('==> (.+?)', output)
- if not m:
- pytest.fail('CRC32 failed')
- expected_crc32 = m.group(1)
-
- file = '%s_%d' % ('uboot_test', size)
- output = u_boot_console.run_command(
- '%swrite usb %d:%s %x %s %x' % (fs, x, part, addr, file, size)
- )
- assert 'Unable to write' not in output
- assert 'Error' not in output
- assert 'overflow' not in output
- expected_text = '%d bytes written' % size
- assert expected_text in output
-
- alignment = int(
- u_boot_console.config.buildconfig.get(
- 'config_sys_cacheline_size', 128
- )
- )
- offset = random.randrange(alignment, 1024, alignment)
- output = u_boot_console.run_command(
- '%sload usb %d:%s %x %s' % (fs, x, part, addr + offset, file)
- )
- assert 'Invalid FAT entry' not in output
- assert 'Unable to read file' not in output
- assert 'Misaligned buffer address' not in output
- expected_text = '%d bytes read' % size
- assert expected_text in output
-
- output = u_boot_console.run_command(
- 'crc32 %x $filesize' % (addr + offset)
- )
- assert expected_crc32 in output
+ usb_fatload_fatwrite(u_boot_console, fs, x, part)
if not part_detect:
pytest.skip('No %s partition detected' % fs.upper())
- return file, size
-
@pytest.mark.buildconfigspec('cmd_usb')
@pytest.mark.buildconfigspec('cmd_ext4')
def test_usb_ext4ls(u_boot_console):
@@ -380,9 +383,42 @@
if not part_detect:
pytest.skip('No %s partition detected' % fs.upper())
+def usb_ext4load_ext4write(u_boot_console, fs, x, part):
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ size = random.randint(4, 1 * 1024 * 1024)
+ output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
+ m = re.search('==> (.+?)', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ expected_crc32 = m.group(1)
+ file = '%s_%d' % ('uboot_test', size)
+
+ output = u_boot_console.run_command(
+ '%swrite usb %d:%s %x /%s %x' % (fs, x, part, addr, file, size)
+ )
+ assert 'Unable to write' not in output
+ assert 'Error' not in output
+ assert 'overflow' not in output
+ expected_text = '%d bytes written' % size
+ assert expected_text in output
+
+ offset = random.randrange(128, 1024, 128)
+ output = u_boot_console.run_command(
+ '%sload usb %d:%s %x /%s' % (fs, x, part, addr + offset, file)
+ )
+ expected_text = '%d bytes read' % size
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr + offset)
+ )
+ assert expected_crc32 in output
+
+ return file, size, expected_crc32
+
@pytest.mark.buildconfigspec('cmd_usb')
@pytest.mark.buildconfigspec('cmd_ext4')
-@pytest.mark.buildconfigspec('ext4_write')
+@pytest.mark.buildconfigspec('cmd_ext4_write')
@pytest.mark.buildconfigspec('cmd_memory')
def test_usb_ext4load_ext4write(u_boot_console):
devices, controllers, storage_device = test_usb_part(u_boot_console)
@@ -402,41 +438,11 @@
for part in partitions:
part_detect = 1
- addr = u_boot_utils.find_ram_base(u_boot_console)
- size = random.randint(4, 1 * 1024 * 1024)
- output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
- m = re.search('==> (.+?)', output)
- if not m:
- pytest.fail('CRC32 failed')
- expected_crc32 = m.group(1)
- file = '%s_%d' % ('uboot_test', size)
-
- output = u_boot_console.run_command(
- '%swrite usb %d:%s %x /%s %x' % (fs, x, part, addr, file, size)
- )
- assert 'Unable to write' not in output
- assert 'Error' not in output
- assert 'overflow' not in output
- expected_text = '%d bytes written' % size
- assert expected_text in output
-
- offset = random.randrange(128, 1024, 128)
- output = u_boot_console.run_command(
- '%sload usb %d:%s %x /%s' % (fs, x, part, addr + offset, file)
- )
- expected_text = '%d bytes read' % size
- assert expected_text in output
-
- output = u_boot_console.run_command(
- 'crc32 %x $filesize' % (addr + offset)
- )
- assert expected_crc32 in output
+ usb_ext4load_ext4write(u_boot_console, fs, x, part)
if not part_detect:
pytest.skip('No %s partition detected' % fs.upper())
- return file, size
-
@pytest.mark.buildconfigspec('cmd_usb')
@pytest.mark.buildconfigspec('cmd_ext2')
def test_usb_ext2ls(u_boot_console):
@@ -469,11 +475,10 @@
@pytest.mark.buildconfigspec('cmd_usb')
@pytest.mark.buildconfigspec('cmd_ext2')
@pytest.mark.buildconfigspec('cmd_ext4')
-@pytest.mark.buildconfigspec('ext4_write')
+@pytest.mark.buildconfigspec('cmd_ext4_write')
@pytest.mark.buildconfigspec('cmd_memory')
def test_usb_ext2load(u_boot_console):
devices, controllers, storage_device = test_usb_part(u_boot_console)
- file, size = test_usb_ext4load_ext4write(u_boot_console)
if not devices:
pytest.skip('No devices detected')
@@ -491,12 +496,9 @@
for part in partitions:
part_detect = 1
+ file, size, expected_crc32 = \
+ usb_ext4load_ext4write(u_boot_console, 'ext4', x, part)
addr = u_boot_utils.find_ram_base(u_boot_console)
- output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
- m = re.search('==> (.+?)', output)
- if not m:
- pytest.fail('CRC32 failed')
- expected_crc32 = m.group(1)
offset = random.randrange(128, 1024, 128)
output = u_boot_console.run_command(
@@ -543,6 +545,7 @@
pytest.skip('No partition detected')
@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('cmd_ext4_write')
@pytest.mark.buildconfigspec('cmd_fs_generic')
def test_usb_load(u_boot_console):
devices, controllers, storage_device = test_usb_part(u_boot_console)
@@ -565,15 +568,11 @@
addr = u_boot_utils.find_ram_base(u_boot_console)
if fs == 'fat':
- file, size = test_usb_fatload_fatwrite(u_boot_console)
+ file, size, expected_crc32 = \
+ usb_fatload_fatwrite(u_boot_console, fs, x, part)
elif fs == 'ext4':
- file, size = test_usb_ext4load_ext4write(u_boot_console)
-
- output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
- m = re.search('==> (.+?)', output)
- if not m:
- pytest.fail('CRC32 failed')
- expected_crc32 = m.group(1)
+ file, size, expected_crc32 = \
+ usb_ext4load_ext4write(u_boot_console, fs, x, part)
offset = random.randrange(128, 1024, 128)
output = u_boot_console.run_command(
diff --git a/test/py/tests/test_ut.py b/test/py/tests/test_ut.py
index 39aa103..6d44191 100644
--- a/test/py/tests/test_ut.py
+++ b/test/py/tests/test_ut.py
@@ -28,21 +28,22 @@
if not os.path.exists(dirname):
os.mkdir(dirname)
-def setup_image(cons, mmc_dev, part_type, second_part=False):
+def setup_image(cons, devnum, part_type, second_part=False, basename='mmc'):
"""Create a 20MB disk image with a single partition
Args:
cons (ConsoleBase): Console to use
- mmc_dev (int): MMC device number to use, e.g. 1
+ devnum (int): Device number to use, e.g. 1
part_type (int): Partition type, e.g. 0xc for FAT32
second_part (bool): True to contain a small second partition
+ basename (str): Base name to use in the filename, e.g. 'mmc'
Returns:
tuple:
str: Filename of MMC image
str: Directory name of 'mnt' directory
"""
- fname = os.path.join(cons.config.source_dir, f'mmc{mmc_dev}.img')
+ fname = os.path.join(cons.config.source_dir, f'{basename}{devnum}.img')
mnt = os.path.join(cons.config.persistent_data_dir, 'mnt')
mkdir_cond(mnt)
@@ -78,16 +79,17 @@
u_boot_utils.run_and_log(cons, f'sudo chown {getpass.getuser()} {mnt}')
return loop
-def copy_prepared_image(cons, mmc_dev, fname):
+def copy_prepared_image(cons, devnum, fname, basename='mmc'):
"""Use a prepared image since we cannot create one
Args:
cons (ConsoleBase): Console touse
- mmc_dev (int): MMC device number
+ devnum (int): device number
fname (str): Filename of MMC image
+ basename (str): Base name to use in the filename, e.g. 'mmc'
"""
infname = os.path.join(cons.config.source_dir,
- f'test/py/tests/bootstd/mmc{mmc_dev}.img.xz')
+ f'test/py/tests/bootstd/{basename}{devnum}.img.xz')
u_boot_utils.run_and_log(cons, ['sh', '-c', f'xz -dc {infname} >{fname}'])
def setup_bootmenu_image(cons):
@@ -208,8 +210,6 @@
cons, f'echo here {kernel} {symlink}')
os.symlink(kernel, symlink)
- u_boot_utils.run_and_log(
- cons, f'mkimage -C none -A arm -T script -d {cmd_fname} {scr_fname}')
complete = True
except ValueError as exc:
@@ -549,6 +549,44 @@
with open(fn, 'wb') as fh:
fh.write(data)
+
+def setup_efi_image(cons):
+ """Create a 20MB disk image with an EFI app on it"""
+ devnum = 1
+ basename = 'flash'
+ fname, mnt = setup_image(cons, devnum, 0xc, second_part=True,
+ basename=basename)
+
+ loop = None
+ mounted = False
+ complete = False
+ try:
+ loop = mount_image(cons, fname, mnt, 'ext4')
+ mounted = True
+ efi_dir = os.path.join(mnt, 'EFI')
+ mkdir_cond(efi_dir)
+ bootdir = os.path.join(efi_dir, 'BOOT')
+ mkdir_cond(bootdir)
+ efi_src = os.path.join(cons.config.build_dir,
+ f'lib/efi_loader/testapp.efi')
+ efi_dst = os.path.join(bootdir, 'BOOTSBOX.EFI')
+ with open(efi_src, 'rb') as inf:
+ with open(efi_dst, 'wb') as outf:
+ outf.write(inf.read())
+ complete = True
+ except ValueError as exc:
+ print(f'Falled to create image, failing back to prepared copy: {exc}')
+
+ finally:
+ if mounted:
+ u_boot_utils.run_and_log(cons, 'sudo umount --lazy %s' % mnt)
+ if loop:
+ u_boot_utils.run_and_log(cons, 'sudo losetup -d %s' % loop)
+
+ if not complete:
+ copy_prepared_image(cons, devnum, fname, basename)
+
+
@pytest.mark.buildconfigspec('cmd_bootflow')
@pytest.mark.buildconfigspec('sandbox')
def test_ut_dm_init_bootstd(u_boot_console):
@@ -559,6 +597,7 @@
setup_cedit_file(u_boot_console)
setup_cros_image(u_boot_console)
setup_android_image(u_boot_console)
+ setup_efi_image(u_boot_console)
# Restart so that the new mmc1.img is picked up
u_boot_console.restart_uboot()
diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py
index d8d0bdf..fa9cd57 100644
--- a/test/py/u_boot_console_base.py
+++ b/test/py/u_boot_console_base.py
@@ -23,12 +23,22 @@
pattern_unknown_command = re.compile('Unknown command \'.*\' - try \'help\'')
pattern_error_notification = re.compile('## Error: ')
pattern_error_please_reset = re.compile('### ERROR ### Please RESET the board ###')
+pattern_ready_prompt = re.compile('{lab ready in (.*)s: (.*)}')
+pattern_lab_mode = re.compile('{lab mode.*}')
PAT_ID = 0
PAT_RE = 1
# Timeout before expecting the console to be ready (in milliseconds)
-TIMEOUT_MS = 30000
+TIMEOUT_MS = 30000 # Standard timeout
+TIMEOUT_CMD_MS = 10000 # Command-echo timeout
+
+# Timeout for board preparation in lab mode. This needs to be enough to build
+# U-Boot, write it to the board and then boot the board. Since this process is
+# under the control of another program (e.g. Labgrid), it will failure sooner
+# if something goes way. So use a very long timeout here to cover all possible
+# situations.
+TIMEOUT_PREPARE_MS = 3 * 60 * 1000
bad_pattern_defs = (
('spl_signon', pattern_u_boot_spl_signon),
@@ -142,6 +152,7 @@
self.at_prompt = False
self.at_prompt_logevt = None
+ self.lab_mode = False
def get_spawn(self):
# This is not called, ssubclass must define this.
@@ -172,43 +183,75 @@
"""
if self.p:
- self.p.close()
+ self.log.start_section('Stopping U-Boot')
+ close_type = self.p.close()
+ self.log.info(f'Close type: {close_type}')
+ self.log.end_section('Stopping U-Boot')
self.logstream.close()
+ def set_lab_mode(self):
+ """Select lab mode
+
+ This tells us that we will get a 'lab ready' message when the board is
+ ready for use. We don't need to look for signon messages.
+ """
+ self.log.info(f'test.py: Lab mode is active')
+ self.p.timeout = TIMEOUT_PREPARE_MS
+ self.lab_mode = True
+
def wait_for_boot_prompt(self, loop_num = 1):
"""Wait for the boot up until command prompt. This is for internal use only.
"""
try:
+ self.log.info('Waiting for U-Boot to be ready')
bcfg = self.config.buildconfig
config_spl_serial = bcfg.get('config_spl_serial', 'n') == 'y'
env_spl_skipped = self.config.env.get('env__spl_skipped', False)
env_spl_banner_times = self.config.env.get('env__spl_banner_times', 1)
- while loop_num > 0:
+ while not self.lab_mode and loop_num > 0:
loop_num -= 1
while config_spl_serial and not env_spl_skipped and env_spl_banner_times > 0:
- m = self.p.expect([pattern_u_boot_spl_signon] +
- self.bad_patterns)
- if m != 0:
+ m = self.p.expect([pattern_u_boot_spl_signon,
+ pattern_lab_mode] + self.bad_patterns)
+ if m == 1:
+ self.set_lab_mode()
+ break
+ elif m != 0:
raise BootFail('Bad pattern found on SPL console: ' +
- self.bad_pattern_ids[m - 1])
+ self.bad_pattern_ids[m - 1])
env_spl_banner_times -= 1
- m = self.p.expect([pattern_u_boot_main_signon] + self.bad_patterns)
- if m != 0:
- raise BootFail('Bad pattern found on console: ' +
- self.bad_pattern_ids[m - 1])
- self.u_boot_version_string = self.p.after
+ if not self.lab_mode:
+ m = self.p.expect([pattern_u_boot_main_signon,
+ pattern_lab_mode] + self.bad_patterns)
+ if m == 1:
+ self.set_lab_mode()
+ elif m != 0:
+ raise BootFail('Bad pattern found on console: ' +
+ self.bad_pattern_ids[m - 1])
+ if not self.lab_mode:
+ self.u_boot_version_string = self.p.after
while True:
- m = self.p.expect([self.prompt_compiled,
+ m = self.p.expect([self.prompt_compiled, pattern_ready_prompt,
pattern_stop_autoboot_prompt] + self.bad_patterns)
if m == 0:
+ self.log.info(f'Found ready prompt {m}')
break
- if m == 1:
+ elif m == 1:
+ m = pattern_ready_prompt.search(self.p.after)
+ self.u_boot_version_string = m.group(2)
+ self.log.info(f'Lab: Board is ready')
+ self.p.timeout = TIMEOUT_MS
+ break
+ if m == 2:
+ self.log.info(f'Found autoboot prompt {m}')
self.p.send(' ')
continue
- raise BootFail('Bad pattern found on console: ' +
- self.bad_pattern_ids[m - 2])
+ if not self.lab_mode:
+ raise BootFail('Missing prompt / ready message on console: ' +
+ self.bad_pattern_ids[m - 3])
+ self.log.info(f'U-Boot is ready')
finally:
self.log.timestamp()
@@ -261,22 +304,28 @@
try:
self.at_prompt = False
+ if not self.p:
+ raise BootFail(
+ f"Lab failure: Connection lost when sending command '{cmd}'")
+
if send_nl:
cmd += '\n'
- while cmd:
- # Limit max outstanding data, so UART FIFOs don't overflow
- chunk = cmd[:self.max_fifo_fill]
- cmd = cmd[self.max_fifo_fill:]
- self.p.send(chunk)
- if not wait_for_echo:
- continue
- chunk = re.escape(chunk)
- chunk = chunk.replace('\\\n', '[\r\n]')
- m = self.p.expect([chunk] + self.bad_patterns)
- if m != 0:
- self.at_prompt = False
- raise BootFail('Bad pattern found on console: ' +
- self.bad_pattern_ids[m - 1])
+ rem = cmd # Remaining to be sent
+ with self.temporary_timeout(TIMEOUT_CMD_MS):
+ while rem:
+ # Limit max outstanding data, so UART FIFOs don't overflow
+ chunk = rem[:self.max_fifo_fill]
+ rem = rem[self.max_fifo_fill:]
+ self.p.send(chunk)
+ if not wait_for_echo:
+ continue
+ chunk = re.escape(chunk)
+ chunk = chunk.replace('\\\n', '[\r\n]')
+ m = self.p.expect([chunk] + self.bad_patterns)
+ if m != 0:
+ self.at_prompt = False
+ raise BootFail(f"Failed to get echo on console (cmd '{cmd}':rem '{rem}'): " +
+ self.bad_pattern_ids[m - 1])
if not wait_for_prompt:
return
if wait_for_reboot:
@@ -440,11 +489,17 @@
if not self.config.gdbserver:
self.p.timeout = TIMEOUT_MS
self.p.logfile_read = self.logstream
- if expect_reset:
- loop_num = 2
+ if self.config.use_running_system:
+ # Send an empty command to set up the 'expect' logic. This has
+ # the side effect of ensuring that there was no partial command
+ # line entered
+ self.run_command(' ')
else:
- loop_num = 1
- self.wait_for_boot_prompt(loop_num = loop_num)
+ if expect_reset:
+ loop_num = 2
+ else:
+ loop_num = 1
+ self.wait_for_boot_prompt(loop_num = loop_num)
self.at_prompt = True
self.at_prompt_logevt = self.logstream.logfile.cur_evt
except Exception as ex:
diff --git a/test/py/u_boot_console_exec_attach.py b/test/py/u_boot_console_exec_attach.py
index 8dd8cc1..8b253b4 100644
--- a/test/py/u_boot_console_exec_attach.py
+++ b/test/py/u_boot_console_exec_attach.py
@@ -59,14 +59,27 @@
args = [self.config.board_type, self.config.board_identity]
s = Spawn(['u-boot-test-console'] + args)
- try:
- self.log.action('Resetting board')
- cmd = ['u-boot-test-reset'] + args
- runner = self.log.get_runner(cmd[0], sys.stdout)
- runner.run(cmd)
- runner.close()
- except:
- s.close()
- raise
+ if self.config.use_running_system:
+ self.log.action('Connecting to board without reset')
+ else:
+ try:
+ self.log.action('Resetting board')
+ cmd = ['u-boot-test-reset'] + args
+ runner = self.log.get_runner(cmd[0], sys.stdout)
+ runner.run(cmd)
+ runner.close()
+ except:
+ s.close()
+ raise
return s
+
+ def close(self):
+ super().close()
+
+ self.log.action('Releasing board')
+ args = [self.config.board_type, self.config.board_identity]
+ cmd = ['u-boot-test-release'] + args
+ runner = self.log.get_runner(cmd[0], sys.stdout)
+ runner.run(cmd)
+ runner.close()
diff --git a/test/py/u_boot_spawn.py b/test/py/u_boot_spawn.py
index 24d3690..c703454 100644
--- a/test/py/u_boot_spawn.py
+++ b/test/py/u_boot_spawn.py
@@ -5,15 +5,21 @@
Logic to spawn a sub-process and interact with its stdio.
"""
+import io
import os
import re
import pty
import pytest
import signal
import select
+import sys
+import termios
import time
import traceback
+# Character to send (twice) to exit the terminal
+EXIT_CHAR = 0x1d # FS (Ctrl + ])
+
class Timeout(Exception):
"""An exception sub-class that indicates that a timeout occurred."""
@@ -115,11 +121,30 @@
finally:
os._exit(255)
+ old = None
try:
+ isatty = False
+ try:
+ isatty = os.isatty(sys.stdout.fileno())
+
+ # with --capture=tee-sys we cannot call fileno()
+ except io.UnsupportedOperation as exc:
+ pass
+ if isatty:
+ new = termios.tcgetattr(self.fd)
+ old = new
+ new[3] = new[3] & ~(termios.ICANON | termios.ISIG)
+ new[3] = new[3] & ~termios.ECHO
+ new[6][termios.VMIN] = 0
+ new[6][termios.VTIME] = 0
+ termios.tcsetattr(self.fd, termios.TCSANOW, new)
+
self.poll = select.poll()
self.poll.register(self.fd, select.POLLIN | select.POLLPRI | select.POLLERR |
select.POLLHUP | select.POLLNVAL)
except:
+ if old:
+ termios.tcsetattr(self.fd, termios.TCSANOW, old)
self.close()
raise
@@ -289,15 +314,28 @@
None.
Returns:
- Nothing.
+ str: Type of closure completed
"""
+ # For Labgrid-sjg, ask it is exit gracefully, so it can transition the
+ # board to the final state (like 'off') before exiting.
+ if os.environ.get('USE_LABGRID_SJG'):
+ self.send(chr(EXIT_CHAR) * 2)
+ # Wait about 10 seconds for Labgrid to close and power off the board
+ for _ in range(100):
+ if not self.isalive():
+ return 'normal'
+ time.sleep(0.1)
+
+ # That didn't work, so try closing the PTY
os.close(self.fd)
for _ in range(100):
if not self.isalive():
- break
+ return 'break'
time.sleep(0.1)
+ return 'timeout'
+
def get_expect_output(self):
"""Return the output read by expect()
diff --git a/test/test-main.c b/test/test-main.c
index da5b07c..8d76489 100644
--- a/test/test-main.c
+++ b/test/test-main.c
@@ -4,6 +4,8 @@
* Written by Simon Glass <sjg@chromium.org>
*/
+#define LOG_CATEGORY LOGC_TEST
+
#include <blk.h>
#include <console.h>
#include <cyclic.h>
@@ -240,15 +242,22 @@
* ut_list_has_dm_tests() - Check if a list of tests has driver model ones
*
* @tests: List of tests to run
- * @count: Number of tests to ru
+ * @count: Number of tests to run
+ * @prefix: String prefix for the tests. Any tests that have this prefix will be
+ * printed without the prefix, so that it is easier to see the unique part
+ * of the test name. If NULL, no prefix processing is done
+ * @select_name: Name of a single test being run (from the list provided). If
+ * NULL all tests are being run
* Return: true if any of the tests have the UTF_DM flag
*/
-static bool ut_list_has_dm_tests(struct unit_test *tests, int count)
+static bool ut_list_has_dm_tests(struct unit_test *tests, int count,
+ const char *prefix, const char *select_name)
{
struct unit_test *test;
for (test = tests; test < tests + count; test++) {
- if (test->flags & UTF_DM)
+ if (test_matches(prefix, test->name, select_name) &&
+ (test->flags & UTF_DM))
return true;
}
@@ -379,6 +388,12 @@
return -EAGAIN;
}
}
+ if (test->flags & UFT_BLOBLIST) {
+ log_debug("save bloblist %p\n", gd_bloblist());
+ uts->old_bloblist = gd_bloblist();
+ gd_set_bloblist(NULL);
+ }
+
ut_silence_console(uts);
return 0;
@@ -402,6 +417,11 @@
free(uts->of_other);
uts->of_other = NULL;
+ if (test->flags & UFT_BLOBLIST) {
+ gd_set_bloblist(uts->old_bloblist);
+ log_debug("restore bloblist %p\n", gd_bloblist());
+ }
+
blkcache_free();
return 0;
@@ -550,6 +570,9 @@
* @count: Number of tests to run
* @select_name: Name of a single test to run (from the list provided). If NULL
* then all tests are run
+ * @test_insert: String describing a test to run after n other tests run, in the
+ * format n:name where n is the number of tests to run before this one and
+ * name is the name of the test to run
* Return: 0 if all tests passed, -ENOENT if test @select_name was not found,
* -EBADF if any failed
*/
@@ -594,14 +617,14 @@
*/
len = strlen(test_name);
if (len < 6 || strcmp(test_name + len - 6, "_norun")) {
- printf("Test %s is manual so must have a name ending in _norun\n",
+ printf("Test '%s' is manual so must have a name ending in _norun\n",
test_name);
uts->fail_count++;
return -EBADF;
}
if (!uts->force_run) {
if (select_name) {
- printf("Test %s skipped as it is manual (use -f to run it)\n",
+ printf("Test '%s' skipped as it is manual (use -f to run it)\n",
test_name);
}
continue;
@@ -612,7 +635,7 @@
if (one && upto == pos) {
ret = ut_run_test_live_flat(uts, one);
if (uts->fail_count != old_fail_count) {
- printf("Test %s failed %d times (position %d)\n",
+ printf("Test '%s' failed %d times (position %d)\n",
one->name,
uts->fail_count - old_fail_count, pos);
}
@@ -622,7 +645,7 @@
for (i = 0; i < uts->runs_per_test; i++)
ret = ut_run_test_live_flat(uts, test);
if (uts->fail_count != old_fail_count) {
- printf("Test %s failed %d times\n", select_name,
+ printf("Test '%s' failed %d times\n", test_name,
uts->fail_count - old_fail_count);
}
found++;
@@ -646,7 +669,7 @@
int ret;
if (!CONFIG_IS_ENABLED(OF_PLATDATA) &&
- ut_list_has_dm_tests(tests, count)) {
+ ut_list_has_dm_tests(tests, count, prefix, select_name)) {
has_dm_tests = true;
/*
* If we have no device tree, or it only has a root node, then
diff --git a/test/time_ut.c b/test/time_ut.c
deleted file mode 100644
index 149c4b5..0000000
--- a/test/time_ut.c
+++ /dev/null
@@ -1,132 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2015 Google, Inc
- * Written by Simon Glass <sjg@chromium.org>
- */
-
-#include <command.h>
-#include <errno.h>
-#include <time.h>
-#include <linux/delay.h>
-
-static int test_get_timer(void)
-{
- ulong base, start, next, diff;
- int iter;
-
- base = get_timer(0);
- start = get_timer(0);
- for (iter = 0; iter < 10; iter++) {
- do {
- next = get_timer(0);
- } while (start == next);
-
- if (start + 1 != next) {
- printf("%s: iter=%d, start=%lu, next=%lu, expected a difference of 1\n",
- __func__, iter, start, next);
- return -EINVAL;
- }
- start++;
- }
-
- /*
- * Check that get_timer(base) matches our elapsed time, allowing that
- * an extra millisecond may have passed.
- */
- diff = get_timer(base);
- if (diff != iter && diff != iter + 1) {
- printf("%s: expected get_timer(base) to match elapsed time: diff=%lu, expected=%d\n",
- __func__, diff, iter);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int test_timer_get_us(void)
-{
- ulong prev, next, min = 1000000;
- long delta;
- int iter;
-
- /* Find the minimum delta we can measure, in microseconds */
- prev = timer_get_us();
- for (iter = 0; iter < 100; ) {
- next = timer_get_us();
- if (next != prev) {
- delta = next - prev;
- if (delta < 0) {
- printf("%s: timer_get_us() went backwards from %lu to %lu\n",
- __func__, prev, next);
- return -EINVAL;
- } else if (delta != 0) {
- if (delta < min)
- min = delta;
- prev = next;
- iter++;
- }
- }
- }
-
- if (min != 1) {
- printf("%s: Minimum microsecond delta should be 1 but is %lu\n",
- __func__, min);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int test_time_comparison(void)
-{
- ulong start_us, end_us, delta_us;
- long error;
- ulong start;
-
- start = get_timer(0);
- start_us = timer_get_us();
- while (get_timer(start) < 1000)
- ;
- end_us = timer_get_us();
- delta_us = end_us - start_us;
- error = delta_us - 1000000;
- printf("%s: Microsecond time for 1 second: %lu, error = %ld\n",
- __func__, delta_us, error);
- if (abs(error) > 1000)
- return -EINVAL;
-
- return 0;
-}
-
-static int test_udelay(void)
-{
- long error;
- ulong start, delta;
- int iter;
-
- start = get_timer(0);
- for (iter = 0; iter < 1000; iter++)
- udelay(1000);
- delta = get_timer(start);
- error = delta - 1000;
- printf("%s: Delay time for 1000 udelay(1000): %lu ms, error = %ld\n",
- __func__, delta, error);
- if (abs(error) > 100)
- return -EINVAL;
-
- return 0;
-}
-
-int do_ut_time(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
-{
- int ret = 0;
-
- ret |= test_get_timer();
- ret |= test_timer_get_us();
- ret |= test_time_comparison();
- ret |= test_udelay();
-
- printf("Test %s\n", ret ? "failed" : "passed");
-
- return ret ? CMD_RET_FAILURE : CMD_RET_SUCCESS;
-}
diff --git a/test/trace/test-trace.sh b/test/trace/test-trace.sh
deleted file mode 100755
index 5130b2b..0000000
--- a/test/trace/test-trace.sh
+++ /dev/null
@@ -1,64 +0,0 @@
-#!/bin/bash
-# SPDX-License-Identifier: GPL-2.0+
-# Copyright (c) 2013 The Chromium OS Authors.
-#
-
-# Simple test script for tracing with sandbox
-
-TRACE_OPT="FTRACE=1"
-
-BASE="$(dirname $0)/.."
-. $BASE/common.sh
-
-run_trace() {
- echo "Run trace"
- ./${OUTPUT_DIR}/u-boot <<END
-trace stats
-hash sha256 0 10000
-trace pause
-trace stats
-hash sha256 0 10000
-trace stats
-trace resume
-hash sha256 0 10000
-trace pause
-trace stats
-reset
-END
-}
-
-check_results() {
- echo "Check results"
-
- # Expect sha256 to run 3 times, so we see the string 6 times
- if [ $(grep -c sha256 ${tmp}) -ne 6 ]; then
- fail "sha256 error"
- fi
-
- # 4 sets of results (output of 'trace stats')
- if [ $(grep -c "traced function calls" ${tmp}) -ne 4 ]; then
- fail "trace output error"
- fi
-
- # Check trace counts. We expect to see an increase in the number of
- # traced function calls between each 'trace stats' command, except
- # between calls 2 and 3, where tracing is paused.
- # This code gets the sign of the difference between each number and
- # its predecessor.
- counts="$(tr -d ',\r' <${tmp} | awk \
- '/traced function calls/ { diff = $1 - upto; upto = $1; \
- printf "%d ", diff < 0 ? -1 : (diff > 0 ? 1 : 0)}')"
-
- if [ "${counts}" != "1 1 0 1 " ]; then
- fail "trace collection error: ${counts}"
- fi
-}
-
-echo "Simple trace test / sanity check using sandbox"
-echo
-tmp="$(tempfile)"
-build_uboot "${TRACE_OPT}"
-run_trace >${tmp}
-check_results ${tmp}
-rm ${tmp}
-echo "Test passed"
diff --git a/tools/imx8image.c b/tools/imx8image.c
index 5eb4b96..96ece28 100644
--- a/tools/imx8image.c
+++ b/tools/imx8image.c
@@ -14,6 +14,7 @@
static int container = -1;
static int32_t core_type = CFG_CORE_INVALID;
static bool emmc_fastboot;
+static bool dcd_skip;
static image_t param_stack[IMG_STACK_SIZE];
static uint8_t fuse_version;
static uint16_t sw_version;
@@ -41,6 +42,7 @@
static table_entry_t imx8image_cmds[] = {
{CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
+ {CMD_DCD_SKIP, "DCD_SKIP", "skip DCD init", },
{CMD_FUSE_VERSION, "FUSE_VERSION", "fuse version", },
{CMD_SW_VERSION, "SW_VERSION", "sw version", },
{CMD_MSG_BLOCK, "MSG_BLOCK", "msg block", },
@@ -88,6 +90,9 @@
if (!strncmp("emmc_fastboot", token, 13))
emmc_fastboot = true;
break;
+ case CMD_DCD_SKIP:
+ if (!strncmp("true", token, 4))
+ dcd_skip = true;
case CMD_FUSE_VERSION:
fuse_version = (uint8_t)(strtoll(token, NULL, 0) & 0xFF);
break;
@@ -1024,7 +1029,7 @@
fprintf(stdout, "CONTAINER SW VERSION:\t0x%04x\n", sw_version);
build_container(soc, sector_size, emmc_fastboot,
- img_sp, false, fuse_version, sw_version, outfd);
+ img_sp, dcd_skip, fuse_version, sw_version, outfd);
return 0;
}
diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c
index 49f5b78..fb6c57f 100644
--- a/tools/mkeficapsule.c
+++ b/tools/mkeficapsule.c
@@ -866,12 +866,12 @@
dtb = malloc(dtb_size);
if (!dtb) {
- fprintf(stderr, "Can't allocated %ld\n", dtb_size);
+ fprintf(stderr, "Can't allocated %zd\n", dtb_size);
return NULL;
}
if (fread(dtb, dtb_size, 1, f) != 1) {
- fprintf(stderr, "Can't read %ld bytes from %s\n",
+ fprintf(stderr, "Can't read %zd bytes from %s\n",
dtb_size, path);
free(dtb);
return NULL;