tree 0df4cdad2ffb236b75470a28acfcf39d54a5cd00
parent b5c512fccfb35db67d8b76cf33acb0b09032ab17
author Swapnil Jakhade <sjakhade@cadence.com> 1643357507 +0530
committer Tom Rini <trini@konsulko.com> 1644336003 -0500

phy: cadence: Sierra: Update single link PCIe register configuration

Add single link PCIe register configurations for no SSC and internal
SSC. Also, add missing PMA lane registers for external SSC.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>