| commit | b1224f3cf25e056f54f93388dba6a42eac2e2537 | [log] [tgz] |
|---|---|---|
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | Sat Oct 08 13:25:24 2016 +0900 |
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | Mon Oct 10 10:03:23 2016 +0900 |
| tree | 73f0f998e510b0a5520e820a2c3783dca9f6a54d | |
| parent | 0335cce7c5410caa9052367e82a659d5613e7fa7 [diff] |
ARM: uniphier: update DRAM init code for LD20 SoC (2nd)
- Do not reference CONFIG_DDR_FREQ; now the DDR frequency
is passed from the uniphier_board_data structure
- Constify parameter arrays
- Tidy up cluttered macros
- Lots of code cleanups
- Lots of coding style fixes
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>