| commit | 7a81d901d9500d84f2b1631134bcf85b15115287 | [log] [tgz] |
|---|---|---|
| author | York Sun <yorksun@freescale.com> | Mon Oct 27 11:31:32 2014 -0700 |
| committer | York Sun <yorksun@freescale.com> | Fri Dec 05 08:06:08 2014 -0800 |
| tree | 406d2f16e72d4406d8516fcd1bfb4de330bb3bb9 | |
| parent | 2229674fb4dcb30caf9cdcdcda24893cefdeecd7 [diff] |
mpc85xx/t208xqds: Adjust DDR timing parameters Adjust timing for dual-rank UDIMM, verified on M3CQ-8GHS3C0E for speed of 1066, 1333, 1600, 1866MT/s. The 1866 timing is copied to 2133 timing in case such DIMM comes available. Also update single-rank 1866 timing. Enable interactive debugging as well. Signed-off-by: York Sun <yorksun@freescale.com> CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>