tree 37f0fc6ca9fd11986e690cfe9f3bc4a1eb1441af
parent f13321d57d89bee6f65970c5247ebf7baae36e7f
author Priyanka Jain <Priyanka.Jain@freescale.com> 1391076598 +0530
committer York Sun <yorksun@freescale.com> 1394232809 -0800

powerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040

T1040 SoC has SCFG (Supplement Configuration) Block which provides
chip specific configuration and status support. The base address of
SCFG block in T1040 is 0xfc000.
SCFG contains SCFG_PIXCLKCR (DIU pixel clock control register)
at offset 0x28.

Add definition of
-SCFG block
-SCFG_PIXCLKCR register
-Bits definition of SCFG_PIXCLK register

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>