armv8: ls2085a: Add support of LS2085A SoC

Freescale's LS2085A is a another personality of LS2080A SoC with
support of AIOP and DP-DDR.
This Patch adds support of LS2085A Personality.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: Updated MAINTAINERS files
           Dropped #ifdef in cpu.h
           Add CONFIG_SYS_NS16550=y in defconfig]
Reviewed-by: York Sun <yorksun@freescale.com>
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index d15a225..0e07f8c 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -11,7 +11,6 @@
 #define CONFIG_REMAKE_ELF
 #define CONFIG_FSL_LAYERSCAPE
 #define CONFIG_FSL_LSCH3
-#define CONFIG_LS2080A
 #define CONFIG_MP
 #define CONFIG_GICV3
 #define CONFIG_FSL_TZPC_BP147
@@ -184,7 +183,7 @@
 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET    0x00F00000
 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH	    0x20000
 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET    0x00F20000
-#ifndef CONFIG_LS2080A
+#ifdef CONFIG_LS2085A
 #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH	0x200000
 #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET	0x07000000
 #endif
@@ -208,7 +207,13 @@
 #define CONFIG_PCIE3		/* PCIE controler 3 */
 #define CONFIG_PCIE4		/* PCIE controler 4 */
 #define CONFIG_PCIE_LAYERSCAPE	/* Use common FSL Layerscape PCIe code */
+#ifdef CONFIG_LS2080A
 #define FSL_PCIE_COMPAT "fsl,ls2080a-pcie"
+#endif
+
+#ifdef CONFIG_LS2085A
+#define FSL_PCIE_COMPAT "fsl,ls2085a-pcie"
+#endif
 
 #define CONFIG_SYS_PCI_64BIT
 
diff --git a/include/configs/ls2080a_emu.h b/include/configs/ls2080a_emu.h
index 6400f4f..4a7ba24 100644
--- a/include/configs/ls2080a_emu.h
+++ b/include/configs/ls2080a_emu.h
@@ -9,8 +9,15 @@
 
 #include "ls2080a_common.h"
 
+#ifdef CONFIG_LS2080A
 #define CONFIG_IDENT_STRING		" LS2080A-EMU"
 #define CONFIG_BOOTP_VCI_STRING		"U-boot.LS2080A-EMU"
+#endif
+
+#ifdef CONFIG_LS2085A
+#define CONFIG_IDENT_STRING		" LS2085A-EMU"
+#define CONFIG_BOOTP_VCI_STRING		"U-boot.LS2085A-EMU"
+#endif
 
 #define CONFIG_SYS_CLK_FREQ	100000000
 #define CONFIG_DDR_CLK_FREQ	133333333
diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h
index 666df80..876ee30 100644
--- a/include/configs/ls2080a_simu.h
+++ b/include/configs/ls2080a_simu.h
@@ -9,8 +9,15 @@
 
 #include "ls2080a_common.h"
 
+#ifdef CONFIG_LS2080A
 #define CONFIG_IDENT_STRING		" LS2080A-SIMU"
 #define CONFIG_BOOTP_VCI_STRING		"U-boot.LS2080A-SIMU"
+#endif
+
+#ifdef CONFIG_LS2085A
+#define CONFIG_IDENT_STRING		" LS2085A-SIMU"
+#define CONFIG_BOOTP_VCI_STRING		"U-boot.LS2085A-SIMU"
+#endif
 
 #define CONFIG_SYS_CLK_FREQ	100000000
 #define CONFIG_DDR_CLK_FREQ	133333333
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index 80b7718..f665bf1 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -54,7 +54,7 @@
 #if defined(CONFIG_LS102XA)
 #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR
 #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
-#elif defined(CONFIG_LS2080A)
+#elif defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
 #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS2080A_XHCI_USB1_ADDR
 #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_LS2080A_XHCI_USB2_ADDR
 #endif