pinctrl: move dm_scan_fdt_node() out of pinctrl uclass
Commit c5acf4a2b3c6 ("pinctrl: Add the concept of peripheral IDs")
added some additional change that was not mentioned in the git-log.
That commit added dm_scan_fdt_node() in the pinctrl uclass binding.
It should be handled by the simple-bus driver or the low-level
driver, not by the pinctrl framework.
I guess Simon's motivation was to bind GPIO banks located under the
Rockchip pinctrl device. It is true some chips have sub-devices
under their pinctrl devices, but it is basically SoC-specific matter.
This commit partly reverts commit c5acf4a2b3c6 to keep the only
pinctrl-generic features in the uclass. The dm_scan_fdt_node()
should be called from the rk3288_pinctrl driver.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
index 5205498..c432a00 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
@@ -17,6 +17,7 @@
#include <asm/arch/periph.h>
#include <asm/arch/pmu_rk3288.h>
#include <dm/pinctrl.h>
+#include <dm/root.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -415,6 +416,12 @@
.get_periph_id = rk3288_pinctrl_get_periph_id,
};
+static int rk3288_pinctrl_bind(struct udevice *dev)
+{
+ /* scan child GPIO banks */
+ return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
+}
+
static int rk3288_pinctrl_probe(struct udevice *dev)
{
struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
@@ -437,5 +444,6 @@
.of_match = rk3288_pinctrl_ids,
.priv_auto_alloc_size = sizeof(struct rk3288_pinctrl_priv),
.ops = &rk3288_pinctrl_ops,
+ .bind = rk3288_pinctrl_bind,
.probe = rk3288_pinctrl_probe,
};