AX88180: improve phy searching

Rather than hardcode specific phy addresses, search the possible phy
address space to find the first available phy.  Also respect the normal
CONFIG_PHY_ADDR option for board porters to pick a specific address.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
diff --git a/drivers/net/ax88180.c b/drivers/net/ax88180.c
index 5d12fcf..6e788a0 100644
--- a/drivers/net/ax88180.c
+++ b/drivers/net/ax88180.c
@@ -255,49 +255,60 @@
 {
 	struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
 	unsigned long tmp_regval;
+	unsigned short phyaddr;
 
-	/* Check avaliable PHY chipset  */
-	priv->PhyAddr = MARVELL_88E1111_PHYADDR;
-	priv->PhyID0 = ax88180_mdio_read (dev, PHYIDR0);
+	/* Search for first avaliable PHY chipset */
+#ifdef CONFIG_PHY_ADDR
+	phyaddr = CONFIG_PHY_ADDR;
+#else
+	for (phyaddr = 0; phyaddr < 32; ++phyaddr)
+#endif
+	{
+		priv->PhyAddr = phyaddr;
+		priv->PhyID0 = ax88180_mdio_read(dev, PHYIDR0);
 
-	if (priv->PhyID0 == MARVELL_88E1111_PHYIDR0) {
+		switch (priv->PhyID0) {
+		case MARVELL_88E1111_PHYIDR0:
+			debug("ax88180: Found Marvell 88E1111 PHY."
+			      " (PHY Addr=0x%x)\n", priv->PhyAddr);
 
-		debug ("ax88180: Found Marvell 88E1111 PHY."
-		       " (PHY Addr=0x%x)\n", priv->PhyAddr);
-
-		tmp_regval = ax88180_mdio_read (dev, M88_EXT_SSR);
-		if ((tmp_regval & HWCFG_MODE_MASK) == RGMII_COPPER_MODE) {
-
-			ax88180_mdio_write (dev, M88_EXT_SCR, DEFAULT_EXT_SCR);
-			if (ax88180_phy_reset (dev) < 0)
-				return 0;
-			ax88180_mdio_write (dev, M88_IER, LINK_CHANGE_INT);
-		}
-	} else {
+			tmp_regval = ax88180_mdio_read(dev, M88_EXT_SSR);
+			if ((tmp_regval & HWCFG_MODE_MASK) != RGMII_COPPER_MODE) {
+				ax88180_mdio_write(dev, M88_EXT_SCR, DEFAULT_EXT_SCR);
+				if (ax88180_phy_reset(dev) < 0)
+					return 0;
+				ax88180_mdio_write(dev, M88_IER, LINK_CHANGE_INT);
+			}
 
-		priv->PhyAddr = CICADA_CIS8201_PHYADDR;
-		priv->PhyID0 = ax88180_mdio_read (dev, PHYIDR0);
+			return 1;
 
-		if (priv->PhyID0 == CICADA_CIS8201_PHYIDR0) {
+		case CICADA_CIS8201_PHYIDR0:
+			debug("ax88180: Found CICADA CIS8201 PHY"
+			      " chipset. (PHY Addr=0x%x)\n", priv->PhyAddr);
 
-			debug ("ax88180: Found CICADA CIS8201 PHY"
-			       " chipset. (PHY Addr=0x%x)\n", priv->PhyAddr);
-			ax88180_mdio_write (dev, CIS_IMR,
+			ax88180_mdio_write(dev, CIS_IMR,
 					    (CIS_INT_ENABLE | LINK_CHANGE_INT));
 
 			/* Set CIS_SMI_PRIORITY bit before force the media mode */
-			tmp_regval =
-			    ax88180_mdio_read (dev, CIS_AUX_CTRL_STATUS);
+			tmp_regval = ax88180_mdio_read(dev, CIS_AUX_CTRL_STATUS);
 			tmp_regval &= ~CIS_SMI_PRIORITY;
-			ax88180_mdio_write (dev, CIS_AUX_CTRL_STATUS,
-					    tmp_regval);
-		} else {
-			printf ("ax88180: Unknown PHY chipset!!\n");
-			return 0;
+			ax88180_mdio_write(dev, CIS_AUX_CTRL_STATUS, tmp_regval);
+
+			return 1;
+
+		case 0xffff:
+			/* No PHY at this addr */
+			break;
+
+		default:
+			printf("ax88180: Unknown PHY chipset %#x at addr %#x\n",
+			       priv->PhyID0, priv->PhyAddr);
+			break;
 		}
 	}
 
-	return 1;
+	printf("ax88180: Unknown PHY chipset!!\n");
+	return 0;
 }
 
 static void ax88180_media_config (struct eth_device *dev)
@@ -345,12 +356,16 @@
 		       (unsigned int)bmcr_val, (unsigned int)bmsr_val);
 
 		/* Get real media mode here */
-		if (priv->PhyID0 == MARVELL_88E1111_PHYIDR0) {
-			RealMediaMode = get_MarvellPHY_media_mode (dev);
-		} else if (priv->PhyID0 == CICADA_CIS8201_PHYIDR0) {
-			RealMediaMode = get_CicadaPHY_media_mode (dev);
-		} else {
+		switch (priv->PhyID0) {
+		case MARVELL_88E1111_PHYIDR0:
+			RealMediaMode = get_MarvellPHY_media_mode(dev);
+			break;
+		case CICADA_CIS8201_PHYIDR0:
+			RealMediaMode = get_CicadaPHY_media_mode(dev);
+			break;
+		default:
 			RealMediaMode = MEDIA_1000FULL;
+			break;
 		}
 
 		priv->LinkState = INS_LINK_UP;
diff --git a/drivers/net/ax88180.h b/drivers/net/ax88180.h
index d2113df..77bab5f 100644
--- a/drivers/net/ax88180.h
+++ b/drivers/net/ax88180.h
@@ -63,10 +63,8 @@
 /* Max Rx Jumbo size is 15K Bytes */
 #define MAX_RX_SIZE			0x3C00
 
-#define MARVELL_88E1111_PHYADDR	0x18
 #define MARVELL_88E1111_PHYIDR0	0x0141
 
-#define CICADA_CIS8201_PHYADDR	0x01
 #define CICADA_CIS8201_PHYIDR0		0x000F
 
 #define MEDIA_AUTO			0