tree 01943c384986475e7094c52f6faa50494990e0ca
parent 3f78b539575dbd7a3b611b9d950099376e99c91b
author Chee Hong Ang <chee.hong.ang@intel.com> 1596633356 +0800
committer Ley Foon Tan <ley.foon.tan@intel.com> 1602237191 +0800

arm: socfpga: soc64: Add SDM triggered warm reset bit mask

Include SDM triggered warm reset bit (BIT1) in Reset Manager's stat
register when checking for HPS warm reset status.
Refactor the warm reset mask macro for clarity purpose.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>