arm: imx53: Add support for imx53 boards from K+P

This commit adds support for DDC and HSC boards from
K+P in u-boot.

Console output:

U-Boot 2018.05-rc2-00090-g752b7ed6f9 (Apr 26 2018 - 14:24:24 +0200)

CPU:   Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: WDOG
Model: K+P iMX53
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Module EEPROM:
  ID: TQMa53-CB.0401
  SN: 63152762
  MAC: 00:0b:64:03:14:2a
BBoard:40x0 Rev:10
Net:   eth0: ethernet@63fec000
Hit any key to stop autoboot:  0

Signed-off-by: Lukasz Majewski <lukma@denx.de>
diff --git a/board/k+p/kp_imx53/Kconfig b/board/k+p/kp_imx53/Kconfig
new file mode 100644
index 0000000..017c1e3
--- /dev/null
+++ b/board/k+p/kp_imx53/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_KP_IMX53
+
+config SYS_BOARD
+	default "kp_imx53"
+
+config SYS_VENDOR
+	default "k+p"
+
+config SYS_SOC
+	default "mx5"
+
+config SYS_CONFIG_NAME
+	default "kp_imx53"
+
+endif
diff --git a/board/k+p/kp_imx53/MAINTAINERS b/board/k+p/kp_imx53/MAINTAINERS
new file mode 100644
index 0000000..c105a93
--- /dev/null
+++ b/board/k+p/kp_imx53/MAINTAINERS
@@ -0,0 +1,6 @@
+KP_IMX53_HSC BOARD
+M:	Lukasz Majewski <lukma@denx.de>
+S:	Maintained
+F:	board/k+p/kp_imx53/
+F:	include/configs/kp_imx53.h
+F:	configs/kp_imx53_defconfig
diff --git a/board/k+p/kp_imx53/Makefile b/board/k+p/kp_imx53/Makefile
new file mode 100644
index 0000000..66629c9
--- /dev/null
+++ b/board/k+p/kp_imx53/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2018, DENX Software Engineering
+# Lukasz Majewski <lukma@denx.de>
+#
+# SPDX-License-Identifier:    GPL-2.0+
+#
+
+obj-y		+= kp_imx53.o kp_id_rev.o
diff --git a/board/k+p/kp_imx53/kp_id_rev.c b/board/k+p/kp_imx53/kp_id_rev.c
new file mode 100644
index 0000000..611fd2a
--- /dev/null
+++ b/board/k+p/kp_imx53/kp_id_rev.c
@@ -0,0 +1,121 @@
+/*
+ * Copyright (C) 2018
+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
+ *
+ * Based on code developed by:
+ *
+ * Copyright (C) 2012 TQ-Systems GmbH
+ * Daniel Gericke <daniel.gericke@tqs.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <environment.h>
+#include <i2c.h>
+#include "kp_id_rev.h"
+
+static int eeprom_has_been_read;
+static struct id_eeprom eeprom;
+
+void show_eeprom(void)
+{
+	char safe_string[33];
+	int i;
+	u8 *p;
+
+	puts("Module EEPROM:\n");
+	/* ID */
+	for (i = 0; i <= sizeof(eeprom.id) && 0xff != eeprom.id[i]; ++i)
+		safe_string[i] = eeprom.id[i];
+	safe_string[i] = '\0';
+
+	if (!strncmp(safe_string, "TQM", 3)) {
+		printf("  ID: %s\n", safe_string);
+		env_set("boardtype", safe_string);
+	} else {
+		puts("  unknown hardware variant\n");
+	}
+
+	/* Serial number */
+	for (i = 0; (sizeof(eeprom.serial) >= i) &&
+		    (eeprom.serial[i] >= 0x30) &&
+		    (eeprom.serial[i] <= 0x39); ++i)
+		safe_string[i] = eeprom.serial[i];
+	safe_string[i] = '\0';
+
+	if (strlen(safe_string) == 8) {
+		printf("  SN: %s\n", safe_string);
+		env_set("serial#", safe_string);
+	} else {
+		puts("  unknown serial number\n");
+	}
+
+	/* MAC address  */
+	p = eeprom.mac;
+	if (!is_valid_ethaddr(p)) {
+		printf("  Not valid ETH EEPROM addr!\n");
+		return;
+	}
+
+	printf("  MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+	       p[0], p[1], p[2], p[3], p[4], p[5]);
+
+	eth_env_set_enetaddr("ethaddr", p);
+}
+
+int read_eeprom(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	if (eeprom_has_been_read)
+		return 0;
+
+	ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM,
+				      CONFIG_SYS_I2C_EEPROM_ADDR,
+				      CONFIG_SYS_I2C_EEPROM_ADDR_LEN, &dev);
+	if (ret) {
+		printf("Cannot find EEPROM !\n");
+		return ret;
+	}
+
+	ret = dm_i2c_read(dev, 0x0, (uchar *)&eeprom, sizeof(eeprom));
+
+	eeprom_has_been_read = (ret == 0) ? 1 : 0;
+	return ret;
+}
+
+int read_board_id(void)
+{
+	unsigned char rev_id = 0x42;
+	char rev_str[32], buf[8];
+	struct udevice *dev;
+	int ret;
+
+	ret = i2c_get_chip_for_busnum(2, 0x22, 1, &dev);
+	if (ret) {
+		printf("Cannot find pcf8574 IO expander !\n");
+		return ret;
+	}
+
+	dm_i2c_read(dev, 0x0, &rev_id, sizeof(rev_id));
+
+	sprintf(rev_str, "%02X", rev_id);
+	if (rev_id & 0x80) {
+		printf("BBoard:4x00 Rev:%s\n", rev_str);
+		env_set("boardtype", "ddc");
+		env_set("fit_config", "imx53_kb_conf");
+	} else {
+		printf("BBoard:40x0 Rev:%s\n", rev_str);
+		env_set("boardtype", "hsc");
+		env_set("fit_config", "imx53_kb_40x0_conf");
+	}
+
+	sprintf(buf, "kp-%s", env_get("boardtype"));
+	env_set("boardname", buf);
+	env_set("boardsoc", "imx53");
+	env_set("kb53_rev", rev_str);
+
+	return 0;
+}
diff --git a/board/k+p/kp_imx53/kp_id_rev.h b/board/k+p/kp_imx53/kp_id_rev.h
new file mode 100644
index 0000000..3155067
--- /dev/null
+++ b/board/k+p/kp_imx53/kp_id_rev.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2018
+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
+ *
+ * Based on code developed by:
+ *
+ * Copyright (C) 2012 TQ-Systems GmbH
+ * Daniel Gericke <daniel.gericke@tqs.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __KP_ID_REV_H_
+#define __KP_ID_REV_H_
+
+struct id_eeprom {
+	u8 hrcw_primary[0x20];
+	u8 mac[6];              /* 0x20 ... 0x25 */
+	u8 rsv1[10];
+	u8 serial[8];           /* 0x30 ... 0x37 */
+	u8 rsv2[8];
+	u8 id[0x40];            /* 0x40 ... 0x7f */
+} __packed;
+
+void show_eeprom(void);
+int read_eeprom(void);
+int read_board_id(void);
+#endif /* __KP_ID_REV_H_ */
diff --git a/board/k+p/kp_imx53/kp_imx53.c b/board/k+p/kp_imx53/kp_imx53.c
new file mode 100644
index 0000000..7d27312
--- /dev/null
+++ b/board/k+p/kp_imx53/kp_imx53.c
@@ -0,0 +1,212 @@
+/*
+ * Copyright (C) 2018
+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/iomux-mx53.h>
+#include <asm/arch/clock.h>
+#include <asm/gpio.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+#include <power/pmic.h>
+#include <fsl_pmic.h>
+#include "kp_id_rev.h"
+
+#define VBUS_PWR_EN IMX_GPIO_NR(7, 8)
+#define PHY_nRST IMX_GPIO_NR(7, 6)
+#define BOOSTER_OFF IMX_GPIO_NR(2, 23)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	u32 size;
+
+	size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
+	gd->ram_size = size;
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
+}
+
+u32 get_board_rev(void)
+{
+	struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+	struct fuse_bank *bank = &iim->bank[0];
+	struct fuse_bank0_regs *fuse =
+		(struct fuse_bank0_regs *)bank->fuse_regs;
+
+	int rev = readl(&fuse->gp[6]);
+
+	return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
+}
+
+#ifdef CONFIG_USB_EHCI_MX5
+int board_ehci_hcd_init(int port)
+{
+	gpio_request(VBUS_PWR_EN, "VBUS_PWR_EN");
+	gpio_direction_output(VBUS_PWR_EN, 1);
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg esdhc_cfg[] = {
+	{MMC_SDHC3_BASE_ADDR},
+};
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+	return 1; /* eMMC is always present */
+}
+
+#define SD_CMD_PAD_CTRL		(PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
+				 PAD_CTL_PUS_100K_UP)
+#define SD_PAD_CTRL		(PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
+				 PAD_CTL_DSE_HIGH)
+
+int board_mmc_init(bd_t *bis)
+{
+	int ret;
+
+	static const iomux_v3_cfg_t sd3_pads[] = {
+		NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__ESDHC3_CMD,
+			     SD_CMD_PAD_CTRL),
+		NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__ESDHC3_CLK, SD_PAD_CTRL),
+		NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__ESDHC3_DAT0, SD_PAD_CTRL),
+		NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__ESDHC3_DAT1, SD_PAD_CTRL),
+		NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__ESDHC3_DAT2, SD_PAD_CTRL),
+		NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__ESDHC3_DAT3, SD_PAD_CTRL),
+		NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__ESDHC3_DAT4, SD_PAD_CTRL),
+		NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__ESDHC3_DAT5, SD_PAD_CTRL),
+		NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__ESDHC3_DAT6, SD_PAD_CTRL),
+		NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__ESDHC3_DAT7, SD_PAD_CTRL),
+	};
+
+	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+	imx_iomux_v3_setup_multiple_pads(sd3_pads, ARRAY_SIZE(sd3_pads));
+
+	ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+#endif
+
+static int power_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = pmic_get("mc34708", &dev);
+	if (ret) {
+		printf("%s: mc34708 not found !\n", __func__);
+		return ret;
+	}
+
+	/* Set VDDGP to 1.110V for 800 MHz on SW1 */
+	pmic_clrsetbits(dev, REG_SW_0, SWx_VOLT_MASK_MC34708,
+			SWx_1_110V_MC34708);
+
+	/* Set VCC as 1.30V on SW2 */
+	pmic_clrsetbits(dev, REG_SW_1, SWx_VOLT_MASK_MC34708,
+			SWx_1_300V_MC34708);
+
+	/* Set global reset timer to 4s */
+	pmic_clrsetbits(dev, REG_POWER_CTL2, TIMER_MASK_MC34708,
+			TIMER_4S_MC34708);
+
+	return ret;
+}
+
+static void setup_clocks(void)
+{
+	int ret;
+	u32 ref_clk = MXC_HCLK;
+	/*
+	 * CPU clock set to 800MHz and DDR to 400MHz
+	 */
+	ret = mxc_set_clock(ref_clk, 800, MXC_ARM_CLK);
+	if (ret)
+		printf("CPU:   Switch CPU clock to 800MHZ failed\n");
+
+	ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
+	ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
+	if (ret)
+		printf("CPU:   Switch DDR clock to 400MHz failed\n");
+}
+
+static void setup_ups(void)
+{
+	gpio_request(BOOSTER_OFF, "BOOSTER_OFF");
+	gpio_direction_output(BOOSTER_OFF, 0);
+}
+
+int board_early_init_f(void)
+{
+	return 0;
+}
+
+/*
+ * Do not overwrite the console
+ * Use always serial for U-Boot console
+ */
+int overwrite_console(void)
+{
+	return 1;
+}
+
+int board_init(void)
+{
+	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+	return 0;
+}
+
+void eth_phy_reset(void)
+{
+	gpio_request(PHY_nRST, "PHY_nRST");
+	gpio_direction_output(PHY_nRST, 1);
+	udelay(50);
+	gpio_set_value(PHY_nRST, 0);
+	udelay(400);
+	gpio_set_value(PHY_nRST, 1);
+	udelay(50);
+}
+
+int board_late_init(void)
+{
+	int ret = 0;
+
+	setup_ups();
+
+	if (!power_init())
+		setup_clocks();
+
+	ret = read_eeprom();
+	if (ret)
+		printf("Error %d reading EEPROM content!\n", ret);
+
+	eth_phy_reset();
+
+	show_eeprom();
+	read_board_id();
+
+	return ret;
+}