blob: 77b452198186a1da7db4bced0e2330f665f38161 [file] [log] [blame]
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3399.dtsi"
#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
/ {
model = "Rockchip RK3399 Evaluation Board";
compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
"google,rk3399evb-rev2";
chosen {
stdout-path = &uart2;
};
vdd_center: vdd-center {
compatible = "pwm-regulator";
pwms = <&pwm3 0 25000 1>;
regulator-name = "vdd_center";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
regulator-init-microvolt = <950000>;
regulator-always-on;
regulator-boot-on;
status = "okay";
};
vccsys: vccsys {
compatible = "regulator-fixed";
regulator-name = "vccsys";
regulator-boot-on;
regulator-always-on;
};
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vcc_phy: vcc-phy-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_phy";
regulator-always-on;
regulator-boot-on;
};
vcc5v0_host: vcc5v0-host-en {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
clkin_gmac: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "clkin_gmac";
#clock-cells = <0>;
};
};
&emmc_phy {
status = "okay";
};
&pwm0 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm3 {
status = "okay";
};
&sdmmc {
bus-width = <4>;
status = "okay";
};
&sdhci {
bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable;
status = "okay";
};
&uart2 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&dwc3_typec0 {
rockchip,vbus-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&dwc3_typec1 {
rockchip,vbus-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
i2c-scl-falling-time-ns = <50>;
i2c-scl-rising-time-ns = <100>;
u-boot,dm-pre-reloc;
rk808: pmic@1b {
compatible = "rockchip,rk808";
clock-output-names = "xin32k", "wifibt_32kin";
interrupt-parent = <&gpio0>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
reg = <0x1b>;
rockchip,system-power-controller;
#clock-cells = <1>;
u-boot,dm-pre-reloc;
status = "okay";
vcc12-supply = <&vcc3v3_sys>;
regulators {
vcc33_lcd: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc33_lcd";
};
};
};
};
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins =
<1 21 RK_FUNC_GPIO &pcfg_pull_up>;
};
pmic_dvs2: pmic-dvs2 {
rockchip,pins =
<1 18 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
&gmac {
phy-supply = <&vcc_phy>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
assigned-clocks = <&cru SCLK_RMII_SRC>;
assigned-clock-parents = <&clkin_gmac>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
tx_delay = <0x10>;
rx_delay = <0x10>;
status = "okay";
};
&gmac {
phy-supply = <&vcc_phy>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
assigned-clocks = <&cru SCLK_RMII_SRC>;
assigned-clock-parents = <&clkin_gmac>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
tx_delay = <0x10>;
rx_delay = <0x10>;
status = "okay";
};