commit 74f9b38c8b25d6f788eff218564f632790b5e9dd
author Wolfgang Denk <wd@denx.de> Sat Jul 30 13:33:49 2011 +0000
committer Wolfgang Denk <wd@denx.de> Mon Aug 01 15:19:40 2011 +0200
tree d95cae5bc677061c4313f7405545e837d67b02ee
parent 75fc4341bc5d8c9ef0ef46e984a6d8b9b69a9819

fpga: constify to fix build warning

Fix compiler warning:

cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data'
from incompatible pointer type

Adding the needed 'const' here entails a whole bunch of additonal
changes all over the FPGA code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andre Schwarz <andre.schwarz@matrix-vision.de>
Cc: Murray Jensen <Murray.Jensen@csiro.au>
Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>

drivers/fpga/virtex2.c

diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index d1b4d15..b26d231 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -101,13 +101,13 @@
 #define CONFIG_SYS_FPGA_WAIT_CONFIG	CONFIG_SYS_HZ/5	/* 200 ms */
 #endif
 
-static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize);
-static int Virtex2_ssm_dump (Xilinx_desc * desc, void *buf, size_t bsize);
+static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
 
-static int Virtex2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize);
-static int Virtex2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize);
+static int Virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int Virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
 
-int Virtex2_load (Xilinx_desc * desc, void *buf, size_t bsize)
+int Virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
 {
 	int ret_val = FPGA_FAIL;
 
@@ -129,7 +129,7 @@
 	return ret_val;
 }
 
-int Virtex2_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+int Virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
 {
 	int ret_val = FPGA_FAIL;
 
@@ -170,7 +170,7 @@
  *    INIT_B and DONE lines.  If both are high, configuration has
  *    succeeded. Congratulations!
  */
-static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize)
+static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
 {
 	int ret_val = FPGA_FAIL;
 	Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns;
@@ -369,7 +369,7 @@
 /*
  * Read the FPGA configuration data
  */
-static int Virtex2_ssm_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
 {
 	int ret_val = FPGA_FAIL;
 	Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns;
@@ -421,13 +421,13 @@
 	return ret_val;
 }
 
-static int Virtex2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
+static int Virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
 {
 	printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__);
 	return FPGA_FAIL;
 }
 
-static int Virtex2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+static int Virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
 {
 	printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__);
 	return FPGA_FAIL;