x86: ivybridge: Drop special EHCI init
This is not needed. On reset wake-on-disconnect is already set. It may a
problem during a soft reset or resume, but for now it does not seem
important. Also drop the command register update since PCI auto-config
does it for us.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index 329eae8..662e5d9 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -12,6 +12,8 @@
aliases {
spi0 = "/pci/pch/spi";
+ usb0 = &usb_0;
+ usb1 = &usb_1;
};
config {
@@ -226,6 +228,16 @@
u-boot,dm-pre-reloc;
};
+ usb_1: usb@1a,0 {
+ reg = <0x0000d000 0 0 0 0>;
+ compatible = "ehci-pci";
+ };
+
+ usb_0: usb@1d,0 {
+ reg = <0x0000e800 0 0 0 0>;
+ compatible = "ehci-pci";
+ };
+
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,bd82x6x", "intel,pch9";