tree 9441156596340e8797fd535fc30a5cead8e7decf
parent 9b15c93ec1bee83ee717d5c9080443132389300f
author Shiraz Hashim <shiraz.hashim@st.com> 1336376219 +0530
committer Albert ARIBAUD <albert.u.boot@aribaud.net> 1341662862 +0200

SPEAr: explicitly select clk src for UART

UART in u-boot intends to run on 48MHz clock supplied by USB PLL.
Explicitly select the intended clock source.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>