commit 72cc53897fd104911dff82aefc3624757ebcecd0
author Simon Glass <sjg@chromium.org> Thu Oct 20 18:22:39 2022 -0600
committer Tom Rini <trini@konsulko.com> Mon Oct 31 11:01:31 2022 -0400
tree 472bf7e47978335a73c5d6025d3b83b534f7192b
parent 4078fec1ee6a908821051e849763ac63d0e9c62a

Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE

The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>

include/configs/P2041RDB.h

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 925720d..0ac7f16 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -12,13 +12,13 @@
 #define __CONFIG_H
 
 #ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_RAMBOOT_TEXT_BASE	CONFIG_SYS_TEXT_BASE
+#define CONFIG_RAMBOOT_TEXT_BASE	CONFIG_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS	0xfffffffc
 #endif
 
 #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
 /* Set 1M boot space */
-#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000)
+#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
 #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
 		(0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
 #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
@@ -347,7 +347,7 @@
 	"bank_intlv=cs0_cs1\0"					\
 	"netdev=eth0\0"						\
 	"uboot=" __stringify(CONFIG_UBOOTPATH) "\0"			\
-	"ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0"		\
+	"ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0"		\
 	"tftpflash=tftpboot $loadaddr $uboot && "		\
 	"protect off $ubootaddr +$filesize && "			\
 	"erase $ubootaddr +$filesize && "			\