clk: qcom: apq8016: Convert GATE_CLK() to GATE_CLK_POLLED()
Convert the usages of GATE_CLK() in clock-apq8016 to GATE_CLK_POLLED() to
make sure that we poll the status when enabling clocks:
- PRNG_AHB_CLK is a vote clock, so we poll a different register address.
- The USB clocks are simple branches, so enable/poll is the same register.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-5-fcc371c9e45f@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c
index 274c71c..e3a9807 100644
--- a/drivers/clk/qcom/clock-apq8016.c
+++ b/drivers/clk/qcom/clock-apq8016.c
@@ -54,9 +54,9 @@
};
static const struct gate_clk apq8016_clks[] = {
- GATE_CLK(GCC_PRNG_AHB_CLK, 0x45004, BIT(8)),
- GATE_CLK(GCC_USB_HS_AHB_CLK, 0x41008, BIT(0)),
- GATE_CLK(GCC_USB_HS_SYSTEM_CLK, 0x41004, BIT(0)),
+ GATE_CLK_POLLED(GCC_PRNG_AHB_CLK, 0x45004, BIT(8), 0x13004),
+ GATE_CLK_POLLED(GCC_USB_HS_AHB_CLK, 0x41008, BIT(0), 0x41008),
+ GATE_CLK_POLLED(GCC_USB_HS_SYSTEM_CLK, 0x41004, BIT(0), 0x41004),
};
/* SDHCI */