sandbox: pci: Create a new sandbox_pci_read_bar() function
The code in swapcase can be used by other sandbox drivers. Move it into a
common place to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
index 1b21af6..cd2b9e3 100644
--- a/arch/sandbox/include/asm/test.h
+++ b/arch/sandbox/include/asm/test.h
@@ -198,4 +198,19 @@
*/
int sandbox_get_pci_ep_irq_count(struct udevice *dev);
+/**
+ * sandbox_pci_read_bar() - Read the BAR value for a read_config operation
+ *
+ * This is used in PCI emulators to read a base address reset. This has special
+ * rules because when the register is set to 0xffffffff it can be used to
+ * discover the type and size of the BAR.
+ *
+ * @barval: Current value of the BAR
+ * @type: Type of BAR (PCI_BASE_ADDRESS_SPACE_IO or
+ * PCI_BASE_ADDRESS_MEM_TYPE_32)
+ * @size: Size of BAR in bytes
+ * @return BAR value to return from emulator
+ */
+uint sandbox_pci_read_bar(u32 barval, int type, uint size);
+
#endif
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 509c588..0001d10 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -12,6 +12,7 @@
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
+obj-$(CONFIG_SANDBOX) += swap_case.o
endif
ifdef CONFIG_DM_I2C
@@ -52,7 +53,6 @@
obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
obj-$(CONFIG_QFW) += qfw.o
obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
-obj-$(CONFIG_SANDBOX) += swap_case.o
obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o
obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c
index 75fe641..11189d1 100644
--- a/drivers/misc/swap_case.c
+++ b/drivers/misc/swap_case.c
@@ -139,25 +139,13 @@
case PCI_BASE_ADDRESS_4:
case PCI_BASE_ADDRESS_5: {
int barnum;
- u32 *bar, result;
+ u32 *bar;
barnum = pci_offset_to_barnum(offset);
bar = &plat->bar[barnum];
- result = *bar;
- if (*bar == 0xffffffff) {
- if (barinfo[barnum].type) {
- result = (~(barinfo[barnum].size - 1) &
- PCI_BASE_ADDRESS_IO_MASK) |
- PCI_BASE_ADDRESS_SPACE_IO;
- } else {
- result = (~(barinfo[barnum].size - 1) &
- PCI_BASE_ADDRESS_MEM_MASK) |
- PCI_BASE_ADDRESS_MEM_TYPE_32;
- }
- }
- debug("r bar %d=%x\n", barnum, result);
- *valuep = result;
+ *valuep = sandbox_pci_read_bar(*bar, barinfo[barnum].type,
+ barinfo[barnum].size);
break;
}
case PCI_CAPABILITY_LIST:
diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c
index fd87b3e..0dcf937 100644
--- a/drivers/pci/pci-emul-uclass.c
+++ b/drivers/pci/pci-emul-uclass.c
@@ -42,6 +42,26 @@
return *emulp ? 0 : -ENODEV;
}
+uint sandbox_pci_read_bar(u32 barval, int type, uint size)
+{
+ u32 result;
+
+ result = barval;
+ if (result == 0xffffffff) {
+ if (type == PCI_BASE_ADDRESS_SPACE_IO) {
+ result = (~(size - 1) &
+ PCI_BASE_ADDRESS_IO_MASK) |
+ PCI_BASE_ADDRESS_SPACE_IO;
+ } else {
+ result = (~(size - 1) &
+ PCI_BASE_ADDRESS_MEM_MASK) |
+ PCI_BASE_ADDRESS_MEM_TYPE_32;
+ }
+ }
+
+ return result;
+}
+
static int sandbox_pci_emul_post_probe(struct udevice *dev)
{
struct sandbox_pci_emul_priv *priv = dev->uclass->priv;