rng: stm32mp1_rng: add conditional reset feature for STM32MP13x
New IP adds a conditional reset that impact the clock
error management. It is now linked to a new compatible.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
diff --git a/drivers/rng/stm32mp1_rng.c b/drivers/rng/stm32mp1_rng.c
index 8ea00e3..89da78c 100644
--- a/drivers/rng/stm32mp1_rng.c
+++ b/drivers/rng/stm32mp1_rng.c
@@ -18,22 +18,28 @@
#include <linux/iopoll.h>
#include <linux/kernel.h>
-#define RNG_CR 0x00
-#define RNG_CR_RNGEN BIT(2)
-#define RNG_CR_CED BIT(5)
+#define RNG_CR 0x00
+#define RNG_CR_RNGEN BIT(2)
+#define RNG_CR_CED BIT(5)
+#define RNG_CR_CONDRST BIT(30)
-#define RNG_SR 0x04
-#define RNG_SR_SEIS BIT(6)
-#define RNG_SR_CEIS BIT(5)
-#define RNG_SR_SECS BIT(2)
-#define RNG_SR_DRDY BIT(0)
+#define RNG_SR 0x04
+#define RNG_SR_SEIS BIT(6)
+#define RNG_SR_CEIS BIT(5)
+#define RNG_SR_SECS BIT(2)
+#define RNG_SR_DRDY BIT(0)
-#define RNG_DR 0x08
+#define RNG_DR 0x08
+
+struct stm32_rng_data {
+ bool has_cond_reset;
+};
struct stm32_rng_plat {
fdt_addr_t base;
struct clk clk;
struct reset_ctl rst;
+ const struct stm32_rng_data *data;
};
static int stm32_rng_read(struct udevice *dev, void *data, size_t len)
@@ -83,18 +89,36 @@
static int stm32_rng_init(struct stm32_rng_plat *pdata)
{
int err;
+ u32 cr, sr;
err = clk_enable(&pdata->clk);
if (err)
return err;
+ cr = readl(pdata->base + RNG_CR);
+
/* Disable CED */
- writel(RNG_CR_RNGEN | RNG_CR_CED, pdata->base + RNG_CR);
+ cr |= RNG_CR_CED;
+ if (pdata->data->has_cond_reset) {
+ cr |= RNG_CR_CONDRST;
+ writel(cr, pdata->base + RNG_CR);
+ cr &= ~RNG_CR_CONDRST;
+ writel(cr, pdata->base + RNG_CR);
+ err = readl_poll_timeout(pdata->base + RNG_CR, cr,
+ (!(cr & RNG_CR_CONDRST)), 10000);
+ if (err)
+ return err;
+ }
/* clear error indicators */
writel(0, pdata->base + RNG_SR);
- return 0;
+ cr |= RNG_CR_RNGEN;
+ writel(cr, pdata->base + RNG_CR);
+
+ err = readl_poll_timeout(pdata->base + RNG_SR, sr,
+ sr & RNG_SR_DRDY, 10000);
+ return err;
}
static int stm32_rng_cleanup(struct stm32_rng_plat *pdata)
@@ -108,6 +132,8 @@
{
struct stm32_rng_plat *pdata = dev_get_plat(dev);
+ pdata->data = (struct stm32_rng_data *)dev_get_driver_data(dev);
+
reset_assert(&pdata->rst);
udelay(20);
reset_deassert(&pdata->rst);
@@ -146,10 +172,17 @@
.read = stm32_rng_read,
};
+static const struct stm32_rng_data stm32mp13_rng_data = {
+ .has_cond_reset = true,
+};
+
+static const struct stm32_rng_data stm32_rng_data = {
+ .has_cond_reset = false,
+};
+
static const struct udevice_id stm32_rng_match[] = {
- {
- .compatible = "st,stm32-rng",
- },
+ {.compatible = "st,stm32mp13-rng", .data = (ulong)&stm32mp13_rng_data},
+ {.compatible = "st,stm32-rng", .data = (ulong)&stm32_rng_data},
{},
};