Merge git://git.denx.de/u-boot-fsl-qoriq
trini: Drop local memset() from
examples/standalone/mem_to_mem_idma2intr.c
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/Kconfig b/Kconfig
index fdea71e..a759e4d 100644
--- a/Kconfig
+++ b/Kconfig
@@ -83,7 +83,6 @@
config SYS_MALLOC_F_LEN
hex "Size of malloc() pool before relocation"
depends on SYS_MALLOC_F
- default 0x2000 if SPL_DM && SPL_OF_CONTROL
default 0x400
help
Before relocation, memory is very limited on many platforms. Still,
@@ -138,74 +137,6 @@
menu "Boot images"
-config SUPPORT_SPL
- bool
-
-config SUPPORT_TPL
- bool
-
-config SPL
- bool
- depends on SUPPORT_SPL
- prompt "Enable SPL"
- help
- If you want to build SPL as well as the normal image, say Y.
-
-config SPL_SYS_MALLOC_SIMPLE
- bool
- depends on SPL
- prompt "Only use malloc_simple functions in the SPL"
- help
- Say Y here to only use the *_simple malloc functions from
- malloc_simple.c, rather then using the versions from dlmalloc.c;
- this will make the SPL binary smaller at the cost of more heap
- usage as the *_simple malloc functions do not re-use free-ed mem.
-
-config SPL_STACK_R
- depends on SPL
- bool "Enable SDRAM location for SPL stack"
- help
- SPL starts off execution in SRAM and thus typically has only a small
- stack available. Since SPL sets up DRAM while in its board_init_f()
- function, it is possible for the stack to move there before
- board_init_r() is reached. This option enables a special SDRAM
- location for the SPL stack. U-Boot SPL switches to this after
- board_init_f() completes, and before board_init_r() starts.
-
-config SPL_STACK_R_ADDR
- depends on SPL_STACK_R
- hex "SDRAM location for SPL stack"
- help
- Specify the address in SDRAM for the SPL stack. This will be set up
- before board_init_r() is called.
-
-config SPL_STACK_R_MALLOC_SIMPLE_LEN
- depends on SPL_STACK_R && SPL_SYS_MALLOC_SIMPLE
- hex "Size of malloc_simple heap after switching to DRAM SPL stack"
- default 0x100000
- help
- Specify the amount of the stack to use as memory pool for
- malloc_simple after switching the stack to DRAM. This may be set
- to give board_init_r() a larger heap then the initial heap in
- SRAM which is limited to SYS_MALLOC_F_LEN bytes.
-
-config SPL_SEPARATE_BSS
- depends on SPL
- bool "BSS section is in a different memory region from text"
- help
- Some platforms need a large BSS region in SPL and can provide this
- because RAM is already set up. In this case BSS can be moved to RAM.
- This option should then be enabled so that the correct device tree
- location is used. Normally we put the device tree at the end of BSS
- but with this option enabled, it goes at _image_binary_end.
-
-config TPL
- bool
- depends on SPL && SUPPORT_TPL
- prompt "Enable TPL"
- help
- If you want to build TPL as well as the normal image and SPL, say Y.
-
config FIT
bool "Support Flattened Image Tree"
help
diff --git a/Makefile b/Makefile
index be3e60d..27d425e 100644
--- a/Makefile
+++ b/Makefile
@@ -741,7 +741,8 @@
endif
# Always append ALL so that arch config.mk's can add custom ones
-ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map u-boot.cfg binary_size_check
+ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map u-boot.cfg \
+ binary_size_check no_new_adhoc_configs_check
ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
ifeq ($(CONFIG_SPL_FSL_PBL),y)
@@ -936,8 +937,26 @@
u-boot.dis: u-boot
$(OBJDUMP) -d $< > $@
+# If .u-boot.cfg.d is still present, then either:
+# a) The previous build used a Makefile that used if_changed rather than
+# if_changed_dep when building u-boot.cfg, and hence any later builds will
+# be unaware of the dependencies for u-boot.cfg. In this case, we must
+# delete u-boot.cfg to force it and .u-boot.cfg.cmd to be rebuilt the
+# correct way.
+# b) The previous build failed or was interrupted while building u-boot.cfg,
+# so deleting u-boot.cfg isn't going to cause any additional work.
+ifneq ($(wildcard $(obj)/.u-boot.cfg.d),)
+ unused := $(shell rm -f $(obj)/u-boot.cfg)
+endif
u-boot.cfg: include/config.h FORCE
- $(call if_changed,cpp_cfg)
+ $(call if_changed_dep,cpp_cfg)
+
+# Check that this build does not use CONFIG options that we don't know about
+# unless they are in Kconfig. All the existing CONFIG options are whitelisted,
+# so new ones should not be added.
+no_new_adhoc_configs_check: u-boot.cfg FORCE
+ $(srctree)/scripts/check-config.sh $< \
+ $(srctree)/scripts/config_whitelist.txt ${srctree} 1>&2
ifdef CONFIG_TPL
SPL_PAYLOAD := tpl/u-boot-with-tpl.bin
diff --git a/README b/README
index 8934a18..bc626dc 100644
--- a/README
+++ b/README
@@ -3509,21 +3509,6 @@
CONFIG_SPL_INIT_MINIMAL
Arch init code should be built for a very small image
- CONFIG_SPL_LIBCOMMON_SUPPORT
- Support for common/libcommon.o in SPL binary
-
- CONFIG_SPL_LIBDISK_SUPPORT
- Support for disk/libdisk.o in SPL binary
-
- CONFIG_SPL_I2C_SUPPORT
- Support for drivers/i2c/libi2c.o in SPL binary
-
- CONFIG_SPL_GPIO_SUPPORT
- Support for drivers/gpio/libgpio.o in SPL binary
-
- CONFIG_SPL_MMC_SUPPORT
- Support for drivers/mmc/libmmc.o in SPL binary
-
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS,
Address and partition on the MMC to load U-Boot from
@@ -3547,12 +3532,6 @@
Partition on the MMC to load U-Boot from when the MMC is being
used in fs mode
- CONFIG_SPL_FAT_SUPPORT
- Support for fs/fat/libfat.o in SPL binary
-
- CONFIG_SPL_EXT_SUPPORT
- Support for EXT filesystem in SPL binary
-
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
Filename to read to load U-Boot when reading from filesystem
@@ -3591,18 +3570,10 @@
Support for a lightweight UBI (fastmap) scanner and
loader
- CONFIG_SPL_MTD_SUPPORT
- Support for the MTD subsystem within SPL. Useful for
- environment on NAND support within SPL.
-
CONFIG_SPL_NAND_RAW_ONLY
Support to boot only raw u-boot.bin images. Use this only
if you need to save space.
- CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
- Set for the SPL on PPC mpc8xxx targets, support for
- drivers/ddr/fsl/libddr.o in SPL binary.
-
CONFIG_SPL_COMMON_INIT_DDR
Set for common ddr init with serial presence detect in
SPL binary.
@@ -3638,29 +3609,9 @@
Support for an OMAP3-specific set of functions to return the
ID and MFR of the first attached NAND chip, if present.
- CONFIG_SPL_SERIAL_SUPPORT
- Support for drivers/serial/libserial.o in SPL binary
-
- CONFIG_SPL_SPI_FLASH_SUPPORT
- Support for drivers/mtd/spi/libspi_flash.o in SPL binary
-
- CONFIG_SPL_SPI_SUPPORT
- Support for drivers/spi/libspi.o in SPL binary
-
CONFIG_SPL_RAM_DEVICE
Support for running image already present in ram, in SPL binary
- CONFIG_SPL_LIBGENERIC_SUPPORT
- Support for lib/libgeneric.o in SPL binary
-
- CONFIG_SPL_ENV_SUPPORT
- Support for the environment operating in SPL binary
-
- CONFIG_SPL_NET_SUPPORT
- Support for the net/libnet.o in SPL binary.
- It conflicts with SPL env from storage medium specified by
- CONFIG_ENV_IS_xxx but CONFIG_ENV_IS_NOWHERE
-
CONFIG_SPL_PAD_TO
Image offset to which the SPL should be padded before appending
the SPL payload. By default, this is defined as
diff --git a/arch/arc/config.mk b/arch/arc/config.mk
index 7c974f0..13676bd 100644
--- a/arch/arc/config.mk
+++ b/arch/arc/config.mk
@@ -31,15 +31,15 @@
endif
ifdef CONFIG_CPU_ARC750D
-PLATFORM_CPPFLAGS += -marc700
+PLATFORM_CPPFLAGS += -mcpu=arc700
endif
ifdef CONFIG_CPU_ARC770D
-PLATFORM_CPPFLAGS += -marc700 -mlock -mswape
+PLATFORM_CPPFLAGS += -mcpu=arc700 -mlock -mswape
endif
ifdef CONFIG_CPU_ARCEM6
-PLATFORM_CPPFLAGS += -marcem
+PLATFORM_CPPFLAGS += -mcpu=arcem
endif
ifdef CONFIG_CPU_ARCHS34
diff --git a/arch/arc/include/asm/errno.h b/arch/arc/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/arc/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5073930..38ad590 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -890,18 +890,24 @@
config ARCH_UNIPHIER
bool "Socionext UniPhier SoCs"
+ select BLK
select CLK_UNIPHIER
- select SUPPORT_SPL
- select SPL
- select OF_CONTROL
- select SPL_OF_CONTROL
- select OF_LIBFDT
select DM
- select SPL_DM
select DM_GPIO
- select DM_SERIAL
select DM_I2C
select DM_MMC
+ select DM_SERIAL
+ select DM_USB
+ select OF_CONTROL
+ select OF_LIBFDT
+ select PINCTRL
+ select SPL
+ select SPL_DM
+ select SPL_LIBCOMMON_SUPPORT
+ select SPL_LIBGENERIC_SUPPORT
+ select SPL_OF_CONTROL
+ select SPL_PINCTRL
+ select SUPPORT_SPL
help
Support for UniPhier SoC family developed by Socionext Inc.
(formerly, System LSI Business Division of Panasonic Corporation)
@@ -927,6 +933,7 @@
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
+ select DM_USB if USB
config TARGET_THUNDERX_88XX
bool "Support ThunderX 88xx"
diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c
index 068d93e..5297d62 100644
--- a/arch/arm/cpu/arm1136/mx35/generic.c
+++ b/arch/arm/cpu/arm1136/mx35/generic.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <div64.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/arm1136/mx35/mx35_sdram.c b/arch/arm/cpu/arm1136/mx35/mx35_sdram.c
index d358f5f..711ea76 100644
--- a/arch/arm/cpu/arm1136/mx35/mx35_sdram.c
+++ b/arch/arm/cpu/arm1136/mx35/mx35_sdram.c
@@ -5,7 +5,7 @@
*/
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <linux/types.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/cpu/arm920t/imx/timer.c b/arch/arm/cpu/arm920t/imx/timer.c
index b62558f..178422a 100644
--- a/arch/arm/cpu/arm920t/imx/timer.c
+++ b/arch/arm/cpu/arm920t/imx/timer.c
@@ -78,11 +78,7 @@
*/
ulong get_tbclk (void)
{
- ulong tbclk;
-
- tbclk = CONFIG_SYS_HZ;
-
- return tbclk;
+ return CONFIG_SYS_HZ;
}
/*
diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index 9491096..b552e43 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -11,7 +11,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/iomux.c b/arch/arm/cpu/arm926ejs/mxs/iomux.c
index 2e6be06..585fa8a 100644
--- a/arch/arm/cpu/arm926ejs/mxs/iomux.c
+++ b/arch/arm/cpu/arm926ejs/mxs/iomux.c
@@ -8,7 +8,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/iomux.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 2298620..840dd9e 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -11,7 +11,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/imx-common/dma.h>
diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c
index c88e962..89fd54f 100644
--- a/arch/arm/cpu/arm926ejs/spear/timer.c
+++ b/arch/arm/cpu/arm926ejs/spear/timer.c
@@ -37,7 +37,7 @@
writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
synth = MISC_GPT3SYNTH;
#else
-# error Incorrect config. Can only be spear{600|300|310|320}
+# error Incorrect config. Can only be SPEAR{600|300|310|320}
#endif
writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
diff --git a/arch/arm/cpu/armv7/am33xx/Kconfig b/arch/arm/cpu/armv7/am33xx/Kconfig
index dc51e9b..2d7d1fc 100644
--- a/arch/arm/cpu/armv7/am33xx/Kconfig
+++ b/arch/arm/cpu/armv7/am33xx/Kconfig
@@ -1,4 +1,14 @@
if AM43XX
+
+config SPL_EXT_SUPPORT
+ default y
+
+config SPL_GPIO_SUPPORT
+ default y
+
+config SPL_I2C_SUPPORT
+ default y
+
config TARGET_AM43XX_EVM
bool "Support am43xx_evm"
select TI_I2C_BOARD_DETECT
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index a99cbf9..68baded 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -28,7 +28,7 @@
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/compiler.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
diff --git a/arch/arm/cpu/armv7/am33xx/sys_info.c b/arch/arm/cpu/armv7/am33xx/sys_info.c
index 52a6824..f42eee1 100644
--- a/arch/arm/cpu/armv7/am33xx/sys_info.c
+++ b/arch/arm/cpu/armv7/am33xx/sys_info.c
@@ -65,9 +65,7 @@
*/
u32 get_sysboot_value(void)
{
- int mode;
- mode = readl(&cstat->statusreg) & (SYSBOOT_MASK);
- return mode;
+ return readl(&cstat->statusreg) & SYSBOOT_MASK;
}
#ifdef CONFIG_DISPLAY_CPUINFO
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c
index 80187e3..490bc4c 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c
@@ -12,7 +12,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c b/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c
index d263068..4a1cc71 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.c b/arch/arm/cpu/armv7/bcm235xx/clk-core.c
index a326dfe..79fafa0 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-core.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.c
@@ -12,7 +12,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <bitfield.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
index b0b92b9..f188ef0 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c b/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c
index b2ce6d6..456b767 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c
index 1d7c5af..908502d 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c
@@ -5,7 +5,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
index 7e25255..1c28551 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
@@ -12,7 +12,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c b/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
index ba55d0a..06a7ce8 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-core.c b/arch/arm/cpu/armv7/bcm281xx/clk-core.c
index d442583..cdc1264 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-core.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-core.c
@@ -12,7 +12,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <bitfield.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-eth.c b/arch/arm/cpu/armv7/bcm281xx/clk-eth.c
index b0b92b9..f188ef0 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-eth.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-eth.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c b/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
index 49badcb..bf47672 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c
index 1d7c5af..908502d 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c
@@ -5,7 +5,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
index 86ace90..8e247ee 100644
--- a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
+++ b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/immap_ls102xa.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include "fsl_ls1_serdes.h"
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index bf52f0d..610098c 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -9,7 +9,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c
index 3753c14..e6cc7cb 100644
--- a/arch/arm/cpu/armv7/mx5/soc.c
+++ b/arch/arm/cpu/armv7/mx5/soc.c
@@ -12,7 +12,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/imx-common/boot_mode.h>
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index b3c9dcc..9beb6f0 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <div64.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/armv7/mx6/mp.c b/arch/arm/cpu/armv7/mx6/mp.c
index 9f034d6..e28018b 100644
--- a/arch/arm/cpu/armv7/mx6/mp.c
+++ b/arch/arm/cpu/armv7/mx6/mp.c
@@ -9,7 +9,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/imx-regs.h>
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 88fcfdc..5b2a051 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -8,7 +8,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/armv7/mx7/clock.c b/arch/arm/cpu/armv7/mx7/clock.c
index 4d68ad2..2cfde46 100644
--- a/arch/arm/cpu/armv7/mx7/clock.c
+++ b/arch/arm/cpu/armv7/mx7/clock.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <div64.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/armv7/mx7/clock_slice.c b/arch/arm/cpu/armv7/mx7/clock_slice.c
index 1665df9..68a7005 100644
--- a/arch/arm/cpu/armv7/mx7/clock_slice.c
+++ b/arch/arm/cpu/armv7/mx7/clock_slice.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <div64.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/armv7/omap-common/pipe3-phy.c b/arch/arm/cpu/armv7/omap-common/pipe3-phy.c
index b71d769..e02e3ec 100644
--- a/arch/arm/cpu/armv7/omap-common/pipe3-phy.c
+++ b/arch/arm/cpu/armv7/omap-common/pipe3-phy.c
@@ -12,7 +12,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "pipe3-phy.h"
/* PLLCTRL Registers */
diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig
index 99a25f9..7d884a2 100644
--- a/arch/arm/cpu/armv7/omap3/Kconfig
+++ b/arch/arm/cpu/armv7/omap3/Kconfig
@@ -1,5 +1,38 @@
if OMAP34XX
+config SPL_EXT_SUPPORT
+ default y
+
+config SPL_FAT_SUPPORT
+ default y
+
+config SPL_GPIO_SUPPORT
+ default y
+
+config SPL_I2C_SUPPORT
+ default y
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBDISK_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_MMC_SUPPORT
+ default y
+
+config SPL_NAND_SUPPORT
+ default y
+
+config SPL_POWER_SUPPORT
+ default y
+
+config SPL_SERIAL_SUPPORT
+ default y
+
choice
prompt "OMAP3 board select"
optional
diff --git a/arch/arm/cpu/armv7/omap4/Kconfig b/arch/arm/cpu/armv7/omap4/Kconfig
index 49adb8e..c3dc95f 100644
--- a/arch/arm/cpu/armv7/omap4/Kconfig
+++ b/arch/arm/cpu/armv7/omap4/Kconfig
@@ -1,5 +1,38 @@
if OMAP44XX
+config SPL_EXT_SUPPORT
+ default y
+
+config SPL_FAT_SUPPORT
+ default y
+
+config SPL_GPIO_SUPPORT
+ default y
+
+config SPL_I2C_SUPPORT
+ default y
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBDISK_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_MMC_SUPPORT
+ default y
+
+config SPL_NAND_SUPPORT
+ default y
+
+config SPL_POWER_SUPPORT
+ default y
+
+config SPL_SERIAL_SUPPORT
+ default y
+
choice
prompt "OMAP4 board select"
optional
diff --git a/arch/arm/cpu/armv7/omap5/Kconfig b/arch/arm/cpu/armv7/omap5/Kconfig
index a8600b1..ef68c53 100644
--- a/arch/arm/cpu/armv7/omap5/Kconfig
+++ b/arch/arm/cpu/armv7/omap5/Kconfig
@@ -1,5 +1,38 @@
if OMAP54XX
+config SPL_EXT_SUPPORT
+ default y
+
+config SPL_FAT_SUPPORT
+ default y
+
+config SPL_GPIO_SUPPORT
+ default y
+
+config SPL_I2C_SUPPORT
+ default y
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBDISK_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_MMC_SUPPORT
+ default y
+
+config SPL_NAND_SUPPORT
+ default y
+
+config SPL_POWER_SUPPORT
+ default y
+
+config SPL_SERIAL_SUPPORT
+ default y
+
choice
prompt "OMAP5 board select"
optional
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 5fbd848..f865373 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/system.h>
#include <asm/armv8/mmu.h>
#include <asm/io.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
index 29cd28e..e06b063 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/soc.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 9110d7a..7faa86c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/soc.h>
#include <fsl-mc/ldpaa_wriop.h>
diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig
index ed3305d..1eedb39 100644
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@@ -1,5 +1,29 @@
if ARCH_ZYNQMP
+config SPL_FAT_SUPPORT
+ default y
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBDISK_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_MMC_SUPPORT
+ default y
+
+config SPL_SERIAL_SUPPORT
+ default y
+
+config SPL_SPI_FLASH_SUPPORT
+ default y if ZYNQ_QSPI
+
+config SPL_SPI_SUPPORT
+ default y if ZYNQ_QSPI
+
config SYS_BOARD
default "zynqmp"
@@ -23,5 +47,53 @@
config SYS_MALLOC_F_LEN
default 0x600
+config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
+ bool "Overwrite SPL bootmode"
+ depends on SPL
+ help
+ Overwrite bootmode selected via boot mode pins to tell SPL what should
+ be the next boot device.
+
+config SPL_ZYNQMP_ALT_BOOTMODE
+ hex
+ default 0x0 if JTAG_MODE
+ default 0x1 if QSPI_MODE_24BIT
+ default 0x2 if QSPI_MODE_32BIT
+ default 0x3 if SD_MODE
+ default 0x4 if NAND_MODE
+ default 0x5 if SD_MODE1
+ default 0x6 if EMMC_MODE
+ default 0x7 if USB_MODE
+
+choice
+ prompt "Boot mode"
+ depends on ZYNQMP_ALT_BOOTMODE_ENABLED
+ default JTAG
+
+config JTAG_MODE
+ bool "JTAG_MODE"
+
+config QSPI_MODE_24BIT
+ bool "QSPI_MODE_24BIT"
+
+config QSPI_MODE_32BIT
+ bool "QSPI_MODE_32BIT"
+
+config SD_MODE
+ bool "SD_MODE"
+
+config SD_MODE1
+ bool "SD_MODE1"
+
+config NAND_MODE
+ bool "NAND_MODE"
+
+config EMMC_MODE
+ bool "EMMC_MODE"
+
+config USB_MODE
+ bool "USB"
+
+endchoice
endif
diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c
index 867d2b2..04e1905 100644
--- a/arch/arm/cpu/armv8/zynqmp/spl.c
+++ b/arch/arm/cpu/armv8/zynqmp/spl.c
@@ -35,10 +35,29 @@
board_init_r(NULL, 0);
}
+static void ps_mode_reset(ulong mode)
+{
+ writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
+ &crlapb_base->boot_pin_ctrl);
+ udelay(5);
+ writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
+ mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
+ &crlapb_base->boot_pin_ctrl);
+}
+
+/*
+ * Set default PS_MODE1 which is used for USB ULPI phy reset
+ * Also other resets can be connected to this certain pin
+ */
+#ifndef MODE_RESET
+# define MODE_RESET PS_MODE1
+#endif
+
#ifdef CONFIG_SPL_BOARD_INIT
void spl_board_init(void)
{
preloader_console_init();
+ ps_mode_reset(MODE_RESET);
board_init();
}
#endif
@@ -48,6 +67,13 @@
u32 reg = 0;
u8 bootmode;
+#if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
+ /* Change default boot mode at run-time */
+ writel(BOOT_MODE_USE_ALT |
+ CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
+ &crlapb_base->boot_mode);
+#endif
+
reg = readl(&crlapb_base->boot_mode);
bootmode = reg & BOOT_MODES_MASK;
@@ -60,6 +86,10 @@
case SD_MODE1:
return BOOT_DEVICE_MMC1;
#endif
+#ifdef CONFIG_SPL_DFU_SUPPORT
+ case USB_MODE:
+ return BOOT_DEVICE_DFU;
+#endif
default:
printf("Invalid Boot Mode:0x%x\n", bootmode);
break;
diff --git a/arch/arm/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c
index 0a0006b..90e2128 100644
--- a/arch/arm/cpu/sa1100/timer.c
+++ b/arch/arm/cpu/sa1100/timer.c
@@ -66,8 +66,5 @@
*/
ulong get_tbclk (void)
{
- ulong tbclk;
-
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
+ return CONFIG_SYS_HZ;
}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 715e9bd..e89b6e80 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -70,6 +70,7 @@
armada-375-db.dtb \
armada-388-clearfog.dtb \
armada-388-gp.dtb \
+ armada-385-amc.dtb \
armada-xp-gp.dtb \
armada-xp-maxbcm.dtb \
armada-xp-synology-ds414.dtb \
@@ -263,7 +264,8 @@
sun8i-h3-orangepi-pc.dtb \
sun8i-h3-orangepi-pc-plus.dtb \
sun8i-h3-orangepi-plus.dtb \
- sun8i-h3-orangepi-plus2e.dtb
+ sun8i-h3-orangepi-plus2e.dtb \
+ sun8i-h3-nanopi-neo.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb
diff --git a/arch/arm/dts/armada-385-amc.dts b/arch/arm/dts/armada-385-amc.dts
new file mode 100644
index 0000000..a5a8a7f
--- /dev/null
+++ b/arch/arm/dts/armada-385-amc.dts
@@ -0,0 +1,163 @@
+/*
+ * Device Tree file for Marvell Armada 385 development board
+ * (DB-88F6820-AMC)
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "armada-385.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Marvell Armada 385 AMC";
+ compatible = "marvell,a385-amc", "marvell,armada385", "marvell,armada380";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ ethernet0 = ð0;
+ ethernet1 = ð1;
+ spi1 = &spi1;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000>; /* 2 GB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+
+ internal-regs {
+ i2c@11000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+ };
+
+ serial@12000 {
+ /*
+ * Exported on the micro USB connector CON16
+ * through an FTDI
+ */
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+ u-boot,dm-pre-reloc;
+ };
+
+ ethernet@34000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "sgmii";
+ };
+
+ usb@58000 {
+ status = "okay";
+ };
+
+ ethernet@70000 {
+ pinctrl-names = "default";
+ /*
+ * The Reference Clock 0 is used to provide a
+ * clock to the PHY
+ */
+ pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+
+
+ mdio@72004 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ phy1: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ flash@d0000 {
+ status = "okay";
+ num-cs = <1>;
+ marvell,nand-keep-config;
+ marvell,nand-enable-arbiter;
+ nand-on-flash-bbt;
+ };
+ };
+
+ pcie-controller {
+ status = "okay";
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+
+ };
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ status = "okay";
+ u-boot,dm-pre-reloc;
+
+ spi-flash@0 {
+ u-boot,dm-pre-reloc;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,m25p128", "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ };
+};
+
+&refclk {
+ clock-frequency = <20000000>;
+};
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index e92a492..bd7801b 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -43,6 +43,12 @@
regulator-always-on;
regulator-boot-on;
};
+
+ vcc5v0_host: vcc5v0-host-en {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+ };
};
&emmc_phy {
@@ -85,6 +91,10 @@
status = "okay";
};
+&dwc3_typec0 {
+ status = "okay";
+};
+
&usb_host1_ehci {
status = "okay";
};
@@ -93,6 +103,10 @@
status = "okay";
};
+&dwc3_typec1 {
+ status = "okay";
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index a4c6e27..179860c 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#define USB_CLASS_HUB 9
/ {
compatible = "rockchip,rk3399";
@@ -175,6 +176,8 @@
clocks = <&cru SCLK_SDMMC>, <&cru HCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "ciu", "biu", "ciu-drive", "ciu-sample";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk>;
fifo-depth = <0x100>;
status = "disabled";
};
@@ -226,6 +229,50 @@
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>;
clock-names = "hclk_host1", "hclk_host1_arb";
status = "disabled";
+ };
+
+ dwc3_typec0: usb@fe800000 {
+ compatible = "rockchip,rk3399-xhci";
+ reg = <0x0 0xfe800000 0x0 0x100000>;
+ status = "disabled";
+ rockchip,vbus-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ snps,dis-enblslpm-quirk;
+ snps,phyif-utmi-bits = <16>;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis-u2-susphy-quirk;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ hub {
+ compatible = "usb-hub";
+ usb,device-class = <USB_CLASS_HUB>;
+ };
+ typec_phy0 {
+ compatible = "rockchip,rk3399-usb3-phy";
+ reg = <0x0 0xff7c0000 0x0 0x40000>;
+ };
+ };
+
+ dwc3_typec1: usb@fe900000 {
+ compatible = "rockchip,rk3399-xhci";
+ reg = <0x0 0xfe900000 0x0 0x100000>;
+ status = "disabled";
+ rockchip,vbus-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+ snps,dis-enblslpm-quirk;
+ snps,phyif-utmi-bits = <16>;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis-u2-susphy-quirk;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ hub {
+ compatible = "usb-hub";
+ usb,device-class = <USB_CLASS_HUB>;
+ };
+ typec_phy1 {
+ compatible = "rockchip,rk3399-usb3-phy";
+ reg = <0x0 0xff800000 0x0 0x40000>;
+ };
};
gic: interrupt-controller@fee00000 {
@@ -771,6 +818,41 @@
};
};
+ sdmmc {
+ sdmmc_bus1: sdmmc-bus1 {
+ rockchip,pins =
+ <4 8 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins =
+ <4 8 RK_FUNC_1 &pcfg_pull_up>,
+ <4 9 RK_FUNC_1 &pcfg_pull_up>,
+ <4 10 RK_FUNC_1 &pcfg_pull_up>,
+ <4 11 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins =
+ <4 12 RK_FUNC_1 &pcfg_pull_none>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins =
+ <4 13 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdmmc_cd: sdmcc-cd {
+ rockchip,pins =
+ <0 7 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdmmc_wp: sdmmc-wp {
+ rockchip,pins =
+ <0 8 RK_FUNC_1 &pcfg_pull_up>;
+ };
+ };
+
spdif {
spdif_bus: spdif-bus {
rockchip,pins =
diff --git a/arch/arm/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/dts/sun8i-h3-nanopi-neo.dts
new file mode 100644
index 0000000..3d64caf
--- /dev/null
+++ b/arch/arm/dts/sun8i-h3-nanopi-neo.dts
@@ -0,0 +1,125 @@
+/*
+ * Copyright (C) 2016 James Pettigrew <james@innovum.com.au>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO";
+ compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:blue:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ };
+ };
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+ cd-inverted;
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&pio {
+ leds_opc: led-pins {
+ allwinner,pins = "PA10";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&r_pio {
+ leds_r_opc: led-pins {
+ allwinner,pins = "PL10";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usbphy {
+ /* USB VBUS is always on */
+ status = "okay";
+};
diff --git a/arch/arm/dts/uniphier-common32.dtsi b/arch/arm/dts/uniphier-common32.dtsi
index b0b2b57..e441033 100644
--- a/arch/arm/dts/uniphier-common32.dtsi
+++ b/arch/arm/dts/uniphier-common32.dtsi
@@ -31,7 +31,7 @@
interrupts = <0 33 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 0>;
};
serial1: serial@54006900 {
@@ -41,7 +41,7 @@
interrupts = <0 35 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 1>;
};
serial2: serial@54006a00 {
@@ -51,7 +51,7 @@
interrupts = <0 37 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 2>;
};
serial3: serial@54006b00 {
@@ -61,7 +61,7 @@
interrupts = <0 177 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 3>;
};
system_bus: system-bus@58c00000 {
@@ -79,16 +79,33 @@
reg = <0x59801000 0x400>;
};
- mio: mioctrl@59810000 {
- /* specify compatible in each SoC DTSI */
+ mioctrl@59810000 {
+ compatible = "socionext,uniphier-mioctrl",
+ "simple-mfd", "syscon";
reg = <0x59810000 0x800>;
- #clock-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ mio_clk: clock {
+ #clock-cells = <1>;
+ };
+
+ mio_rst: reset {
+ #reset-cells = <1>;
+ };
};
- peri: perictrl@59820000 {
- /* specify compatible in each SoC DTSI */
+ perictrl@59820000 {
+ compatible = "socionext,uniphier-perictrl",
+ "simple-mfd", "syscon";
reg = <0x59820000 0x200>;
- #clock-cells = <1>;
+
+ peri_clk: clock {
+ #clock-cells = <1>;
+ };
+
+ peri_rst: reset {
+ #reset-cells = <1>;
+ };
};
timer@60000200 {
@@ -114,7 +131,8 @@
};
soc-glue@5f800000 {
- compatible = "simple-mfd", "syscon";
+ compatible = "socionext,uniphier-soc-glue",
+ "simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
@@ -124,12 +142,18 @@
};
};
- sysctrl: sysctrl@61840000 {
- /* specify compatible in each SoC DTSI */
+ sysctrl@61840000 {
+ compatible = "socionext,uniphier-sysctrl",
+ "simple-mfd", "syscon";
reg = <0x61840000 0x4000>;
- #clock-cells = <1>;
- clock-names = "ref";
- clocks = <&refclk>;
+
+ sys_clk: clock {
+ #clock-cells = <1>;
+ };
+
+ sys_rst: reset {
+ #reset-cells = <1>;
+ };
};
nand: nand@68000000 {
diff --git a/arch/arm/dts/uniphier-ph1-ld11-ref.dts b/arch/arm/dts/uniphier-ph1-ld11-ref.dts
index 4eb7664..ca31026 100644
--- a/arch/arm/dts/uniphier-ph1-ld11-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld11-ref.dts
@@ -70,3 +70,7 @@
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};
+
+&pinctrl_system_bus {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/uniphier-ph1-ld11.dtsi b/arch/arm/dts/uniphier-ph1-ld11.dtsi
index ffe04f5..0bdbbdd 100644
--- a/arch/arm/dts/uniphier-ph1-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld11.dtsi
@@ -54,12 +54,6 @@
clock-frequency = <25000000>;
};
- uart_clk: uart_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <58820000>;
- };
-
i2c_clk: i2c_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -69,10 +63,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <1 13 0xf01>,
- <1 14 0xf01>,
- <1 11 0xf01>,
- <1 10 0xf01>;
+ interrupts = <1 13 4>,
+ <1 14 4>,
+ <1 11 4>,
+ <1 10 4>;
};
soc {
@@ -89,7 +83,7 @@
interrupts = <0 33 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 0>;
clock-frequency = <58820000>;
};
@@ -100,7 +94,7 @@
interrupts = <0 35 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 1>;
clock-frequency = <58820000>;
};
@@ -111,7 +105,7 @@
interrupts = <0 37 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 2>;
clock-frequency = <58820000>;
};
@@ -122,7 +116,7 @@
interrupts = <0 177 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 3>;
clock-frequency = <58820000>;
};
@@ -213,6 +207,22 @@
reg = <0x59801000 0x400>;
};
+ perictrl@59820000 {
+ compatible = "socionext,uniphier-perictrl",
+ "simple-mfd", "syscon";
+ reg = <0x59820000 0x200>;
+
+ peri_clk: clock {
+ compatible = "socionext,uniphier-ld11-peri-clock";
+ #clock-cells = <1>;
+ };
+
+ peri_rst: reset {
+ compatible = "socionext,uniphier-ld11-peri-reset";
+ #reset-cells = <1>;
+ };
+ };
+
usb0: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
@@ -220,7 +230,7 @@
interrupts = <0 243 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>;
- clocks = <&mio 3>, <&mio 6>;
+ clocks = <&mio_clk 3>, <&mio_clk 6>;
};
usb1: usb@5a810100 {
@@ -230,7 +240,7 @@
interrupts = <0 244 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>;
- clocks = <&mio 4>, <&mio 6>;
+ clocks = <&mio_clk 4>, <&mio_clk 6>;
};
usb2: usb@5a820100 {
@@ -240,17 +250,29 @@
interrupts = <0 245 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2>;
- clocks = <&mio 5>, <&mio 6>;
+ clocks = <&mio_clk 5>, <&mio_clk 6>;
};
- mio: mioctrl@5b3e0000 {
- compatible = "socionext,ph1-ld11-mioctrl";
+ mioctrl@5b3e0000 {
+ compatible = "socionext,uniphier-mioctrl",
+ "simple-mfd", "syscon";
reg = <0x5b3e0000 0x800>;
- #clock-cells = <1>;
+
+ mio_clk: clock {
+ compatible = "socionext,uniphier-ld11-mio-clock";
+ #clock-cells = <1>;
+ };
+
+ mio_rst: reset {
+ compatible = "socionext,uniphier-ld11-mio-reset";
+ #reset-cells = <1>;
+ resets = <&sys_rst 7>;
+ };
};
soc-glue@5f800000 {
- compatible = "simple-mfd", "syscon";
+ compatible = "socionext,uniphier-soc-glue",
+ "simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
@@ -273,6 +295,22 @@
#interrupt-cells = <3>;
interrupts = <1 9 4>;
};
+
+ sysctrl@61840000 {
+ compatible = "socionext,uniphier-ld11-sysctrl",
+ "simple-mfd", "syscon";
+ reg = <0x61840000 0x4000>;
+
+ sys_clk: clock {
+ compatible = "socionext,uniphier-ld11-clock";
+ #clock-cells = <1>;
+ };
+
+ sys_rst: reset {
+ compatible = "socionext,uniphier-ld11-reset";
+ #reset-cells = <1>;
+ };
+ };
};
};
diff --git a/arch/arm/dts/uniphier-ph1-ld20-ref.dts b/arch/arm/dts/uniphier-ph1-ld20-ref.dts
index 90c8705..e4e8d76 100644
--- a/arch/arm/dts/uniphier-ph1-ld20-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld20-ref.dts
@@ -58,3 +58,7 @@
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};
+
+&pinctrl_system_bus {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/uniphier-ph1-ld20.dtsi b/arch/arm/dts/uniphier-ph1-ld20.dtsi
index 7497539..7f97f88 100644
--- a/arch/arm/dts/uniphier-ph1-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld20.dtsi
@@ -78,12 +78,6 @@
clock-frequency = <25000000>;
};
- uart_clk: uart_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <58820000>;
- };
-
i2c_clk: i2c_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -93,10 +87,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <1 13 0xf01>,
- <1 14 0xf01>,
- <1 11 0xf01>,
- <1 10 0xf01>;
+ interrupts = <1 13 4>,
+ <1 14 4>,
+ <1 11 4>,
+ <1 10 4>;
};
soc {
@@ -113,7 +107,7 @@
interrupts = <0 33 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 0>;
clock-frequency = <58820000>;
};
@@ -124,7 +118,7 @@
interrupts = <0 35 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 1>;
clock-frequency = <58820000>;
};
@@ -135,7 +129,7 @@
interrupts = <0 37 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 2>;
clock-frequency = <58820000>;
};
@@ -146,7 +140,7 @@
interrupts = <0 177 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
- clocks = <&uart_clk>;
+ clocks = <&peri_clk 3>;
clock-frequency = <58820000>;
};
@@ -237,10 +231,36 @@
reg = <0x59801000 0x400>;
};
- mio: mioctrl@59810000 {
- compatible = "socionext,ph1-ld20-mioctrl";
+ mioctrl@59810000 {
+ compatible = "socionext,uniphier-mioctrl",
+ "simple-mfd", "syscon";
reg = <0x59810000 0x800>;
- #clock-cells = <1>;
+
+ mio_clk: clock {
+ compatible = "socionext,uniphier-ld20-mio-clock";
+ #clock-cells = <1>;
+ };
+
+ mio_rst: reset {
+ compatible = "socionext,uniphier-ld20-mio-reset";
+ #reset-cells = <1>;
+ };
+ };
+
+ perictrl@59820000 {
+ compatible = "socionext,uniphier-perictrl",
+ "simple-mfd", "syscon";
+ reg = <0x59820000 0x200>;
+
+ peri_clk: clock {
+ compatible = "socionext,uniphier-ld20-peri-clock";
+ #clock-cells = <1>;
+ };
+
+ peri_rst: reset {
+ compatible = "socionext,uniphier-ld20-peri-reset";
+ #reset-cells = <1>;
+ };
};
sd: sdhc@5a400000 {
@@ -250,12 +270,13 @@
interrupts = <0 76 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd>;
- clocks = <&mio 0>;
+ clocks = <&mio_clk 0>;
bus-width = <4>;
};
soc-glue@5f800000 {
- compatible = "simple-mfd", "syscon";
+ compatible = "socionext,uniphier-soc-glue",
+ "simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
@@ -278,6 +299,22 @@
#interrupt-cells = <3>;
interrupts = <1 9 4>;
};
+
+ sysctrl@61840000 {
+ compatible = "socionext,uniphier-sysctrl",
+ "simple-mfd", "syscon";
+ reg = <0x61840000 0x4000>;
+
+ sys_clk: clock {
+ compatible = "socionext,uniphier-ld20-clock";
+ #clock-cells = <1>;
+ };
+
+ sys_rst: reset {
+ compatible = "socionext,uniphier-ld20-reset";
+ #reset-cells = <1>;
+ };
+ };
};
};
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index 07f315a..e4884b9 100644
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -30,12 +30,6 @@
clock-frequency = <50000000>;
};
- uart_clk: uart_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <36864000>;
- };
-
iobus_clk: iobus_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -228,7 +222,7 @@
pinctrl-names = "default", "1.8v";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_1v8>;
- clocks = <&mio 0>;
+ clocks = <&mio_clk 0>;
bus-width = <4>;
};
@@ -240,7 +234,7 @@
pinctrl-names = "default", "1.8v";
pinctrl-0 = <&pinctrl_emmc>;
pinctrl-1 = <&pinctrl_emmc_1v8>;
- clocks = <&mio 1>;
+ clocks = <&mio_clk 1>;
bus-width = <8>;
non-removable;
};
@@ -252,7 +246,7 @@
interrupts = <0 80 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>;
- clocks = <&mio 3>, <&mio 6>;
+ clocks = <&mio_clk 3>, <&mio_clk 6>;
};
usb1: usb@5a810100 {
@@ -262,7 +256,7 @@
interrupts = <0 81 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>;
- clocks = <&mio 4>, <&mio 6>;
+ clocks = <&mio_clk 4>, <&mio_clk 6>;
};
usb2: usb@5a820100 {
@@ -272,7 +266,7 @@
interrupts = <0 82 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2>;
- clocks = <&mio 5>, <&mio 6>;
+ clocks = <&mio_clk 5>, <&mio_clk 6>;
};
aidet@61830000 {
@@ -302,22 +296,30 @@
clock-frequency = <36864000>;
};
+&mio_clk {
+ compatible = "socionext,uniphier-ld4-mio-clock";
+};
+
+&mio_rst {
+ compatible = "socionext,uniphier-ld4-mio-reset";
+};
+
-&mio {
- compatible = "socionext,ph1-ld4-mioctrl";
- clock-names = "stdmac", "ehci";
- clocks = <&sysctrl 10>, <&sysctrl 18>;
+&peri_clk {
+ compatible = "socionext,uniphier-ld4-peri-clock";
};
-&peri {
- compatible = "socionext,ph1-ld4-perictrl";
- clock-names = "uart", "i2c";
- clocks = <&sysctrl 3>, <&sysctrl 4>;
+&peri_rst {
+ compatible = "socionext,uniphier-ld4-peri-reset";
};
&pinctrl {
compatible = "socionext,uniphier-ld4-pinctrl";
};
-&sysctrl {
- compatible = "socionext,ph1-ld4-sysctrl";
+&sys_clk {
+ compatible = "socionext,uniphier-ld4-clock";
+};
+
+&sys_rst {
+ compatible = "socionext,uniphier-ld4-reset";
};
diff --git a/arch/arm/dts/uniphier-ph1-pro4-sanji.dts b/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
index 965fe08..3f178d2 100644
--- a/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
+++ b/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
@@ -89,7 +89,7 @@
u-boot,dm-pre-reloc;
};
-&mio {
+&mio_clk {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi
index e0b28b8..192ce84 100644
--- a/arch/arm/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi
@@ -351,7 +351,7 @@
pinctrl-names = "default", "1.8v";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_1v8>;
- clocks = <&mio 0>;
+ clocks = <&mio_clk 0>;
bus-width = <4>;
};
@@ -363,7 +363,7 @@
pinctrl-names = "default", "1.8v";
pinctrl-0 = <&pinctrl_emmc>;
pinctrl-1 = <&pinctrl_emmc_1v8>;
- clocks = <&mio 1>;
+ clocks = <&mio_clk 1>;
bus-width = <8>;
non-removable;
};
@@ -376,7 +376,7 @@
pinctrl-names = "default", "1.8v";
pinctrl-0 = <&pinctrl_sd1>;
pinctrl-1 = <&pinctrl_sd1_1v8>;
- clocks = <&mio 2>;
+ clocks = <&mio_clk 2>;
bus-width = <4>;
};
@@ -387,7 +387,7 @@
interrupts = <0 80 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2>;
- clocks = <&mio 3>, <&mio 6>;
+ clocks = <&mio_clk 3>, <&mio_clk 6>;
};
usb3: usb@5a810100 {
@@ -397,7 +397,7 @@
interrupts = <0 81 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3>;
- clocks = <&mio 4>, <&mio 6>;
+ clocks = <&mio_clk 4>, <&mio_clk 6>;
};
aidet@5fc20000 {
@@ -444,22 +444,30 @@
clock-frequency = <73728000>;
};
-&mio {
- compatible = "socionext,ph1-pro4-mioctrl";
- clock-names = "stdmac", "ehci";
- clocks = <&sysctrl 10>, <&sysctrl 18>;
+&mio_clk {
+ compatible = "socionext,uniphier-pro4-mio-clock";
};
-&peri {
- compatible = "socionext,ph1-pro4-perictrl";
- clock-names = "uart", "fi2c";
- clocks = <&sysctrl 3>, <&sysctrl 4>;
+&mio_rst {
+ compatible = "socionext,uniphier-pro4-mio-reset";
};
+&peri_clk {
+ compatible = "socionext,uniphier-pro4-peri-clock";
+};
+
+&peri_rst {
+ compatible = "socionext,uniphier-pro4-peri-reset";
+};
+
&pinctrl {
compatible = "socionext,uniphier-pro4-pinctrl";
};
+&sys_clk {
+ compatible = "socionext,uniphier-pro4-clock";
+};
+
-&sysctrl {
- compatible = "socionext,ph1-pro4-sysctrl";
+&sys_rst {
+ compatible = "socionext,uniphier-pro4-reset";
};
diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi
index 05f961f..22a70b1 100644
--- a/arch/arm/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi
@@ -38,12 +38,6 @@
clock-frequency = <50000000>;
};
- uart_clk: uart_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <73728000>;
- };
-
i2c_clk: i2c_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -367,7 +361,7 @@
interrupts = <0 78 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>;
- clocks = <&mio 1>;
+ clocks = <&mio_clk 1>;
bus-width = <8>;
non-removable;
};
@@ -380,7 +374,7 @@
pinctrl-names = "default", "1.8v";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_1v8>;
- clocks = <&mio 0>;
+ clocks = <&mio_clk 0>;
bus-width = <4>;
};
@@ -423,22 +417,30 @@
clock-frequency = <73728000>;
};
+&mio_clk {
+ compatible = "socionext,uniphier-pro5-mio-clock";
+};
+
+&mio_rst {
+ compatible = "socionext,uniphier-pro5-mio-reset";
+};
+
-&mio {
- compatible = "socionext,ph1-pro5-mioctrl";
- clock-names = "stdmac";
- clocks = <&sysctrl 10>;
+&peri_clk {
+ compatible = "socionext,uniphier-pro5-peri-clock";
};
-&peri {
- compatible = "socionext,ph1-pro5-perictrl";
- clock-names = "uart", "fi2c";
- clocks = <&sysctrl 3>, <&sysctrl 4>;
+&peri_rst {
+ compatible = "socionext,uniphier-pro5-peri-reset";
};
&pinctrl {
compatible = "socionext,uniphier-pro5-pinctrl";
};
-&sysctrl {
- compatible = "socionext,ph1-pro5-sysctrl";
+&sys_clk {
+ compatible = "socionext,uniphier-pro5-clock";
+};
+
+&sys_rst {
+ compatible = "socionext,uniphier-pro5-reset";
};
diff --git a/arch/arm/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/dts/uniphier-ph1-sld3-ref.dts
index 0863588..116e571 100644
--- a/arch/arm/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-sld3-ref.dts
@@ -86,10 +86,14 @@
u-boot,dm-pre-reloc;
};
-&mio {
+&emmc {
u-boot,dm-pre-reloc;
};
-&emmc {
- u-boot,dm-pre-reloc;
+&pinctrl_uart0 {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl_emmc {
+ u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index 6a95541..a554b08 100644
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -42,12 +42,6 @@
clock-frequency = <50000000>;
};
- uart_clk: uart_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <36864000>;
- };
-
iobus_clk: iobus_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -90,7 +84,8 @@
status = "disabled";
reg = <0x54006800 0x40>;
interrupts = <0 33 4>;
- clocks = <&uart_clk>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
clock-frequency = <36864000>;
};
@@ -99,7 +94,8 @@
status = "disabled";
reg = <0x54006900 0x40>;
interrupts = <0 35 4>;
- clocks = <&uart_clk>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
clock-frequency = <36864000>;
};
@@ -108,7 +104,8 @@
status = "disabled";
reg = <0x54006a00 0x40>;
interrupts = <0 37 4>;
- clocks = <&uart_clk>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
clock-frequency = <36864000>;
};
@@ -231,6 +228,8 @@
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 41 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
clocks = <&iobus_clk>;
clock-frequency = <100000>;
};
@@ -291,12 +290,22 @@
reg = <0x59801000 0x400>;
};
- mio: mioctrl@59810000 {
- compatible = "socionext,ph1-sld3-mioctrl";
+ mioctrl@59810000 {
+ compatible = "socionext,uniphier-mioctrl",
+ "simple-mfd", "syscon";
reg = <0x59810000 0x800>;
- #clock-cells = <1>;
- clock-names = "stdmac", "ehci";
- clocks = <&sysctrl 10>, <&sysctrl 18>;
+ u-boot,dm-pre-reloc;
+
+ mio_clk: clock {
+ compatible = "socionext,uniphier-sld3-mio-clock";
+ #clock-cells = <1>;
+ u-boot,dm-pre-reloc;
+ };
+
+ mio_rst: reset {
+ compatible = "socionext,uniphier-sld3-mio-reset";
+ #reset-cells = <1>;
+ };
};
emmc: sdhc@5a400000 {
@@ -304,7 +313,10 @@
status = "disabled";
reg = <0x5a400000 0x200>;
interrupts = <0 78 4>;
- clocks = <&mio 1>;
+ pinctrl-names = "default", "1.8v";
+ pinctrl-0 = <&pinctrl_emmc>;
+ pinctrl-1 = <&pinctrl_emmc_1v8>;
+ clocks = <&mio_clk 1>;
bus-width = <8>;
non-removable;
};
@@ -314,7 +326,10 @@
status = "disabled";
reg = <0x5a500000 0x200>;
interrupts = <0 76 4>;
- clocks = <&mio 0>;
+ pinctrl-names = "default", "1.8v";
+ pinctrl-0 = <&pinctrl_sd>;
+ pinctrl-1 = <&pinctrl_sd_1v8>;
+ clocks = <&mio_clk 0>;
bus-width = <4>;
};
@@ -323,7 +338,9 @@
status = "disabled";
reg = <0x5a800100 0x100>;
interrupts = <0 80 4>;
- clocks = <&mio 3>, <&mio 6>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0>;
+ clocks = <&mio_clk 3>, <&mio_clk 6>;
};
usb1: usb@5a810100 {
@@ -331,7 +348,9 @@
status = "disabled";
reg = <0x5a810100 0x100>;
interrupts = <0 81 4>;
- clocks = <&mio 4>, <&mio 6>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1>;
+ clocks = <&mio_clk 4>, <&mio_clk 6>;
};
usb2: usb@5a820100 {
@@ -339,7 +358,9 @@
status = "disabled";
reg = <0x5a820100 0x100>;
interrupts = <0 82 4>;
- clocks = <&mio 5>, <&mio 6>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb2>;
+ clocks = <&mio_clk 5>, <&mio_clk 6>;
};
usb3: usb@5a830100 {
@@ -347,20 +368,41 @@
status = "disabled";
reg = <0x5a830100 0x100>;
interrupts = <0 83 4>;
- clocks = <&mio 7>, <&mio 6>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb3>;
+ clocks = <&mio_clk 7>, <&mio_clk 6>;
};
+ soc-glue@5f800000 {
+ compatible = "simple-mfd", "syscon";
+ reg = <0x5f800000 0x2000>;
+ u-boot,dm-pre-reloc;
+
+ pinctrl: pinctrl {
+ compatible = "socionext,uniphier-sld3-pinctrl";
+ u-boot,dm-pre-reloc;
+ };
+ };
+
aidet@f1830000 {
compatible = "simple-mfd", "syscon";
reg = <0xf1830000 0x200>;
};
- sysctrl: sysctrl@f1840000 {
- compatible = "socionext,ph1-sld3-sysctrl";
+ sysctrl@f1840000 {
+ compatible = "socionext,uniphier-sysctrl",
+ "simple-mfd", "syscon";
reg = <0xf1840000 0x4000>;
- #clock-cells = <1>;
- clock-names = "ref";
- clocks = <&refclk>;
+
+ sys_clk: clock {
+ compatible = "socionext,uniphier-sld3-clock";
+ #clock-cells = <1>;
+ };
+
+ sys_rst: reset {
+ compatible = "socionext,uniphier-sld3-reset";
+ #reset-cells = <1>;
+ };
};
nand: nand@f8000000 {
@@ -370,3 +412,5 @@
};
};
};
+
+/include/ "uniphier-pinctrl.dtsi"
diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index e0376a1..1ecce50 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -30,12 +30,6 @@
clock-frequency = <50000000>;
};
- uart_clk: uart_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <80000000>;
- };
-
iobus_clk: iobus_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -228,7 +222,7 @@
pinctrl-names = "default", "1.8v";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_1v8>;
- clocks = <&mio 0>;
+ clocks = <&mio_clk 0>;
bus-width = <4>;
};
@@ -240,7 +234,7 @@
pinctrl-names = "default", "1.8v";
pinctrl-0 = <&pinctrl_emmc>;
pinctrl-1 = <&pinctrl_emmc_1v8>;
- clocks = <&mio 1>;
+ clocks = <&mio_clk 1>;
bus-width = <8>;
non-removable;
};
@@ -252,7 +246,7 @@
interrupts = <0 80 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>;
- clocks = <&mio 3>, <&mio 6>;
+ clocks = <&mio_clk 3>, <&mio_clk 6>;
};
usb1: usb@5a810100 {
@@ -262,7 +256,7 @@
interrupts = <0 81 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>;
- clocks = <&mio 4>, <&mio 6>;
+ clocks = <&mio_clk 4>, <&mio_clk 6>;
};
usb2: usb@5a820100 {
@@ -272,7 +266,7 @@
interrupts = <0 82 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2>;
- clocks = <&mio 5>, <&mio 6>;
+ clocks = <&mio_clk 5>, <&mio_clk 6>;
};
aidet@61830000 {
@@ -302,22 +296,30 @@
clock-frequency = <80000000>;
};
+&mio_clk {
+ compatible = "socionext,uniphier-sld8-mio-clock";
+};
+
+&mio_rst {
+ compatible = "socionext,uniphier-sld8-mio-reset";
+};
+
-&mio {
- compatible = "socionext,ph1-sld8-mioctrl";
- clock-names = "stdmac", "ehci";
- clocks = <&sysctrl 10>, <&sysctrl 18>;
+&peri_clk {
+ compatible = "socionext,uniphier-sld8-peri-clock";
};
-&peri {
- compatible = "socionext,ph1-sld8-perictrl";
- clock-names = "uart", "i2c";
- clocks = <&sysctrl 3>, <&sysctrl 4>;
+&peri_rst {
+ compatible = "socionext,uniphier-sld8-peri-reset";
};
&pinctrl {
compatible = "socionext,uniphier-sld8-pinctrl";
};
-&sysctrl {
- compatible = "socionext,ph1-sld8-sysctrl";
+&sys_clk {
+ compatible = "socionext,uniphier-sld8-clock";
+};
+
+&sys_rst {
+ compatible = "socionext,uniphier-sld8-reset";
};
diff --git a/arch/arm/dts/uniphier-proxstream2-gentil.dts b/arch/arm/dts/uniphier-proxstream2-gentil.dts
index 1175703..7233dc6 100644
--- a/arch/arm/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/dts/uniphier-proxstream2-gentil.dts
@@ -69,7 +69,7 @@
u-boot,dm-pre-reloc;
};
-&mio {
+&mio_clk {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/uniphier-proxstream2-vodka.dts b/arch/arm/dts/uniphier-proxstream2-vodka.dts
index 928a092..30ea270 100644
--- a/arch/arm/dts/uniphier-proxstream2-vodka.dts
+++ b/arch/arm/dts/uniphier-proxstream2-vodka.dts
@@ -54,7 +54,7 @@
u-boot,dm-pre-reloc;
};
-&mio {
+&mio_clk {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi b/arch/arm/dts/uniphier-proxstream2.dtsi
index 23a6bfa..609cbaa 100644
--- a/arch/arm/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/dts/uniphier-proxstream2.dtsi
@@ -52,12 +52,6 @@
clock-frequency = <50000000>;
};
- uart_clk: uart_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <88900000>;
- };
-
i2c_clk: i2c_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -366,7 +360,7 @@
interrupts = <0 78 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>;
- clocks = <&mio 1>;
+ clocks = <&mio_clk 1>;
bus-width = <8>;
non-removable;
};
@@ -379,7 +373,7 @@
pinctrl-names = "default", "1.8v";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_1v8>;
- clocks = <&mio 0>;
+ clocks = <&mio_clk 0>;
bus-width = <4>;
};
@@ -427,22 +421,30 @@
clock-frequency = <88900000>;
};
+&mio_clk {
+ compatible = "socionext,uniphier-pxs2-mio-clock";
+};
+
+&mio_rst {
+ compatible = "socionext,uniphier-pxs2-mio-reset";
+};
+
-&mio {
- compatible = "socionext,proxstream2-mioctrl";
- clock-names = "stdmac";
- clocks = <&sysctrl 10>;
+&peri_clk {
+ compatible = "socionext,uniphier-pxs2-peri-clock";
};
-&peri {
- compatible = "socionext,proxstream2-perictrl";
- clock-names = "uart", "fi2c";
- clocks = <&sysctrl 3>, <&sysctrl 4>;
+&peri_rst {
+ compatible = "socionext,uniphier-pxs2-peri-reset";
};
&pinctrl {
compatible = "socionext,uniphier-pxs2-pinctrl";
};
-&sysctrl {
- compatible = "socionext,proxstream2-sysctrl";
+&sys_clk {
+ compatible = "socionext,uniphier-pxs2-clock";
+};
+
+&sys_rst {
+ compatible = "socionext,uniphier-pxs2-reset";
};
diff --git a/arch/arm/imx-common/cmd_bmode.c b/arch/arm/imx-common/cmd_bmode.c
index 841b1d3..b0868aa 100644
--- a/arch/arm/imx-common/cmd_bmode.c
+++ b/arch/arm/imx-common/cmd_bmode.c
@@ -4,7 +4,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/imx-common/boot_mode.h>
#include <malloc.h>
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 4223187..a33aa16 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -10,7 +10,7 @@
#include <bootm.h>
#include <common.h>
#include <netdev.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/imx-common/i2c-mxv7.c b/arch/arm/imx-common/i2c-mxv7.c
index ff72b1a..ae8809c 100644
--- a/arch/arm/imx-common/i2c-mxv7.c
+++ b/arch/arm/imx-common/i2c-mxv7.c
@@ -7,7 +7,7 @@
#include <malloc.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/mxc_i2c.h>
#include <watchdog.h>
diff --git a/arch/arm/imx-common/misc.c b/arch/arm/imx-common/misc.c
index 12256a3..1b0f18d 100644
--- a/arch/arm/imx-common/misc.c
+++ b/arch/arm/imx-common/misc.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/arch/sys_proto.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/imx-common/regs-common.h>
diff --git a/arch/arm/imx-common/rdc-sema.c b/arch/arm/imx-common/rdc-sema.c
index dcb5c41..5df4e02 100644
--- a/arch/arm/imx-common/rdc-sema.c
+++ b/arch/arm/imx-common/rdc-sema.c
@@ -8,7 +8,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/rdc-sema.h>
#include <asm/arch/imx-rdc.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
/*
* Check if the RDC Semaphore is required for this peripheral.
diff --git a/arch/arm/imx-common/video.c b/arch/arm/imx-common/video.c
index 46f8a1e..fdc987f 100644
--- a/arch/arm/imx-common/video.c
+++ b/arch/arm/imx-common/video.c
@@ -3,7 +3,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/imx-common/video.h>
int board_video_skip(void)
diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 21edbc2..804c77b 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -16,6 +16,7 @@
ROCKCHIP_SYSCON_GRF,
ROCKCHIP_SYSCON_SGRF,
ROCKCHIP_SYSCON_PMU,
+ ROCKCHIP_SYSCON_PMUGRF,
};
/* Standard Rockchip clock numbers */
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
new file mode 100644
index 0000000..d3d1467
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -0,0 +1,321 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __SOC_ROCKCHIP_RK3399_GRF_H__
+#define __SOC_ROCKCHIP_RK3399_GRF_H__
+
+struct rk3399_grf_regs {
+ u32 reserved[0x800];
+ u32 usb3_perf_con0;
+ u32 usb3_perf_con1;
+ u32 usb3_perf_con2;
+ u32 usb3_perf_rd_max_latency_num;
+ u32 usb3_perf_rd_latency_samp_num;
+ u32 usb3_perf_rd_latency_acc_num;
+ u32 usb3_perf_rd_axi_total_byte;
+ u32 usb3_perf_wr_axi_total_byte;
+ u32 usb3_perf_working_cnt;
+ u32 reserved1[0x103];
+ u32 usb3otg0_con0;
+ u32 usb3otg0_con1;
+ u32 reserved2[2];
+ u32 usb3otg1_con0;
+ u32 usb3otg1_con1;
+ u32 reserved3[2];
+ u32 usb3otg0_status_lat0;
+ u32 usb3otg0_status_lat1;
+ u32 usb3otg0_status_cb;
+ u32 reserved4;
+ u32 usb3otg1_status_lat0;
+ u32 usb3otg1_status_lat1;
+ u32 usb3ogt1_status_cb;
+ u32 reserved5[0x6e5];
+ u32 pcie_perf_con0;
+ u32 pcie_perf_con1;
+ u32 pcie_perf_con2;
+ u32 pcie_perf_rd_max_latency_num;
+ u32 pcie_perf_rd_latency_samp_num;
+ u32 pcie_perf_rd_laterncy_acc_num;
+ u32 pcie_perf_rd_axi_total_byte;
+ u32 pcie_perf_wr_axi_total_byte;
+ u32 pcie_perf_working_cnt;
+ u32 reserved6[0x37];
+ u32 usb20_host0_con0;
+ u32 usb20_host0_con1;
+ u32 reserved7[2];
+ u32 usb20_host1_con0;
+ u32 usb20_host1_con1;
+ u32 reserved8[2];
+ u32 hsic_con0;
+ u32 hsic_con1;
+ u32 reserved9[6];
+ u32 grf_usbhost0_status;
+ u32 grf_usbhost1_Status;
+ u32 grf_hsic_status;
+ u32 reserved10[0xc9];
+ u32 hsicphy_con0;
+ u32 reserved11[3];
+ u32 usbphy0_ctrl[26];
+ u32 reserved12[6];
+ u32 usbphy1[26];
+ u32 reserved13[0x72f];
+ u32 soc_con9;
+ u32 reserved14[0x0a];
+ u32 soc_con20;
+ u32 soc_con21;
+ u32 soc_con22;
+ u32 soc_con23;
+ u32 soc_con24;
+ u32 soc_con25;
+ u32 soc_con26;
+ u32 reserved15[0xf65];
+ u32 cpu_con[4];
+ u32 reserved16[0x1c];
+ u32 cpu_status[6];
+ u32 reserved17[0x1a];
+ u32 a53_perf_con[4];
+ u32 a53_perf_rd_mon_st;
+ u32 a53_perf_rd_mon_end;
+ u32 a53_perf_wr_mon_st;
+ u32 a53_perf_wr_mon_end;
+ u32 a53_perf_rd_max_latency_num;
+ u32 a53_perf_rd_latency_samp_num;
+ u32 a53_perf_rd_laterncy_acc_num;
+ u32 a53_perf_rd_axi_total_byte;
+ u32 a53_perf_wr_axi_total_byte;
+ u32 a53_perf_working_cnt;
+ u32 a53_perf_int_status;
+ u32 reserved18[0x31];
+ u32 a72_perf_con[4];
+ u32 a72_perf_rd_mon_st;
+ u32 a72_perf_rd_mon_end;
+ u32 a72_perf_wr_mon_st;
+ u32 a72_perf_wr_mon_end;
+ u32 a72_perf_rd_max_latency_num;
+ u32 a72_perf_rd_latency_samp_num;
+ u32 a72_perf_rd_laterncy_acc_num;
+ u32 a72_perf_rd_axi_total_byte;
+ u32 a72_perf_wr_axi_total_byte;
+ u32 a72_perf_working_cnt;
+ u32 a72_perf_int_status;
+ u32 reserved19[0x7f6];
+ u32 soc_con5;
+ u32 soc_con6;
+ u32 reserved20[0x779];
+ u32 gpio2a_iomux;
+ union {
+ u32 iomux_spi2;
+ u32 gpio2b_iomux;
+ };
+ union {
+ u32 gpio2c_iomux;
+ u32 iomux_spi5;
+ };
+ u32 gpio2d_iomux;
+ union {
+ u32 gpio3a_iomux;
+ u32 iomux_spi0;
+ };
+ u32 gpio3b_iomux;
+ u32 gpio3c_iomux;
+ union {
+ u32 iomux_i2s0;
+ u32 gpio3d_iomux;
+ };
+ union {
+ u32 iomux_i2sclk;
+ u32 gpio4a_iomux;
+ };
+ union {
+ u32 iomux_sdmmc;
+ u32 iomux_uart2a;
+ u32 gpio4b_iomux;
+ };
+ union {
+ u32 iomux_pwm_0;
+ u32 iomux_pwm_1;
+ u32 iomux_uart2b;
+ u32 iomux_uart2c;
+ u32 iomux_edp_hotplug;
+ u32 gpio4c_iomux;
+ };
+ u32 gpio4d_iomux;
+ u32 reserved21[4];
+ u32 gpio2_p[3][4];
+ u32 reserved22[4];
+ u32 gpio2_sr[3][4];
+ u32 reserved23[4];
+ u32 gpio2_smt[3][4];
+ u32 reserved24[(0xe130 - 0xe0ec)/4 - 1];
+ u32 gpio4b_e01;
+ u32 gpio4b_e2;
+ u32 reserved24a[(0xe200 - 0xe134)/4 - 1];
+ u32 soc_con0;
+ u32 soc_con1;
+ u32 soc_con2;
+ u32 soc_con3;
+ u32 soc_con4;
+ u32 soc_con5_pcie;
+ u32 reserved25;
+ u32 soc_con7;
+ u32 soc_con8;
+ u32 soc_con9_pcie;
+ u32 reserved26[0x1e];
+ u32 soc_status[6];
+ u32 reserved27[0x32];
+ u32 ddrc0_con0;
+ u32 ddrc0_con1;
+ u32 ddrc1_con0;
+ u32 ddrc1_con1;
+ u32 reserved28[0xac];
+ u32 io_vsel;
+ u32 saradc_testbit;
+ u32 tsadc_testbit_l;
+ u32 tsadc_testbit_h;
+ u32 reserved29[0x6c];
+ u32 chip_id_addr;
+ u32 reserved30[0x1f];
+ u32 fast_boot_addr;
+ u32 reserved31[0x1df];
+ u32 emmccore_con[12];
+ u32 reserved32[4];
+ u32 emmccore_status[4];
+ u32 reserved33[0x1cc];
+ u32 emmcphy_con[7];
+ u32 reserved34;
+ u32 emmcphy_status;
+};
+check_member(rk3399_grf_regs, emmcphy_status, 0xf7a0);
+
+struct rk3399_pmugrf_regs {
+ union {
+ u32 iomux_pwm_3a;
+ u32 gpio0a_iomux;
+ };
+ u32 gpio0b_iomux;
+ u32 reserved0[2];
+ union {
+ u32 spi1_rxd;
+ u32 tsadc_int;
+ u32 gpio1a_iomux;
+ };
+ union {
+ u32 spi1_csclktx;
+ u32 iomux_pwm_3b;
+ u32 iomux_i2c0_sda;
+ u32 gpio1b_iomux;
+ };
+ union {
+ u32 iomux_pwm_2;
+ u32 iomux_i2c0_scl;
+ u32 gpio1c_iomux;
+ };
+ u32 gpio1d_iomux;
+ u32 reserved1[8];
+ u32 gpio0_p[2][4];
+ u32 reserved3[8];
+ u32 gpio0a_e;
+ u32 reserved4;
+ u32 gpio0b_e;
+ u32 reserved5[5];
+ u32 gpio1a_e;
+ u32 reserved6;
+ u32 gpio1b_e;
+ u32 reserved7;
+ u32 gpio1c_e;
+ u32 reserved8;
+ u32 gpio1d_e;
+ u32 reserved9[0x11];
+ u32 gpio0l_sr;
+ u32 reserved10;
+ u32 gpio1l_sr;
+ u32 gpio1h_sr;
+ u32 reserved11[4];
+ u32 gpio0a_smt;
+ u32 gpio0b_smt;
+ u32 reserved12[2];
+ u32 gpio1a_smt;
+ u32 gpio1b_smt;
+ u32 gpio1c_smt;
+ u32 gpio1d_smt;
+ u32 reserved13[8];
+ u32 gpio0l_he;
+ u32 reserved14;
+ u32 gpio1l_he;
+ u32 gpio1h_he;
+ u32 reserved15[4];
+ u32 soc_con0;
+ u32 reserved16[9];
+ u32 soc_con10;
+ u32 soc_con11;
+ u32 reserved17[0x24];
+ u32 pmupvtm_con0;
+ u32 pmupvtm_con1;
+ u32 pmupvtm_status0;
+ u32 pmupvtm_status1;
+ u32 grf_osc_e;
+ u32 reserved18[0x2b];
+ u32 os_reg0;
+ u32 os_reg1;
+ u32 os_reg2;
+ u32 os_reg3;
+};
+check_member(rk3399_pmugrf_regs, os_reg3, 0x30c);
+
+struct rk3399_pmusgrf_regs {
+ u32 ddr_rgn_con[35];
+ u32 reserved[0x1fe5];
+ u32 soc_con8;
+ u32 soc_con9;
+ u32 soc_con10;
+ u32 soc_con11;
+ u32 soc_con12;
+ u32 soc_con13;
+ u32 soc_con14;
+ u32 soc_con15;
+ u32 reserved1[3];
+ u32 soc_con19;
+ u32 soc_con20;
+ u32 soc_con21;
+ u32 soc_con22;
+ u32 reserved2[0x29];
+ u32 perilp_con[9];
+ u32 reserved4[7];
+ u32 perilp_status;
+ u32 reserved5[0xfaf];
+ u32 soc_con0;
+ u32 soc_con1;
+ u32 reserved6[0x3e];
+ u32 pmu_con[9];
+ u32 reserved7[0x17];
+ u32 fast_boot_addr;
+ u32 reserved8[0x1f];
+ u32 efuse_prg_mask;
+ u32 efuse_read_mask;
+ u32 reserved9[0x0e];
+ u32 pmu_slv_con0;
+ u32 pmu_slv_con1;
+ u32 reserved10[0x771];
+ u32 soc_con3;
+ u32 soc_con4;
+ u32 soc_con5;
+ u32 soc_con6;
+ u32 soc_con7;
+ u32 reserved11[8];
+ u32 soc_con16;
+ u32 soc_con17;
+ u32 soc_con18;
+ u32 reserved12[0xdd];
+ u32 slv_secure_con0;
+ u32 slv_secure_con1;
+ u32 reserved13;
+ u32 slv_secure_con2;
+ u32 slv_secure_con3;
+ u32 slv_secure_con4;
+};
+check_member(rk3399_pmusgrf_regs, slv_secure_con4, 0xe3d4);
+
+#endif /* __SOC_ROCKCHIP_RK3399_GRF_H__ */
diff --git a/arch/arm/include/asm/arch-rockchip/sdram.h b/arch/arm/include/asm/arch-rockchip/sdram.h
index e08e28f..82c3d07 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram.h
@@ -24,12 +24,16 @@
u8 row_3_4;
u8 cs0_row;
u8 cs1_row;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
/*
* For of-platdata, which would otherwise convert this into two
* byte-swapped integers. With a size of 9 bytes, this struct will
* appear in of-platdata as a byte array.
+ *
+ * If OF_PLATDATA enabled, need to add a dummy byte in dts.(i.e 0xff)
*/
u8 dummy;
+#endif
};
struct rk3288_sdram_pctl_timing {
diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
new file mode 100644
index 0000000..35423e1
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -0,0 +1,10 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co.,Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SYS_PROTO_H
+#define _ASM_ARCH_SYS_PROTO_H
+
+#endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/arch/arm/include/asm/arch-sunxi/usb_phy.h b/arch/arm/include/asm/arch-sunxi/usb_phy.h
index 6a14cad..cef6c98 100644
--- a/arch/arm/include/asm/arch-sunxi/usb_phy.h
+++ b/arch/arm/include/asm/arch-sunxi/usb_phy.h
@@ -16,7 +16,6 @@
void sunxi_usb_phy_exit(int index);
void sunxi_usb_phy_power_on(int index);
void sunxi_usb_phy_power_off(int index);
-int sunxi_usb_phy_power_is_on(int index);
int sunxi_usb_phy_vbus_detect(int index);
int sunxi_usb_phy_id_detect(int index);
void sunxi_usb_phy_enable_squelch_detect(int index, int enable);
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index 35964d6..456c1b0 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -25,6 +25,13 @@
#define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000
#define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000
+#define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT 0
+#define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT 8
+
+#define PS_MODE0 BIT(0)
+#define PS_MODE1 BIT(1)
+#define PS_MODE2 BIT(2)
+#define PS_MODE3 BIT(3)
struct crlapb_regs {
u32 reserved0[36];
@@ -35,7 +42,9 @@
u32 boot_mode; /* 0x200 */
u32 reserved3[14];
u32 rst_lpd_top; /* 0x23C */
- u32 reserved4[26];
+ u32 reserved4[4];
+ u32 boot_pin_ctrl; /* 0x250 */
+ u32 reserved5[21];
};
#define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR)
@@ -69,7 +78,10 @@
#define SD_MODE1 0x00000005 /* sd 1 */
#define NAND_MODE 0x00000004
#define EMMC_MODE 0x00000006
+#define USB_MODE 0x00000007
#define JTAG_MODE 0x00000000
+#define BOOT_MODE_USE_ALT 0x100
+#define BOOT_MODE_ALT_SHIFT 12
#define ZYNQMP_IOU_SLCR_BASEADDR 0xFF180000
diff --git a/arch/arm/include/asm/errno.h b/arch/arm/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/arm/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index 6b9d3e4..4525287 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -26,13 +26,8 @@
#define CONFIG_FSL_CAAM
#endif
-#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_DM 1
-#define CONFIG_SPL_CRYPTO_SUPPORT
-#define CONFIG_SPL_HASH_SUPPORT
-#define CONFIG_SPL_RSA
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#ifdef CONFIG_SPL_BUILD
/*
* Define the key hash for U-Boot here if public/private key pair used to
* sign U-boot are different from the SRK hash put in the fuse
diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index 19c38f4..6f312d6 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -28,6 +28,7 @@
BOOT_DEVICE_SATA,
BOOT_DEVICE_I2C,
BOOT_DEVICE_BOARD,
+ BOOT_DEVICE_DFU,
BOOT_DEVICE_NONE
};
#endif
diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c
index 76fcada..2e55953 100644
--- a/arch/arm/mach-at91/armv7/clock.c
+++ b/arch/arm/mach-at91/armv7/clock.c
@@ -11,7 +11,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pmc.h>
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 6d2a7b7..5a32bdb 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -10,7 +10,7 @@
#define __ASM_ARCH_AT91_GPIO_H
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index c25fcf3..ce2a16f 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -61,6 +61,15 @@
if ARCH_EXYNOS5
+config SPL_GPIO_SUPPORT
+ default y
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
choice
prompt "EXYNOS5 board select"
diff --git a/arch/arm/mach-keystone/psc.c b/arch/arm/mach-keystone/psc.c
index ff042a6..bbea74a 100644
--- a/arch/arm/mach-keystone/psc.c
+++ b/arch/arm/mach-keystone/psc.c
@@ -8,7 +8,7 @@
*/
#include <common.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/arch/psc_defs.h>
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 220886a..0fd71a7 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -21,7 +21,7 @@
bool
select ARMADA_XP
-config DB_88F6820_GP
+config 88F6820
bool
select ARMADA_38X
@@ -31,7 +31,7 @@
config TARGET_CLEARFOG
bool "Support ClearFog"
- select DB_88F6820_GP
+ select 88F6820
config TARGET_DB_88F6720
bool "Support DB-88F6720 Armada 375"
@@ -39,7 +39,11 @@
config TARGET_DB_88F6820_GP
bool "Support DB-88F6820-GP"
- select DB_88F6820_GP
+ select 88F6820
+
+config TARGET_DB_88F6820_AMC
+ bool "Support DB-88F6820-AMC"
+ select 88F6820
config TARGET_DB_MV784MP_GP
bool "Support db-mv784mp-gp"
@@ -63,6 +67,7 @@
default "clearfog" if TARGET_CLEARFOG
default "db-88f6720" if TARGET_DB_88F6720
default "db-88f6820-gp" if TARGET_DB_88F6820_GP
+ default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
default "ds414" if TARGET_DS414
default "maxbcm" if TARGET_MAXBCM
@@ -72,6 +77,7 @@
default "clearfog" if TARGET_CLEARFOG
default "db-88f6720" if TARGET_DB_88F6720
default "db-88f6820-gp" if TARGET_DB_88F6820_GP
+ default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
default "ds414" if TARGET_DS414
default "maxbcm" if TARGET_MAXBCM
@@ -81,6 +87,7 @@
default "Marvell" if TARGET_DB_MV784MP_GP
default "Marvell" if TARGET_DB_88F6720
default "Marvell" if TARGET_DB_88F6820_GP
+ default "Marvell" if TARGET_DB_88F6820_AMC
default "solidrun" if TARGET_CLEARFOG
default "Synology" if TARGET_DS414
diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c
index df263bc..c4128cd 100644
--- a/arch/arm/mach-mvebu/mbus.c
+++ b/arch/arm/mach-mvebu/mbus.c
@@ -48,7 +48,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
index 49d704a..cc3e5e2 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
@@ -45,7 +45,7 @@
u32 mv_board_id_get(void)
{
-#if defined(CONFIG_DB_88F6820_GP)
+#if defined(CONFIG_TARGET_DB_88F6820_GP)
return DB_GP_68XX_ID;
#else
/*
diff --git a/arch/arm/mach-rmobile/emac.c b/arch/arm/mach-rmobile/emac.c
index 0710cfd..e45244c 100644
--- a/arch/arm/mach-rmobile/emac.c
+++ b/arch/arm/mach-rmobile/emac.c
@@ -8,7 +8,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <netdev.h>
int cpu_eth_init(bd_t *bis)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index bec756d..6c36bf9 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -81,10 +81,6 @@
}
#endif
-void lowlevel_init(void)
-{
-}
-
#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
#include <usb.h>
#include <usb/dwc2_udc.h>
diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig
index 0804714..9263608 100644
--- a/arch/arm/mach-rockchip/rk3036/Kconfig
+++ b/arch/arm/mach-rockchip/rk3036/Kconfig
@@ -12,6 +12,9 @@
config SYS_MALLOC_F_LEN
default 0x400
+config SPL_SERIAL_SUPPORT
+ default y
+
source "board/rockchip/evb_rk3036/Kconfig"
source "board/rockchip/kylin_rk3036/Kconfig"
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index e0d92a6..ae509ff 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -280,7 +280,3 @@
/* No way to report error here */
hang();
}
-
-void lowlevel_init(void)
-{
-}
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index b4113e0..94863a9 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -72,6 +72,21 @@
config SYS_MALLOC_F_LEN
default 0x0800
+config SPL_DRIVERS_MISC_SUPPORT
+ default y
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_MMC_SUPPORT
+ default y
+
+config SPL_SERIAL_SUPPORT
+ default y
+
source "board/chipspark/popmetal_rk3288/Kconfig"
source "board/firefly/firefly-rk3288/Kconfig"
diff --git a/arch/arm/mach-rockchip/rk3288/Makefile b/arch/arm/mach-rockchip/rk3288/Makefile
index 5ec3f0d..b5b28ef 100644
--- a/arch/arm/mach-rockchip/rk3288/Makefile
+++ b/arch/arm/mach-rockchip/rk3288/Makefile
@@ -5,5 +5,6 @@
#
obj-y += clk_rk3288.o
+obj-y += rk3288.o
obj-y += sdram_rk3288.o
obj-y += syscon_rk3288.o
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
new file mode 100644
index 0000000..92f34bb
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+#define GRF_SOC_CON2 0x24c
+
+int arch_cpu_init(void)
+{
+ /* We do some SoC one time setting here. */
+
+ /* Use rkpwm by default */
+ rk_setreg(GRF_SOC_CON2, 1 << 0);
+
+ return 0;
+}
diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index 2d81c55..2cef68b 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -11,6 +11,7 @@
static const struct udevice_id rk3399_syscon_ids[] = {
{ .compatible = "rockchip,rk3399-grf", .data = ROCKCHIP_SYSCON_GRF },
+ { .compatible = "rockchip,rk3399-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
};
U_BOOT_DRIVER(syscon_rk3399) = {
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 1a43c7b..d91b8bb 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -1,5 +1,32 @@
if ARCH_SOCFPGA
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBDISK_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_MMC_SUPPORT
+ default y if DM_MMC
+
+config SPL_NAND_SUPPORT
+ default y if SPL_NAND_DENALI
+
+config SPL_SERIAL_SUPPORT
+ default y
+
+config SPL_SPI_FLASH_SUPPORT
+ default y if SPL_SPI_SUPPORT
+
+config SPL_SPI_SUPPORT
+ default y if DM_SPI
+
+config SPL_WATCHDOG_SUPPORT
+ default y
+
config TARGET_SOCFPGA_ARRIA5
bool
select TARGET_SOCFPGA_GEN5
diff --git a/arch/arm/mach-socfpga/fpga_manager.c b/arch/arm/mach-socfpga/fpga_manager.c
index 43fd2fe..f909573 100644
--- a/arch/arm/mach-socfpga/fpga_manager.c
+++ b/arch/arm/mach-socfpga/fpga_manager.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/fpga_manager.h>
#include <asm/arch/reset_manager.h>
#include <asm/arch/system_manager.h>
diff --git a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c
index 2b16795..71d5d99 100644
--- a/arch/arm/mach-socfpga/freeze_controller.c
+++ b/arch/arm/mach-socfpga/freeze_controller.c
@@ -9,7 +9,7 @@
#include <asm/io.h>
#include <asm/arch/clock_manager.h>
#include <asm/arch/freeze_controller.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c
index f9993d2..bd1bbee 100644
--- a/arch/arm/mach-sunxi/usb_phy.c
+++ b/arch/arm/mach-sunxi/usb_phy.c
@@ -296,13 +296,6 @@
gpio_set_value(phy->gpio_vbus, 0);
}
-int sunxi_usb_phy_power_is_on(int index)
-{
- struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
-
- return phy->power_on_count > 0;
-}
-
int sunxi_usb_phy_vbus_detect(int index)
{
struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 1eaf406..76909ee 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -1,5 +1,17 @@
if TEGRA
+config SPL_GPIO_SUPPORT
+ default y
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_SERIAL_SUPPORT
+ default y
+
config TEGRA_IVC
bool "Tegra IVC protocol"
help
diff --git a/arch/arm/mach-tegra/tegra20/crypto.c b/arch/arm/mach-tegra/tegra20/crypto.c
index ec95d7c..1b82fbb 100644
--- a/arch/arm/mach-tegra/tegra20/crypto.c
+++ b/arch/arm/mach-tegra/tegra20/crypto.c
@@ -6,7 +6,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "crypto.h"
#include "aes.h"
diff --git a/arch/arm/mach-tegra/tegra20/warmboot.c b/arch/arm/mach-tegra/tegra20/warmboot.c
index 5fdc4bb..6aef6d3 100644
--- a/arch/arm/mach-tegra/tegra20/warmboot.c
+++ b/arch/arm/mach-tegra/tegra20/warmboot.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/clock.h>
#include <asm/arch/emc.h>
#include <asm/arch/gp_padctrl.h>
diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index 774ea99..ae78548 100644
--- a/arch/arm/mach-uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -4,28 +4,25 @@
ifdef CONFIG_SPL_BUILD
-obj-y += init/ bcu/ memconf/ pll/ early-clk/ early-pinctrl/
+obj-y += init/ bcu/ memconf/
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/
else
-obj-$(CONFIG_BOARD_EARLY_INIT_F) += board_early_init_f.o
obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o
-obj-$(CONFIG_MISC_INIT_F) += print_misc_info.o
obj-y += dram_init.o
-obj-y += board_common.o
-obj-$(CONFIG_BOARD_EARLY_INIT_R) += board_early_init_r.o
+obj-y += board_init.o
obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o
obj-y += reset.o
-obj-y += pinctrl/ clk/
-
endif
obj-y += boards.o
obj-y += soc_info.o
obj-y += boot-mode/
+obj-y += clk/
obj-y += dram/
+obj-y += pinctrl-glue.o
obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o
obj-$(CONFIG_DEBUG_UART_UNIPHIER) += debug-uart/
diff --git a/arch/arm/mach-uniphier/board_common.c b/arch/arm/mach-uniphier/board_common.c
deleted file mode 100644
index 330d690..0000000
--- a/arch/arm/mach-uniphier/board_common.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-
-#include "micro-support-card.h"
-
-void uniphier_smp_kick_all_cpus(void);
-
-int board_init(void)
-{
- led_puts("Uboo");
-#ifdef CONFIG_ARM64
- uniphier_smp_kick_all_cpus();
-#endif
- return 0;
-}
diff --git a/arch/arm/mach-uniphier/board_early_init_r.c b/arch/arm/mach-uniphier/board_early_init_r.c
deleted file mode 100644
index b26da36..0000000
--- a/arch/arm/mach-uniphier/board_early_init_r.c
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-
-#include "micro-support-card.h"
-
-int board_early_init_r(void)
-{
- support_card_late_init();
- return 0;
-}
diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_init.c
similarity index 60%
rename from arch/arm/mach-uniphier/board_early_init_f.c
rename to arch/arm/mach-uniphier/board_init.c
index d35d38d..b9be52f 100644
--- a/arch/arm/mach-uniphier/board_early_init_f.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -1,5 +1,7 @@
/*
- * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2012-2015 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -10,6 +12,7 @@
#include "init.h"
#include "micro-support-card.h"
+#include "sg-regs.h"
#include "soc-info.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -45,71 +48,99 @@
writel(tmp, 0x55000090);
}
-int board_early_init_f(void)
+static void uniphier_nand_pin_init(bool cs2)
{
+#ifdef CONFIG_NAND_DENALI
+ if (uniphier_pin_init(cs2 ? "nand2cs_grp" : "nand_grp"))
+ pr_err("failed to init NAND pins\n");
+#endif
+}
+
+int board_init(void)
+{
+ const struct uniphier_board_data *bd;
+
led_puts("U0");
+ bd = uniphier_get_board_param();
+ if (!bd)
+ return -ENODEV;
+
switch (uniphier_get_soc_type()) {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
case SOC_UNIPHIER_SLD3:
- uniphier_sld3_pin_init();
+ uniphier_nand_pin_init(true);
led_puts("U1");
+ uniphier_sld3_pll_init();
uniphier_ld4_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
case SOC_UNIPHIER_LD4:
- uniphier_ld4_pin_init();
+ uniphier_nand_pin_init(true);
led_puts("U1");
+ uniphier_ld4_pll_init();
uniphier_ld4_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
case SOC_UNIPHIER_PRO4:
- uniphier_pro4_pin_init();
+ uniphier_nand_pin_init(false);
led_puts("U1");
+ uniphier_pro4_pll_init();
uniphier_pro4_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
case SOC_UNIPHIER_SLD8:
- uniphier_sld8_pin_init();
+ uniphier_nand_pin_init(true);
led_puts("U1");
+ uniphier_ld4_pll_init();
uniphier_ld4_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
case SOC_UNIPHIER_PRO5:
- uniphier_pro5_pin_init();
+ uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_pro5_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
case SOC_UNIPHIER_PXS2:
- uniphier_pxs2_pin_init();
+ uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_pxs2_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
case SOC_UNIPHIER_LD6B:
- uniphier_ld6b_pin_init();
+ uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_pxs2_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
case SOC_UNIPHIER_LD11:
- uniphier_ld20_pin_init();
+ uniphier_nand_pin_init(false);
+ sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
+ sg_set_iectrl(149);
+ sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
+ sg_set_iectrl(153);
led_puts("U1");
+ uniphier_ld11_pll_init();
uniphier_ld11_clk_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
case SOC_UNIPHIER_LD20:
- uniphier_ld20_pin_init();
+ uniphier_nand_pin_init(false);
+ sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
+ sg_set_iectrl(149);
+ sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
+ sg_set_iectrl(153);
led_puts("U1");
+ uniphier_ld20_pll_init(bd);
uniphier_ld20_clk_init();
cci500_init(2);
break;
@@ -122,5 +153,15 @@
led_puts("U2");
+ support_card_late_init();
+
+ led_puts("U3");
+
+#ifdef CONFIG_ARM64
+ uniphier_smp_kick_all_cpus();
+#endif
+
+ led_puts("Uboo");
+
return 0;
}
diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c
index 20093d8..79b1d20 100644
--- a/arch/arm/mach-uniphier/boards.c
+++ b/arch/arm/mach-uniphier/boards.c
@@ -184,6 +184,27 @@
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
+static const struct uniphier_board_data uniphier_ld20_ref_data = {
+ .dram_freq = 1866,
+ .dram_nr_ch = 3,
+ .dram_ch[0] = {
+ .base = 0x80000000,
+ .size = 0x40000000,
+ .width = 32,
+ },
+ .dram_ch[1] = {
+ .base = 0xc0000000,
+ .size = 0x40000000,
+ .width = 32,
+ },
+ .dram_ch[2] = {
+ .base = 0x100000000UL,
+ .size = 0x40000000,
+ .width = 32,
+ },
+ .flags = UNIPHIER_BD_BOARD_LD20_REF,
+};
+
static const struct uniphier_board_data uniphier_ld20_data = {
.dram_freq = 1866,
.dram_nr_ch = 3,
@@ -202,6 +223,7 @@
.size = 0x40000000,
.width = 32,
},
+ .flags = UNIPHIER_BD_BOARD_LD20_GLOBAL,
};
static const struct uniphier_board_data uniphier_ld21_data = {
@@ -209,7 +231,7 @@
.dram_nr_ch = 2,
.dram_ch[0] = {
.base = 0x80000000,
- .size = 0x40000000,
+ .size = 0x20000000,
.width = 32,
},
.dram_ch[1] = {
@@ -217,7 +239,7 @@
.size = 0x40000000,
.width = 32,
},
- .flags = UNIPHIER_BD_PACKAGE_LD21,
+ .flags = UNIPHIER_BD_BOARD_LD21_GLOBAL,
};
#endif
@@ -255,6 +277,7 @@
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
{ "socionext,ph1-ld21", &uniphier_ld21_data, },
+ { "socionext,ph1-ld20-ref", &uniphier_ld20_ref_data, },
{ "socionext,ph1-ld20", &uniphier_ld20_data, },
#endif
};
diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile
index 1428e0c..95f433e 100644
--- a/arch/arm/mach-uniphier/clk/Makefile
+++ b/arch/arm/mach-uniphier/clk/Makefile
@@ -2,12 +2,31 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += clk-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-pro4.o
-obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o
+ifdef CONFIG_SPL_BUILD
+
+obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-clk-ld4.o dpll-sld3.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD4) += early-clk-ld4.o dpll-ld4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += early-clk-ld4.o dpll-pro4.o
+obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += early-clk-ld4.o dpll-sld8.o
+obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += early-clk-pro5.o
+obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += early-clk-pxs2.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += early-clk-pxs2.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD11) += early-clk-ld11.o dpll-ld11.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD20) += early-clk-ld20.o dpll-ld20.o
+
+else
+
+obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += clk-ld4.o pll-sld3.o dpll-tail.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o pll-ld4.o dpll-tail.o
+obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-pro4.o pll-pro4.o dpll-tail.o
+obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o pll-ld4.o dpll-tail.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-ld20.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o pll-ld11.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-ld20.o pll-ld20.o
+
+endif
+
+obj-$(CONFIG_ARCH_UNIPHIER_LD11) += pll-base-ld20.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pll-base-ld20.o
diff --git a/arch/arm/mach-uniphier/clk/dpll-ld11.c b/arch/arm/mach-uniphier/clk/dpll-ld11.c
new file mode 100644
index 0000000..7f0677c
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/dpll-ld11.c
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "../init.h"
+#include "../sc64-regs.h"
+#include "pll.h"
+
+int uniphier_ld11_dpll_init(const struct uniphier_board_data *bd)
+{
+ uniphier_ld20_sscpll_init(SC_DPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2);
+
+ return 0;
+}
diff --git a/arch/arm/mach-uniphier/clk/dpll-ld20.c b/arch/arm/mach-uniphier/clk/dpll-ld20.c
new file mode 100644
index 0000000..1132313
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/dpll-ld20.c
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "../init.h"
+#include "../sc64-regs.h"
+#include "pll.h"
+
+int uniphier_ld20_dpll_init(const struct uniphier_board_data *bd)
+{
+ unsigned int dpll_ssc_rate = UNIPHIER_BD_DPLL_SSC_GET_RATE(bd->flags);
+ unsigned int dram_freq = bd->dram_freq;
+
+ uniphier_ld20_sscpll_init(SC_DPLL0CTRL, dram_freq, dpll_ssc_rate, 2);
+ uniphier_ld20_sscpll_init(SC_DPLL1CTRL, dram_freq, dpll_ssc_rate, 2);
+ uniphier_ld20_sscpll_init(SC_DPLL2CTRL, dram_freq, dpll_ssc_rate, 2);
+
+ return 0;
+}
diff --git a/arch/arm/mach-uniphier/clk/dpll-ld4.c b/arch/arm/mach-uniphier/clk/dpll-ld4.c
new file mode 100644
index 0000000..a40b30d
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/dpll-ld4.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2013-2014 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include "../init.h"
+#include "../sc-regs.h"
+
+#undef DPLL_SSC_RATE_1PER
+
+int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd)
+{
+ unsigned int dram_freq = bd->dram_freq;
+ u32 tmp;
+
+ /*
+ * Set Frequency
+ * Set 0xc(1600MHz)/0xd(1333MHz)/0xe(1066MHz)
+ * to FOUT (DPLLCTRL.bit[29:20])
+ */
+ tmp = readl(SC_DPLLCTRL);
+ tmp &= ~0x000f0000;
+ switch (dram_freq) {
+ case 1333:
+ tmp |= 0x000d0000;
+ break;
+ case 1600:
+ tmp |= 0x000c0000;
+ break;
+ default:
+ pr_err("Unsupported frequency");
+ return -EINVAL;
+ }
+
+#if defined(DPLL_SSC_RATE_1PER)
+ tmp &= ~SC_DPLLCTRL_SSC_RATE;
+#else
+ tmp |= SC_DPLLCTRL_SSC_RATE;
+#endif
+ writel(tmp, SC_DPLLCTRL);
+
+ tmp = readl(SC_DPLLCTRL2);
+ tmp |= SC_DPLLCTRL2_NRSTDS;
+ writel(tmp, SC_DPLLCTRL2);
+
+ /* Wait 500 usec until dpll gets stable */
+ udelay(500);
+
+ return 0;
+}
diff --git a/arch/arm/mach-uniphier/clk/dpll-pro4.c b/arch/arm/mach-uniphier/clk/dpll-pro4.c
new file mode 100644
index 0000000..3ac48d6
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/dpll-pro4.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2013-2014 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include "../init.h"
+#include "../sc-regs.h"
+
+#undef DPLL_SSC_RATE_1PER
+
+int uniphier_pro4_dpll_init(const struct uniphier_board_data *bd)
+{
+ unsigned int dram_freq = bd->dram_freq;
+ u32 tmp;
+
+ /*
+ * Set Frequency
+ * Set 0xc(1600MHz)/0xd(1333MHz)/0xe(1066MHz)
+ * to FOUT ( DPLLCTRL.bit[29:20] )
+ */
+ tmp = readl(SC_DPLLCTRL);
+ tmp &= ~(0x000f0000);
+ switch (dram_freq) {
+ case 1333:
+ tmp |= 0x000d0000;
+ break;
+ case 1600:
+ tmp |= 0x000c0000;
+ break;
+ default:
+ pr_err("Unsupported frequency");
+ return -EINVAL;
+ }
+
+ /*
+ * Set Moduration rate
+ * Set 0x0(1%)/0x1(2%) to SSC_RATE(DPLLCTRL.bit[15])
+ */
+#if defined(DPLL_SSC_RATE_1PER)
+ tmp &= ~0x00008000;
+#else
+ tmp |= 0x00008000;
+#endif
+ writel(tmp, SC_DPLLCTRL);
+
+ tmp = readl(SC_DPLLCTRL2);
+ tmp |= SC_DPLLCTRL2_NRSTDS;
+ writel(tmp, SC_DPLLCTRL2);
+
+ /* Wait until dpll gets stable */
+ udelay(500);
+
+ return 0;
+}
diff --git a/arch/arm/mach-uniphier/pll/pll-init-sld3.c b/arch/arm/mach-uniphier/clk/dpll-sld3.c
similarity index 73%
rename from arch/arm/mach-uniphier/pll/pll-init-sld3.c
rename to arch/arm/mach-uniphier/clk/dpll-sld3.c
index 5b4f2e3..0eb310c 100644
--- a/arch/arm/mach-uniphier/pll/pll-init-sld3.c
+++ b/arch/arm/mach-uniphier/clk/dpll-sld3.c
@@ -6,7 +6,7 @@
#include "../init.h"
-int uniphier_sld3_pll_init(const struct uniphier_board_data *bd)
+int uniphier_sld3_dpll_init(const struct uniphier_board_data *bd)
{
/* add pll init code here */
return 0;
diff --git a/arch/arm/mach-uniphier/clk/dpll-sld8.c b/arch/arm/mach-uniphier/clk/dpll-sld8.c
new file mode 100644
index 0000000..7faa5e8
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/dpll-sld8.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2013-2014 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/io.h>
+
+#include "../init.h"
+#include "../sc-regs.h"
+
+int uniphier_sld8_dpll_init(const struct uniphier_board_data *bd)
+{
+ u32 tmp;
+ /*
+ * Set DPLL SSC parameters for DPLLCTRL3
+ * [23] DIVN_TEST 0x1
+ * [22:16] DIVN 0x50
+ * [10] FREFSEL_TEST 0x1
+ * [9:8] FREFSEL 0x2
+ * [4] ICPD_TEST 0x1
+ * [3:0] ICPD 0xb
+ */
+ tmp = readl(SC_DPLLCTRL3);
+ tmp &= ~0x00ff0717;
+ tmp |= 0x00d0061b;
+ writel(tmp, SC_DPLLCTRL3);
+
+ /*
+ * Set DPLL SSC parameters for DPLLCTRL
+ * <-1%> <-2%>
+ * [29:20] SSC_UPCNT 132 (0x084) 132 (0x084)
+ * [14:0] SSC_dK 6335(0x18bf) 12710(0x31a6)
+ */
+ tmp = readl(SC_DPLLCTRL);
+ tmp &= ~0x3ff07fff;
+#ifdef DPLL_SSC_RATE_1PER
+ tmp |= 0x084018bf;
+#else
+ tmp |= 0x084031a6;
+#endif
+ writel(tmp, SC_DPLLCTRL);
+
+ /*
+ * Set DPLL SSC parameters for DPLLCTRL2
+ * [31:29] SSC_STEP 0
+ * [27] SSC_REG_REF 1
+ * [26:20] SSC_M 79 (0x4f)
+ * [19:0] SSC_K 964689 (0xeb851)
+ */
+ tmp = readl(SC_DPLLCTRL2);
+ tmp &= ~0xefffffff;
+ tmp |= 0x0cfeb851;
+ writel(tmp, SC_DPLLCTRL2);
+
+ /* Wait 500 usec until dpll gets stable */
+ udelay(500);
+
+ return 0;
+}
diff --git a/arch/arm/mach-uniphier/clk/dpll-tail.c b/arch/arm/mach-uniphier/clk/dpll-tail.c
new file mode 100644
index 0000000..2b88490
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/dpll-tail.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <linux/io.h>
+
+#include "../sc-regs.h"
+#include "pll.h"
+
+void uniphier_ld4_dpll_ssc_en(void)
+{
+ u32 tmp;
+
+ tmp = readl(SC_DPLLCTRL);
+ tmp |= SC_DPLLCTRL_SSC_EN;
+ writel(tmp, SC_DPLLCTRL);
+}
diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ld11.c b/arch/arm/mach-uniphier/clk/early-clk-ld11.c
similarity index 100%
rename from arch/arm/mach-uniphier/early-clk/early-clk-ld11.c
rename to arch/arm/mach-uniphier/clk/early-clk-ld11.c
diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ld20.c b/arch/arm/mach-uniphier/clk/early-clk-ld20.c
similarity index 100%
rename from arch/arm/mach-uniphier/early-clk/early-clk-ld20.c
rename to arch/arm/mach-uniphier/clk/early-clk-ld20.c
diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ld4.c b/arch/arm/mach-uniphier/clk/early-clk-ld4.c
similarity index 100%
rename from arch/arm/mach-uniphier/early-clk/early-clk-ld4.c
rename to arch/arm/mach-uniphier/clk/early-clk-ld4.c
diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-pro5.c b/arch/arm/mach-uniphier/clk/early-clk-pro5.c
similarity index 100%
rename from arch/arm/mach-uniphier/early-clk/early-clk-pro5.c
rename to arch/arm/mach-uniphier/clk/early-clk-pro5.c
diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c b/arch/arm/mach-uniphier/clk/early-clk-pxs2.c
similarity index 100%
rename from arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c
rename to arch/arm/mach-uniphier/clk/early-clk-pxs2.c
diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c b/arch/arm/mach-uniphier/clk/pll-base-ld20.c
new file mode 100644
index 0000000..a5027d2
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/pll-base-ld20.c
@@ -0,0 +1,123 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/bitops.h>
+#include <linux/io.h>
+#include <linux/sizes.h>
+
+#include "pll.h"
+
+/* PLL type: SSC */
+#define SC_PLLCTRL_SSC_DK_MASK GENMASK(14, 0)
+#define SC_PLLCTRL_SSC_EN BIT(31)
+#define SC_PLLCTRL2_NRSTDS BIT(28)
+#define SC_PLLCTRL2_SSC_JK_MASK GENMASK(26, 0)
+
+/* PLL type: VPLL27 */
+#define SC_VPLL27CTRL_WP BIT(0)
+#define SC_VPLL27CTRL3_K_LD BIT(28)
+
+/* PLL type: DSPLL */
+#define SC_DSPLLCTRL2_K_LD BIT(28)
+
+int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq,
+ unsigned int ssc_rate, unsigned int divn)
+{
+ void __iomem *base;
+ u32 tmp;
+
+ base = ioremap(reg_base, SZ_16);
+ if (!base)
+ return -ENOMEM;
+
+ if (freq != UNIPHIER_PLL_FREQ_DEFAULT) {
+ tmp = readl(base); /* SSCPLLCTRL */
+ tmp &= ~SC_PLLCTRL_SSC_DK_MASK;
+ tmp |= (487 * freq * ssc_rate / divn / 512) &
+ SC_PLLCTRL_SSC_DK_MASK;
+ writel(tmp, base);
+
+ tmp = readl(base + 4);
+ tmp &= ~SC_PLLCTRL2_SSC_JK_MASK;
+ tmp |= (41859 * freq / divn) & SC_PLLCTRL2_SSC_JK_MASK;
+
+ udelay(50);
+ }
+
+ tmp = readl(base + 4); /* SSCPLLCTRL2 */
+ tmp |= SC_PLLCTRL2_NRSTDS;
+ writel(tmp, base + 4);
+
+ iounmap(base);
+
+ return 0;
+}
+
+int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base)
+{
+ void __iomem *base;
+ u32 tmp;
+
+ base = ioremap(reg_base, SZ_16);
+ if (!base)
+ return -ENOMEM;
+
+ mdelay(1);
+
+ tmp = readl(base); /* SSCPLLCTRL */
+ tmp |= SC_PLLCTRL_SSC_EN;
+ writel(tmp, base);
+
+ iounmap(base);
+
+ return 0;
+}
+
+int uniphier_ld20_vpll27_init(unsigned long reg_base)
+{
+ void __iomem *base;
+ u32 tmp;
+
+ base = ioremap(reg_base, SZ_16);
+ if (!base)
+ return -ENOMEM;
+
+ tmp = readl(base); /* VPLL27CTRL */
+ tmp |= SC_VPLL27CTRL_WP; /* write protect off */
+ writel(tmp, base);
+
+ tmp = readl(base + 8); /* VPLL27CTRL3 */
+ tmp |= SC_VPLL27CTRL3_K_LD;
+ writel(tmp, base + 8);
+
+ tmp = readl(base); /* VPLL27CTRL */
+ tmp &= ~SC_VPLL27CTRL_WP; /* write protect on */
+ writel(tmp, base);
+
+ iounmap(base);
+
+ return 0;
+}
+
+int uniphier_ld20_dspll_init(unsigned long reg_base)
+{
+ void __iomem *base;
+ u32 tmp;
+
+ base = ioremap(reg_base, SZ_16);
+ if (!base)
+ return -ENOMEM;
+
+ tmp = readl(base + 8); /* DSPLLCTRL2 */
+ tmp |= SC_DSPLLCTRL2_K_LD;
+ writel(tmp, base + 8);
+
+ iounmap(base);
+
+ return 0;
+}
diff --git a/arch/arm/mach-uniphier/clk/pll-ld11.c b/arch/arm/mach-uniphier/clk/pll-ld11.c
new file mode 100644
index 0000000..8a4a748
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/pll-ld11.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/io.h>
+
+#include "../init.h"
+#include "../sc64-regs.h"
+#include "pll.h"
+
+void uniphier_ld11_pll_init(void)
+{
+ uniphier_ld20_sscpll_init(SC_CPLLCTRL, 1960, 1, 2); /* 2000MHz -> 1960MHz */
+ /* do nothing for SPLL */
+ uniphier_ld20_sscpll_init(SC_MPLLCTRL, 1600, 1, 2); /* 1500MHz -> 1600MHz */
+ uniphier_ld20_sscpll_init(SC_VSPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2);
+
+ mdelay(1);
+
+ uniphier_ld20_sscpll_ssc_en(SC_CPLLCTRL);
+ uniphier_ld20_sscpll_ssc_en(SC_MPLLCTRL);
+ uniphier_ld20_sscpll_ssc_en(SC_VSPLLCTRL);
+
+ uniphier_ld20_vpll27_init(SC_VPLL27FCTRL);
+ uniphier_ld20_vpll27_init(SC_VPLL27ACTRL);
+
+ writel(0, SC_CA53_GEARSET); /* Gear0: CPLL/2 */
+ writel(SC_CA_GEARUPD, SC_CA53_GEARUPD);
+}
diff --git a/arch/arm/mach-uniphier/clk/pll-ld20.c b/arch/arm/mach-uniphier/clk/pll-ld20.c
new file mode 100644
index 0000000..5e545da
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/pll-ld20.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include "../init.h"
+#include "../sc64-regs.h"
+#include "pll.h"
+
+int uniphier_ld20_pll_init(const struct uniphier_board_data *bd)
+{
+ unsigned int dpll_ssc_rate = UNIPHIER_BD_DPLL_SSC_GET_RATE(bd->flags);
+
+ uniphier_ld20_sscpll_init(SC_CPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4);
+ /* do nothing for SPLL */
+ uniphier_ld20_sscpll_init(SC_SPLL2CTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4);
+ uniphier_ld20_sscpll_init(SC_MPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2);
+ uniphier_ld20_sscpll_init(SC_VPPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4);
+ uniphier_ld20_sscpll_init(SC_GPPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2);
+
+ mdelay(1);
+
+ if (dpll_ssc_rate > 0) {
+ uniphier_ld20_sscpll_ssc_en(SC_DPLL0CTRL);
+ uniphier_ld20_sscpll_ssc_en(SC_DPLL1CTRL);
+ uniphier_ld20_sscpll_ssc_en(SC_DPLL2CTRL);
+ }
+
+ uniphier_ld20_vpll27_init(SC_VPLL27FCTRL);
+ uniphier_ld20_vpll27_init(SC_VPLL27ACTRL);
+
+ uniphier_ld20_dspll_init(SC_VPLL8KCTRL);
+ uniphier_ld20_dspll_init(SC_A2PLLCTRL);
+
+ return 0;
+}
diff --git a/arch/arm/mach-uniphier/pll/pll-init-ld4.c b/arch/arm/mach-uniphier/clk/pll-ld4.c
similarity index 76%
rename from arch/arm/mach-uniphier/pll/pll-init-ld4.c
rename to arch/arm/mach-uniphier/clk/pll-ld4.c
index 57c1d9f..13257e4 100644
--- a/arch/arm/mach-uniphier/pll/pll-init-ld4.c
+++ b/arch/arm/mach-uniphier/clk/pll-ld4.c
@@ -1,55 +1,17 @@
/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2013-2014 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <linux/err.h>
#include <linux/io.h>
#include "../init.h"
#include "../sc-regs.h"
#include "../sg-regs.h"
-
-#undef DPLL_SSC_RATE_1PER
-
-static int dpll_init(unsigned int dram_freq)
-{
- u32 tmp;
-
- /*
- * Set Frequency
- * Set 0xc(1600MHz)/0xd(1333MHz)/0xe(1066MHz)
- * to FOUT (DPLLCTRL.bit[29:20])
- */
- tmp = readl(SC_DPLLCTRL);
- tmp &= ~0x000f0000;
- switch (dram_freq) {
- case 1333:
- tmp |= 0x000d0000;
- break;
- case 1600:
- tmp |= 0x000c0000;
- break;
- default:
- pr_err("Unsupported frequency");
- return -EINVAL;
- }
-
-#if defined(DPLL_SSC_RATE_1PER)
- tmp &= ~SC_DPLLCTRL_SSC_RATE;
-#else
- tmp |= SC_DPLLCTRL_SSC_RATE;
-#endif
- writel(tmp, SC_DPLLCTRL);
-
- tmp = readl(SC_DPLLCTRL2);
- tmp |= SC_DPLLCTRL2_NRSTDS;
- writel(tmp, SC_DPLLCTRL2);
-
- return 0;
-}
+#include "pll.h"
static void upll_init(void)
{
@@ -183,22 +145,9 @@
writel(tmp, SC_VPLL27BCTRL);
}
-int uniphier_ld4_pll_init(const struct uniphier_board_data *bd)
+void uniphier_ld4_pll_init(void)
{
- int ret;
-
- ret = dpll_init(bd->dram_freq);
- if (ret)
- return ret;
upll_init();
vpll_init();
-
- /*
- * Wait 500 usec until dpll get stable
- * We wait 10 usec in upll_init() and vpll_init()
- * so 20 usec can be saved here.
- */
- udelay(480);
-
- return 0;
+ uniphier_ld4_dpll_ssc_en();
}
diff --git a/arch/arm/mach-uniphier/pll/pll-init-pro4.c b/arch/arm/mach-uniphier/clk/pll-pro4.c
similarity index 70%
rename from arch/arm/mach-uniphier/pll/pll-init-pro4.c
rename to arch/arm/mach-uniphier/clk/pll-pro4.c
index a7e4e0e..cdd1fd4 100644
--- a/arch/arm/mach-uniphier/pll/pll-init-pro4.c
+++ b/arch/arm/mach-uniphier/clk/pll-pro4.c
@@ -1,59 +1,17 @@
/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2013-2014 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <linux/err.h>
#include <linux/io.h>
#include "../init.h"
#include "../sc-regs.h"
#include "../sg-regs.h"
-
-#undef DPLL_SSC_RATE_1PER
-
-static int dpll_init(unsigned int dram_freq)
-{
- u32 tmp;
-
- /*
- * Set Frequency
- * Set 0xc(1600MHz)/0xd(1333MHz)/0xe(1066MHz)
- * to FOUT ( DPLLCTRL.bit[29:20] )
- */
- tmp = readl(SC_DPLLCTRL);
- tmp &= ~(0x000f0000);
- switch (dram_freq) {
- case 1333:
- tmp |= 0x000d0000;
- break;
- case 1600:
- tmp |= 0x000c0000;
- break;
- default:
- pr_err("Unsupported frequency");
- return -EINVAL;
- }
-
- /*
- * Set Moduration rate
- * Set 0x0(1%)/0x1(2%) to SSC_RATE(DPLLCTRL.bit[15])
- */
-#if defined(DPLL_SSC_RATE_1PER)
- tmp &= ~0x00008000;
-#else
- tmp |= 0x00008000;
-#endif
- writel(tmp, SC_DPLLCTRL);
-
- tmp = readl(SC_DPLLCTRL2);
- tmp |= SC_DPLLCTRL2_NRSTDS;
- writel(tmp, SC_DPLLCTRL2);
-
- return 0;
-}
+#include "pll.h"
static void vpll_init(void)
{
@@ -145,20 +103,8 @@
writel(tmp, SC_VPLL27BCTRL);
}
-int uniphier_pro4_pll_init(const struct uniphier_board_data *bd)
+void uniphier_pro4_pll_init(void)
{
- int ret;
-
- ret = dpll_init(bd->dram_freq);
- if (ret)
- return ret;
vpll_init();
-
- /*
- * Wait 500 usec until dpll get stable
- * We wait 1 usec in vpll_init() so 1 usec can be saved here.
- */
- udelay(499);
-
- return 0;
+ uniphier_ld4_dpll_ssc_en();
}
diff --git a/arch/arm/mach-uniphier/clk/pll-sld3.c b/arch/arm/mach-uniphier/clk/pll-sld3.c
new file mode 100644
index 0000000..37a7c12
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/pll-sld3.c
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "../init.h"
+#include "pll.h"
+
+void uniphier_sld3_pll_init(void)
+{
+ uniphier_ld4_dpll_ssc_en();
+}
diff --git a/arch/arm/mach-uniphier/clk/pll.h b/arch/arm/mach-uniphier/clk/pll.h
new file mode 100644
index 0000000..d7e9303
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/pll.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef MACH_PLL_H
+#define MACH_PLL_H
+
+#define UNIPHIER_PLL_FREQ_DEFAULT (0)
+
+void uniphier_ld4_dpll_ssc_en(void);
+
+int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq,
+ unsigned int ssc_rate, unsigned int divn);
+int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base);
+int uniphier_ld20_vpll27_init(unsigned long reg_base);
+int uniphier_ld20_dspll_init(unsigned long reg_base);
+
+#endif /* MACH_PLL_H */
diff --git a/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h b/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h
index b1b4cb0..02b3aab 100644
--- a/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h
+++ b/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h
@@ -1,41 +1,55 @@
/*
* Copyright (C) 2016 Socionext Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _DDRPHY_LD20_REGS_H
#define _DDRPHY_LD20_REGS_H
-#define PHY_SCL_DATA_0 0x00000104
-#define PHY_SCL_DATA_1 0x00000108
-#define PHY_SCL_LATENCY 0x0000010C
-#define PHY_SCL_START 0x00000100
-#define PHY_SCL_CONFIG_1 0x00000118
-#define PHY_SCL_CONFIG_2 0x0000011C
-#define PHY_PAD_CTRL 0x00000120
-#define PHY_DLL_RECALIB 0x00000124
-#define PHY_DLL_ADRCTRL 0x00000128
-#define PHY_LANE_SEL 0x0000012C
-#define PHY_DLL_TRIM_1 0x00000130
-#define PHY_DLL_TRIM_2 0x00000134
-#define PHY_DLL_TRIM_3 0x00000138
-#define PHY_SCL_MAIN_CLK_DELTA 0x00000140
-#define PHY_WRLVL_AUTOINC_TRIM 0x0000014C
-#define PHY_WRLVL_DYN_ODT 0x00000150
-#define PHY_WRLVL_ON_OFF 0x00000154
-#define PHY_UNQ_ANALOG_DLL_1 0x0000015C
-#define PHY_DLL_INCR_TRIM_1 0x00000164
-#define PHY_DLL_INCR_TRIM_3 0x00000168
-#define PHY_SCL_CONFIG_3 0x0000016C
-#define PHY_UNIQUIFY_TSMC_IO_1 0x00000170
-#define PHY_SCL_START_ADDR 0x00000188
-#define PHY_DSCL_CNT 0x0000019C
-#define PHY_DLL_TRIM_CLK 0x000001A4
-#define PHY_DYNAMIC_BIT_LVL 0x000001AC
-#define PHY_SCL_WINDOW_TRIM 0x000001B4
-#define PHY_DISABLE_GATING_FOR_SCL 0x000001B8
-#define PHY_SCL_CONFIG_4 0x000001BC
-#define PHY_DYNAMIC_WRITE_BIT_LVL 0x000001C0
-#define PHY_VREF_TRAINING 0x000001C8
-#define PHY_SCL_GATE_TIMING 0x000001E0
+#define PHY_REG_SHIFT 2
+
+#define PHY_SCL_START (0x40 << (PHY_REG_SHIFT))
+#define PHY_SCL_DATA_0 (0x41 << (PHY_REG_SHIFT))
+#define PHY_SCL_DATA_1 (0x42 << (PHY_REG_SHIFT))
+#define PHY_SCL_LATENCY (0x43 << (PHY_REG_SHIFT))
+#define PHY_SCL_CONFIG_1 (0x46 << (PHY_REG_SHIFT))
+#define PHY_SCL_CONFIG_2 (0x47 << (PHY_REG_SHIFT))
+#define PHY_PAD_CTRL (0x48 << (PHY_REG_SHIFT))
+#define PHY_DLL_RECALIB (0x49 << (PHY_REG_SHIFT))
+#define PHY_DLL_ADRCTRL (0x4A << (PHY_REG_SHIFT))
+#define PHY_LANE_SEL (0x4B << (PHY_REG_SHIFT))
+#define PHY_DLL_TRIM_1 (0x4C << (PHY_REG_SHIFT))
+#define PHY_DLL_TRIM_2 (0x4D << (PHY_REG_SHIFT))
+#define PHY_DLL_TRIM_3 (0x4E << (PHY_REG_SHIFT))
+#define PHY_SCL_MAIN_CLK_DELTA (0x50 << (PHY_REG_SHIFT))
+#define PHY_WRLVL_AUTOINC_TRIM (0x53 << (PHY_REG_SHIFT))
+#define PHY_WRLVL_DYN_ODT (0x54 << (PHY_REG_SHIFT))
+#define PHY_WRLVL_ON_OFF (0x55 << (PHY_REG_SHIFT))
+#define PHY_UNQ_ANALOG_DLL_1 (0x57 << (PHY_REG_SHIFT))
+#define PHY_UNQ_ANALOG_DLL_2 (0x58 << (PHY_REG_SHIFT))
+#define PHY_DLL_INCR_TRIM_1 (0x59 << (PHY_REG_SHIFT))
+#define PHY_DLL_INCR_TRIM_3 (0x5A << (PHY_REG_SHIFT))
+#define PHY_SCL_CONFIG_3 (0x5B << (PHY_REG_SHIFT))
+#define PHY_UNIQUIFY_TSMC_IO_1 (0x5C << (PHY_REG_SHIFT))
+#define PHY_SCL_START_ADDR (0x62 << (PHY_REG_SHIFT))
+#define PHY_IP_DQ_DQS_BITWISE_TRIM (0x65 << (PHY_REG_SHIFT))
+#define PHY_DSCL_CNT (0x67 << (PHY_REG_SHIFT))
+#define PHY_OP_DQ_DM_DQS_BITWISE_TRIM (0x68 << (PHY_REG_SHIFT))
+#define PHY_DLL_TRIM_CLK (0x69 << (PHY_REG_SHIFT))
+#define PHY_DYNAMIC_BIT_LVL (0x6B << (PHY_REG_SHIFT))
+#define PHY_SCL_WINDOW_TRIM (0x6D << (PHY_REG_SHIFT))
+#define PHY_DISABLE_GATING_FOR_SCL (0x6E << (PHY_REG_SHIFT))
+#define PHY_SCL_CONFIG_4 (0x6F << (PHY_REG_SHIFT))
+#define PHY_DYNAMIC_WRITE_BIT_LVL (0x70 << (PHY_REG_SHIFT))
+#define PHY_VREF_TRAINING (0x72 << (PHY_REG_SHIFT))
+#define PHY_SCL_GATE_TIMING (0x78 << (PHY_REG_SHIFT))
+
+/* MASK */
+#define MSK_OP_DQ_DM_DQS_BITWISE_TRIM 0x0000007F
+#define MSK_IP_DQ_DQS_BITWISE_TRIM 0x0000007F
+#define MSK_OVERRIDE 0x00000080
+
+#define PHY_BITLVL_DLY_WIDTH 6
#endif /* _DDRPHY_LD20_REGS_H */
diff --git a/arch/arm/mach-uniphier/dram/umc-ld20.c b/arch/arm/mach-uniphier/dram/umc-ld20.c
index 186a398..1fdd119 100644
--- a/arch/arm/mach-uniphier/dram/umc-ld20.c
+++ b/arch/arm/mach-uniphier/dram/umc-ld20.c
@@ -1,7 +1,7 @@
/*
* Copyright (C) 2016 Socionext Inc.
*
- * based on commit f7a4c9efe333fb1536efa86f9e96dc0ee109fedd of Diag
+ * based on commit a3c28918e86ad57127cf07bf8b32950cab20c03c of Diag
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -18,6 +18,7 @@
#include "umc64-regs.h"
#define DRAM_CH_NR 3
+#define CONFIG_DDR_FREQ 1866
enum dram_freq {
DRAM_FREQ_1866M,
@@ -30,6 +31,268 @@
DRAM_SZ_NR,
};
+enum dram_board { /* board type */
+ DRAM_BOARD_LD20_REF, /* LD20 reference */
+ DRAM_BOARD_LD20_GLOBAL, /* LD20 TV */
+ DRAM_BOARD_LD21_REF, /* LD21 reference */
+ DRAM_BOARD_LD21_GLOBAL, /* LD21 TV */
+ DRAM_BOARD_NR,
+};
+
+#define MSK_PHY_LANE_SEL 0x000000FF
+#define MSK_BIT_SEL 0x00000F00
+#define MSK_DLL_MAS_DLY 0xFF000000
+#define MSK_MAS_DLY 0x7F000000
+#define MSK_DLLS_TRIM_CLK 0x000000FF
+
+#define PHY_DLL_MAS_DLY_WIDTH 8
+#define PHY_SLV_DLY_WIDTH 6
+
+static void ddrphy_maskwritel(u32 data, u32 mask, void *addr)
+{
+ u32 value;
+
+ value = (readl(addr) & ~mask) | (data & mask);
+ writel(value, addr);
+}
+
+static u32 ddrphy_maskreadl(u32 mask, void *addr)
+{
+ return readl(addr) & mask;
+}
+
+/* set phy_lane_sel.phy_lane_sel */
+static void ddrphy_set_phy_lane_sel(int val, void __iomem *phy_base)
+{
+ ddrphy_maskwritel(val, MSK_PHY_LANE_SEL, phy_base + PHY_LANE_SEL);
+}
+
+/* set phy_lane_sel.bit_sel */
+static void ddrphy_set_bit_sel(int bit, void __iomem *phy_base)
+{
+ ddrphy_maskwritel(bit << 8, MSK_BIT_SEL, phy_base + PHY_LANE_SEL);
+}
+
+/* Calculating step for PUB-byte */
+static int ddrphy_hpstep(int delay, void __iomem *phy_base)
+{
+ int mdl, freq;
+
+ freq = CONFIG_DDR_FREQ; /* FIXME */
+ mdl = ddrphy_maskreadl(MSK_DLL_MAS_DLY, phy_base + PHY_DLL_ADRCTRL) >> 24;
+
+ return DIV_ROUND_CLOSEST(freq * delay * mdl, 2 * 1000000);
+}
+
+static void ddrphy_set_dll_trim_clk(int delay_ckoffset, void __iomem *phy_base)
+{
+ u8 ck_step; /* ckoffset_step for clock */
+ u32 ck_step_all;
+
+ /* CK-Offset */
+ if (delay_ckoffset >= 0) {
+ /* shift + direction */
+ ck_step = min(ddrphy_hpstep(delay_ckoffset, phy_base), 127);
+ ck_step_all = ((0x1<<(PHY_SLV_DLY_WIDTH + 1))|ck_step);
+ } else{
+ /* shift - direction */
+ ck_step = min(ddrphy_hpstep(-1*delay_ckoffset, phy_base), 127);
+ ck_step_all = ck_step;
+ }
+
+ ddrphy_set_phy_lane_sel(0, phy_base);
+ ddrphy_maskwritel(ck_step_all, MSK_DLLS_TRIM_CLK, phy_base + PHY_DLL_TRIM_CLK);
+}
+
+static void ddrphy_set_dll_recalib(int delay_qoffset, u32 recalib_cnt,
+ u8 disable_recalib, u8 ctr_start_val,
+ void __iomem *phy_base)
+{
+ u8 dlls_trim_adrctrl_ma, incr_dly_adrctrl_ma; /* qoffset_step and flag for inc/dec */
+ u32 recalib_all; /* all fields of register dll_recalib */
+
+ /* Q-Offset */
+ if (delay_qoffset >= 0) {
+ dlls_trim_adrctrl_ma = min(ddrphy_hpstep(delay_qoffset, phy_base), 63);
+ incr_dly_adrctrl_ma = 0x1;
+ } else {
+ dlls_trim_adrctrl_ma = min(ddrphy_hpstep(-1*delay_qoffset, phy_base), 63);
+ incr_dly_adrctrl_ma = 0x0;
+ }
+
+ recalib_all = ((ctr_start_val & 0xf) << 28) |
+ (incr_dly_adrctrl_ma << 27) |
+ ((disable_recalib & 0x1) << 26) |
+ ((recalib_cnt & 0x3ffff) << 8) |
+ (dlls_trim_adrctrl_ma & 0x3f);
+
+ /* write value for all bits other than bit[7:6] */
+ ddrphy_maskwritel(recalib_all, ~0xc0, phy_base + PHY_DLL_RECALIB);
+}
+
+static void ddrphy_set_dll_adrctrl(int delay_qoffset, u8 override_adrctrl,
+ void __iomem *phy_base)
+{
+ u8 dlls_trim_adrctrl, incr_dly_adrctrl; /* qoffset_step for clock */
+ u32 adrctrl_all;
+
+ if (delay_qoffset >= 0) {
+ dlls_trim_adrctrl = min(ddrphy_hpstep(delay_qoffset, phy_base), 63);
+ incr_dly_adrctrl = 0x1;
+ } else {
+ dlls_trim_adrctrl = min(ddrphy_hpstep(-delay_qoffset, phy_base), 63);
+ incr_dly_adrctrl = 0x0;
+ }
+
+ adrctrl_all = (incr_dly_adrctrl << 9) |
+ ((override_adrctrl & 0x1) << 8) |
+ dlls_trim_adrctrl;
+
+ ddrphy_maskwritel(adrctrl_all, 0x33f, phy_base + PHY_DLL_ADRCTRL);
+}
+
+/* dio */
+static int dio_adrctrl_0[DRAM_BOARD_NR][DRAM_CH_NR] = {
+ {268-262, 268-263, 268-378}, /* LD20 reference */
+ {268-262, 268-263, 268-378}, /* LD20 TV */
+ {268-212, 268-268, 0}, /* LD21 reference */
+ {268-212, 268-268, 0}, /* LD21 TV */
+};
+static int dio_dlltrimclk_0[DRAM_BOARD_NR][DRAM_CH_NR] = {
+ {268, 268, 268}, /* LD20 reference */
+ {268, 268, 268}, /* LD20 TV */
+ {268, 268+252, 0}, /* LD21 reference */
+ {268, 268+202, 0}, /* LD21 TV */
+};
+static int dio_dllrecalib_0[DRAM_BOARD_NR][DRAM_CH_NR] = {
+ {268-378, 268-263, 268-378}, /* LD20 reference */
+ {268-378, 268-263, 268-378}, /* LD20 TV */
+ {268-212, 268-536, 0}, /* LD21 reference */
+ {268-212, 268-536, 0}, /* LD21 TV */
+};
+
+static u32 dio_phy_pad_ctrl[DRAM_BOARD_NR][DRAM_CH_NR] = {
+ {0x50B840B1, 0x50B840B1, 0x50B840B1}, /* LD20 reference */
+ {0x50BB40B1, 0x50BB40B1, 0x50BB40B1}, /* LD20 TV */
+ {0x50BB40B4, 0x50B840B1, 0x50BB40B1}, /* LD21 reference */
+ {0x50BB40B4, 0x50B840B1, 0x50BB40B1}, /* LD21 TV */
+};
+
+static u32 dio_scl_gate_timing[DRAM_CH_NR] = {0x00000140, 0x00000180, 0x00000140};
+
+static int dio_op_dq_shift_val[DRAM_BOARD_NR][DRAM_CH_NR][32] = {
+ { /* LD20 reference */
+ {
+ 2, 1, 0, 1, 2, 1, 1, 1, 2, 1, 1, 2, 1, 1, 1, 1,
+ 1, 2, 1, 1, 1, 2, 1, 1, 2, 2, 0, 1, 1, 2, 2, 1,
+ },
+ {
+ 1, 1, 0, 1, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 0, 0, 1, 1, 0, 0, 0, 1, 1, 1, 2, 1, 2, 1,
+ },
+ {
+ 2, 2, 0, 2, 1, 1, 2, 1, 1, 1, 0, 1, 1, -1, 1, 1,
+ 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0, 2, 2, 1, 2,
+ },
+ },
+ { /* LD20 TV */
+ {
+ 2, 1, 0, 1, 2, 1, 1, 1, 2, 1, 1, 2, 1, 1, 1, 1,
+ 1, 2, 1, 1, 1, 2, 1, 1, 2, 2, 0, 1, 1, 2, 2, 1,
+ },
+ {
+ 1, 1, 0, 1, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 0, 0, 1, 1, 0, 0, 0, 1, 1, 1, 2, 1, 2, 1,
+ },
+ {
+ 2, 2, 0, 2, 1, 1, 2, 1, 1, 1, 0, 1, 1, -1, 1, 1,
+ 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0, 2, 2, 1, 2,
+ },
+ },
+ { /* LD21 reference */
+ {
+ 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 2,
+ 1, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 1,
+ },
+ { 1, 0, 2, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0, 0,
+ 1, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 0, 0,
+ },
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ { /* LD21 TV */
+ {
+ 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 2,
+ 1, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 1,
+ },
+ { 1, 0, 2, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0, 0,
+ 1, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 0, 0,
+ },
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+};
+static int dio_ip_dq_shift_val[DRAM_BOARD_NR][DRAM_CH_NR][32] = {
+ { /* LD20 reference */
+ {
+ 3, 3, 3, 2, 3, 2, 0, 2, 2, 3, 3, 1, 2, 2, 2, 2,
+ 2, 2, 2, 2, 0, 1, 1, 1, 2, 2, 2, 2, 3, 0, 2, 2,
+ },
+ {
+ 2, 2, 1, 1, -1, 1, 1, 1, 2, 0, 2, 2, 2, 1, 0, 2,
+ 2, 1, 2, 1, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2,
+ },
+ {
+ 2, 2, 3, 2, 1, 2, 2, 2, 2, 3, 4, 2, 3, 4, 3, 3,
+ 2, 2, 1, 2, 1, 1, 1, 1, 2, 2, 2, 2, 1, 2, 2, 1,
+ },
+ },
+ { /* LD20 TV */
+ {
+ 3, 3, 3, 2, 3, 2, 0, 2, 2, 3, 3, 1, 2, 2, 2, 2,
+ 2, 2, 2, 2, 0, 1, 1, 1, 2, 2, 2, 2, 3, 0, 2, 2,
+ },
+ {
+ 2, 2, 1, 1, -1, 1, 1, 1, 2, 0, 2, 2, 2, 1, 0, 2,
+ 2, 1, 2, 1, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2,
+ },
+ {
+ 2, 2, 3, 2, 1, 2, 2, 2, 2, 3, 4, 2, 3, 4, 3, 3,
+ 2, 2, 1, 2, 1, 1, 1, 1, 2, 2, 2, 2, 1, 2, 2, 1,
+ },
+ },
+ { /* LD21 reference */
+ {
+ 2, 2, 2, 2, 1, 2, 2, 2, 2, 3, 3, 2, 2, 2, 2, 2,
+ 2, 1, 2, 2, 1, 1, 1, 1, 2, 2, 2, 3, 1, 2, 2, 2,
+ },
+ {
+ 3, 4, 4, 1, 0, 1, 1, 1, 1, 2, 1, 2, 2, 3, 3, 2,
+ 1, 0, 2, 1, 1, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 1,
+ },
+ {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ { /* LD21 TV */
+ {
+ 2, 2, 2, 2, 1, 2, 2, 2, 2, 3, 3, 2, 2, 2, 2, 2,
+ 2, 1, 2, 2, 1, 1, 1, 1, 2, 2, 2, 3, 1, 2, 2, 2,
+ },
+ {
+ 3, 4, 4, 1, 0, 1, 1, 1, 1, 2, 1, 2, 2, 3, 3, 2,
+ 1, 0, 2, 1, 1, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 1,
+ },
+ {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+};
+
/* umc */
static u32 umc_initctla[DRAM_FREQ_NR] = {0x71016D11};
static u32 umc_initctlb[DRAM_FREQ_NR] = {0x07E390AC};
@@ -37,15 +300,24 @@
static u32 umc_drmmr0[DRAM_FREQ_NR] = {0x00000114};
static u32 umc_drmmr2[DRAM_FREQ_NR] = {0x000002a0};
-static u32 umc_memconf0a[DRAM_FREQ_NR] = {0x00000801};
-static u32 umc_memconf0b[DRAM_FREQ_NR] = {0x00000130};
-static u32 umc_memconfch[DRAM_FREQ_NR] = {0x00033803};
-
+static u32 umc_memconf0a[DRAM_FREQ_NR][DRAM_SZ_NR] = {
+ /* 256MB 512MB */
+ {0x00000601, 0x00000801}, /* 1866 MHz */
+};
+static u32 umc_memconf0b[DRAM_FREQ_NR][DRAM_SZ_NR] = {
+ /* 256MB 512MB */
+ {0x00000120, 0x00000130}, /* 1866 MHz */
+};
+static u32 umc_memconfch[DRAM_FREQ_NR][DRAM_SZ_NR] = {
+ /* 256MB 512MB */
+ {0x00033603, 0x00033803}, /* 1866 MHz */
+};
static u32 umc_cmdctla[DRAM_FREQ_NR] = {0x060D0D20};
static u32 umc_cmdctlb[DRAM_FREQ_NR] = {0x2D211C08};
static u32 umc_cmdctlc[DRAM_FREQ_NR] = {0x00150C04};
static u32 umc_cmdctle[DRAM_FREQ_NR][DRAM_SZ_NR] = {
- {0x0049071D, 0x0078071D},
+ /* 256MB 512MB */
+ {0x0049071D, 0x0078071D}, /* 1866 MHz */
};
static u32 umc_rdatactl_d0[DRAM_FREQ_NR] = {0x00000610};
@@ -61,12 +333,22 @@
0x00000000, 0x00000001, 0x00000001
};
+/* polling function for PHY Init Complete */
+static void ddrphy_init_complete(void __iomem *dc_base)
+{
+ /* Wait for PHY Init Complete */
+ while (!(readl(dc_base + UMC_DFISTCTLC) & BIT(0)))
+ cpu_relax();
+}
+
/* DDR PHY */
-static void ddrphy_init(void __iomem *phy_base, enum dram_freq freq)
+static void ddrphy_init(void __iomem *phy_base, void __iomem *dc_base,
+ enum dram_freq freq, enum dram_board board, int ch)
{
- writel(0x00000001, phy_base + PHY_UNIQUIFY_TSMC_IO_1);
- while ((readl(phy_base + PHY_UNIQUIFY_TSMC_IO_1) & BIT(1)))
+ writel(0x0C001001, phy_base + PHY_UNIQUIFY_TSMC_IO_1);
+ while (!(readl(phy_base + PHY_UNIQUIFY_TSMC_IO_1) & BIT(1)))
cpu_relax();
+ writel(0x0C001000, phy_base + PHY_UNIQUIFY_TSMC_IO_1);
writel(0x00000000, phy_base + PHY_DLL_INCR_TRIM_3);
writel(0x00000000, phy_base + PHY_DLL_INCR_TRIM_1);
@@ -84,14 +366,14 @@
writel(0x0000000a, phy_base + PHY_DLL_TRIM_3);
writel(0x00000001, phy_base + PHY_SCL_WINDOW_TRIM);
writel(0x00000000, phy_base + PHY_UNQ_ANALOG_DLL_1);
- writel(0x50bb40b1, phy_base + PHY_PAD_CTRL);
+ writel(dio_phy_pad_ctrl[board][ch], phy_base + PHY_PAD_CTRL);
writel(0x00000070, phy_base + PHY_VREF_TRAINING);
writel(0x01000075, phy_base + PHY_SCL_CONFIG_1);
writel(0x00000501, phy_base + PHY_SCL_CONFIG_2);
writel(0x00000000, phy_base + PHY_SCL_CONFIG_3);
writel(0x000261c0, phy_base + PHY_DYNAMIC_WRITE_BIT_LVL);
writel(0x00000000, phy_base + PHY_SCL_CONFIG_4);
- writel(0x000000a0, phy_base + PHY_SCL_GATE_TIMING);
+ writel(dio_scl_gate_timing[ch], phy_base + PHY_SCL_GATE_TIMING);
writel(0x02a000a0, phy_base + PHY_WRLVL_DYN_ODT);
writel(0x00840004, phy_base + PHY_WRLVL_ON_OFF);
writel(0x0000020d, phy_base + PHY_DLL_ADRCTRL);
@@ -99,30 +381,96 @@
writel(0x0000008d, phy_base + PHY_DLL_TRIM_CLK);
writel(0xa800100d, phy_base + PHY_DLL_RECALIB);
writel(0x00005076, phy_base + PHY_SCL_LATENCY);
+
+ ddrphy_init_complete(dc_base);
+
+ ddrphy_set_dll_adrctrl(dio_adrctrl_0[board][ch], 0, phy_base);
+ ddrphy_set_dll_trim_clk(dio_dlltrimclk_0[board][ch], phy_base);
+ ddrphy_set_dll_recalib(dio_dllrecalib_0[board][ch], 0x10, 0, 0xa,
+ phy_base);
+}
+
+static void ddrphy_shift_dq(u32 reg_mask, u32 reg_addr, int shift_val,
+ void __iomem *phy_base)
+{
+ u32 reg_val;
+ int dq_val;
+
+ reg_val = ddrphy_maskreadl(reg_mask, phy_base + reg_addr) & 0x7f;
+ dq_val = reg_val & 0x3f;
+
+ if ((reg_val & 0x40) == 0x00)
+ dq_val = -1 * dq_val;
+
+ /* value shift*/
+ dq_val = dq_val + shift_val;
+
+ if (dq_val >= 0)
+ reg_val = 0x40 + (dq_val & 0x3f);
+ else
+ reg_val = ((-1 * dq_val) & 0x3f);
+
+ ddrphy_maskwritel(reg_val, reg_mask, phy_base + reg_addr);
}
-static int ddrphy_training(void __iomem *phy_base)
+static void ddrphy_shift(void __iomem *phy_base, enum dram_board board, int ch)
+{
+ u32 dx, bit;
+
+ /* set override = 1 */
+ ddrphy_maskwritel(MSK_OVERRIDE, MSK_OVERRIDE,
+ phy_base + PHY_OP_DQ_DM_DQS_BITWISE_TRIM);
+ ddrphy_maskwritel(MSK_OVERRIDE, MSK_OVERRIDE,
+ phy_base + PHY_IP_DQ_DQS_BITWISE_TRIM);
+
+ for (dx = 0; dx < 4; dx++) {
+ /* set byte to PHY_LANE_SEL.phy_lane_sel= dx * (PHY_BITLVL_DLY_WIDTH+1) */
+ ddrphy_set_phy_lane_sel(dx * (PHY_BITLVL_DLY_WIDTH + 1),
+ phy_base);
+
+ for (bit = 0; bit < 8; bit++) {
+ ddrphy_set_bit_sel(bit, phy_base);
+
+ /* shift write reg value*/
+ ddrphy_shift_dq(MSK_OP_DQ_DM_DQS_BITWISE_TRIM,
+ PHY_OP_DQ_DM_DQS_BITWISE_TRIM,
+ dio_op_dq_shift_val[board][ch][dx * 8 + bit],
+ phy_base);
+ /* shift read reg value */
+ ddrphy_shift_dq(MSK_IP_DQ_DQS_BITWISE_TRIM,
+ PHY_IP_DQ_DQS_BITWISE_TRIM,
+ dio_ip_dq_shift_val[board][ch][dx * 8 + bit],
+ phy_base);
+ }
+
+ }
+ ddrphy_set_phy_lane_sel(0, phy_base);
+ ddrphy_set_bit_sel(0, phy_base);
+}
+
+static int ddrphy_training(void __iomem *phy_base, enum dram_board board,
+ int ch)
{
writel(0x0000000f, phy_base + PHY_WRLVL_AUTOINC_TRIM);
writel(0x00010000, phy_base + PHY_DLL_TRIM_2);
writel(0x50000000, phy_base + PHY_SCL_START);
- while ((readl(phy_base + PHY_SCL_START) & BIT(28)))
+ while (readl(phy_base + PHY_SCL_START) & BIT(28))
cpu_relax();
writel(0x00000000, phy_base + PHY_DISABLE_GATING_FOR_SCL);
writel(0xff00ff00, phy_base + PHY_SCL_DATA_0);
writel(0xff00ff00, phy_base + PHY_SCL_DATA_1);
- writel(0x00080000, phy_base + PHY_SCL_START_ADDR);
+ writel(0xFBF8FFFF, phy_base + PHY_SCL_START_ADDR);
writel(0x11000000, phy_base + PHY_SCL_START);
- while ((readl(phy_base + PHY_SCL_START) & BIT(28)))
+ while (readl(phy_base + PHY_SCL_START) & BIT(28))
cpu_relax();
- writel(0x00000000, phy_base + PHY_SCL_START_ADDR);
+ writel(0xFBF0FFFF, phy_base + PHY_SCL_START_ADDR);
writel(0x30500000, phy_base + PHY_SCL_START);
- while ((readl(phy_base + PHY_SCL_START) & BIT(28)))
+ while (readl(phy_base + PHY_SCL_START) & BIT(28))
cpu_relax();
writel(0x00000001, phy_base + PHY_DISABLE_GATING_FOR_SCL);
@@ -131,16 +479,22 @@
writel(0xf10e4a56, phy_base + PHY_SCL_DATA_1);
writel(0x11000000, phy_base + PHY_SCL_START);
- while ((readl(phy_base + PHY_SCL_START) & BIT(28)))
+ while (readl(phy_base + PHY_SCL_START) & BIT(28))
cpu_relax();
writel(0x34000000, phy_base + PHY_SCL_START);
- while ((readl(phy_base + PHY_SCL_START) & BIT(28)))
+ while (readl(phy_base + PHY_SCL_START) & BIT(28))
cpu_relax();
writel(0x00000003, phy_base + PHY_DISABLE_GATING_FOR_SCL);
+ writel(0x000261c0, phy_base + PHY_DYNAMIC_WRITE_BIT_LVL);
+ writel(0x00003270, phy_base + PHY_DYNAMIC_BIT_LVL);
+ writel(0x011BD0C4, phy_base + PHY_DSCL_CNT);
+
+ /* shift ip_dq, op_dq trim */
+ ddrphy_shift(phy_base, board, ch);
return 0;
}
@@ -164,10 +518,6 @@
return -EINVAL;
}
- /* Wait for PHY Init Complete */
- while (!(readl(dc_base + UMC_DFISTCTLC) & BIT(0)))
- cpu_relax();
-
writel(0x00000001, dc_base + UMC_DFICSOVRRD);
writel(0x00000000, dc_base + UMC_DFITURNOFF);
@@ -180,9 +530,9 @@
writel(umc_drmmr2[freq], dc_base + UMC_DRMMR2);
writel(0x00000000, dc_base + UMC_DRMMR3);
- writel(umc_memconf0a[freq], dc_base + UMC_MEMCONF0A);
- writel(umc_memconf0b[freq], dc_base + UMC_MEMCONF0B);
- writel(umc_memconfch[freq], dc_base + UMC_MEMCONFCH);
+ writel(umc_memconf0a[freq][size_e], dc_base + UMC_MEMCONF0A);
+ writel(umc_memconf0b[freq][size_e], dc_base + UMC_MEMCONF0B);
+ writel(umc_memconfch[freq][size_e], dc_base + UMC_MEMCONFCH);
writel(0x00000008, dc_base + UMC_MEMMAPSET);
writel(umc_cmdctla[freq], dc_base + UMC_CMDCTLA);
@@ -227,7 +577,8 @@
}
static int umc_ch_init(void __iomem *umc_ch_base, void __iomem *phy_ch_base,
- enum dram_freq freq, unsigned long size, int ch)
+ enum dram_freq freq, enum dram_board board,
+ unsigned long size, int ch)
{
void __iomem *dc_base = umc_ch_base + 0x00011000;
void __iomem *phy_base = phy_ch_base;
@@ -240,13 +591,13 @@
writel(UMC_DIOCTLA_CTL_NRST | UMC_DIOCTLA_CFG_NRST,
dc_base + UMC_DIOCTLA);
- ddrphy_init(phy_base, freq);
+ ddrphy_init(phy_base, dc_base, freq, board, ch);
ret = umc_dc_init(dc_base, freq, size, ch);
if (ret)
return ret;
- ret = ddrphy_training(phy_base);
+ ret = ddrphy_training(phy_base, board, ch);
if (ret)
return ret;
@@ -274,6 +625,7 @@
void __iomem *umc_ch_base = (void __iomem *)0x5b800000;
void __iomem *phy_ch_base = (void __iomem *)0x6e200000;
enum dram_freq freq;
+ enum dram_board board;
int ch, ret;
switch (bd->dram_freq) {
@@ -285,11 +637,30 @@
return -EINVAL;
}
+ switch (UNIPHIER_BD_BOARD_GET_TYPE(bd->flags)) {
+ case UNIPHIER_BD_BOARD_LD20_REF:
+ board = DRAM_BOARD_LD20_REF;
+ break;
+ case UNIPHIER_BD_BOARD_LD20_GLOBAL:
+ board = DRAM_BOARD_LD20_GLOBAL;
+ break;
+ case UNIPHIER_BD_BOARD_LD21_REF:
+ board = DRAM_BOARD_LD21_REF;
+ break;
+ case UNIPHIER_BD_BOARD_LD21_GLOBAL:
+ board = DRAM_BOARD_LD21_GLOBAL;
+ break;
+ default:
+ pr_err("unsupported board type %d\n",
+ UNIPHIER_BD_BOARD_GET_TYPE(bd->flags));
+ return -EINVAL;
+ }
+
for (ch = 0; ch < bd->dram_nr_ch; ch++) {
unsigned long size = bd->dram_ch[ch].size;
unsigned int width = bd->dram_ch[ch].width;
- ret = umc_ch_init(umc_ch_base, phy_ch_base, freq,
+ ret = umc_ch_init(umc_ch_base, phy_ch_base, freq, board,
size / (width / 16), ch);
if (ret) {
pr_err("failed to initialize UMC ch%d\n", ch);
diff --git a/arch/arm/mach-uniphier/early-clk/Makefile b/arch/arm/mach-uniphier/early-clk/Makefile
deleted file mode 100644
index 755a361..0000000
--- a/arch/arm/mach-uniphier/early-clk/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-clk-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD4) += early-clk-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += early-clk-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += early-clk-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += early-clk-pro5.o
-obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += early-clk-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += early-clk-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD11) += early-clk-ld11.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD20) += early-clk-ld20.o
diff --git a/arch/arm/mach-uniphier/early-pinctrl/Makefile b/arch/arm/mach-uniphier/early-pinctrl/Makefile
deleted file mode 100644
index 7177a8c..0000000
--- a/arch/arm/mach-uniphier/early-pinctrl/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-pinctrl-sld3.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD11) += early-pinctrl-ld20.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD20) += early-pinctrl-ld20.o
diff --git a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c
deleted file mode 100644
index 537deaf..0000000
--- a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include "../init.h"
-#include "../sg-regs.h"
-
-int uniphier_ld20_early_pin_init(const struct uniphier_board_data *bd)
-{
- /* Comment format: PAD Name -> Function Name */
- sg_set_pinsel(0, 0, 8, 4); /* XECS1 -> XECS1 */
- sg_set_pinsel(1, 0, 8, 4); /* ERXW -> ERXW */
- sg_set_pinsel(2, 0, 8, 4); /* XERWE1 -> XERWE1 */
- sg_set_pinsel(6, 2, 8, 4); /* XNFRE -> XERWE0 */
- sg_set_pinsel(7, 2, 8, 4); /* XNFWE -> ES0 */
- sg_set_pinsel(8, 2, 8, 4); /* NFALE -> ES1 */
- sg_set_pinsel(9, 2, 8, 4); /* NFCLE -> ES2 */
- sg_set_pinsel(10, 2, 8, 4); /* NFD0 -> ED0 */
- sg_set_pinsel(11, 2, 8, 4); /* NFD1 -> ED1 */
- sg_set_pinsel(12, 2, 8, 4); /* NFD2 -> ED2 */
- sg_set_pinsel(13, 2, 8, 4); /* NFD3 -> ED3 */
- sg_set_pinsel(14, 2, 8, 4); /* NFD4 -> ED4 */
- sg_set_pinsel(15, 2, 8, 4); /* NFD5 -> ED5 */
- sg_set_pinsel(16, 2, 8, 4); /* NFD6 -> ED6 */
- sg_set_pinsel(17, 2, 8, 4); /* NFD7 -> ED7 */
- sg_set_iectrl_range(0, 2);
- sg_set_iectrl_range(6, 17);
-
- return 0;
-}
diff --git a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c
deleted file mode 100644
index 6c5d58f..0000000
--- a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include "../init.h"
-#include "../sg-regs.h"
-
-int uniphier_sld3_early_pin_init(const struct uniphier_board_data *bd)
-{
- /* Comment format: PAD Name -> Function Name */
-
-#ifdef CONFIG_UNIPHIER_SERIAL
- sg_set_pinsel(63, 0, 4, 4); /* RXD0 */
- sg_set_pinsel(64, 1, 4, 4); /* TXD0 */
-
- sg_set_pinsel(65, 0, 4, 4); /* RXD1 */
- sg_set_pinsel(66, 1, 4, 4); /* TXD1 */
-
- sg_set_pinsel(96, 2, 4, 4); /* RXD2 */
- sg_set_pinsel(102, 2, 4, 4); /* TXD2 */
-#endif
-
- sg_set_pinsel(99, 1, 4, 4); /* GPIO26 -> EA24 */
-
- return 0;
-}
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index db80074..4e3bee1 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -23,9 +23,17 @@
unsigned int dram_nr_ch;
struct uniphier_dram_ch dram_ch[UNIPHIER_MAX_NR_DRAM_CH];
unsigned int flags;
-#define UNIPHIER_BD_DDR3PLUS BIT(2)
-#define UNIPHIER_BD_PACKAGE_LD21 1
-#define UNIPHIER_BD_PACKAGE_TYPE(f) ((f) & 0x3)
+
+#define UNIPHIER_BD_DPLL_SSC_GET_RATE(f) (((f) >> 8) & 0x3)
+#define UNIPHIER_BD_DPLL_SSC_RATE(r) (((r) & 0x3) << 8)
+
+#define UNIPHIER_BD_DDR3PLUS BIT(2)
+
+#define UNIPHIER_BD_BOARD_GET_TYPE(f) ((f) & 0x3)
+#define UNIPHIER_BD_BOARD_LD20_REF 0 /* LD20 reference */
+#define UNIPHIER_BD_BOARD_LD20_GLOBAL 1 /* LD20 TV Set */
+#define UNIPHIER_BD_BOARD_LD21_REF 2 /* LD21 reference */
+#define UNIPHIER_BD_BOARD_LD21_GLOBAL 3 /* LD21 TV Set */
};
const struct uniphier_board_data *uniphier_get_board_param(void);
@@ -75,13 +83,12 @@
int uniphier_sld3_memconf_init(const struct uniphier_board_data *bd);
int uniphier_pxs2_memconf_init(const struct uniphier_board_data *bd);
-int uniphier_sld3_pll_init(const struct uniphier_board_data *bd);
-int uniphier_ld4_pll_init(const struct uniphier_board_data *bd);
-int uniphier_pro4_pll_init(const struct uniphier_board_data *bd);
-int uniphier_sld8_pll_init(const struct uniphier_board_data *bd);
-
-int uniphier_sld3_enable_dpll_ssc(const struct uniphier_board_data *bd);
-int uniphier_ld4_enable_dpll_ssc(const struct uniphier_board_data *bd);
+int uniphier_sld3_dpll_init(const struct uniphier_board_data *bd);
+int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd);
+int uniphier_pro4_dpll_init(const struct uniphier_board_data *bd);
+int uniphier_sld8_dpll_init(const struct uniphier_board_data *bd);
+int uniphier_ld11_dpll_init(const struct uniphier_board_data *bd);
+int uniphier_ld20_dpll_init(const struct uniphier_board_data *bd);
int uniphier_ld4_early_clk_init(const struct uniphier_board_data *bd);
int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd);
@@ -89,9 +96,6 @@
int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd);
int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd);
-int uniphier_sld3_early_pin_init(const struct uniphier_board_data *bd);
-int uniphier_ld20_early_pin_init(const struct uniphier_board_data *bd);
-
int uniphier_ld4_umc_init(const struct uniphier_board_data *bd);
int uniphier_pro4_umc_init(const struct uniphier_board_data *bd);
int uniphier_sld8_umc_init(const struct uniphier_board_data *bd);
@@ -99,14 +103,11 @@
int uniphier_ld20_umc_init(const struct uniphier_board_data *bd);
int uniphier_ld11_umc_init(const struct uniphier_board_data *bd);
-void uniphier_sld3_pin_init(void);
-void uniphier_ld4_pin_init(void);
-void uniphier_pro4_pin_init(void);
-void uniphier_sld8_pin_init(void);
-void uniphier_pro5_pin_init(void);
-void uniphier_pxs2_pin_init(void);
-void uniphier_ld6b_pin_init(void);
-void uniphier_ld20_pin_init(void);
+void uniphier_sld3_pll_init(void);
+void uniphier_ld4_pll_init(void);
+void uniphier_pro4_pll_init(void);
+void uniphier_ld11_pll_init(void);
+int uniphier_ld20_pll_init(const struct uniphier_board_data *bd);
void uniphier_ld4_clk_init(void);
void uniphier_pro4_clk_init(void);
@@ -115,6 +116,8 @@
void uniphier_ld11_clk_init(void);
void uniphier_ld20_clk_init(void);
+int uniphier_pin_init(const char *pinconfig_name);
+void uniphier_smp_kick_all_cpus(void);
void cci500_init(int nr_slaves);
#define pr_err(fmt, args...) printf(fmt, ##args)
diff --git a/arch/arm/mach-uniphier/init/init-ld11.c b/arch/arm/mach-uniphier/init/init-ld11.c
index de2dc62..e324c94 100644
--- a/arch/arm/mach-uniphier/init/init-ld11.c
+++ b/arch/arm/mach-uniphier/init/init-ld11.c
@@ -15,7 +15,7 @@
{
uniphier_sbc_init_savepin(bd);
uniphier_pxs2_sbc_init(bd);
- uniphier_ld20_early_pin_init(bd);
+ uniphier_pin_init("system_bus_grp");
support_card_reset();
@@ -31,12 +31,14 @@
led_puts("L2");
- led_puts("L3");
-
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
+ led_puts("L3");
+
+ uniphier_ld11_dpll_init(bd);
+
led_puts("L4");
{
diff --git a/arch/arm/mach-uniphier/init/init-ld20.c b/arch/arm/mach-uniphier/init/init-ld20.c
index 7f66053..cb05421 100644
--- a/arch/arm/mach-uniphier/init/init-ld20.c
+++ b/arch/arm/mach-uniphier/init/init-ld20.c
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -14,7 +15,7 @@
{
uniphier_sbc_init_savepin(bd);
uniphier_pxs2_sbc_init(bd);
- uniphier_ld20_early_pin_init(bd);
+ uniphier_pin_init("system_bus_grp");
support_card_reset();
@@ -31,12 +32,14 @@
led_puts("L2");
- led_puts("L3");
-
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
+ led_puts("L3");
+
+ uniphier_ld20_dpll_init(bd);
+
led_puts("L4");
{
diff --git a/arch/arm/mach-uniphier/init/init-ld4.c b/arch/arm/mach-uniphier/init/init-ld4.c
index b1c9b5d..2f4c60d 100644
--- a/arch/arm/mach-uniphier/init/init-ld4.c
+++ b/arch/arm/mach-uniphier/init/init-ld4.c
@@ -1,5 +1,7 @@
/*
- * Copyright (C) 2013-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2013-2015 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -19,7 +21,7 @@
support_card_reset();
- uniphier_ld4_pll_init(bd);
+ uniphier_ld4_dpll_init(bd);
support_card_init();
@@ -53,9 +55,5 @@
led_puts("L5");
- uniphier_ld4_enable_dpll_ssc(bd);
-
- led_puts("L6");
-
return 0;
}
diff --git a/arch/arm/mach-uniphier/init/init-pro4.c b/arch/arm/mach-uniphier/init/init-pro4.c
index 3528d84..2825150 100644
--- a/arch/arm/mach-uniphier/init/init-pro4.c
+++ b/arch/arm/mach-uniphier/init/init-pro4.c
@@ -1,5 +1,7 @@
/*
- * Copyright (C) 2013-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2013-2015 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -16,7 +18,7 @@
support_card_reset();
- uniphier_pro4_pll_init(bd);
+ uniphier_pro4_dpll_init(bd);
support_card_init();
@@ -50,9 +52,5 @@
led_puts("L5");
- uniphier_ld4_enable_dpll_ssc(bd);
-
- led_puts("L6");
-
return 0;
}
diff --git a/arch/arm/mach-uniphier/init/init-sld3.c b/arch/arm/mach-uniphier/init/init-sld3.c
index 50fcbb0..ee3245c 100644
--- a/arch/arm/mach-uniphier/init/init-sld3.c
+++ b/arch/arm/mach-uniphier/init/init-sld3.c
@@ -1,5 +1,7 @@
/*
- * Copyright (C) 2013-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2013-2015 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -16,11 +18,9 @@
uniphier_sbc_init_admulti(bd);
- uniphier_sld3_early_pin_init(bd);
-
support_card_reset();
- uniphier_sld3_pll_init(bd);
+ uniphier_sld3_dpll_init(bd);
support_card_init();
@@ -45,9 +45,5 @@
led_puts("L5");
- uniphier_sld3_enable_dpll_ssc(bd);
-
- led_puts("L6");
-
return 0;
}
diff --git a/arch/arm/mach-uniphier/init/init-sld8.c b/arch/arm/mach-uniphier/init/init-sld8.c
index 07c6d60..82d036b 100644
--- a/arch/arm/mach-uniphier/init/init-sld8.c
+++ b/arch/arm/mach-uniphier/init/init-sld8.c
@@ -1,5 +1,7 @@
/*
- * Copyright (C) 2013-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2013-2015 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -19,7 +21,7 @@
support_card_reset();
- uniphier_sld8_pll_init(bd);
+ uniphier_sld8_dpll_init(bd);
support_card_init();
@@ -53,9 +55,5 @@
led_puts("L5");
- uniphier_ld4_enable_dpll_ssc(bd);
-
- led_puts("L6");
-
return 0;
}
diff --git a/arch/arm/mach-uniphier/micro-support-card.c b/arch/arm/mach-uniphier/micro-support-card.c
index 6987d1e..04e6558 100644
--- a/arch/arm/mach-uniphier/micro-support-card.c
+++ b/arch/arm/mach-uniphier/micro-support-card.c
@@ -49,7 +49,7 @@
return 0;
}
-int check_support_card(void)
+int checkboard(void)
{
printf("SC: Micro Support Card ");
return support_card_show_revision();
diff --git a/arch/arm/mach-uniphier/micro-support-card.h b/arch/arm/mach-uniphier/micro-support-card.h
index 5da0ada..4dae603 100644
--- a/arch/arm/mach-uniphier/micro-support-card.h
+++ b/arch/arm/mach-uniphier/micro-support-card.h
@@ -1,17 +1,18 @@
/*
- * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2012-2014 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef ARCH_BOARD_H
-#define ARCH_BOARD_H
+#ifndef MICRO_SUPPORT_CARD_H
+#define MICRO_SUPPORT_CARD_H
#if defined(CONFIG_MICRO_SUPPORT_CARD)
void support_card_reset(void);
void support_card_init(void);
void support_card_late_init(void);
-int check_support_card(void);
void led_puts(const char *s);
#else
static inline void support_card_reset(void)
@@ -26,14 +27,9 @@
{
}
-static inline int check_support_card(void)
-{
- return 0;
-}
-
static inline void led_puts(const char *s)
{
}
#endif
-#endif /* ARCH_BOARD_H */
+#endif /* MICRO_SUPPORT_CARD_H */
diff --git a/arch/arm/mach-uniphier/pinctrl-glue.c b/arch/arm/mach-uniphier/pinctrl-glue.c
new file mode 100644
index 0000000..48549e3
--- /dev/null
+++ b/arch/arm/mach-uniphier/pinctrl-glue.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <linux/err.h>
+#include <dm/device.h>
+#include <dm/pinctrl.h>
+#include <dm/uclass.h>
+
+#include "init.h"
+
+int uniphier_pin_init(const char *pinconfig_name)
+{
+ struct udevice *pctldev, *config, *next;
+ int ret;
+
+ ret = uclass_first_device(UCLASS_PINCTRL, &pctldev);
+ if (ret)
+ return ret;
+
+ device_foreach_child_safe(config, next, pctldev) {
+ if (strcmp(config->name, pinconfig_name))
+ continue;
+
+ return pinctrl_generic_set_state(pctldev, config);
+ }
+
+ return -ENODEV;
+}
diff --git a/arch/arm/mach-uniphier/pinctrl/Makefile b/arch/arm/mach-uniphier/pinctrl/Makefile
deleted file mode 100644
index 7f4d9f7..0000000
--- a/arch/arm/mach-uniphier/pinctrl/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += pinctrl-sld3.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD4) += pinctrl-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += pinctrl-pro4.o
-obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pinctrl-sld8.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += pinctrl-pro5.o
-obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += pinctrl-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += pinctrl-ld6b.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD11) += pinctrl-ld20.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pinctrl-ld20.o
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c
deleted file mode 100644
index 645b901..0000000
--- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sg-regs.h"
-
-void uniphier_ld20_pin_init(void)
-{
- /* Comment format: PAD Name -> Function Name */
-
-#ifdef CONFIG_NAND_DENALI
- sg_set_pinsel(3, 0, 8, 4); /* XNFWP -> XNFWP */
- sg_set_pinsel(4, 0, 8, 4); /* XNFCE0 -> XNFCE0 */
- sg_set_pinsel(5, 0, 8, 4); /* NFRYBY0 -> NFRYBY0 */
- sg_set_pinsel(6, 0, 8, 4); /* XNFRE -> XNFRE */
- sg_set_pinsel(7, 0, 8, 4); /* XNFWE -> XNFWE */
- sg_set_pinsel(8, 0, 8, 4); /* NFALE -> NFALE */
- sg_set_pinsel(9, 0, 8, 4); /* NFCLE -> NFCLE */
- sg_set_pinsel(10, 0, 8, 4); /* NFD0 -> NFD0 */
- sg_set_pinsel(11, 0, 8, 4); /* NFD1 -> NFD1 */
- sg_set_pinsel(12, 0, 8, 4); /* NFD2 -> NFD2 */
- sg_set_pinsel(13, 0, 8, 4); /* NFD3 -> NFD3 */
- sg_set_pinsel(14, 0, 8, 4); /* NFD4 -> NFD4 */
- sg_set_pinsel(15, 0, 8, 4); /* NFD5 -> NFD5 */
- sg_set_pinsel(16, 0, 8, 4); /* NFD6 -> NFD6 */
- sg_set_pinsel(17, 0, 8, 4); /* NFD7 -> NFD7 */
- sg_set_iectrl_range(3, 17);
-#endif
-
-#ifdef CONFIG_USB_XHCI_UNIPHIER
- sg_set_pinsel(46, 0, 8, 4); /* USB0VBUS -> USB0VBUS */
- sg_set_pinsel(47, 0, 8, 4); /* USB0OD -> USB0OD */
- sg_set_pinsel(48, 0, 8, 4); /* USB1VBUS -> USB1VBUS */
- sg_set_pinsel(49, 0, 8, 4); /* USB1OD -> USB1OD */
- sg_set_pinsel(50, 0, 8, 4); /* USB2VBUS -> USB2VBUS */
- sg_set_pinsel(51, 0, 8, 4); /* USB2OD -> USB2OD */
- sg_set_pinsel(52, 0, 8, 4); /* USB3VBUS -> USB3VBUS */
- sg_set_pinsel(53, 0, 8, 4); /* USB3OD -> USB3OD */
- sg_set_iectrl_range(46, 53);
-#endif
-
- sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
- sg_set_iectrl(149);
- sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
- sg_set_iectrl(153);
-}
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld4.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld4.c
deleted file mode 100644
index 625d40c..0000000
--- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld4.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sg-regs.h"
-
-void uniphier_ld4_pin_init(void)
-{
- u32 tmp;
-
- /* Comment format: PAD Name -> Function Name */
-
-#ifdef CONFIG_NAND_DENALI
- sg_set_pinsel(158, 0, 8, 4); /* XNFRE -> XNFRE_GB */
- sg_set_pinsel(159, 0, 8, 4); /* XNFWE -> XNFWE_GB */
- sg_set_pinsel(160, 0, 8, 4); /* XFALE -> NFALE_GB */
- sg_set_pinsel(161, 0, 8, 4); /* XFCLE -> NFCLE_GB */
- sg_set_pinsel(162, 0, 8, 4); /* XNFWP -> XFNWP_GB */
- sg_set_pinsel(163, 0, 8, 4); /* XNFCE0 -> XNFCE0_GB */
- sg_set_pinsel(164, 0, 8, 4); /* NANDRYBY0 -> NANDRYBY0_GB */
- sg_set_pinsel(22, 0, 8, 4); /* MMCCLK -> XFNCE1_GB */
- sg_set_pinsel(23, 0, 8, 4); /* MMCCMD -> NANDRYBY1_GB */
- sg_set_pinsel(24, 0, 8, 4); /* MMCDAT0 -> NFD0_GB */
- sg_set_pinsel(25, 0, 8, 4); /* MMCDAT1 -> NFD1_GB */
- sg_set_pinsel(26, 0, 8, 4); /* MMCDAT2 -> NFD2_GB */
- sg_set_pinsel(27, 0, 8, 4); /* MMCDAT3 -> NFD3_GB */
- sg_set_pinsel(28, 0, 8, 4); /* MMCDAT4 -> NFD4_GB */
- sg_set_pinsel(29, 0, 8, 4); /* MMCDAT5 -> NFD5_GB */
- sg_set_pinsel(30, 0, 8, 4); /* MMCDAT6 -> NFD6_GB */
- sg_set_pinsel(31, 0, 8, 4); /* MMCDAT7 -> NFD7_GB */
-#endif
-
- tmp = readl(SG_IECTRL);
- tmp |= 0x41;
- writel(tmp, SG_IECTRL);
-}
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c
deleted file mode 100644
index 913722b..0000000
--- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sg-regs.h"
-
-void uniphier_ld6b_pin_init(void)
-{
- /* Comment format: PAD Name -> Function Name */
-
-#ifdef CONFIG_NAND_DENALI
- sg_set_pinsel(30, 0, 8, 4); /* XNFRE -> XNFRE */
- sg_set_pinsel(31, 0, 8, 4); /* XNFWE -> XNFWE */
- sg_set_pinsel(32, 0, 8, 4); /* NFALE -> NFALE */
- sg_set_pinsel(33, 0, 8, 4); /* NFCLE -> NFCLE */
- sg_set_pinsel(34, 0, 8, 4); /* XNFWP -> XNFWP */
- sg_set_pinsel(35, 0, 8, 4); /* XNFCE0 -> XNFCE0 */
- sg_set_pinsel(36, 0, 8, 4); /* NRYBY0 -> NRYBY0 */
- sg_set_pinsel(37, 0, 8, 4); /* XNFCE1 -> NRYBY1 */
- sg_set_pinsel(38, 0, 8, 4); /* NRYBY1 -> XNFCE1 */
- sg_set_pinsel(39, 0, 8, 4); /* NFD0 -> NFD0 */
- sg_set_pinsel(40, 0, 8, 4); /* NFD1 -> NFD1 */
- sg_set_pinsel(41, 0, 8, 4); /* NFD2 -> NFD2 */
- sg_set_pinsel(42, 0, 8, 4); /* NFD3 -> NFD3 */
- sg_set_pinsel(43, 0, 8, 4); /* NFD4 -> NFD4 */
- sg_set_pinsel(44, 0, 8, 4); /* NFD5 -> NFD5 */
- sg_set_pinsel(45, 0, 8, 4); /* NFD6 -> NFD6 */
- sg_set_pinsel(46, 0, 8, 4); /* NFD7 -> NFD7 */
-#endif
-
-#ifdef CONFIG_USB_XHCI_UNIPHIER
- sg_set_pinsel(56, 0, 8, 4); /* USB0VBUS -> USB0VBUS */
- sg_set_pinsel(57, 0, 8, 4); /* USB0OD -> USB0OD */
- sg_set_pinsel(58, 0, 8, 4); /* USB1VBUS -> USB1VBUS */
- sg_set_pinsel(59, 0, 8, 4); /* USB1OD -> USB1OD */
- sg_set_pinsel(60, 0, 8, 4); /* USB2VBUS -> USB2VBUS */
- sg_set_pinsel(61, 0, 8, 4); /* USB2OD -> USB2OD */
- sg_set_pinsel(62, 0, 8, 4); /* USB3VBUS -> USB3VBUS */
- sg_set_pinsel(63, 0, 8, 4); /* USB3OD -> USB3OD */
-#endif
-}
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c
deleted file mode 100644
index 3796491..0000000
--- a/arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sg-regs.h"
-
-void uniphier_pro4_pin_init(void)
-{
- /* Comment format: PAD Name -> Function Name */
-
-#ifdef CONFIG_NAND_DENALI
- sg_set_pinsel(40, 0, 4, 8); /* NFD0 -> NFD0 */
- sg_set_pinsel(41, 0, 4, 8); /* NFD1 -> NFD1 */
- sg_set_pinsel(42, 0, 4, 8); /* NFD2 -> NFD2 */
- sg_set_pinsel(43, 0, 4, 8); /* NFD3 -> NFD3 */
- sg_set_pinsel(44, 0, 4, 8); /* NFD4 -> NFD4 */
- sg_set_pinsel(45, 0, 4, 8); /* NFD5 -> NFD5 */
- sg_set_pinsel(46, 0, 4, 8); /* NFD6 -> NFD6 */
- sg_set_pinsel(47, 0, 4, 8); /* NFD7 -> NFD7 */
- sg_set_pinsel(48, 0, 4, 8); /* NFALE -> NFALE */
- sg_set_pinsel(49, 0, 4, 8); /* NFCLE -> NFCLE */
- sg_set_pinsel(50, 0, 4, 8); /* XNFRE -> XNFRE */
- sg_set_pinsel(51, 0, 4, 8); /* XNFWE -> XNFWE */
- sg_set_pinsel(52, 0, 4, 8); /* XNFWP -> XNFWP */
- sg_set_pinsel(53, 0, 4, 8); /* XNFCE0 -> XNFCE0 */
- sg_set_pinsel(54, 0, 4, 8); /* NRYBY0 -> NRYBY0 */
- /* sg_set_pinsel(131, 1, 4, 8); */ /* RXD2 -> NRYBY1 */
- /* sg_set_pinsel(132, 1, 4, 8); */ /* TXD2 -> XNFCE1 */
-#endif
-
-#ifdef CONFIG_USB_XHCI_UNIPHIER
- sg_set_pinsel(180, 0, 4, 8); /* USB0VBUS -> USB0VBUS */
- sg_set_pinsel(181, 0, 4, 8); /* USB0OD -> USB0OD */
- sg_set_pinsel(182, 0, 4, 8); /* USB1VBUS -> USB1VBUS */
- sg_set_pinsel(183, 0, 4, 8); /* USB1OD -> USB1OD */
-#endif
-
- writel(1, SG_LOADPINCTRL);
-}
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c
deleted file mode 100644
index 32ba923..0000000
--- a/arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sg-regs.h"
-
-void uniphier_pro5_pin_init(void)
-{
- /* Comment format: PAD Name -> Function Name */
-
-#ifdef CONFIG_NAND_DENALI
- sg_set_pinsel(19, 0, 4, 8); /* XNFRE -> XNFRE */
- sg_set_pinsel(20, 0, 4, 8); /* XNFWE -> XNFWE */
- sg_set_pinsel(21, 0, 4, 8); /* NFALE -> NFALE */
- sg_set_pinsel(22, 0, 4, 8); /* NFCLE -> NFCLE */
- sg_set_pinsel(23, 0, 4, 8); /* XNFWP -> XNFWP */
- sg_set_pinsel(24, 0, 4, 8); /* XNFCE0 -> XNFCE0 */
- sg_set_pinsel(25, 0, 4, 8); /* NRYBY0 -> NRYBY0 */
- sg_set_pinsel(26, 0, 4, 8); /* XNFCE1 -> XNFCE1 */
- sg_set_pinsel(27, 0, 4, 8); /* NRYBY1 -> NRYBY1 */
- sg_set_pinsel(28, 0, 4, 8); /* NFD0 -> NFD0 */
- sg_set_pinsel(29, 0, 4, 8); /* NFD1 -> NFD1 */
- sg_set_pinsel(30, 0, 4, 8); /* NFD2 -> NFD2 */
- sg_set_pinsel(31, 0, 4, 8); /* NFD3 -> NFD3 */
- sg_set_pinsel(32, 0, 4, 8); /* NFD4 -> NFD4 */
- sg_set_pinsel(33, 0, 4, 8); /* NFD5 -> NFD5 */
- sg_set_pinsel(34, 0, 4, 8); /* NFD6 -> NFD6 */
- sg_set_pinsel(35, 0, 4, 8); /* NFD7 -> NFD7 */
-#endif
-
-#ifdef CONFIG_USB_XHCI_UNIPHIER
- sg_set_pinsel(124, 0, 4, 8); /* USB0VBUS -> USB0VBUS */
- sg_set_pinsel(125, 0, 4, 8); /* USB0OD -> USB0OD */
- sg_set_pinsel(126, 0, 4, 8); /* USB1VBUS -> USB1VBUS */
- sg_set_pinsel(127, 0, 4, 8); /* USB1OD -> USB1OD */
-#endif
-
- writel(1, SG_LOADPINCTRL);
-}
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c
deleted file mode 100644
index 2d62ab3..0000000
--- a/arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sg-regs.h"
-
-void uniphier_pxs2_pin_init(void)
-{
- /* Comment format: PAD Name -> Function Name */
-
-#ifdef CONFIG_NAND_DENALI
- sg_set_pinsel(30, 8, 8, 4); /* XNFRE -> XNFRE */
- sg_set_pinsel(31, 8, 8, 4); /* XNFWE -> XNFWE */
- sg_set_pinsel(32, 8, 8, 4); /* NFALE -> NFALE */
- sg_set_pinsel(33, 8, 8, 4); /* NFCLE -> NFCLE */
- sg_set_pinsel(34, 8, 8, 4); /* XNFWP -> XNFWP */
- sg_set_pinsel(35, 8, 8, 4); /* XNFCE0 -> XNFCE0 */
- sg_set_pinsel(36, 8, 8, 4); /* NRYBY0 -> NRYBY0 */
- sg_set_pinsel(37, 8, 8, 4); /* XNFCE1 -> NRYBY1 */
- sg_set_pinsel(38, 8, 8, 4); /* NRYBY1 -> XNFCE1 */
- sg_set_pinsel(39, 8, 8, 4); /* NFD0 -> NFD0 */
- sg_set_pinsel(40, 8, 8, 4); /* NFD1 -> NFD1 */
- sg_set_pinsel(41, 8, 8, 4); /* NFD2 -> NFD2 */
- sg_set_pinsel(42, 8, 8, 4); /* NFD3 -> NFD3 */
- sg_set_pinsel(43, 8, 8, 4); /* NFD4 -> NFD4 */
- sg_set_pinsel(44, 8, 8, 4); /* NFD5 -> NFD5 */
- sg_set_pinsel(45, 8, 8, 4); /* NFD6 -> NFD6 */
- sg_set_pinsel(46, 8, 8, 4); /* NFD7 -> NFD7 */
-#endif
-
-#ifdef CONFIG_USB_XHCI_UNIPHIER
- sg_set_pinsel(56, 8, 8, 4); /* USB0VBUS -> USB0VBUS */
- sg_set_pinsel(57, 8, 8, 4); /* USB0OD -> USB0OD */
- sg_set_pinsel(58, 8, 8, 4); /* USB1VBUS -> USB1VBUS */
- sg_set_pinsel(59, 8, 8, 4); /* USB1OD -> USB1OD */
- sg_set_pinsel(60, 8, 8, 4); /* USB2VBUS -> USB2VBUS */
- sg_set_pinsel(61, 8, 8, 4); /* USB2OD -> USB2OD */
- sg_set_pinsel(62, 8, 8, 4); /* USB3VBUS -> USB3VBUS */
- sg_set_pinsel(63, 8, 8, 4); /* USB3OD -> USB3OD */
-#endif
-}
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c
deleted file mode 100644
index 62edc49..0000000
--- a/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include "../init.h"
-#include "../sg-regs.h"
-
-void uniphier_sld3_pin_init(void)
-{
-#ifdef CONFIG_USB_EHCI
- sg_set_pinsel(13, 0, 4, 4); /* USB0OC */
- sg_set_pinsel(14, 1, 4, 4); /* USB0VBUS */
-
- sg_set_pinsel(15, 0, 4, 4); /* USB1OC */
- sg_set_pinsel(16, 1, 4, 4); /* USB1VBUS */
-
- sg_set_pinsel(17, 0, 4, 4); /* USB2OC */
- sg_set_pinsel(18, 1, 4, 4); /* USB2VBUS */
-
- sg_set_pinsel(19, 0, 4, 4); /* USB3OC */
- sg_set_pinsel(20, 1, 4, 4); /* USB3VBUS */
-#endif
-
-#ifdef CONFIG_NAND_DENALI
- sg_set_pinsel(38, 1, 4, 4); /* NFALE_GB, NFCLE_GB */
- sg_set_pinsel(39, 1, 4, 4); /* XNFRYBY0_GB */
- sg_set_pinsel(40, 1, 4, 4); /* XNFCE0_GB, XNFRE_GB, XNFWE_GB, XNFWP_GB */
- sg_set_pinsel(41, 1, 4, 4); /* XNFRYBY1_GB, XNFCE1_GB */
- sg_set_pinsel(58, 1, 4, 4); /* NFD[0-3]_GB */
- sg_set_pinsel(59, 1, 4, 4); /* NFD[4-7]_GB */
-#endif
-
-#ifdef CONFIG_MMC_UNIPHIER
- /* eMMC */
- sg_set_pinsel(55, 1, 4, 4); /* XERST */
- sg_set_pinsel(56, 1, 4, 4); /* MMCDAT[0-3] */
- sg_set_pinsel(57, 1, 4, 4); /* MMCDAT[4-7] */
- sg_set_pinsel(60, 1, 4, 4); /* MMCCLK, MMCCMD */
-
- /* SD card */
- sg_set_pinsel(42, 1, 4, 4); /* SD1CLK, SD1CMD, SD1DAT[0-3] */
- sg_set_pinsel(43, 1, 4, 4); /* SD1CD */
- sg_set_pinsel(44, 1, 4, 4); /* SD1WP */
- sg_set_pinsel(45, 1, 4, 4); /* SDVTCG */
-#endif
-}
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-sld8.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld8.c
deleted file mode 100644
index 1c97c8b..0000000
--- a/arch/arm/mach-uniphier/pinctrl/pinctrl-sld8.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sg-regs.h"
-
-void uniphier_sld8_pin_init(void)
-{
- /* Comment format: PAD Name -> Function Name */
-
-#ifdef CONFIG_NAND_DENALI
- sg_set_pinsel(15, 0, 8, 4); /* XNFRE_GB -> XNFRE_GB */
- sg_set_pinsel(16, 0, 8, 4); /* XNFWE_GB -> XNFWE_GB */
- sg_set_pinsel(17, 0, 8, 4); /* XFALE_GB -> NFALE_GB */
- sg_set_pinsel(18, 0, 8, 4); /* XFCLE_GB -> NFCLE_GB */
- sg_set_pinsel(19, 0, 8, 4); /* XNFWP_GB -> XFNWP_GB */
- sg_set_pinsel(20, 0, 8, 4); /* XNFCE0_GB -> XNFCE0_GB */
- sg_set_pinsel(21, 0, 8, 4); /* NANDRYBY0_GB -> NANDRYBY0_GB */
- sg_set_pinsel(22, 0, 8, 4); /* XFNCE1_GB -> XFNCE1_GB */
- sg_set_pinsel(23, 0, 8, 4); /* NANDRYBY1_GB -> NANDRYBY1_GB */
- sg_set_pinsel(24, 0, 8, 4); /* NFD0_GB -> NFD0_GB */
- sg_set_pinsel(25, 0, 8, 4); /* NFD1_GB -> NFD1_GB */
- sg_set_pinsel(26, 0, 8, 4); /* NFD2_GB -> NFD2_GB */
- sg_set_pinsel(27, 0, 8, 4); /* NFD3_GB -> NFD3_GB */
- sg_set_pinsel(28, 0, 8, 4); /* NFD4_GB -> NFD4_GB */
- sg_set_pinsel(29, 0, 8, 4); /* NFD5_GB -> NFD5_GB */
- sg_set_pinsel(30, 0, 8, 4); /* NFD6_GB -> NFD6_GB */
- sg_set_pinsel(31, 0, 8, 4); /* NFD7_GB -> NFD7_GB */
-#endif
-}
diff --git a/arch/arm/mach-uniphier/pll/Makefile b/arch/arm/mach-uniphier/pll/Makefile
deleted file mode 100644
index 63f169c..0000000
--- a/arch/arm/mach-uniphier/pll/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += pll-init-sld3.o pll-spectrum-sld3.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD4) += pll-init-ld4.o pll-spectrum-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += pll-init-pro4.o pll-spectrum-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pll-init-sld8.o pll-spectrum-ld4.o
diff --git a/arch/arm/mach-uniphier/pll/pll-init-sld8.c b/arch/arm/mach-uniphier/pll/pll-init-sld8.c
deleted file mode 100644
index b26106e..0000000
--- a/arch/arm/mach-uniphier/pll/pll-init-sld8.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sc-regs.h"
-#include "../sg-regs.h"
-
-static void dpll_init(void)
-{
- u32 tmp;
- /*
- * Set DPLL SSC parameters for DPLLCTRL3
- * [23] DIVN_TEST 0x1
- * [22:16] DIVN 0x50
- * [10] FREFSEL_TEST 0x1
- * [9:8] FREFSEL 0x2
- * [4] ICPD_TEST 0x1
- * [3:0] ICPD 0xb
- */
- tmp = readl(SC_DPLLCTRL3);
- tmp &= ~0x00ff0717;
- tmp |= 0x00d0061b;
- writel(tmp, SC_DPLLCTRL3);
-
- /*
- * Set DPLL SSC parameters for DPLLCTRL
- * <-1%> <-2%>
- * [29:20] SSC_UPCNT 132 (0x084) 132 (0x084)
- * [14:0] SSC_dK 6335(0x18bf) 12710(0x31a6)
- */
- tmp = readl(SC_DPLLCTRL);
- tmp &= ~0x3ff07fff;
-#ifdef CONFIG_DPLL_SSC_RATE_1PER
- tmp |= 0x084018bf;
-#else
- tmp |= 0x084031a6;
-#endif
- writel(tmp, SC_DPLLCTRL);
-
- /*
- * Set DPLL SSC parameters for DPLLCTRL2
- * [31:29] SSC_STEP 0
- * [27] SSC_REG_REF 1
- * [26:20] SSC_M 79 (0x4f)
- * [19:0] SSC_K 964689 (0xeb851)
- */
- tmp = readl(SC_DPLLCTRL2);
- tmp &= ~0xefffffff;
- tmp |= 0x0cfeb851;
- writel(tmp, SC_DPLLCTRL2);
-}
-
-static void upll_init(void)
-{
- u32 tmp, clk_mode_upll, clk_mode_axosel;
-
- tmp = readl(SG_PINMON0);
- clk_mode_upll = tmp & SG_PINMON0_CLK_MODE_UPLLSRC_MASK;
- clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK;
-
- /* set 0 to SNRT(UPLLCTRL.bit28) and K_LD(UPLLCTRL.bit[27]) */
- tmp = readl(SC_UPLLCTRL);
- tmp &= ~0x18000000;
- writel(tmp, SC_UPLLCTRL);
-
- if (clk_mode_upll == SG_PINMON0_CLK_MODE_UPLLSRC_DEFAULT) {
- if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_U ||
- clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_A) {
- /* AXO: 25MHz */
- tmp &= ~0x07ffffff;
- tmp |= 0x0228f5c0;
- } else {
- /* AXO: default 24.576MHz */
- tmp &= ~0x07ffffff;
- tmp |= 0x02328000;
- }
- }
-
- writel(tmp, SC_UPLLCTRL);
-
- /* set 1 to K_LD(UPLLCTRL.bit[27]) */
- tmp |= 0x08000000;
- writel(tmp, SC_UPLLCTRL);
-
- /* wait 10 usec */
- udelay(10);
-
- /* set 1 to SNRT(UPLLCTRL.bit[28]) */
- tmp |= 0x10000000;
- writel(tmp, SC_UPLLCTRL);
-}
-
-static void vpll_init(void)
-{
- u32 tmp, clk_mode_axosel;
-
- tmp = readl(SG_PINMON0);
- clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK;
-
- /* set 1 to VPLA27WP and VPLA27WP */
- tmp = readl(SC_VPLL27ACTRL);
- tmp |= 0x00000001;
- writel(tmp, SC_VPLL27ACTRL);
- tmp = readl(SC_VPLL27BCTRL);
- tmp |= 0x00000001;
- writel(tmp, SC_VPLL27BCTRL);
-
- /* Set 0 to VPLA_K_LD and VPLB_K_LD */
- tmp = readl(SC_VPLL27ACTRL3);
- tmp &= ~0x10000000;
- writel(tmp, SC_VPLL27ACTRL3);
- tmp = readl(SC_VPLL27BCTRL3);
- tmp &= ~0x10000000;
- writel(tmp, SC_VPLL27BCTRL3);
-
- /* Set 0 to VPLA_SNRST and VPLB_SNRST */
- tmp = readl(SC_VPLL27ACTRL2);
- tmp &= ~0x10000000;
- writel(tmp, SC_VPLL27ACTRL2);
- tmp = readl(SC_VPLL27BCTRL2);
- tmp &= ~0x10000000;
- writel(tmp, SC_VPLL27BCTRL2);
-
- /* Set 0x20 to VPLA_SNRST and VPLB_SNRST */
- tmp = readl(SC_VPLL27ACTRL2);
- tmp &= ~0x0000007f;
- tmp |= 0x00000020;
- writel(tmp, SC_VPLL27ACTRL2);
- tmp = readl(SC_VPLL27BCTRL2);
- tmp &= ~0x0000007f;
- tmp |= 0x00000020;
- writel(tmp, SC_VPLL27BCTRL2);
-
- if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_U ||
- clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_A) {
- /* AXO: 25MHz */
- tmp = readl(SC_VPLL27ACTRL3);
- tmp &= ~0x000fffff;
- tmp |= 0x00066664;
- writel(tmp, SC_VPLL27ACTRL3);
- tmp = readl(SC_VPLL27BCTRL3);
- tmp &= ~0x000fffff;
- tmp |= 0x00066664;
- writel(tmp, SC_VPLL27BCTRL3);
- } else {
- /* AXO: default 24.576MHz */
- tmp = readl(SC_VPLL27ACTRL3);
- tmp &= ~0x000fffff;
- tmp |= 0x000f5800;
- writel(tmp, SC_VPLL27ACTRL3);
- tmp = readl(SC_VPLL27BCTRL3);
- tmp &= ~0x000fffff;
- tmp |= 0x000f5800;
- writel(tmp, SC_VPLL27BCTRL3);
- }
-
- /* Set 1 to VPLA_K_LD and VPLB_K_LD */
- tmp = readl(SC_VPLL27ACTRL3);
- tmp |= 0x10000000;
- writel(tmp, SC_VPLL27ACTRL3);
- tmp = readl(SC_VPLL27BCTRL3);
- tmp |= 0x10000000;
- writel(tmp, SC_VPLL27BCTRL3);
-
- /* wait 10 usec */
- udelay(10);
-
- /* Set 0 to VPLA_SNRST and VPLB_SNRST */
- tmp = readl(SC_VPLL27ACTRL2);
- tmp |= 0x10000000;
- writel(tmp, SC_VPLL27ACTRL2);
- tmp = readl(SC_VPLL27BCTRL2);
- tmp |= 0x10000000;
- writel(tmp, SC_VPLL27BCTRL2);
-
- /* set 0 to VPLA27WP and VPLA27WP */
- tmp = readl(SC_VPLL27ACTRL);
- tmp &= ~0x00000001;
- writel(tmp, SC_VPLL27ACTRL);
- tmp = readl(SC_VPLL27BCTRL);
- tmp |= ~0x00000001;
- writel(tmp, SC_VPLL27BCTRL);
-}
-
-int uniphier_sld8_pll_init(const struct uniphier_board_data *bd)
-{
- dpll_init();
- upll_init();
- vpll_init();
-
- /*
- * Wait 500 usec until dpll get stable
- * We wait 10 usec in upll_init() and vpll_init()
- * so 20 usec can be saved here.
- */
- udelay(480);
-
- return 0;
-}
diff --git a/arch/arm/mach-uniphier/pll/pll-spectrum-ld4.c b/arch/arm/mach-uniphier/pll/pll-spectrum-ld4.c
deleted file mode 100644
index dc97697..0000000
--- a/arch/arm/mach-uniphier/pll/pll-spectrum-ld4.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sc-regs.h"
-
-int uniphier_ld4_enable_dpll_ssc(const struct uniphier_board_data *bd)
-{
- u32 tmp;
-
- tmp = readl(SC_DPLLCTRL);
- tmp |= SC_DPLLCTRL_SSC_EN;
- writel(tmp, SC_DPLLCTRL);
-
- return 0;
-}
diff --git a/arch/arm/mach-uniphier/pll/pll-spectrum-sld3.c b/arch/arm/mach-uniphier/pll/pll-spectrum-sld3.c
deleted file mode 100644
index ff09a92..0000000
--- a/arch/arm/mach-uniphier/pll/pll-spectrum-sld3.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sc-regs.h"
-
-int uniphier_sld3_enable_dpll_ssc(const struct uniphier_board_data *bd)
-{
- u32 tmp;
-
- tmp = readl(SC_DPLLCTRL);
- tmp |= SC_DPLLCTRL_SSC_EN;
- writel(tmp, SC_DPLLCTRL);
-
- return 0;
-}
diff --git a/arch/arm/mach-uniphier/print_misc_info.c b/arch/arm/mach-uniphier/print_misc_info.c
deleted file mode 100644
index 695b7ae..0000000
--- a/arch/arm/mach-uniphier/print_misc_info.c
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include "micro-support-card.h"
-
-int misc_init_f(void)
-{
- return check_support_card();
-}
diff --git a/arch/arm/mach-uniphier/sc64-regs.h b/arch/arm/mach-uniphier/sc64-regs.h
index ef02830..780fdd1 100644
--- a/arch/arm/mach-uniphier/sc64-regs.h
+++ b/arch/arm/mach-uniphier/sc64-regs.h
@@ -1,7 +1,8 @@
/*
* UniPhier SC (System Control) block registers for ARMv8 SoCs
*
- * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -11,6 +12,27 @@
#define SC_BASE_ADDR 0x61840000
+/* PLL type: SSC */
+#define SC_CPLLCTRL (SC_BASE_ADDR | 0x1400) /* LD11/20: CPU/ARM */
+#define SC_SPLLCTRL (SC_BASE_ADDR | 0x1410) /* LD11/20: misc */
+#define SC_SPLL2CTRL (SC_BASE_ADDR | 0x1420) /* LD20: IPP */
+#define SC_MPLLCTRL (SC_BASE_ADDR | 0x1430) /* LD11/20: Video codec */
+#define SC_VSPLLCTRL (SC_BASE_ADDR | 0x1440) /* LD11 */
+#define SC_VPPLLCTRL (SC_BASE_ADDR | 0x1440) /* LD20: VPE etc. */
+#define SC_GPPLLCTRL (SC_BASE_ADDR | 0x1450) /* LD20: GPU/Mali */
+#define SC_DPLLCTRL (SC_BASE_ADDR | 0x1460) /* LD11: DDR memory */
+#define SC_DPLL0CTRL (SC_BASE_ADDR | 0x1460) /* LD20: DDR memory 0 */
+#define SC_DPLL1CTRL (SC_BASE_ADDR | 0x1470) /* LD20: DDR memory 1 */
+#define SC_DPLL2CTRL (SC_BASE_ADDR | 0x1480) /* LD20: DDR memory 2 */
+
+/* PLL type: VPLL27 */
+#define SC_VPLL27FCTRL (SC_BASE_ADDR | 0x1500)
+#define SC_VPLL27ACTRL (SC_BASE_ADDR | 0x1520)
+
+/* PLL type: DSPLL */
+#define SC_VPLL8KCTRL (SC_BASE_ADDR | 0x1540)
+#define SC_A2PLLCTRL (SC_BASE_ADDR | 0x15C0)
+
#define SC_RSTCTRL (SC_BASE_ADDR | 0x2000)
#define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008)
#define SC_RSTCTRL4 (SC_BASE_ADDR | 0x200c)
@@ -41,4 +63,12 @@
#define SC_CLKCTRL7_UMC31 (1 << 1)
#define SC_CLKCTRL7_UMC30 (1 << 0)
+#define SC_CA72_GEARST (SC_BASE_ADDR | 0x8080)
+#define SC_CA72_GEARSET (SC_BASE_ADDR | 0x8084)
+#define SC_CA72_GEARUPD (SC_BASE_ADDR | 0x8088)
+#define SC_CA53_GEARST (SC_BASE_ADDR | 0x8080)
+#define SC_CA53_GEARSET (SC_BASE_ADDR | 0x8084)
+#define SC_CA53_GEARUPD (SC_BASE_ADDR | 0x8088)
+#define SC_CA_GEARUPD (1 << 0)
+
#endif /* SC64_REGS_H */
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index a982320..a1175ee 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -1,5 +1,29 @@
if ARCH_ZYNQ
+config SPL_FAT_SUPPORT
+ default y
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBDISK_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_MMC_SUPPORT
+ default y if ZYNQ_SDHCI
+
+config SPL_SERIAL_SUPPORT
+ default y
+
+config SPL_SPI_FLASH_SUPPORT
+ default y if ZYNQ_QSPI
+
+config SPL_SPI_SUPPORT
+ default y if ZYNQ_QSPI
+
config SYS_BOARD
default "zynq"
diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index 914b1fe..ba9171e 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -43,12 +43,8 @@
unsigned int zynq_get_silicon_version(void)
{
- unsigned int ver;
-
- ver = (readl(&devcfg_base->mctrl) &
- ZYNQ_SILICON_VER_MASK) >> ZYNQ_SILICON_VER_SHIFT;
-
- return ver;
+ return (readl(&devcfg_base->mctrl) & ZYNQ_SILICON_VER_MASK)
+ >> ZYNQ_SILICON_VER_SHIFT;
}
void reset_cpu(ulong addr)
diff --git a/arch/avr32/cpu/interrupts.c b/arch/avr32/cpu/interrupts.c
index 4a03e19..de20220 100644
--- a/arch/avr32/cpu/interrupts.c
+++ b/arch/avr32/cpu/interrupts.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <div64.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/sysreg.h>
diff --git a/arch/avr32/include/asm/errno.h b/arch/avr32/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/avr32/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/blackfin/cpu/gpio.c b/arch/blackfin/cpu/gpio.c
index 4b4cf93..81b7090 100644
--- a/arch/blackfin/cpu/gpio.c
+++ b/arch/blackfin/cpu/gpio.c
@@ -8,7 +8,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/portmux.h>
diff --git a/arch/blackfin/cpu/interrupts.c b/arch/blackfin/cpu/interrupts.c
index 45c92c3..abb7dc1 100644
--- a/arch/blackfin/cpu/interrupts.c
+++ b/arch/blackfin/cpu/interrupts.c
@@ -47,10 +47,7 @@
*/
ulong get_tbclk(void)
{
- ulong tbclk;
-
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
+ return CONFIG_SYS_HZ;
}
void enable_interrupts(void)
diff --git a/arch/blackfin/include/asm/errno.h b/arch/blackfin/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/blackfin/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S
index b5d51bd..1bd914e 100644
--- a/arch/m68k/cpu/mcf5227x/start.S
+++ b/arch/m68k/cpu/mcf5227x/start.S
@@ -10,10 +10,6 @@
#include "version.h"
#include <asm/cache.h>
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING ""
-#endif
-
#define _START _start
#define _FAULT _fault
diff --git a/arch/m68k/cpu/mcf523x/start.S b/arch/m68k/cpu/mcf523x/start.S
index c4f6082..8533108 100644
--- a/arch/m68k/cpu/mcf523x/start.S
+++ b/arch/m68k/cpu/mcf523x/start.S
@@ -10,10 +10,6 @@
#include "version.h"
#include <asm/cache.h>
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING ""
-#endif
-
#define _START _start
#define _FAULT _fault
diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S
index 9837c41..ab199b1 100644
--- a/arch/m68k/cpu/mcf52x2/start.S
+++ b/arch/m68k/cpu/mcf52x2/start.S
@@ -10,10 +10,6 @@
#include "version.h"
#include <asm/cache.h>
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING ""
-#endif
-
#define _START _start
#define _FAULT _fault
diff --git a/arch/m68k/cpu/mcf530x/start.S b/arch/m68k/cpu/mcf530x/start.S
index da41c9a..536daa4 100644
--- a/arch/m68k/cpu/mcf530x/start.S
+++ b/arch/m68k/cpu/mcf530x/start.S
@@ -10,10 +10,6 @@
#include "version.h"
#include <asm/cache.h>
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING ""
-#endif
-
#define _START _start
#define _FAULT _fault
diff --git a/arch/m68k/cpu/mcf532x/start.S b/arch/m68k/cpu/mcf532x/start.S
index 302fca5..4678643 100644
--- a/arch/m68k/cpu/mcf532x/start.S
+++ b/arch/m68k/cpu/mcf532x/start.S
@@ -13,10 +13,6 @@
#include "version.h"
#include <asm/cache.h>
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING ""
-#endif
-
#define _START _start
#define _FAULT _fault
diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S
index bc48ca0..0487d84 100644
--- a/arch/m68k/cpu/mcf5445x/start.S
+++ b/arch/m68k/cpu/mcf5445x/start.S
@@ -15,10 +15,6 @@
#include "version.h"
#include <asm/cache.h>
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING ""
-#endif
-
#define _START _start
#define _FAULT _fault
diff --git a/arch/m68k/cpu/mcf547x_8x/start.S b/arch/m68k/cpu/mcf547x_8x/start.S
index fecf253..2296f9a 100644
--- a/arch/m68k/cpu/mcf547x_8x/start.S
+++ b/arch/m68k/cpu/mcf547x_8x/start.S
@@ -10,10 +10,6 @@
#include "version.h"
#include <asm/cache.h>
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING ""
-#endif
-
#define _START _start
#define _FAULT _fault
diff --git a/arch/m68k/include/asm/errno.h b/arch/m68k/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/m68k/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c
index 3163354..cb90c83 100644
--- a/arch/m68k/lib/time.c
+++ b/arch/m68k/lib/time.c
@@ -192,7 +192,5 @@
*/
ulong get_tbclk(void)
{
- ulong tbclk;
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
+ return CONFIG_SYS_HZ;
}
diff --git a/arch/microblaze/include/asm/errno.h b/arch/microblaze/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/microblaze/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 21066f0..097ad58 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -26,6 +26,8 @@
select DM
select DM_SERIAL
select DYNAMIC_IO_PORT_BASE
+ select MIPS_CM
+ select MIPS_L2_CACHE
select OF_CONTROL
select OF_ISA_BUS
select SUPPORTS_BIG_ENDIAN
@@ -73,10 +75,43 @@
select OF_CONTROL
select DM
+config TARGET_BOSTON
+ bool "Support Boston"
+ select DM
+ select DM_SERIAL
+ select OF_CONTROL
+ select MIPS_CM
+ select MIPS_L1_CACHE_SHIFT_6
+ select MIPS_L2_CACHE
+ select SUPPORTS_BIG_ENDIAN
+ select SUPPORTS_LITTLE_ENDIAN
+ select SUPPORTS_CPU_MIPS32_R1
+ select SUPPORTS_CPU_MIPS32_R2
+ select SUPPORTS_CPU_MIPS32_R6
+ select SUPPORTS_CPU_MIPS64_R1
+ select SUPPORTS_CPU_MIPS64_R2
+ select SUPPORTS_CPU_MIPS64_R6
+
+config TARGET_XILFPGA
+ bool "Support Imagination Xilfpga"
+ select OF_CONTROL
+ select DM
+ select DM_SERIAL
+ select DM_GPIO
+ select DM_ETH
+ select SUPPORTS_LITTLE_ENDIAN
+ select SUPPORTS_CPU_MIPS32_R1
+ select SUPPORTS_CPU_MIPS32_R2
+ select MIPS_L1_CACHE_SHIFT_4
+ help
+ This supports IMGTEC MIPSfpga platform
+
endchoice
source "board/dbau1x00/Kconfig"
+source "board/imgtec/boston/Kconfig"
source "board/imgtec/malta/Kconfig"
+source "board/imgtec/xilfpga/Kconfig"
source "board/micronas/vct/Kconfig"
source "board/pb1x00/Kconfig"
source "board/qemu-mips/Kconfig"
@@ -300,8 +335,30 @@
default "4" if MIPS_L1_CACHE_SHIFT_4
default "5"
+config MIPS_L2_CACHE
+ bool
+ help
+ Select this if your system includes an L2 cache and you want U-Boot
+ to initialise & maintain it.
+
config DYNAMIC_IO_PORT_BASE
bool
+
+config MIPS_CM
+ bool
+ help
+ Select this if your system contains a MIPS Coherence Manager and you
+ wish U-Boot to configure it or make use of it to retrieve system
+ information such as cache configuration.
+
+config MIPS_CM_BASE
+ hex
+ default 0x1fbf8000
+ help
+ The physical base address at which to map the MIPS Coherence Manager
+ Global Configuration Registers (GCRs). This should be set such that
+ the GCRs occupy a region of the physical address space which is
+ otherwise unused, or at minimum that software doesn't need to access.
endif
diff --git a/arch/mips/cpu/Makefile b/arch/mips/cpu/Makefile
index fc6b455..429fd3a 100644
--- a/arch/mips/cpu/Makefile
+++ b/arch/mips/cpu/Makefile
@@ -7,3 +7,5 @@
obj-y += time.o
obj-y += interrupts.o
obj-y += cpu.o
+
+obj-$(CONFIG_MIPS_CM) += cm_init.o
diff --git a/arch/mips/cpu/cm_init.S b/arch/mips/cpu/cm_init.S
new file mode 100644
index 0000000..ddcaa49
--- /dev/null
+++ b/arch/mips/cpu/cm_init.S
@@ -0,0 +1,45 @@
+/*
+ * MIPS Coherence Manager (CM) Initialisation
+ *
+ * Copyright (c) 2016 Imagination Technologies Ltd.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/addrspace.h>
+#include <asm/asm.h>
+#include <asm/cm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+
+LEAF(mips_cm_map)
+ /* Config3 must exist for a CM to be present */
+ mfc0 t0, CP0_CONFIG, 1
+ bgez t0, 2f
+ mfc0 t0, CP0_CONFIG, 2
+ bgez t0, 2f
+
+ /* Check Config3.CMGCR to determine CM presence */
+ mfc0 t0, CP0_CONFIG, 3
+ and t0, t0, MIPS_CONF3_CMGCR
+ beqz t0, 2f
+
+ /* Find the current physical GCR base address */
+1: MFC0 t0, CP0_CMGCRBASE
+ PTR_SLL t0, t0, 4
+
+ /* If the GCRs are where we want, we're done */
+ PTR_LI t1, CONFIG_MIPS_CM_BASE
+ beq t0, t1, 2f
+
+ /* Move the GCRs to our configured base address */
+ PTR_LI t2, CKSEG1
+ PTR_ADDU t0, t0, t2
+ sw zero, GCR_BASE_UPPER(t0)
+ sw t1, GCR_BASE(t0)
+
+ /* Re-check the GCR base */
+ b 1b
+
+2: jr ra
+ END(mips_cm_map)
diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/cpu.c
index 391feb3..1b919ed 100644
--- a/arch/mips/cpu/cpu.c
+++ b/arch/mips/cpu/cpu.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <command.h>
#include <linux/compiler.h>
+#include <asm/cache.h>
#include <asm/mipsregs.h>
#include <asm/reboot.h>
@@ -35,3 +36,9 @@
write_c0_index(index);
tlb_write_indexed();
}
+
+int arch_cpu_init(void)
+{
+ mips_cache_probe();
+ return 0;
+}
diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S
index fc6dd66..3f0fc12 100644
--- a/arch/mips/cpu/start.S
+++ b/arch/mips/cpu/start.S
@@ -12,10 +12,6 @@
#include <asm/regdef.h>
#include <asm/mipsregs.h>
-#ifndef CONFIG_SYS_MIPS_CACHE_MODE
-#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
-#endif
-
#ifndef CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
CONFIG_SYS_INIT_SP_OFFSET)
@@ -112,9 +108,28 @@
.align 4
reset:
+#if __mips_isa_rev >= 6
+ mfc0 t0, CP0_CONFIG, 5
+ and t0, t0, MIPS_CONF5_VP
+ beqz t0, 1f
+ nop
+
+ b 2f
+ mfc0 t0, CP0_GLOBALNUMBER
+#endif
+
+1: mfc0 t0, CP0_EBASE
+ and t0, t0, EBASE_CPUNUM
+
+ /* Hang if this isn't the first CPU in the system */
+2: beqz t0, 4f
+ nop
+3: wait
+ b 3b
+ nop
/* Clear watch registers */
- MTC0 zero, CP0_WATCHLO
+4: MTC0 zero, CP0_WATCHLO
mtc0 zero, CP0_WATCHHI
/* WP(Watch Pending), SW0/1 should be cleared */
@@ -127,9 +142,11 @@
mtc0 zero, CP0_COMPARE
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- /* CONFIG0 register */
- li t0, CONF_CM_UNCACHED
+ mfc0 t0, CP0_CONFIG
+ and t0, t0, MIPS_CONF_IMPL
+ or t0, t0, CONF_CM_UNCACHED
mtc0 t0, CP0_CONFIG
+ ehb
#endif
/*
@@ -144,20 +161,31 @@
1:
PTR_L gp, 0(ra)
+#ifdef CONFIG_MIPS_CM
+ PTR_LA t9, mips_cm_map
+ jalr t9
+ nop
+#endif
+
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+# ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD
/* Initialize any external memory */
PTR_LA t9, lowlevel_init
jalr t9
nop
+# endif
/* Initialize caches... */
PTR_LA t9, mips_cache_reset
jalr t9
nop
- /* ... and enable them */
- li t0, CONFIG_SYS_MIPS_CACHE_MODE
- mtc0 t0, CP0_CONFIG
+# ifndef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD
+ /* Initialize any external memory */
+ PTR_LA t9, lowlevel_init
+ jalr t9
+ nop
+# endif
#endif
/* Set up temporary stack */
@@ -214,12 +242,9 @@
PTR_LI t0, CONFIG_SYS_MONITOR_BASE
PTR_SUB s1, s2, t0 # s1 <-- relocation offset
- PTR_LA t3, in_ram
- PTR_L t2, -(3 * PTRSIZE)(t3) # t2 <-- __image_copy_end
+ PTR_LA t2, __image_copy_end
move t1, a2
- PTR_ADD gp, s1 # adjust gp
-
/*
* t0 = source address
* t1 = target address
@@ -232,32 +257,14 @@
blt t0, t2, 1b
PTR_ADDU t1, PTRSIZE
- /* If caches were enabled, we would have to flush them here. */
- PTR_SUB a1, t1, s2 # a1 <-- size
- PTR_LA t9, flush_cache
- jalr t9
- move a0, s2 # a0 <-- destination address
-
- /* Jump to where we've relocated ourselves */
- PTR_ADDIU t0, s2, in_ram - _start
- jr t0
- nop
-
- PTR __rel_dyn_end
- PTR __rel_dyn_start
- PTR __image_copy_end
- PTR _GLOBAL_OFFSET_TABLE_
- PTR num_got_entries
-
-in_ram:
/*
* Now we want to update GOT.
*
* GOT[0] is reserved. GOT[1] is also reserved for the dynamic object
* generated by GNU ld. Skip these reserved entries from relocation.
*/
- PTR_L t3, -(1 * PTRSIZE)(t0) # t3 <-- num_got_entries
- PTR_L t8, -(2 * PTRSIZE)(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_
+ PTR_LA t3, num_got_entries
+ PTR_LA t8, _GLOBAL_OFFSET_TABLE_
PTR_ADD t8, s1 # t8 now holds relocated _G_O_T_
PTR_ADDIU t8, t8, 2 * PTRSIZE # skipping first two entries
PTR_LI t2, 2
@@ -272,8 +279,8 @@
PTR_ADDIU t8, PTRSIZE
/* Update dynamic relocations */
- PTR_L t1, -(4 * PTRSIZE)(t0) # t1 <-- __rel_dyn_start
- PTR_L t2, -(5 * PTRSIZE)(t0) # t2 <-- __rel_dyn_end
+ PTR_LA t1, __rel_dyn_start
+ PTR_LA t2, __rel_dyn_end
b 2f # skip first reserved entry
PTR_ADDIU t1, 2 * PTRSIZE
@@ -298,6 +305,20 @@
PTR_ADDIU t1, 2 * PTRSIZE # each rel.dyn entry is 2*PTRSIZE bytes
/*
+ * Flush caches to ensure our newly modified instructions are visible
+ * to the instruction cache. We're still running with the old GOT, so
+ * apply the reloc offset to the start address.
+ */
+ PTR_LA a0, __text_start
+ PTR_LA a1, __text_end
+ PTR_SUB a1, a1, a0
+ PTR_LA t9, flush_cache
+ jalr t9
+ PTR_ADD a0, s1
+
+ PTR_ADD gp, s1 # adjust gp
+
+ /*
* Clear BSS
*
* GOT is now relocated. Thus __bss_start and __bss_end can be
diff --git a/arch/mips/cpu/u-boot.lds b/arch/mips/cpu/u-boot.lds
index 7d71c11..0129c99 100644
--- a/arch/mips/cpu/u-boot.lds
+++ b/arch/mips/cpu/u-boot.lds
@@ -19,7 +19,9 @@
. = ALIGN(4);
.text : {
+ __text_start = .;
*(.text*)
+ __text_end = .;
}
. = ALIGN(4);
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index 2f04d73..30fcc2b 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -4,8 +4,10 @@
dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
+dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
+dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
targets += $(dtb-y)
diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts
new file mode 100644
index 0000000..1d4eeda
--- /dev/null
+++ b/arch/mips/dts/img,boston.dts
@@ -0,0 +1,222 @@
+/dts-v1/;
+
+#include <dt-bindings/clock/boston-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/mips-gic.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "img,boston";
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "img,mips";
+ reg = <0>;
+ clocks = <&clk_boston BOSTON_CLK_CPU>;
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ gic: interrupt-controller {
+ compatible = "mti,gic";
+
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ timer {
+ compatible = "mti,gic-timer";
+ interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
+ clocks = <&clk_boston BOSTON_CLK_CPU>;
+ };
+ };
+
+ pci0: pci@10000000 {
+ status = "disabled";
+ compatible = "xlnx,axi-pcie-host-1.00.a";
+ device_type = "pci";
+ reg = <0x10000000 0x2000000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
+
+ ranges = <0x02000000 0 0x40000000
+ 0x40000000 0 0x40000000>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pci0_intc 0>,
+ <0 0 0 2 &pci0_intc 1>,
+ <0 0 0 3 &pci0_intc 2>,
+ <0 0 0 4 &pci0_intc 3>;
+
+ pci0_intc: interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+ };
+
+ pci1: pci@12000000 {
+ status = "disabled";
+ compatible = "xlnx,axi-pcie-host-1.00.a";
+ device_type = "pci";
+ reg = <0x12000000 0x2000000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
+
+ ranges = <0x02000000 0 0x20000000
+ 0x20000000 0 0x20000000>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pci1_intc 0>,
+ <0 0 0 2 &pci1_intc 1>,
+ <0 0 0 3 &pci1_intc 2>,
+ <0 0 0 4 &pci1_intc 3>;
+
+ pci1_intc: interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+ };
+
+ pci2: pci@14000000 {
+ compatible = "xlnx,axi-pcie-host-1.00.a";
+ device_type = "pci";
+ reg = <0x14000000 0x2000000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
+
+ ranges = <0x02000000 0 0x16000000
+ 0x16000000 0 0x100000>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pci2_intc 0>,
+ <0 0 0 2 &pci2_intc 1>,
+ <0 0 0 3 &pci2_intc 2>,
+ <0 0 0 4 &pci2_intc 3>;
+
+ pci2_intc: interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+
+ pci2_root@0,0,0 {
+ compatible = "pci10ee,7021";
+ reg = <0x00000000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+
+ eg20t_bridge@1,0,0 {
+ compatible = "pci8086,8800";
+ reg = <0x00010000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+
+ eg20t_mac@2,0,1 {
+ compatible = "pci8086,8802";
+ reg = <0x00020100 0 0 0 0>;
+ phy-reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>;
+ };
+
+ eg20t_gpio: eg20t_gpio@2,0,2 {
+ compatible = "pci8086,8803";
+ reg = <0x00020200 0 0 0 0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ eg20t_i2c@2,12,2 {
+ compatible = "pci8086,8817";
+ reg = <0x00026200 0 0 0 0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtc@0x68 {
+ compatible = "st,m41t81s";
+ reg = <0x68>;
+ };
+ };
+ };
+ };
+ };
+
+ plat_regs: system-controller@17ffd000 {
+ compatible = "img,boston-platform-regs", "syscon";
+ reg = <0x17ffd000 0x1000>;
+ u-boot,dm-pre-reloc;
+ };
+
+ clk_boston: clock {
+ compatible = "img,boston-clock";
+ #clock-cells = <1>;
+ regmap = <&plat_regs>;
+ u-boot,dm-pre-reloc;
+ };
+
+ reboot: syscon-reboot {
+ compatible = "syscon-reboot";
+ regmap = <&plat_regs>;
+ offset = <0x10>;
+ mask = <0x10>;
+ };
+
+ uart0: uart@17ffe000 {
+ compatible = "ns16550a";
+ reg = <0x17ffe000 0x1000>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&clk_boston BOSTON_CLK_SYS>;
+
+ u-boot,dm-pre-reloc;
+ };
+
+ lcd: lcd@17fff000 {
+ compatible = "img,boston-lcd";
+ reg = <0x17fff000 0x8>;
+ };
+
+ flash@18000000 {
+ compatible = "cfi-flash";
+ reg = <0x18000000 0x8000000>;
+ bank-width = <2>;
+ };
+};
diff --git a/arch/mips/dts/microAptiv.dtsi b/arch/mips/dts/microAptiv.dtsi
new file mode 100644
index 0000000..81d518e
--- /dev/null
+++ b/arch/mips/dts/microAptiv.dtsi
@@ -0,0 +1,21 @@
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "img,xilfpga";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,m14Kc";
+ clocks = <&ext>;
+ reg = <0>;
+ };
+ };
+
+ ext: ext {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+};
diff --git a/arch/mips/dts/nexys4ddr.dts b/arch/mips/dts/nexys4ddr.dts
new file mode 100644
index 0000000..e254ab1
--- /dev/null
+++ b/arch/mips/dts/nexys4ddr.dts
@@ -0,0 +1,62 @@
+/dts-v1/;
+
+#include "microAptiv.dtsi"
+
+/ {
+ compatible = "digilent,nexys4ddr";
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x08000000>;
+ };
+
+ cpuintc: interrupt-controller@0 {
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ compatible = "mti,cpu-interrupt-controller";
+ };
+
+ aliases {
+ console = &axi_uart16550;
+ };
+
+ axi_ethernetlite: ethernet@10e00000 {
+ compatible = "xlnx,xps-ethernetlite-1.00.a";
+ device_type = "network";
+ local-mac-address = [08 86 4C 0D F7 09];
+ phy-handle = <&phy0>;
+ reg = <0x10e00000 0x10000>;
+ xlnx,duplex = <0x1>;
+ xlnx,include-global-buffers = <0x1>;
+ xlnx,include-internal-loopback = <0x0>;
+ xlnx,include-mdio = <0x1>;
+ xlnx,instance = "axi_ethernetlite_inst";
+ xlnx,rx-ping-pong = <0x1>;
+ xlnx,s-axi-id-width = <0x1>;
+ xlnx,tx-ping-pong = <0x1>;
+ xlnx,use-internal = <0x0>;
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: phy@1 {
+ compatible = <0x0007c0f0 0xfffffff0>;
+ device_type = "ethernet-phy";
+ reg = <1>;
+ } ;
+ } ;
+ } ;
+
+
+ axi_uart16550: serial@10400000 {
+ compatible = "ns16550a";
+ reg = <0x10400000 0x10000>;
+
+ reg-shift = <2>;
+ reg-offset = <0x1000>;
+
+ clock-frequency = <50000000>;
+
+ };
+};
+
diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h
index 0cea581..669c362 100644
--- a/arch/mips/include/asm/cache.h
+++ b/arch/mips/include/asm/cache.h
@@ -19,4 +19,13 @@
*/
#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
+/**
+ * mips_cache_probe() - Probe the properties of the caches
+ *
+ * Call this to probe the properties such as line sizes of the caches
+ * present in the system, if any. This must be done before cache maintenance
+ * functions such as flush_cache may be called.
+ */
+void mips_cache_probe(void);
+
#endif /* __MIPS_CACHE_H__ */
diff --git a/arch/mips/include/asm/cm.h b/arch/mips/include/asm/cm.h
new file mode 100644
index 0000000..b9ab0c6
--- /dev/null
+++ b/arch/mips/include/asm/cm.h
@@ -0,0 +1,62 @@
+/*
+ * MIPS Coherence Manager (CM) Register Definitions
+ *
+ * Copyright (c) 2016 Imagination Technologies Ltd.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef __MIPS_ASM_CM_H__
+#define __MIPS_ASM_CM_H__
+
+/* Global Control Register (GCR) offsets */
+#define GCR_BASE 0x0008
+#define GCR_BASE_UPPER 0x000c
+#define GCR_REV 0x0030
+#define GCR_L2_CONFIG 0x0130
+#define GCR_L2_TAG_ADDR 0x0600
+#define GCR_L2_TAG_ADDR_UPPER 0x0604
+#define GCR_L2_TAG_STATE 0x0608
+#define GCR_L2_TAG_STATE_UPPER 0x060c
+#define GCR_L2_DATA 0x0610
+#define GCR_L2_DATA_UPPER 0x0614
+#define GCR_Cx_COHERENCE 0x2008
+
+/* GCR_REV CM versions */
+#define GCR_REV_CM3 0x0800
+
+/* GCR_L2_CONFIG fields */
+#define GCR_L2_CONFIG_ASSOC_SHIFT 0
+#define GCR_L2_CONFIG_ASSOC_BITS 8
+#define GCR_L2_CONFIG_LINESZ_SHIFT 8
+#define GCR_L2_CONFIG_LINESZ_BITS 4
+#define GCR_L2_CONFIG_SETSZ_SHIFT 12
+#define GCR_L2_CONFIG_SETSZ_BITS 4
+#define GCR_L2_CONFIG_BYPASS (1 << 20)
+
+/* GCR_Cx_COHERENCE */
+#define GCR_Cx_COHERENCE_DOM_EN (0xff << 0)
+#define GCR_Cx_COHERENCE_EN (0x1 << 0)
+
+#ifndef __ASSEMBLY__
+
+#include <asm/io.h>
+
+static inline void *mips_cm_base(void)
+{
+ return (void *)CKSEG1ADDR(CONFIG_MIPS_CM_BASE);
+}
+
+static inline unsigned long mips_cm_l2_line_size(void)
+{
+ unsigned long l2conf, line_sz;
+
+ l2conf = __raw_readl(mips_cm_base() + GCR_L2_CONFIG);
+
+ line_sz = l2conf >> GCR_L2_CONFIG_LINESZ_SHIFT;
+ line_sz &= GENMASK(GCR_L2_CONFIG_LINESZ_BITS - 1, 0);
+ return line_sz ? (2 << line_sz) : 0;
+}
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __MIPS_ASM_CM_H__ */
diff --git a/arch/mips/include/asm/errno.h b/arch/mips/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/mips/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h
index 37f8ed5..0078bbe 100644
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -21,6 +21,13 @@
unsigned long rev;
unsigned long ver;
#endif
+#ifdef CONFIG_SYS_CACHE_SIZE_AUTO
+ unsigned short l1i_line_size;
+ unsigned short l1d_line_size;
+#endif
+#ifdef CONFIG_MIPS_L2_CACHE
+ unsigned short l2_line_size;
+#endif
};
#include <asm-generic/global_data.h>
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 3185dc7..9ab5063 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -39,6 +39,7 @@
#define CP0_ENTRYLO0 $2
#define CP0_ENTRYLO1 $3
#define CP0_CONF $3
+#define CP0_GLOBALNUMBER $3, 1
#define CP0_CONTEXT $4
#define CP0_PAGEMASK $5
#define CP0_WIRED $6
@@ -361,6 +362,11 @@
#define CAUSEF_BD (_ULCAST_(1) << 31)
/*
+ * Bits in the coprocessor 0 EBase register.
+ */
+#define EBASE_CPUNUM 0x3ff
+
+/*
* Bits in the coprocessor 0 config register.
*/
/* Generic bits. */
@@ -450,6 +456,7 @@
#define MIPS_CONF_MT_FTLB (_ULCAST_(4) << 7)
#define MIPS_CONF_AR (_ULCAST_(7) << 10)
#define MIPS_CONF_AT (_ULCAST_(3) << 13)
+#define MIPS_CONF_IMPL (_ULCAST_(0x1ff) << 16)
#define MIPS_CONF_M (_ULCAST_(1) << 31)
/*
@@ -484,9 +491,13 @@
#define MIPS_CONF1_TLBS_SIZE (6)
#define MIPS_CONF1_TLBS (_ULCAST_(63) << MIPS_CONF1_TLBS_SHIFT)
+#define MIPS_CONF2_SA_SHF 0
#define MIPS_CONF2_SA (_ULCAST_(15) << 0)
+#define MIPS_CONF2_SL_SHF 4
#define MIPS_CONF2_SL (_ULCAST_(15) << 4)
+#define MIPS_CONF2_SS_SHF 8
#define MIPS_CONF2_SS (_ULCAST_(15) << 8)
+#define MIPS_CONF2_L2B (_ULCAST_(1) << 12)
#define MIPS_CONF2_SU (_ULCAST_(15) << 12)
#define MIPS_CONF2_TA (_ULCAST_(15) << 16)
#define MIPS_CONF2_TL (_ULCAST_(15) << 20)
@@ -548,8 +559,10 @@
#define MIPS_CONF5_MRP (_ULCAST_(1) << 3)
#define MIPS_CONF5_LLB (_ULCAST_(1) << 4)
#define MIPS_CONF5_MVH (_ULCAST_(1) << 5)
+#define MIPS_CONF5_VP (_ULCAST_(1) << 7)
#define MIPS_CONF5_FRE (_ULCAST_(1) << 8)
#define MIPS_CONF5_UFE (_ULCAST_(1) << 9)
+#define MIPS_CONF5_L2C (_ULCAST_(1) << 10)
#define MIPS_CONF5_MSAEN (_ULCAST_(1) << 27)
#define MIPS_CONF5_EVA (_ULCAST_(1) << 28)
#define MIPS_CONF5_CV (_ULCAST_(1) << 29)
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index db81953..bd14ba6 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -7,34 +7,85 @@
#include <common.h>
#include <asm/cacheops.h>
+#include <asm/cm.h>
#include <asm/mipsregs.h>
-static inline unsigned long icache_line_size(void)
+DECLARE_GLOBAL_DATA_PTR;
+
+static void probe_l2(void)
{
- unsigned long conf1, il;
+#ifdef CONFIG_MIPS_L2_CACHE
+ unsigned long conf2, sl;
+ bool l2c = false;
- if (!config_enabled(CONFIG_SYS_CACHE_SIZE_AUTO))
- return CONFIG_SYS_ICACHE_LINE_SIZE;
+ if (!(read_c0_config1() & MIPS_CONF_M))
+ return;
+
+ conf2 = read_c0_config2();
+
+ if (__mips_isa_rev >= 6) {
+ l2c = conf2 & MIPS_CONF_M;
+ if (l2c)
+ l2c = read_c0_config3() & MIPS_CONF_M;
+ if (l2c)
+ l2c = read_c0_config4() & MIPS_CONF_M;
+ if (l2c)
+ l2c = read_c0_config5() & MIPS_CONF5_L2C;
+ }
+
+ if (l2c && config_enabled(CONFIG_MIPS_CM)) {
+ gd->arch.l2_line_size = mips_cm_l2_line_size();
+ } else if (l2c) {
+ /* We don't know how to retrieve L2 config on this system */
+ BUG();
+ } else {
+ sl = (conf2 & MIPS_CONF2_SL) >> MIPS_CONF2_SL_SHF;
+ gd->arch.l2_line_size = sl ? (2 << sl) : 0;
+ }
+#endif
+}
+
+void mips_cache_probe(void)
+{
+#ifdef CONFIG_SYS_CACHE_SIZE_AUTO
+ unsigned long conf1, il, dl;
conf1 = read_c0_config1();
+
il = (conf1 & MIPS_CONF1_IL) >> MIPS_CONF1_IL_SHF;
- if (!il)
- return 0;
- return 2 << il;
+ dl = (conf1 & MIPS_CONF1_DL) >> MIPS_CONF1_DL_SHF;
+
+ gd->arch.l1i_line_size = il ? (2 << il) : 0;
+ gd->arch.l1d_line_size = dl ? (2 << dl) : 0;
+#endif
+ probe_l2();
}
-static inline unsigned long dcache_line_size(void)
+static inline unsigned long icache_line_size(void)
{
- unsigned long conf1, dl;
+#ifdef CONFIG_SYS_CACHE_SIZE_AUTO
+ return gd->arch.l1i_line_size;
+#else
+ return CONFIG_SYS_ICACHE_LINE_SIZE;
+#endif
+}
- if (!config_enabled(CONFIG_SYS_CACHE_SIZE_AUTO))
- return CONFIG_SYS_DCACHE_LINE_SIZE;
+static inline unsigned long dcache_line_size(void)
+{
+#ifdef CONFIG_SYS_CACHE_SIZE_AUTO
+ return gd->arch.l1d_line_size;
+#else
+ return CONFIG_SYS_DCACHE_LINE_SIZE;
+#endif
+}
- conf1 = read_c0_config1();
- dl = (conf1 & MIPS_CONF1_DL) >> MIPS_CONF1_DL_SHF;
- if (!dl)
- return 0;
- return 2 << dl;
+static inline unsigned long scache_line_size(void)
+{
+#ifdef CONFIG_MIPS_L2_CACHE
+ return gd->arch.l2_line_size;
+#else
+ return 0;
+#endif
}
#define cache_loop(start, end, lsize, ops...) do { \
@@ -53,12 +104,13 @@
{
unsigned long ilsize = icache_line_size();
unsigned long dlsize = dcache_line_size();
+ unsigned long slsize = scache_line_size();
/* aend will be miscalculated when size is zero, so we return here */
if (size == 0)
return;
- if (ilsize == dlsize) {
+ if ((ilsize == dlsize) && !slsize) {
/* flush I-cache & D-cache simultaneously */
cache_loop(start_addr, start_addr + size, ilsize,
HIT_WRITEBACK_INV_D, HIT_INVALIDATE_I);
@@ -68,6 +120,11 @@
/* flush D-cache */
cache_loop(start_addr, start_addr + size, dlsize, HIT_WRITEBACK_INV_D);
+ /* flush L2 cache */
+ if (slsize)
+ cache_loop(start_addr, start_addr + size, slsize,
+ HIT_WRITEBACK_INV_SD);
+
/* flush I-cache */
cache_loop(start_addr, start_addr + size, ilsize, HIT_INVALIDATE_I);
}
@@ -75,21 +132,31 @@
void flush_dcache_range(ulong start_addr, ulong stop)
{
unsigned long lsize = dcache_line_size();
+ unsigned long slsize = scache_line_size();
/* aend will be miscalculated when size is zero, so we return here */
if (start_addr == stop)
return;
cache_loop(start_addr, stop, lsize, HIT_WRITEBACK_INV_D);
+
+ /* flush L2 cache */
+ if (slsize)
+ cache_loop(start_addr, stop, slsize, HIT_WRITEBACK_INV_SD);
}
void invalidate_dcache_range(ulong start_addr, ulong stop)
{
unsigned long lsize = dcache_line_size();
+ unsigned long slsize = scache_line_size();
/* aend will be miscalculated when size is zero, so we return here */
if (start_addr == stop)
return;
+ /* invalidate L2 cache */
+ if (slsize)
+ cache_loop(start_addr, stop, slsize, HIT_INVALIDATE_SD);
+
cache_loop(start_addr, stop, lsize, HIT_INVALIDATE_D);
}
diff --git a/arch/mips/lib/cache_init.S b/arch/mips/lib/cache_init.S
index bc8ab27..698a5af 100644
--- a/arch/mips/lib/cache_init.S
+++ b/arch/mips/lib/cache_init.S
@@ -13,6 +13,7 @@
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
#include <asm/cacheops.h>
+#include <asm/cm.h>
#ifndef CONFIG_SYS_MIPS_CACHE_MODE
#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
@@ -95,22 +96,147 @@
* with good parity is available. This routine will initialise an area of
* memory starting at location zero to be used as a source of parity.
*
+ * Note that this function does not follow the standard calling convention &
+ * may clobber typically callee-saved registers.
+ *
* RETURNS: N/A
*
*/
+#define R_RETURN s0
+#define R_IC_SIZE s1
+#define R_IC_LINE s2
+#define R_DC_SIZE s3
+#define R_DC_LINE s4
+#define R_L2_SIZE s5
+#define R_L2_LINE s6
+#define R_L2_BYPASSED s7
+#define R_L2_L2C t8
LEAF(mips_cache_reset)
+ move R_RETURN, ra
+
+#ifdef CONFIG_MIPS_L2_CACHE
+ /*
+ * For there to be an L2 present, Config2 must be present. If it isn't
+ * then we proceed knowing there's no L2 cache.
+ */
+ move R_L2_SIZE, zero
+ move R_L2_LINE, zero
+ move R_L2_BYPASSED, zero
+ move R_L2_L2C, zero
+ mfc0 t0, CP0_CONFIG, 1
+ bgez t0, l2_probe_done
+
+ /*
+ * From MIPSr6 onwards the L2 cache configuration might not be reported
+ * by Config2. The Config5.L2C bit indicates whether this is the case,
+ * and if it is then we need knowledge of where else to look. For cores
+ * from Imagination Technologies this is a CM GCR.
+ */
+# if __mips_isa_rev >= 6
+ /* Check that Config5 exists */
+ mfc0 t0, CP0_CONFIG, 2
+ bgez t0, l2_probe_cop0
+ mfc0 t0, CP0_CONFIG, 3
+ bgez t0, l2_probe_cop0
+ mfc0 t0, CP0_CONFIG, 4
+ bgez t0, l2_probe_cop0
+
+ /* Check Config5.L2C is set */
+ mfc0 t0, CP0_CONFIG, 5
+ and R_L2_L2C, t0, MIPS_CONF5_L2C
+ beqz R_L2_L2C, l2_probe_cop0
+
+ /* Config5.L2C is set */
+# ifdef CONFIG_MIPS_CM
+ /* The CM will provide L2 configuration */
+ PTR_LI t0, CKSEG1ADDR(CONFIG_MIPS_CM_BASE)
+ lw t1, GCR_L2_CONFIG(t0)
+ bgez t1, l2_probe_done
+
+ ext R_L2_LINE, t1, \
+ GCR_L2_CONFIG_LINESZ_SHIFT, GCR_L2_CONFIG_LINESZ_BITS
+ beqz R_L2_LINE, l2_probe_done
+ li t2, 2
+ sllv R_L2_LINE, t2, R_L2_LINE
+
+ ext t2, t1, GCR_L2_CONFIG_ASSOC_SHIFT, GCR_L2_CONFIG_ASSOC_BITS
+ addiu t2, t2, 1
+ mul R_L2_SIZE, R_L2_LINE, t2
+
+ ext t2, t1, GCR_L2_CONFIG_SETSZ_SHIFT, GCR_L2_CONFIG_SETSZ_BITS
+ sllv R_L2_SIZE, R_L2_SIZE, t2
+ li t2, 64
+ mul R_L2_SIZE, R_L2_SIZE, t2
+
+ /* Bypass the L2 cache so that we can init the L1s early */
+ or t1, t1, GCR_L2_CONFIG_BYPASS
+ sw t1, GCR_L2_CONFIG(t0)
+ sync
+ li R_L2_BYPASSED, 1
+
+ /* Zero the L2 tag registers */
+ sw zero, GCR_L2_TAG_ADDR(t0)
+ sw zero, GCR_L2_TAG_ADDR_UPPER(t0)
+ sw zero, GCR_L2_TAG_STATE(t0)
+ sw zero, GCR_L2_TAG_STATE_UPPER(t0)
+ sw zero, GCR_L2_DATA(t0)
+ sw zero, GCR_L2_DATA_UPPER(t0)
+ sync
+# else
+ /* We don't know how to retrieve L2 configuration on this system */
+# endif
+ b l2_probe_done
+# endif
+
+ /*
+ * For pre-r6 systems, or r6 systems with Config5.L2C==0, probe the L2
+ * cache configuration from the cop0 Config2 register.
+ */
+l2_probe_cop0:
+ mfc0 t0, CP0_CONFIG, 2
+
+ srl R_L2_LINE, t0, MIPS_CONF2_SL_SHF
+ andi R_L2_LINE, R_L2_LINE, MIPS_CONF2_SL >> MIPS_CONF2_SL_SHF
+ beqz R_L2_LINE, l2_probe_done
+ li t1, 2
+ sllv R_L2_LINE, t1, R_L2_LINE
+
+ srl t1, t0, MIPS_CONF2_SA_SHF
+ andi t1, t1, MIPS_CONF2_SA >> MIPS_CONF2_SA_SHF
+ addiu t1, t1, 1
+ mul R_L2_SIZE, R_L2_LINE, t1
+
+ srl t1, t0, MIPS_CONF2_SS_SHF
+ andi t1, t1, MIPS_CONF2_SS >> MIPS_CONF2_SS_SHF
+ sllv R_L2_SIZE, R_L2_SIZE, t1
+ li t1, 64
+ mul R_L2_SIZE, R_L2_SIZE, t1
+
+ /* Attempt to bypass the L2 so that we can init the L1s early */
+ or t0, t0, MIPS_CONF2_L2B
+ mtc0 t0, CP0_CONFIG, 2
+ ehb
+ mfc0 t0, CP0_CONFIG, 2
+ and R_L2_BYPASSED, t0, MIPS_CONF2_L2B
+
+ /* Zero the L2 tag registers */
+ mtc0 zero, CP0_TAGLO, 4
+ ehb
+l2_probe_done:
+#endif
+
#ifndef CONFIG_SYS_CACHE_SIZE_AUTO
- li t2, CONFIG_SYS_ICACHE_SIZE
- li t8, CONFIG_SYS_ICACHE_LINE_SIZE
+ li R_IC_SIZE, CONFIG_SYS_ICACHE_SIZE
+ li R_IC_LINE, CONFIG_SYS_ICACHE_LINE_SIZE
#else
- l1_info t2, t8, MIPS_CONF1_IA_SHF
+ l1_info R_IC_SIZE, R_IC_LINE, MIPS_CONF1_IA_SHF
#endif
#ifndef CONFIG_SYS_CACHE_SIZE_AUTO
- li t3, CONFIG_SYS_DCACHE_SIZE
- li t9, CONFIG_SYS_DCACHE_LINE_SIZE
+ li R_DC_SIZE, CONFIG_SYS_DCACHE_SIZE
+ li R_DC_LINE, CONFIG_SYS_DCACHE_LINE_SIZE
#else
- l1_info t3, t9, MIPS_CONF1_DA_SHF
+ l1_info R_DC_SIZE, R_DC_LINE, MIPS_CONF1_DA_SHF
#endif
#ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD
@@ -123,9 +249,9 @@
li v0, CONFIG_SYS_DCACHE_SIZE
#endif
#else
- move v0, t2
- sltu t1, t2, t3
- movn v0, t3, t1
+ move v0, R_IC_SIZE
+ sltu t1, R_IC_SIZE, R_DC_SIZE
+ movn v0, R_DC_SIZE, t1
#endif
/*
* Now clear that much memory starting from zero.
@@ -138,13 +264,36 @@
#endif /* CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD */
+#ifdef CONFIG_MIPS_L2_CACHE
+ /*
+ * If the L2 is bypassed, init the L1 first so that we can execute the
+ * rest of the cache initialisation using the L1 instruction cache.
+ */
+ bnez R_L2_BYPASSED, l1_init
+
+l2_init:
+ PTR_LI t0, INDEX_BASE
+ PTR_ADDU t1, t0, R_L2_SIZE
+1: cache INDEX_STORE_TAG_SD, 0(t0)
+ PTR_ADDU t0, t0, R_L2_LINE
+ bne t0, t1, 1b
+
+ /*
+ * If the L2 was bypassed then we already initialised the L1s before
+ * the L2, so we are now done.
+ */
+ bnez R_L2_BYPASSED, l2_unbypass
+#endif
+
/*
* The TagLo registers used depend upon the CPU implementation, but the
* architecture requires that it is safe for software to write to both
* TagLo selects 0 & 2 covering supported cases.
*/
+l1_init:
mtc0 zero, CP0_TAGLO
mtc0 zero, CP0_TAGLO, 2
+ ehb
/*
* The caches are probably in an indeterminate state, so we force good
@@ -158,40 +307,122 @@
/*
* Initialize the I-cache first,
*/
- blez t2, 1f
+ blez R_IC_SIZE, 1f
PTR_LI t0, INDEX_BASE
- PTR_ADDU t1, t0, t2
+ PTR_ADDU t1, t0, R_IC_SIZE
/* clear tag to invalidate */
- cache_loop t0, t1, t8, INDEX_STORE_TAG_I
+ cache_loop t0, t1, R_IC_LINE, INDEX_STORE_TAG_I
#ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD
/* fill once, so data field parity is correct */
PTR_LI t0, INDEX_BASE
- cache_loop t0, t1, t8, FILL
+ cache_loop t0, t1, R_IC_LINE, FILL
/* invalidate again - prudent but not strictly neccessary */
PTR_LI t0, INDEX_BASE
- cache_loop t0, t1, t8, INDEX_STORE_TAG_I
+ cache_loop t0, t1, R_IC_LINE, INDEX_STORE_TAG_I
+#endif
+
+ /* Enable use of the I-cache by setting Config.K0 */
+ sync
+ mfc0 t0, CP0_CONFIG
+ li t1, CONFIG_SYS_MIPS_CACHE_MODE
+#if __mips_isa_rev >= 2
+ ins t0, t1, 0, 3
+#else
+ ori t0, t0, CONF_CM_CMASK
+ xori t0, t0, CONF_CM_CMASK
+ or t0, t0, t1
#endif
+ mtc0 t0, CP0_CONFIG
/*
* then initialize D-cache.
*/
-1: blez t3, 3f
+1: blez R_DC_SIZE, 3f
PTR_LI t0, INDEX_BASE
- PTR_ADDU t1, t0, t3
+ PTR_ADDU t1, t0, R_DC_SIZE
/* clear all tags */
- cache_loop t0, t1, t9, INDEX_STORE_TAG_D
+ cache_loop t0, t1, R_DC_LINE, INDEX_STORE_TAG_D
#ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD
/* load from each line (in cached space) */
PTR_LI t0, INDEX_BASE
2: LONG_L zero, 0(t0)
- PTR_ADDU t0, t9
+ PTR_ADDU t0, R_DC_LINE
bne t0, t1, 2b
/* clear all tags */
PTR_LI t0, INDEX_BASE
- cache_loop t0, t1, t9, INDEX_STORE_TAG_D
+ cache_loop t0, t1, R_DC_LINE, INDEX_STORE_TAG_D
+#endif
+3:
+
+#ifdef CONFIG_MIPS_L2_CACHE
+ /* If the L2 isn't bypassed then we're done */
+ beqz R_L2_BYPASSED, return
+
+ /* The L2 is bypassed - go initialise it */
+ b l2_init
+
+l2_unbypass:
+# if __mips_isa_rev >= 6
+ beqz R_L2_L2C, 1f
+
+ li t0, CKSEG1ADDR(CONFIG_MIPS_CM_BASE)
+ lw t1, GCR_L2_CONFIG(t0)
+ xor t1, t1, GCR_L2_CONFIG_BYPASS
+ sw t1, GCR_L2_CONFIG(t0)
+ sync
+ ehb
+ b 2f
+# endif
+1: mfc0 t0, CP0_CONFIG, 2
+ xor t0, t0, MIPS_CONF2_L2B
+ mtc0 t0, CP0_CONFIG, 2
+ ehb
+
+2:
+# ifdef CONFIG_MIPS_CM
+ /* Config3 must exist for a CM to be present */
+ mfc0 t0, CP0_CONFIG, 1
+ bgez t0, 2f
+ mfc0 t0, CP0_CONFIG, 2
+ bgez t0, 2f
+
+ /* Check Config3.CMGCR to determine CM presence */
+ mfc0 t0, CP0_CONFIG, 3
+ and t0, t0, MIPS_CONF3_CMGCR
+ beqz t0, 2f
+
+ /* Change Config.K0 to a coherent CCA */
+ mfc0 t0, CP0_CONFIG
+ li t1, CONF_CM_CACHABLE_COW
+#if __mips_isa_rev >= 2
+ ins t0, t1, 0, 3
+#else
+ ori t0, t0, CONF_CM_CMASK
+ xori t0, t0, CONF_CM_CMASK
+ or t0, t0, t1
+#endif
+ mtc0 t0, CP0_CONFIG
+
+ /*
+ * Join the coherent domain such that the caches of this core are kept
+ * coherent with those of other cores.
+ */
+ PTR_LI t0, CKSEG1ADDR(CONFIG_MIPS_CM_BASE)
+ lw t1, GCR_REV(t0)
+ li t2, GCR_REV_CM3
+ li t3, GCR_Cx_COHERENCE_EN
+ bge t1, t2, 1f
+ li t3, GCR_Cx_COHERENCE_DOM_EN
+1: sw t3, GCR_Cx_COHERENCE(t0)
+ ehb
+2:
+# endif
#endif
-3: jr ra
+return:
+ /* Ensure all cache operations complete before returning */
+ sync
+ jr ra
END(mips_cache_reset)
/*
diff --git a/arch/mips/mach-ath79/cpu.c b/arch/mips/mach-ath79/cpu.c
index 5756a06..4ef5092 100644
--- a/arch/mips/mach-ath79/cpu.c
+++ b/arch/mips/mach-ath79/cpu.c
@@ -46,7 +46,7 @@
{ATH79_SOC_QCA9561, "9561", REV_ID_MAJOR_QCA9561, 0},
};
-int arch_cpu_init(void)
+int mach_cpu_init(void)
{
void __iomem *base;
enum ath79_soc_type soc = ATH79_SOC_UNKNOWN;
diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c
index 073a179..0593ec4 100644
--- a/arch/mips/mach-ath79/reset.c
+++ b/arch/mips/mach-ath79/reset.c
@@ -5,7 +5,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
diff --git a/arch/nds32/include/asm/errno.h b/arch/nds32/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/nds32/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/nios2/include/asm/errno.h b/arch/nios2/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/nios2/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/openrisc/include/asm/errno.h b/arch/openrisc/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/openrisc/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/powerpc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c
index 8508e8d..4ee91e1 100644
--- a/arch/powerpc/cpu/mpc512x/cpu.c
+++ b/arch/powerpc/cpu/mpc512x/cpu.c
@@ -95,11 +95,7 @@
*/
unsigned long get_tbclk (void)
{
- ulong tbclk;
-
- tbclk = (gd->bus_clk + 3L) / 4L;
-
- return tbclk;
+ return (gd->bus_clk + 3L) / 4L;
}
diff --git a/arch/powerpc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S
index 6c331d1..471d401 100644
--- a/arch/powerpc/cpu/mpc512x/start.S
+++ b/arch/powerpc/cpu/mpc512x/start.S
@@ -15,9 +15,6 @@
#include <asm-offsets.h>
#include <config.h>
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING "MPC512X"
-#endif
#include <version.h>
#define CONFIG_521X 1 /* needed for Linux kernel header files*/
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index 3809309..c87f0fd 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -173,11 +173,7 @@
unsigned long get_tbclk(void)
{
- ulong tbclk;
-
- tbclk = (gd->bus_clk + 3L) / 4L;
-
- return tbclk;
+ return (gd->bus_clk + 3L) / 4L;
}
diff --git a/arch/powerpc/cpu/mpc83xx/qe_io.c b/arch/powerpc/cpu/mpc83xx/qe_io.c
index 106704d..14406af 100644
--- a/arch/powerpc/cpu/mpc83xx/qe_io.c
+++ b/arch/powerpc/cpu/mpc83xx/qe_io.c
@@ -7,10 +7,10 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include "common.h"
-#include "asm/errno.h"
-#include "asm/io.h"
-#include "asm/immap_83xx.h"
+#include <common.h>
+#include <linux/errno.h>
+#include <asm/io.h>
+#include <asm/immap_83xx.h>
#define NUM_OF_PINS 32
void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index 9bd86d8..0001687 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -14,9 +14,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <mpc83xx.h>
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING "MPC83XX"
-#endif
#include <version.h>
#define CONFIG_83XX 1 /* needed for Linux kernel header files*/
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index ebc9b81..810ddb0 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -10,7 +10,7 @@
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/fsl_law.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <fsl_errata.h>
#include "fsl_corenet2_serdes.h"
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index 85739e9..72d5e30 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@ -13,7 +13,7 @@
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/fsl_law.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "fsl_corenet_serdes.h"
/*
diff --git a/arch/powerpc/cpu/mpc85xx/qe_io.c b/arch/powerpc/cpu/mpc85xx/qe_io.c
index d2825ec..49e82a2 100644
--- a/arch/powerpc/cpu/mpc85xx/qe_io.c
+++ b/arch/powerpc/cpu/mpc85xx/qe_io.c
@@ -7,10 +7,10 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include "common.h"
-#include "asm/errno.h"
-#include "asm/io.h"
-#include "asm/immap_85xx.h"
+#include <common.h>
+#include <linux/errno.h>
+#include <asm/io.h>
+#include <asm/immap_85xx.h>
#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
#define NUM_OF_PINS 32
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index 0ab9aac..e17e201 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -9,7 +9,7 @@
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_srio.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
#define SRIO_PORT_ACCEPT_ALL 0x10000001
diff --git a/arch/powerpc/cpu/ppc4xx/4xx_pci.c b/arch/powerpc/cpu/ppc4xx/4xx_pci.c
index 30e6c65..bfe48a2 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_pci.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_pci.c
@@ -118,7 +118,8 @@
#endif
unsigned long ptmla[2] = {CONFIG_SYS_PCI_PTM1LA, CONFIG_SYS_PCI_PTM2LA};
unsigned long ptmms[2] = {CONFIG_SYS_PCI_PTM1MS, CONFIG_SYS_PCI_PTM2MS};
-#if defined(CONFIG_PIP405) || defined (CONFIG_MIP405)
+#if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \
+ || defined(CONFIG_TARGET_MIP405T)
unsigned long pmmla[3] = {0x80000000, 0xA0000000, 0};
unsigned long pmmma[3] = {0xE0000001, 0xE0000001, 0};
unsigned long pmmpcila[3] = {0x80000000, 0x00000000, 0};
@@ -408,7 +409,8 @@
pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
}
-#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405))
+#if !(defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \
+ || defined(CONFIG_TARGET_MIP405T))
/*
*As is these functs get called out of flash Not a horrible
diff --git a/arch/powerpc/cpu/ppc4xx/4xx_pcie.c b/arch/powerpc/cpu/ppc4xx/4xx_pcie.c
index f0f3462..a616365 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_pcie.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_pcie.c
@@ -18,7 +18,7 @@
#include <asm/ppc4xx.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#if (defined(CONFIG_440SPE) || defined(CONFIG_405EX) || \
defined(CONFIG_460EX) || defined(CONFIG_460GT)) && \
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index 92a330d..a6066ef 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -104,6 +104,9 @@
config TARGET_MIP405
bool "Support MIP405"
+config TARGET_MIP405T
+ bool "Support MIP405T"
+
config TARGET_PIP405
bool "Support PIP405"
diff --git a/arch/powerpc/cpu/ppc4xx/resetvec.S b/arch/powerpc/cpu/ppc4xx/resetvec.S
index b3308bd..a42d91f 100644
--- a/arch/powerpc/cpu/ppc4xx/resetvec.S
+++ b/arch/powerpc/cpu/ppc4xx/resetvec.S
@@ -4,7 +4,8 @@
#if defined(CONFIG_440)
b _start_440
#else
-#if defined(CONFIG_BOOT_PCI) && defined(CONFIG_MIP405)
+#if defined(CONFIG_BOOT_PCI) && (defined(CONFIG_TARGET_MIP405) \
+ || defined(CONFIG_TARGET_MIP405T))
b _start_pci
#else
b _start
diff --git a/arch/powerpc/include/asm/errno.h b/arch/powerpc/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/powerpc/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index 2e937f0..f9154d3 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -79,13 +79,7 @@
#endif /* #ifdef CONFIG_SECURE_BOOT */
#ifdef CONFIG_CHAIN_OF_TRUST
-
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_DM 1
-#define CONFIG_SPL_CRYPTO_SUPPORT
-#define CONFIG_SPL_HASH_SUPPORT
-#define CONFIG_SPL_RSA
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
/*
* PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init
* due to space crunch on CPC and thus malloc will not work.
diff --git a/arch/powerpc/lib/ppcstring.S b/arch/powerpc/lib/ppcstring.S
index 56bb3b8..4f60108 100644
--- a/arch/powerpc/lib/ppcstring.S
+++ b/arch/powerpc/lib/ppcstring.S
@@ -6,7 +6,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#include <ppc_asm.tmpl>
-#include <asm/errno.h>
+#include <linux/errno.h>
.globl strcpy
strcpy:
diff --git a/arch/sandbox/include/asm/errno.h b/arch/sandbox/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/sandbox/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/sh/include/asm/errno.h b/arch/sh/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/sh/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/sparc/include/asm/errno.h b/arch/sparc/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/sparc/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index b31f24e..b312d9f 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -25,15 +25,9 @@
#ifndef CONFIG_EFI_APP
int arch_cpu_init(void)
{
- int ret;
-
post_code(POST_CPU_INIT);
- ret = x86_cpu_init_f();
- if (ret)
- return ret;
-
- return 0;
+ return x86_cpu_init_f();
}
int arch_misc_init(void)
diff --git a/arch/x86/cpu/ivybridge/ivybridge.c b/arch/x86/cpu/ivybridge/ivybridge.c
index c770b53..e817eb9 100644
--- a/arch/x86/cpu/ivybridge/ivybridge.c
+++ b/arch/x86/cpu/ivybridge/ivybridge.c
@@ -10,13 +10,7 @@
int arch_cpu_init(void)
{
- int ret;
-
post_code(POST_CPU_INIT);
- ret = x86_cpu_init_f();
- if (ret)
- return ret;
-
- return 0;
+ return x86_cpu_init_f();
}
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 680e558..c3092f2 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -139,15 +139,9 @@
int arch_cpu_init(void)
{
- int ret;
-
post_code(POST_CPU_INIT);
- ret = x86_cpu_init_f();
- if (ret)
- return ret;
-
- return 0;
+ return x86_cpu_init_f();
}
#ifndef CONFIG_EFI_STUB
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index b226e4c..f307c62 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -94,15 +94,9 @@
int arch_cpu_init(void)
{
- int ret;
-
post_code(POST_CPU_INIT);
- ret = x86_cpu_init_f();
- if (ret)
- return ret;
-
- return 0;
+ return x86_cpu_init_f();
}
int arch_early_init_r(void)
diff --git a/arch/x86/include/asm/errno.h b/arch/x86/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/x86/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index c480920..8e8d443 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -22,7 +22,7 @@
#ifdef __KERNEL__
-#include <asm/errno.h>
+#include <linux/errno.h>
struct msr {
union {
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index 82fd5c3..bac671d 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -6,7 +6,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/mtrr.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/xtensa/include/asm/errno.h b/arch/xtensa/include/asm/errno.h
deleted file mode 100644
index 4c82b50..0000000
--- a/arch/xtensa/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/xtensa/lib/time.c b/arch/xtensa/lib/time.c
index 1332072..915eb51 100644
--- a/arch/xtensa/lib/time.c
+++ b/arch/xtensa/lib/time.c
@@ -104,10 +104,7 @@
*/
ulong get_tbclk(void)
{
- ulong tbclk;
-
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
+ return CONFIG_SYS_HZ;
}
#if XCHAL_HAVE_CCOUNT
diff --git a/board/Barix/ipam390/ipam390.c b/board/Barix/ipam390/ipam390.c
index 6ce8960..9747f32 100644
--- a/board/Barix/ipam390/ipam390.c
+++ b/board/Barix/ipam390/ipam390.c
@@ -25,7 +25,7 @@
#include <asm/arch/pinmux_defs.h>
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <hwconfig.h>
#include <bootstage.h>
diff --git a/board/CarMediaLab/flea3/flea3.c b/board/CarMediaLab/flea3/flea3.c
index 7f5cfc8..2463077 100644
--- a/board/CarMediaLab/flea3/flea3.c
+++ b/board/CarMediaLab/flea3/flea3.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/iomux-mx35.h>
diff --git a/board/Marvell/db-88f6820-amc/MAINTAINERS b/board/Marvell/db-88f6820-amc/MAINTAINERS
new file mode 100644
index 0000000..abf5b7e
--- /dev/null
+++ b/board/Marvell/db-88f6820-amc/MAINTAINERS
@@ -0,0 +1,6 @@
+DB_88F6820_AMC BOARD
+M: Chris Packham <chris.packham@alliedtelesis.co.nz>
+S: Maintained
+F: board/Marvell/db-88f6820-amc/
+F: include/configs/db-88f6820-amc.h
+F: configs/db-88f6820-amc_defconfig
diff --git a/board/Marvell/db-88f6820-amc/Makefile b/board/Marvell/db-88f6820-amc/Makefile
new file mode 100644
index 0000000..79e1a75
--- /dev/null
+++ b/board/Marvell/db-88f6820-amc/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2015 Stefan Roese <sr@denx.de>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := db-88f6820-amc.o
diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
new file mode 100644
index 0000000..cade99c
--- /dev/null
+++ b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
@@ -0,0 +1,129 @@
+/*
+ * Copyright (C) 2015 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <asm/io.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/soc.h>
+
+#include "../drivers/ddr/marvell/a38x/ddr3_a38x_topology.h"
+#include <../serdes/a38x/high_speed_env_spec.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ETH_PHY_CTRL_REG 0
+#define ETH_PHY_CTRL_POWER_DOWN_BIT 11
+#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)
+
+/*
+ * Those values and defines are taken from the Marvell U-Boot version
+ * "u-boot-2013.01-2016_T1.0.eng_drop_v10"
+ */
+#define DB_AMC_88F68XX_GPP_OUT_ENA_LOW \
+ (~(BIT(29)))
+#define DB_AMC_88F68XX_GPP_OUT_ENA_MID \
+ (~(BIT(12) | BIT(17) | BIT(18) | BIT(20) | BIT(21)))
+#define DB_AMC_88F68XX_GPP_OUT_VAL_LOW (BIT(29))
+#define DB_AMC_88F68XX_GPP_OUT_VAL_MID 0x0
+#define DB_AMC_88F68XX_GPP_OUT_VAL_HIGH 0x0
+#define DB_AMC_88F68XX_GPP_POL_LOW 0x0
+#define DB_AMC_88F68XX_GPP_POL_MID 0x0
+
+static struct serdes_map board_serdes_map[] = {
+ {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
+ {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}
+};
+
+int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)
+{
+ *serdes_map_array = board_serdes_map;
+ *count = ARRAY_SIZE(board_serdes_map);
+ return 0;
+}
+
+/*
+ * Define the DDR layout / topology here in the board file. This will
+ * be used by the DDR3 init code in the SPL U-Boot version to configure
+ * the DDR3 controller.
+ */
+static struct hws_topology_map board_topology_map = {
+ 0x1, /* active interfaces */
+ /* cs_mask, mirror, dqs_swap, ck_swap X PUPs */
+ { { { {0x1, 0, 0, 0},
+ {0x1, 0, 0, 0},
+ {0x1, 0, 0, 0},
+ {0x1, 0, 0, 0},
+ {0x1, 0, 0, 0} },
+ SPEED_BIN_DDR_1866L, /* speed_bin */
+ BUS_WIDTH_8, /* memory_width */
+ MEM_4G, /* mem_size */
+ DDR_FREQ_800, /* frequency */
+ 0, 0, /* cas_l cas_wl */
+ HWS_TEMP_LOW} }, /* temperature */
+ 5, /* Num Of Bus Per Interface*/
+ BUS_MASK_32BIT /* Busses mask */
+};
+
+struct hws_topology_map *ddr3_get_topology_map(void)
+{
+ /* Return the board topology as defined in the board code */
+ return &board_topology_map;
+}
+
+int board_early_init_f(void)
+{
+ /* Configure MPP */
+ writel(0x11111111, MVEBU_MPP_BASE + 0x00);
+ writel(0x11111111, MVEBU_MPP_BASE + 0x04);
+ writel(0x55066011, MVEBU_MPP_BASE + 0x08);
+ writel(0x05055550, MVEBU_MPP_BASE + 0x0c);
+ writel(0x05055555, MVEBU_MPP_BASE + 0x10);
+ writel(0x01106565, MVEBU_MPP_BASE + 0x14);
+ writel(0x40000000, MVEBU_MPP_BASE + 0x18);
+ writel(0x00004444, MVEBU_MPP_BASE + 0x1c);
+
+ /* Set GPP Out value */
+ writel(DB_AMC_88F68XX_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00);
+ writel(DB_AMC_88F68XX_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00);
+
+ /* Set GPP Polarity */
+ writel(DB_AMC_88F68XX_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c);
+ writel(DB_AMC_88F68XX_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c);
+
+ /* Set GPP Out Enable */
+ writel(DB_AMC_88F68XX_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04);
+ writel(DB_AMC_88F68XX_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts("Board: Marvell DB-88F6820-AMC\n");
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ cpu_eth_init(bis); /* Built in controller(s) come first */
+ return pci_eth_init(bis);
+}
diff --git a/board/Marvell/db-88f6820-amc/kwbimage.cfg b/board/Marvell/db-88f6820-amc/kwbimage.cfg
new file mode 100644
index 0000000..1f748db
--- /dev/null
+++ b/board/Marvell/db-88f6820-amc/kwbimage.cfg
@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2014 Stefan Roese <sr@denx.de>
+#
+
+# Armada XP uses version 1 image format
+VERSION 1
+
+# Boot Media configurations
+BOOT_FROM spi
+
+# Binary Header (bin_hdr) with DDR3 training code
+BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068
diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c
index f0f1976..20750fb 100644
--- a/board/advantech/dms-ba16/dms-ba16.c
+++ b/board/advantech/dms-ba16/dms-ba16.c
@@ -10,7 +10,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/mxc_i2c.h>
#include <asm/imx-common/iomux-v3.h>
diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
index c8d0963..2838f9a 100644
--- a/board/amcc/bamboo/bamboo.c
+++ b/board/amcc/bamboo/bamboo.c
@@ -438,11 +438,7 @@
phys_size_t initdram (int board_type)
{
- long dram_size;
-
- dram_size = spd_sdram();
-
- return dram_size;
+ return spd_sdram();
}
/*----------------------------------------------------------------------------+
diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c
index 5c1e071..9043de6 100644
--- a/board/amcc/bubinga/bubinga.c
+++ b/board/amcc/bubinga/bubinga.c
@@ -57,8 +57,5 @@
------------------------------------------------------------------------- */
phys_size_t initdram(int board_type)
{
- long int ret;
-
- ret = spd_sdram();
- return ret;
+ return spd_sdram();
}
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c
index dc2e3ba..6ea004c 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -15,7 +15,7 @@
#include <asm/mmu.h>
#include <asm/4xx_pcie.h>
#include <asm/ppc4xx-gpio.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <usb.h>
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
@@ -63,11 +63,7 @@
*/
static inline int board_fpga_read(int offset)
{
- int data;
-
- data = in_8((void *)(CONFIG_SYS_FPGA_BASE + offset));
-
- return data;
+ return in_8((void *)(CONFIG_SYS_FPGA_BASE + offset));
}
static inline void board_fpga_write(int offset, int data)
diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index 6ae340b..7582d40 100644
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -15,7 +15,7 @@
#include <asm/io.h>
#include <asm/ppc4xx-gpio.h>
#include <asm/4xx_pcie.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/amcc/kilauea/kilauea.c b/board/amcc/kilauea/kilauea.c
index abfaa1e..2937217 100644
--- a/board/amcc/kilauea/kilauea.c
+++ b/board/amcc/kilauea/kilauea.c
@@ -12,7 +12,7 @@
#include <fdt_support.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#if defined(CONFIG_PCI)
#include <pci.h>
diff --git a/board/amcc/makalu/makalu.c b/board/amcc/makalu/makalu.c
index a6ad2a1..2194942 100644
--- a/board/amcc/makalu/makalu.c
+++ b/board/amcc/makalu/makalu.c
@@ -13,7 +13,7 @@
#include <asm/ppc4xx-gpio.h>
#include <asm/io.h>
#include <fdt_support.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#if defined(CONFIG_PCI)
#include <pci.h>
diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index c0445ef..8ee3851 100644
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -16,7 +16,7 @@
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/4xx_pcie.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "yucca.h"
diff --git a/board/aristainetos/aristainetos-v1.c b/board/aristainetos/aristainetos-v1.c
index b8fed2e..94e2b8a 100644
--- a/board/aristainetos/aristainetos-v1.c
+++ b/board/aristainetos/aristainetos-v1.c
@@ -14,7 +14,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/boot_mode.h>
diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c
index fa4b4d2..4cd184e 100644
--- a/board/aristainetos/aristainetos-v2.c
+++ b/board/aristainetos/aristainetos-v2.c
@@ -14,7 +14,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/boot_mode.h>
diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c
index d1e6850..b7c65ca 100644
--- a/board/aristainetos/aristainetos.c
+++ b/board/aristainetos/aristainetos.c
@@ -14,7 +14,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/boot_mode.h>
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index 30e720d..29995ea 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -16,7 +16,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/gpio.h>
#include <asm/gpio.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "apf27.h"
#include "crc.h"
#include "fpga.h"
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c
index a3a56ca..ab8b2be 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -13,7 +13,7 @@
#include <asm/arch/sys_proto.h>
#include <malloc.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/mxc_i2c.h>
diff --git a/board/compulab/cm_t35/cm_t35.c b/board/compulab/cm_t35/cm_t35.c
index 189d903..484651b 100644
--- a/board/compulab/cm_t35/cm_t35.c
+++ b/board/compulab/cm_t35/cm_t35.c
@@ -24,7 +24,7 @@
#include <linux/compiler.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/mem.h>
#include <asm/arch/mux.h>
#include <asm/arch/mmc_host_def.h>
diff --git a/board/compulab/common/common.h b/board/compulab/common/common.h
index 8f38b79..759ec31 100644
--- a/board/compulab/common/common.h
+++ b/board/compulab/common/common.h
@@ -9,7 +9,7 @@
#ifndef _CL_COMMON_
#define _CL_COMMON_
-#include <asm/errno.h>
+#include <linux/errno.h>
void cl_print_pcb_info(void);
diff --git a/board/compulab/common/omap3_smc911x.c b/board/compulab/common/omap3_smc911x.c
index 4561661..858ced8 100644
--- a/board/compulab/common/omap3_smc911x.c
+++ b/board/compulab/common/omap3_smc911x.c
@@ -10,7 +10,7 @@
#include <netdev.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/cpu.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
diff --git a/board/corscience/tricorder/tricorder-eeprom.c b/board/corscience/tricorder/tricorder-eeprom.c
index 340a009..aeacd6a 100644
--- a/board/corscience/tricorder/tricorder-eeprom.c
+++ b/board/corscience/tricorder/tricorder-eeprom.c
@@ -190,13 +190,8 @@
if (argc == 3) {
ulong dev_addr = simple_strtoul(argv[2], NULL, 16);
- if (strcmp(argv[1], "read") == 0) {
- int rcode;
-
- rcode = tricorder_eeprom_read(dev_addr);
-
- return rcode;
- }
+ if (strcmp(argv[1], "read") == 0)
+ return tricorder_eeprom_read(dev_addr);
} else if (argc == 6 || argc == 7) {
ulong dev_addr = simple_strtoul(argv[2], NULL, 16);
char *name = argv[3];
@@ -207,14 +202,9 @@
if (argc == 7)
interface = argv[6];
- if (strcmp(argv[1], "write") == 0) {
- int rcode;
-
- rcode = tricorder_eeprom_write(dev_addr, name, version,
- serial, interface);
-
- return rcode;
- }
+ if (strcmp(argv[1], "write") == 0)
+ return tricorder_eeprom_write(dev_addr, name, version,
+ serial, interface);
}
return CMD_RET_USAGE;
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
index b82385a..50223f4 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -21,7 +21,7 @@
#include <asm/arch/pinmux_defs.h>
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <hwconfig.h>
#ifdef CONFIG_DAVINCI_MMC
diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c
index f69aeb6..9783b2a 100644
--- a/board/davinci/da8xxevm/omapl138_lcdk.c
+++ b/board/davinci/da8xxevm/omapl138_lcdk.c
@@ -18,7 +18,7 @@
#include <asm/arch/hardware.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/davinci_misc.h>
#ifdef CONFIG_DAVINCI_MMC
#include <mmc.h>
diff --git a/board/denx/m53evk/m53evk.c b/board/denx/m53evk/m53evk.c
index 934f009..ef63bbd 100644
--- a/board/denx/m53evk/m53evk.c
+++ b/board/denx/m53evk/m53evk.c
@@ -15,7 +15,7 @@
#include <asm/arch/iomux-mx53.h>
#include <asm/imx-common/mx5_video.h>
#include <asm/spl.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <netdev.h>
#include <i2c.h>
#include <mmc.h>
diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c
index 7856b84..5b60654 100644
--- a/board/el/el6x/el6x.c
+++ b/board/el/el6x/el6x.c
@@ -10,7 +10,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/mxc_i2c.h>
#include <asm/imx-common/iomux-v3.h>
diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c
index ad7a8cf..95cdaeb 100644
--- a/board/embest/mx6boards/mx6boards.c
+++ b/board/embest/mx6boards/mx6boards.c
@@ -18,7 +18,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/boot_mode.h>
diff --git a/board/esd/common/lcd.c b/board/esd/common/lcd.c
index 22a59e4..29421fc 100644
--- a/board/esd/common/lcd.c
+++ b/board/esd/common/lcd.c
@@ -8,7 +8,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include "asm/io.h"
+#include <asm/io.h>
#include "lcd.h"
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c
index e582abb..1642a7d 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -11,7 +11,7 @@
#include <linux/compiler.h>
#include <asm/mmu.h>
#include <asm/processor.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/cache.h>
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
diff --git a/board/freescale/common/zm7300.c b/board/freescale/common/zm7300.c
index be5953a..a6c3e69 100644
--- a/board/freescale/common/zm7300.c
+++ b/board/freescale/common/zm7300.c
@@ -140,9 +140,7 @@
/* Uses the DPM command RRP */
u8 zm_read(uchar reg)
{
- u8 d;
- d = dpm_rrp(reg);
- return d;
+ return dpm_rrp(reg);
}
/* ZM_write --
diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c
index 12467a9..fb0ab77 100644
--- a/board/freescale/mx35pdk/mx35pdk.c
+++ b/board/freescale/mx35pdk/mx35pdk.c
@@ -8,7 +8,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index 2ea5346..df25be8 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -9,7 +9,7 @@
#include <asm/gpio.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux-mx51.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c
index 8ba2728..a6e46b9 100644
--- a/board/freescale/mx53ard/mx53ard.c
+++ b/board/freescale/mx53ard/mx53ard.c
@@ -11,7 +11,7 @@
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/iomux-mx53.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <netdev.h>
#include <mmc.h>
#include <fsl_esdhc.h>
diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c
index 6ee6d73..db28942 100644
--- a/board/freescale/mx53evk/mx53evk.c
+++ b/board/freescale/mx53evk/mx53evk.c
@@ -11,7 +11,7 @@
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/iomux-mx53.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/imx-common/boot_mode.h>
#include <netdev.h>
#include <i2c.h>
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index 1298788..9e1072f 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -13,7 +13,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/iomux-mx53.h>
#include <asm/arch/clock.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/imx-common/mx5_video.h>
#include <netdev.h>
#include <i2c.h>
diff --git a/board/freescale/mx53smd/mx53smd.c b/board/freescale/mx53smd/mx53smd.c
index 0963fd7..938c611 100644
--- a/board/freescale/mx53smd/mx53smd.c
+++ b/board/freescale/mx53smd/mx53smd.c
@@ -11,7 +11,7 @@
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/iomux-mx53.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <netdev.h>
#include <mmc.h>
#include <fsl_esdhc.h>
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c
index 5aae721..7f8eca3 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -9,7 +9,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/mx6-pins.h>
#include <asm/arch/clock.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <mmc.h>
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index a3ed4cd..5fca4d1 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -12,7 +12,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/mxc_i2c.h>
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index f836ecb..0e9b506 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -10,7 +10,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/mxc_i2c.h>
#include <asm/imx-common/iomux-v3.h>
diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c
index 2ca6d5c..613a275 100644
--- a/board/gateworks/gw_ventana/gsc.c
+++ b/board/gateworks/gw_ventana/gsc.c
@@ -6,7 +6,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <common.h>
#include <i2c.h>
#include <linux/ctype.h>
diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c
index 848cdde..0a7baaa 100644
--- a/board/gdsys/405ex/io64.c
+++ b/board/gdsys/405ex/io64.c
@@ -15,7 +15,7 @@
#include <fdt_support.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/ppc4xx-gpio.h>
#include <flash.h>
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index e9729f8..7e62aef 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -10,7 +10,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/mxc_i2c.h>
#include <asm/imx-common/iomux-v3.h>
diff --git a/board/htkw/mcx/mcx.c b/board/htkw/mcx/mcx.c
index 4330cf0..5ef383d 100644
--- a/board/htkw/mcx/mcx.c
+++ b/board/htkw/mcx/mcx.c
@@ -17,7 +17,7 @@
#include <asm/omap_gpio.h>
#include <asm/arch/dss.h>
#include <asm/arch/clock.h>
-#include "errno.h"
+#include <errno.h>
#include <i2c.h>
#ifdef CONFIG_USB_EHCI
#include <usb.h>
diff --git a/board/imgtec/boston/Kconfig b/board/imgtec/boston/Kconfig
new file mode 100644
index 0000000..ab76a3c
--- /dev/null
+++ b/board/imgtec/boston/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_BOSTON
+
+config SYS_BOARD
+ default "boston"
+
+config SYS_VENDOR
+ default "imgtec"
+
+config SYS_CONFIG_NAME
+ default "boston"
+
+config SYS_TEXT_BASE
+ default 0x9fc00000 if 32BIT
+ default 0xffffffff9fc00000 if 64BIT
+
+endif
diff --git a/board/imgtec/boston/MAINTAINERS b/board/imgtec/boston/MAINTAINERS
new file mode 100644
index 0000000..30dd481
--- /dev/null
+++ b/board/imgtec/boston/MAINTAINERS
@@ -0,0 +1,6 @@
+BOSTON BOARD
+M: Paul Burton <paul.burton@imgtec.com>
+S: Maintained
+F: board/imgtec/boston/
+F: include/configs/boston.h
+F: configs/boston_defconfig
diff --git a/board/imgtec/boston/Makefile b/board/imgtec/boston/Makefile
new file mode 100644
index 0000000..deda457
--- /dev/null
+++ b/board/imgtec/boston/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2016 Imagination Technologies
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+obj-y += checkboard.o
+obj-y += ddr.o
+obj-y += lowlevel_init.o
diff --git a/board/imgtec/boston/boston-lcd.h b/board/imgtec/boston/boston-lcd.h
new file mode 100644
index 0000000..9f5c1b9
--- /dev/null
+++ b/board/imgtec/boston/boston-lcd.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __BOARD_BOSTON_LCD_H__
+#define __BOARD_BOSTON_LCD_H__
+
+/**
+ * lowlevel_display() - Display a message on Boston's LCD
+ * @msg: The string to display
+ *
+ * Display the string @msg on the 7 character LCD display of the Boston board.
+ * This is typically used for debug or to present some form of status
+ * indication to the user, allowing faults to be identified when things go
+ * wrong early enough that the UART isn't up.
+ */
+void lowlevel_display(const char msg[static 8]);
+
+#endif /* __BOARD_BOSTON_LCD_H__ */
diff --git a/board/imgtec/boston/boston-regs.h b/board/imgtec/boston/boston-regs.h
new file mode 100644
index 0000000..b9dfbb4
--- /dev/null
+++ b/board/imgtec/boston/boston-regs.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __BOARD_BOSTON_REGS_H__
+#define __BOARD_BOSTON_REGS_H__
+
+#include <asm/addrspace.h>
+
+#define BOSTON_PLAT_BASE CKSEG1ADDR(0x17ffd000)
+#define BOSTON_LCD_BASE CKSEG1ADDR(0x17fff000)
+
+/*
+ * Platform Register Definitions
+ */
+#define BOSTON_PLAT_CORE_CL (BOSTON_PLAT_BASE + 0x04)
+
+#define BOSTON_PLAT_DDR3STAT (BOSTON_PLAT_BASE + 0x14)
+# define BOSTON_PLAT_DDR3STAT_CALIB (1 << 2)
+
+#define BOSTON_PLAT_DDRCONF0 (BOSTON_PLAT_BASE + 0x38)
+# define BOSTON_PLAT_DDRCONF0_SIZE (0xf << 0)
+
+#endif /* __BOARD_BOSTON_REGS_H__ */
diff --git a/board/imgtec/boston/checkboard.c b/board/imgtec/boston/checkboard.c
new file mode 100644
index 0000000..93eae7f
--- /dev/null
+++ b/board/imgtec/boston/checkboard.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+
+#include "boston-lcd.h"
+#include "boston-regs.h"
+
+int checkboard(void)
+{
+ u32 changelist;
+
+ lowlevel_display("U-boot ");
+
+ printf("Board: MIPS Boston\n");
+
+ printf("CPU: 0x%08x", read_c0_prid());
+ changelist = __raw_readl((uint32_t *)BOSTON_PLAT_CORE_CL);
+ if (changelist > 1)
+ printf(" cl%x", changelist);
+ putc('\n');
+
+ return 0;
+}
diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c
new file mode 100644
index 0000000..ceffef6
--- /dev/null
+++ b/board/imgtec/boston/ddr.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+
+#include <asm/io.h>
+
+#include "boston-regs.h"
+
+phys_size_t initdram(int board_type)
+{
+ u32 ddrconf0 = __raw_readl((uint32_t *)BOSTON_PLAT_DDRCONF0);
+
+ return (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) << 30;
+}
+
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) {
+ /* 2GB wrapped around to 0 */
+ return CKSEG0ADDR(256 << 20);
+ }
+
+ return min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20));
+}
diff --git a/board/imgtec/boston/lowlevel_init.S b/board/imgtec/boston/lowlevel_init.S
new file mode 100644
index 0000000..0c01aa9
--- /dev/null
+++ b/board/imgtec/boston/lowlevel_init.S
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <config.h>
+
+#include <asm/addrspace.h>
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+
+#include "boston-regs.h"
+
+.data
+
+msg_ddr_cal: .ascii "DDR Cal "
+msg_ddr_ok: .ascii "DDR OK "
+
+.text
+
+LEAF(lowlevel_init)
+ move s0, ra
+
+ PTR_LA a0, msg_ddr_cal
+ bal lowlevel_display
+
+ PTR_LI t0, BOSTON_PLAT_DDR3STAT
+1: lw t1, 0(t0)
+ andi t1, t1, BOSTON_PLAT_DDR3STAT_CALIB
+ beqz t1, 1b
+
+ PTR_LA a0, msg_ddr_ok
+ bal lowlevel_display
+
+ move v0, zero
+ jr s0
+ END(lowlevel_init)
+
+LEAF(lowlevel_display)
+ .set push
+ .set noat
+ PTR_LI AT, BOSTON_LCD_BASE
+#ifdef CONFIG_64BIT
+ ld k1, 0(a0)
+ sd k1, 0(AT)
+#else
+ lw k1, 0(a0)
+ sw k1, 0(AT)
+ lw k1, 4(a0)
+ sw k1, 4(AT)
+#endif
+ .set pop
+1: jr ra
+ END(lowlevel_display)
diff --git a/board/imgtec/malta/lowlevel_init.S b/board/imgtec/malta/lowlevel_init.S
index 3d48cdc..6df4d9f 100644
--- a/board/imgtec/malta/lowlevel_init.S
+++ b/board/imgtec/malta/lowlevel_init.S
@@ -28,12 +28,6 @@
.globl lowlevel_init
lowlevel_init:
- /* disable any L2 cache for now */
- sync
- mfc0 t0, CP0_CONFIG, 2
- ori t0, t0, 0x1 << 12
- mtc0 t0, CP0_CONFIG, 2
-
/* detect the core card */
PTR_LI t0, CKSEG1ADDR(MALTA_REVISION)
lw t0, 0(t0)
diff --git a/board/imgtec/xilfpga/Kconfig b/board/imgtec/xilfpga/Kconfig
new file mode 100644
index 0000000..b078278
--- /dev/null
+++ b/board/imgtec/xilfpga/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_XILFPGA
+
+config SYS_BOARD
+ default "xilfpga"
+
+config SYS_VENDOR
+ default "imgtec"
+
+config SYS_CONFIG_NAME
+ default "imgtec_xilfpga"
+
+config SYS_TEXT_BASE
+ default 0x80C00000
+
+endif
diff --git a/board/imgtec/xilfpga/MAINTAINERS b/board/imgtec/xilfpga/MAINTAINERS
new file mode 100644
index 0000000..aa04532
--- /dev/null
+++ b/board/imgtec/xilfpga/MAINTAINERS
@@ -0,0 +1,6 @@
+XILFPGA BOARD
+M: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
+S: Maintained
+F: board/imgtec/xilfpga
+F: include/configs/xilfpga.h
+F: configs/imgtec_xilfpga_defconfig
diff --git a/board/imgtec/xilfpga/Makefile b/board/imgtec/xilfpga/Makefile
new file mode 100644
index 0000000..9aaf9ce
--- /dev/null
+++ b/board/imgtec/xilfpga/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2016, Imagination Technologies Ltd.
+# Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+obj-y := xilfpga.o
diff --git a/board/imgtec/xilfpga/README b/board/imgtec/xilfpga/README
new file mode 100644
index 0000000..ac19d48
--- /dev/null
+++ b/board/imgtec/xilfpga/README
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2016, Imagination Technologies Ltd.
+ *
+ * Zubair Lutfullah Kakakhel, Zubair.Kakakhel@imgtec.com
+ */
+
+MIPSfpga
+=======================================
+
+MIPSfpga is an FPGA based development platform by Imagination Technologies
+As we are dealing with a MIPS core instantiated on an FPGA, specifications
+are fluid and can be varied in RTL.
+
+The example project provided by IMGTEC runs on the Nexys4DDR board by
+Digilent powered by the ARTIX-7 FPGA by Xilinx. Relevant details about
+the example project and the Nexys4DDR board:
+
+- microAptiv UP core m14Kc
+- 50MHz clock speed
+- 128Mbyte DDR RAM at 0x0000_0000
+- 8Kbyte RAM at 0x1000_0000
+- axi_intc at 0x1020_0000
+- axi_uart16550 at 0x1040_0000
+- axi_gpio at 0x1060_0000
+- axi_i2c at 0x10A0_0000
+- custom_gpio at 0x10C0_0000
+- axi_ethernetlite at 0x10E0_0000
+- 8Kbyte BootRAM at 0x1FC0_0000
+- 16Mbyte QPI at 0x1D00_0000
+
+Boot protocol:
+--------------
+
+The BootRAM is a writeable "RAM" in FPGA at 0x1FC0_0000.
+This is for easy reprogrammibility via JTAG.
+
+DDR initialization is already handled by a HW IP block.
+
+When the example project bitstream is loaded, the cpu_reset button
+needs to be pressed.
+
+The bootram initializes the cache and axi_uart
+Then checks if there is anything non 0xffff_ffff at location 0x1D40_0000
+
+If there is, then that is considered as u-boot. u-boot is copied from
+0x1D40_0000 to memory and the bootram jumps into u-boot code.
+
+At this point, the board is ready to load the Linux kernel + buildroot initramfs
+
+This can be done in multiple ways:
+
+1- JTAG load the binary and jump into it.
+2- Load kernel stored in the QSPI flash at 0x1D80_0000
+3- Load uImage via tftp. Ethernet works in u-boot.
+ e.g. env set server ip 192.168.154.45; dhcp uImage; bootm
diff --git a/board/imgtec/xilfpga/xilfpga.c b/board/imgtec/xilfpga/xilfpga.c
new file mode 100644
index 0000000..77a1952
--- /dev/null
+++ b/board/imgtec/xilfpga/xilfpga.c
@@ -0,0 +1,20 @@
+/*
+ * Imagination Technologies MIPSfpga platform code
+ *
+ * Copyright (C) 2016, Imagination Technologies Ltd.
+ *
+ * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ */
+
+#include <common.h>
+
+/* initialize the DDR Controller and PHY */
+phys_size_t initdram(int board_type)
+{
+ /* MIG IP block is smart and doesn't need SW
+ * to do any init */
+ return CONFIG_SYS_SDRAM_SIZE; /* in bytes */
+}
diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c
index c875e78..2f6bc3a 100644
--- a/board/inversepath/usbarmory/usbarmory.c
+++ b/board/inversepath/usbarmory/usbarmory.c
@@ -15,7 +15,7 @@
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/iomux-mx53.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <i2c.h>
#include <mmc.h>
#include <fsl_esdhc.h>
diff --git a/board/keymile/km_arm/fpga_config.c b/board/keymile/km_arm/fpga_config.c
index 51a3cfe..6f8d696 100644
--- a/board/keymile/km_arm/fpga_config.c
+++ b/board/keymile/km_arm/fpga_config.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <i2c.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
/* GPIO Pin from kirkwood connected to PROGRAM_B pin of the xilinx FPGA */
#define KM_XLX_PROGRAM_B_PIN 39
diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c
index 2b0b054..b827e43 100644
--- a/board/keymile/kmp204x/pci.c
+++ b/board/keymile/kmp204x/pci.c
@@ -14,7 +14,7 @@
#include <libfdt.h>
#include <fdt_support.h>
#include <asm/fsl_serdes.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "kmp204x.h"
diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index b3159d3..f6972c2 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -7,7 +7,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c
index 3bb1b71..a4c1222 100644
--- a/board/kosagi/novena/video.c
+++ b/board/kosagi/novena/video.c
@@ -11,7 +11,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c
index a791b97..d757d97 100644
--- a/board/lego/ev3/legoev3.c
+++ b/board/lego/ev3/legoev3.c
@@ -23,7 +23,7 @@
#include <asm/arch/pinmux_defs.h>
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <hwconfig.h>
#ifdef CONFIG_DAVINCI_MMC
diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c
index 1f1e5ae..a6aff4e 100644
--- a/board/logicpd/am3517evm/am3517evm.c
+++ b/board/logicpd/am3517evm/am3517evm.c
@@ -21,7 +21,7 @@
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/musb.h>
#include <asm/mach-types.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index c2bb730..3ddeb46 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -28,7 +28,7 @@
#include <asm/mach-types.h>
#include <linux/mtd/nand.h>
#include <asm/omap_musb.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/musb.h>
diff --git a/board/micronas/vct/dcgu.c b/board/micronas/vct/dcgu.c
index 20ee3ac..562c827 100644
--- a/board/micronas/vct/dcgu.c
+++ b/board/micronas/vct/dcgu.c
@@ -8,7 +8,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "vct.h"
diff --git a/board/micronas/vct/scc.c b/board/micronas/vct/scc.c
index 40f8ecd..0d33cc4 100644
--- a/board/micronas/vct/scc.c
+++ b/board/micronas/vct/scc.c
@@ -7,7 +7,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "vct.h"
diff --git a/board/mosaixtech/icon/icon.c b/board/mosaixtech/icon/icon.c
index e3fb1e6..1795464 100644
--- a/board/mosaixtech/icon/icon.c
+++ b/board/mosaixtech/icon/icon.c
@@ -15,7 +15,7 @@
#include <asm/io.h>
#include <asm/ppc4xx-gpio.h>
#include <asm/4xx_pcie.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/mmu.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c
index 2262175..3c110fa 100644
--- a/board/mpl/common/common_util.c
+++ b/board/mpl/common/common_util.c
@@ -20,7 +20,7 @@
#include "../pip405/pip405.h"
#include <asm/4xx_pci.h>
#endif
-#ifdef CONFIG_MIP405
+#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T)
#include "../mip405/mip405.h"
#include <asm/4xx_pci.h>
#endif
@@ -36,7 +36,8 @@
#define I2C_BACKUP_ADDR 0x7C00 /* 0x200 bytes for backup */
#define IMAGE_SIZE CONFIG_SYS_MONITOR_LEN /* ugly, but it works for now */
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
+#if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \
+ || defined(CONFIG_TARGET_MIP405T)
/*-----------------------------------------------------------------------
* On PIP/MIP405 we have 3 (4) possible boot mode
*
@@ -116,7 +117,7 @@
mtdcr(EBC0_CFGDATA, FLASH_CR_B);
}
}
-#endif /* #if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) */
+#endif /* #if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) */
#ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
/* adjust flash start and protection info */
@@ -190,12 +191,11 @@
#if defined(CONFIG_PATI)
int start_sect;
#endif
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI)
+#if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \
+ || defined(CONFIG_TARGET_MIP405T) || defined(CONFIG_PATI)
char *copystr = (char *)src;
ulong *magic = (ulong *)src;
-#endif
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI)
if (uimage_to_cpu (magic[0]) != IH_MAGIC) {
puts("Bad Magic number\n");
return -1;
@@ -241,7 +241,7 @@
return (1);
}
-#else /* #if !defined(CONFIG_PATI */
+#else /* #if !defined(CONFIG_PATI) */
start = FIRM_START;
start_sect = -1;
@@ -701,7 +701,7 @@
strcpy(buf,"### No HW ID - assuming PIP405");
}
#endif
-#ifdef CONFIG_MIP405
+#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T)
if (!s || strncmp (s, "MIP405", 6)) {
strcpy(buf,"### No HW ID - assuming MIP405");
}
diff --git a/board/mpl/common/common_util.h b/board/mpl/common/common_util.h
index e81ee35..22f5c2e 100644
--- a/board/mpl/common/common_util.h
+++ b/board/mpl/common/common_util.h
@@ -17,12 +17,10 @@
void get_backup_values(backup_t *buf);
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
#define BOOT_MPS 0x01
#define BOOT_PCI 0x02
int get_boot_mode(void);
void setup_cs_reloc(void);
-#endif
void check_env(void);
#if defined(CONFIG_CMD_DOC)
diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h
index 4193e92..75e8cae 100644
--- a/board/mpl/common/pci_parts.h
+++ b/board/mpl/common/pci_parts.h
@@ -91,7 +91,7 @@
static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
{PCI_CFG_PIIX4_BMIBA, 0x0001000, 4}, /* set BMI to a valid address */
{PCI_COMMAND, 0x0001, 2}, /* enable IO access */
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
{PCI_CFG_PIIX4_IDETIM, 0x80008000, 4}, /* enable Both IDE channels */
#else
{PCI_CFG_PIIX4_IDETIM, 0x00008000, 4}, /* enable IDE channel0 */
@@ -101,7 +101,7 @@
/* PIIX4 USB Controller Function 2 */
static struct pci_pip405_config_entry piix4_usb_cntrl_f2[] = {
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
{PCI_INTERRUPT_LINE, 31, 1}, /* Int vector = 31 */
{PCI_BASE_ADDRESS_4, 0x0000E001, 4}, /* Set IO Address to 0xe000 to 0xe01F */
{PCI_LATENCY_TIMER, 0x80, 1}, /* Latency Timer 0x80 */
diff --git a/board/mpl/mip405/Kconfig b/board/mpl/mip405/Kconfig
index 48ba91a..e003a43 100644
--- a/board/mpl/mip405/Kconfig
+++ b/board/mpl/mip405/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_MIP405
+if TARGET_MIP405 || TARGET_MIP405T
config SYS_BOARD
default "mip405"
@@ -9,4 +9,9 @@
config SYS_CONFIG_NAME
default "MIP405"
+config ISO_STRING
+ string
+ default "MEV-10082-001" if TARGET_MIP405T
+ default "MEV-10072-001" if TARGET_MIP405
+
endif
diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c
index 4a0d696..8b9892b 100644
--- a/board/mpl/mip405/mip405.c
+++ b/board/mpl/mip405/mip405.c
@@ -92,7 +92,7 @@
unsigned char sz; /* log binary => Size = (4MByte<<sz) 5 = 128, 4 = 64, 3 = 32, 2 = 16, 1=8 */
unsigned char ecc; /* if true, ecc is enabled */
} sdram_t;
-#if defined(CONFIG_MIP405T)
+#if defined(CONFIG_TARGET_MIP405T)
const sdram_t sdram_table[] = {
{ 0x0F, /* MIP405T Rev A, 64MByte -1 Board */
3, /* Case Latenty = 3 */
@@ -168,7 +168,7 @@
0xff,
0xff }
};
-#endif /*CONFIG_MIP405T */
+#endif /*CONFIG_TARGET_MIP405T */
void SDRAM_err (const char *s)
{
#ifndef SDRAM_DEBUG
@@ -262,7 +262,7 @@
#endif
/* check board */
bc = in8 (PLD_PART_REG);
-#if defined(CONFIG_MIP405T)
+#if defined(CONFIG_TARGET_MIP405T)
if((bc & 0x80)==0)
SDRAM_err ("U-Boot configured for a MIP405T not for a MIP405!!!\n");
#else
@@ -543,7 +543,7 @@
void get_pcbrev_var(unsigned char *pcbrev, unsigned char *var)
{
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
unsigned char bc,rc,tmp;
int i;
@@ -575,7 +575,7 @@
* Check Board Identity:
*/
/* serial String: "MIP405_1000" OR "MIP405T_1000" */
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
#define BOARD_NAME "MIP405"
#else
#define BOARD_NAME "MIP405T"
@@ -777,7 +777,7 @@
(cfg >> 1) & 0x1, (cfg >> 2) & 0x1, (cfg >> 3) & 0x1);
printf ("User LED %s\n", (com_mode & 0x4) ? "on" : "off");
printf ("UART Clocks %d\n", (com_mode >> 4) & 0x3);
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
printf ("User Config Switch %d %d %d %d %d %d %d %d\n",
(ext) & 0x1, (ext >> 1) & 0x1, (ext >> 2) & 0x1,
(ext >> 3) & 0x1, (ext >> 4) & 0x1, (ext >> 5) & 0x1,
@@ -793,7 +793,7 @@
printf ("IDE Reset %s\n", (ext & 0x01) ? "asserted" : "not asserted");
printf ("IRQs:\n");
printf (" PIIX INTR: %s\n", (irq_reg & 0x80) ? "inactive" : "active");
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
printf (" UART0 IRQ: %s\n", (irq_reg & 0x40) ? "inactive" : "active");
printf (" UART1 IRQ: %s\n", (irq_reg & 0x20) ? "inactive" : "active");
#endif
diff --git a/board/mpl/pati/Kconfig b/board/mpl/pati/Kconfig
index b141da3..0eeaf70 100644
--- a/board/mpl/pati/Kconfig
+++ b/board/mpl/pati/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "PATI"
+config ISO_STRING
+ string
+ default "MEV-10084-001"
endif
diff --git a/board/mpl/pati/pati.h b/board/mpl/pati/pati.h
index 2600bba..93a5918 100644
--- a/board/mpl/pati/pati.h
+++ b/board/mpl/pati/pati.h
@@ -201,9 +201,8 @@
#define PCI_VENDOR_ID_MPL 0x18E6
#define PCI_DEVICE_ID_PATI 0x00DA
-#if defined(CONFIG_MIP405)
+#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T)
#define PATI_FIRMWARE_START_OFFSET 0x00300000
-#define PATI_ISO_STRING "MEV-10084-001"
#endif
#define PATI_ENDIAN_MODE 0x3E
diff --git a/board/mpl/pip405/Kconfig b/board/mpl/pip405/Kconfig
index f485367..e7ae6af 100644
--- a/board/mpl/pip405/Kconfig
+++ b/board/mpl/pip405/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "PIP405"
+config ISO_STRING
+ string
+ default "MEV-10066-001"
endif
diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c
index 4e2122f..c3607da 100644
--- a/board/phytec/pcm058/pcm058.c
+++ b/board/phytec/pcm058/pcm058.c
@@ -22,7 +22,7 @@
#include <asm/imx-common/boot_mode.h>
#include <asm/imx-common/mxc_i2c.h>
#include <asm/imx-common/spi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <mmc.h>
#include <i2c.h>
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index a1a26a6..b35b6a3 100644
--- a/board/renesas/alt/alt.c
+++ b/board/renesas/alt/alt.c
@@ -13,7 +13,7 @@
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/arch/rmobile.h>
diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c
index b2e2e3b..1372050 100644
--- a/board/renesas/blanche/blanche.c
+++ b/board/renesas/blanche/blanche.c
@@ -15,7 +15,7 @@
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/arch/rmobile.h>
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index 3a8bf86..359f95e 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -13,7 +13,7 @@
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/arch/rmobile.h>
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index b741e2e..dd62145 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -14,7 +14,7 @@
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/arch/rmobile.h>
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 6fed2f9..2ada816 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -16,7 +16,7 @@
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/arch/rmobile.h>
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index f6467ee..926a657 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -14,7 +14,7 @@
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/arch/rmobile.h>
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index 47242c6..0164306 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -16,7 +16,7 @@
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/arch/gpio.h>
diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c
index 4ec3f92..e13a38f 100644
--- a/board/renesas/silk/silk.c
+++ b/board/renesas/silk/silk.c
@@ -14,7 +14,7 @@
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/arch/rmobile.h>
diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c
index 672a730..fe8dd3d 100644
--- a/board/renesas/stout/stout.c
+++ b/board/renesas/stout/stout.c
@@ -17,7 +17,7 @@
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/arch/rmobile.h>
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index cb2d97d..2580b38 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -4,12 +4,54 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/armv8/mmu.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/arch/periph.h>
+#include <power/regulator.h>
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
+ struct udevice *pinctrl, *regulator;
+ int ret;
+
+ /*
+ * The PWM do not have decicated interrupt number in dts and can
+ * not get periph_id by pinctrl framework, so let's init them here.
+ * The PWM2 and PWM3 are for pwm regulater.
+ */
+ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+ if (ret) {
+ debug("%s: Cannot find pinctrl device\n", __func__);
+ goto out;
+ }
+
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
+ if (ret) {
+ debug("%s PWM2 pinctrl init fail!\n", __func__);
+ goto out;
+ }
+
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM3);
+ if (ret) {
+ debug("%s PWM3 pinctrl init fail!\n", __func__);
+ goto out;
+ }
+
+ ret = regulator_get_by_platname("vcc5v0_host", ®ulator);
+ if (ret) {
+ debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
+ goto out;
+ }
+
+ ret = regulator_set_enable(regulator, true);
+ if (ret) {
+ debug("%s vcc5v0-host-en set fail!\n", __func__);
+ goto out;
+ }
+
+out:
return 0;
}
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 1600568..e8329bb 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -45,17 +45,11 @@
int power_init_board(void)
{
- int ret;
-
/*
* For PMIC the I2C bus is named as I2C5, but it is connected
* to logical I2C adapter 0
*/
- ret = pmic_init(I2C_0);
- if (ret)
- return ret;
-
- return 0;
+ return pmic_init(I2C_0);
}
int dram_init(void)
diff --git a/board/sandbox/README.sandbox b/board/sandbox/README.sandbox
index ed820d3..02d8ab3 100644
--- a/board/sandbox/README.sandbox
+++ b/board/sandbox/README.sandbox
@@ -320,6 +320,25 @@
The idle value on the SPI bus
+Block Device Emulation
+----------------------
+
+U-Boot can use raw disk images for block device emulation. To e.g. list
+the contents of the root directory on the second partion of the image
+"disk.raw", you can use the following commands:
+
+=>host bind 0 ./disk.raw
+=>ls host 0:2
+
+A disk image can be created using the following commands:
+
+$> truncate -s 1200M ./disk.raw
+$> echo -e "label: gpt\n,64M,U\n,,L" | /usr/sbin/sfdisk ./disk.raw
+$> lodev=`sudo losetup -P -f --show ./disk.raw`
+$> sudo mkfs.vfat -n EFI -v ${lodev}p1
+$> sudo mkfs.ext4 -L ROOT -v ${lodev}p2
+
+
Writing Sandbox Drivers
-----------------------
diff --git a/board/seco/common/mx6.c b/board/seco/common/mx6.c
index 2f14f59..c4abc1d 100644
--- a/board/seco/common/mx6.c
+++ b/board/seco/common/mx6.c
@@ -12,7 +12,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/boot_mode.h>
diff --git a/board/seco/mx6quq7/mx6quq7.c b/board/seco/mx6quq7/mx6quq7.c
index 08566fc..341e727 100644
--- a/board/seco/mx6quq7/mx6quq7.c
+++ b/board/seco/mx6quq7/mx6quq7.c
@@ -12,7 +12,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/boot_mode.h>
diff --git a/board/socrates/nand.c b/board/socrates/nand.c
index a67d812..c7483fe 100644
--- a/board/socrates/nand.c
+++ b/board/socrates/nand.c
@@ -9,7 +9,7 @@
#if defined(CONFIG_SYS_NAND_BASE)
#include <nand.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
static int state;
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 3a1ce24..285588d 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -19,7 +19,7 @@
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
#include <asm/arch/mxc_hdmi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/video.h>
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 68443c9..b139d1c 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -1,5 +1,29 @@
if ARCH_SUNXI
+config IDENT_STRING
+ default " Allwinner Technology"
+
+config SPL_GPIO_SUPPORT
+ default y
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBDISK_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_MMC_SUPPORT
+ default y
+
+config SPL_POWER_SUPPORT
+ default y
+
+config SPL_SERIAL_SUPPORT
+ default y
+
# Note only one of these may be selected at a time! But hidden choices are
# not supported by Kconfig
config SUNXI_GEN_SUN4I
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 6f13cf6..f7129b7 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -217,6 +217,11 @@
S: Maintained
F: configs/MSI_Primo81_defconfig
+NANOPI-NEO BOARD
+M: Jelle van der Waa <jelle@vdwaa.nl>
+S: Maintained
+F: configs/nanopi_neo_defconfig
+
R16 EVB PARROT BOARD
M: Quentin Schulz <quentin.schulz@free-electrons.com>
S: Maintained
diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c
index 42b7c23..b7217c5 100644
--- a/board/sysam/amcore/amcore.c
+++ b/board/sysam/amcore/amcore.c
@@ -1,7 +1,7 @@
/*
* Board functions for Sysam AMCORE (MCF5307 based) board
*
- * (C) Copyright 2015 Angelo Dureghello <angelo@sysam.it>
+ * (C) Copyright 2016 Angelo Dureghello <angelo@sysam.it>
*
* SPDX-License-Identifier: GPL-2.0+
*
@@ -11,6 +11,8 @@
#include <common.h>
#include <asm/immap.h>
#include <asm/io.h>
+#include <dm.h>
+#include <dm/platform_data/serial_coldfire.h>
void init_lcd(void)
{
@@ -99,3 +101,14 @@
return get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE);
}
+
+static struct coldfire_serial_platdata mcf5307_serial_plat = {
+ .base = CONFIG_SYS_UART_BASE,
+ .port = 0,
+ .baudrate = CONFIG_BAUDRATE,
+};
+
+U_BOOT_DEVICE(coldfire_serial) = {
+ .name = "serial_coldfire",
+ .platdata = &mcf5307_serial_plat,
+};
diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c
index f784459..0d9d17a 100644
--- a/board/tbs/tbs2910/tbs2910.c
+++ b/board/tbs/tbs2910/tbs2910.c
@@ -8,7 +8,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/mxc_i2c.h>
#include <asm/imx-common/iomux-v3.h>
diff --git a/board/technologic/ts4800/ts4800.c b/board/technologic/ts4800/ts4800.c
index 6ef15e1..eef6922 100644
--- a/board/technologic/ts4800/ts4800.c
+++ b/board/technologic/ts4800/ts4800.c
@@ -12,7 +12,7 @@
#include <asm/gpio.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux-mx51.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
diff --git a/board/theadorable/theadorable.c b/board/theadorable/theadorable.c
index c1db289..d621682 100644
--- a/board/theadorable/theadorable.c
+++ b/board/theadorable/theadorable.c
@@ -126,6 +126,12 @@
return &theadorable_serdes_cfg[0];
}
+u8 board_sat_r_get(u8 dev_num, u8 reg)
+{
+ /* Bit 0 enables PCI 2.0 link capabilities instead of PCI 1.x */
+ return 0x01;
+}
+
int board_early_init_f(void)
{
/* Configure MPP */
diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig
index 97374bd..a84e91b 100644
--- a/board/ti/am335x/Kconfig
+++ b/board/ti/am335x/Kconfig
@@ -1,5 +1,14 @@
if TARGET_AM335X_EVM
+config SPL_ENV_SUPPORT
+ default y
+
+config SPL_WATCHDOG_SUPPORT
+ default y
+
+config SPL_YMODEM_SUPPORT
+ default y
+
config SYS_BOARD
default "am335x"
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 27c311e..f04a06e 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <i2c.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <spl.h>
#include <usb.h>
#include <asm/omap_sec_common.h>
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 0ed4f52..cfdab3e 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -29,7 +29,7 @@
#include <asm/gpio.h>
#include <asm/mach-types.h>
#include <asm/omap_musb.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/musb.h>
diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig
index adf73ab..4980a04 100644
--- a/board/ti/common/Kconfig
+++ b/board/ti/common/Kconfig
@@ -1,5 +1,41 @@
+config SPL_ENV_SUPPORT
+ default y
+
config TI_I2C_BOARD_DETECT
bool "Support for Board detection for TI platforms"
help
Support for detection board information on Texas Instrument's
Evaluation Boards which have I2C based EEPROM detection
+
+config SPL_EXT_SUPPORT
+ default y
+
+config SPL_FAT_SUPPORT
+ default y
+
+config SPL_GPIO_SUPPORT
+ default y
+
+config SPL_I2C_SUPPORT
+ default y
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBDISK_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_MMC_SUPPORT
+ default y
+
+config SPL_NAND_SUPPORT
+ default y
+
+config SPL_POWER_SUPPORT
+ default y
+
+config SPL_SERIAL_SUPPORT
+ default y
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index 50da410..b5d5ba9 100644
--- a/board/ti/omap5_uevm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
@@ -245,10 +245,7 @@
int ehci_hcd_stop(void)
{
- int ret;
-
- ret = omap_ehci_hcd_stop();
- return ret;
+ return omap_ehci_hcd_stop();
}
void usb_hub_reset_devices(int port)
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index 7fc57da..c8fc95d 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -13,7 +13,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/sys_proto.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/imx-common/mxc_i2c.h>
diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c
index e58b714..4db1a0b 100644
--- a/board/tqc/tqma6/tqma6_mba6.c
+++ b/board/tqc/tqma6/tqma6_mba6.c
@@ -14,7 +14,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/sys_proto.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/mxc_i2c.h>
diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c
index c9a7ab7..2bbb614 100644
--- a/board/tqc/tqma6/tqma6_wru4.c
+++ b/board/tqc/tqma6/tqma6_wru4.c
@@ -16,7 +16,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/sys_proto.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/boot_mode.h>
#include <asm/imx-common/mxc_i2c.h>
diff --git a/board/udoo/udoo.c b/board/udoo/udoo.c
index a574a2f..eb7ab65 100644
--- a/board/udoo/udoo.c
+++ b/board/udoo/udoo.c
@@ -11,7 +11,7 @@
#include <asm/arch/iomux.h>
#include <malloc.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/sata.h>
diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c
index 592e69b..f24d21e 100644
--- a/board/udoo/udoo_spl.c
+++ b/board/udoo/udoo_spl.c
@@ -10,7 +10,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/video.h>
diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c
index 085095c..c513b22 100644
--- a/board/wandboard/spl.c
+++ b/board/wandboard/spl.c
@@ -9,7 +9,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/video.h>
diff --git a/board/woodburn/woodburn.c b/board/woodburn/woodburn.c
index 3da61a4..972e74e 100644
--- a/board/woodburn/woodburn.c
+++ b/board/woodburn/woodburn.c
@@ -8,7 +8,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 0c5d997..566b5e8 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -16,14 +16,114 @@
#include <asm/io.h>
#include <usb.h>
#include <dwc3-uboot.h>
+#include <zynqmppl.h>
#include <i2c.h>
+#include <g_dnl.h>
DECLARE_GLOBAL_DATA_PTR;
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
+ !defined(CONFIG_SPL_BUILD)
+static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC;
+
+static const struct {
+ uint32_t id;
+ char *name;
+} zynqmp_devices[] = {
+ {
+ .id = 0x10,
+ .name = "3eg",
+ },
+ {
+ .id = 0x11,
+ .name = "2eg",
+ },
+ {
+ .id = 0x20,
+ .name = "5ev",
+ },
+ {
+ .id = 0x21,
+ .name = "4ev",
+ },
+ {
+ .id = 0x30,
+ .name = "7ev",
+ },
+ {
+ .id = 0x38,
+ .name = "9eg",
+ },
+ {
+ .id = 0x39,
+ .name = "6eg",
+ },
+ {
+ .id = 0x40,
+ .name = "11eg",
+ },
+ {
+ .id = 0x50,
+ .name = "15eg",
+ },
+ {
+ .id = 0x58,
+ .name = "19eg",
+ },
+ {
+ .id = 0x59,
+ .name = "17eg",
+ },
+};
+
+static int chip_id(void)
+{
+ struct pt_regs regs;
+ regs.regs[0] = ZYNQMP_SIP_SVC_CSU_DMA_CHIPID;
+ regs.regs[1] = 0;
+ regs.regs[2] = 0;
+ regs.regs[3] = 0;
+
+ smc_call(®s);
+
+ return regs.regs[0];
+}
+
+static char *zynqmp_get_silicon_idcode_name(void)
+{
+ uint32_t i, id;
+
+ id = chip_id();
+ for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) {
+ if (zynqmp_devices[i].id == id)
+ return zynqmp_devices[i].name;
+ }
+ return "unknown";
+}
+#endif
+
+#define ZYNQMP_VERSION_SIZE 9
+
int board_init(void)
{
printf("EL Level:\tEL%d\n", current_el());
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
+ !defined(CONFIG_SPL_BUILD) || (defined(CONFIG_SPL_FPGA_SUPPORT) && \
+ defined(CONFIG_SPL_BUILD))
+ if (current_el() != 3) {
+ static char version[ZYNQMP_VERSION_SIZE];
+
+ strncat(version, "xczu", ZYNQMP_VERSION_SIZE);
+ zynqmppl.name = strncat(version,
+ zynqmp_get_silicon_idcode_name(),
+ ZYNQMP_VERSION_SIZE);
+ printf("Chip ID:\t%s\n", zynqmppl.name);
+ fpga_init();
+ fpga_add(fpga_xilinx, &zynqmppl);
+ }
+#endif
+
return 0;
}
@@ -228,6 +328,10 @@
puts("Bootmode: ");
switch (bootmode) {
+ case USB_MODE:
+ puts("USB_MODE\n");
+ mode = "usb";
+ break;
case JTAG_MODE:
puts("JTAG_MODE\n");
mode = "pxe dhcp";
@@ -283,22 +387,38 @@
}
#ifdef CONFIG_USB_DWC3
-static struct dwc3_device dwc3_device_data = {
+static struct dwc3_device dwc3_device_data0 = {
.maximum_speed = USB_SPEED_HIGH,
.base = ZYNQMP_USB0_XHCI_BASEADDR,
.dr_mode = USB_DR_MODE_PERIPHERAL,
.index = 0,
};
-int usb_gadget_handle_interrupts(void)
+static struct dwc3_device dwc3_device_data1 = {
+ .maximum_speed = USB_SPEED_HIGH,
+ .base = ZYNQMP_USB1_XHCI_BASEADDR,
+ .dr_mode = USB_DR_MODE_PERIPHERAL,
+ .index = 1,
+};
+
+int usb_gadget_handle_interrupts(int index)
{
- dwc3_uboot_handle_interrupt(0);
+ dwc3_uboot_handle_interrupt(index);
return 0;
}
int board_usb_init(int index, enum usb_init_type init)
{
- return dwc3_uboot_init(&dwc3_device_data);
+ debug("%s: index %x\n", __func__, index);
+
+ switch (index) {
+ case 0:
+ return dwc3_uboot_init(&dwc3_device_data0);
+ case 1:
+ return dwc3_uboot_init(&dwc3_device_data1);
+ };
+
+ return -1;
}
int board_usb_cleanup(int index, enum usb_init_type init)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d28da54..9ed7976 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -705,4 +705,16 @@
fs types.
endmenu
+config CMD_UBI
+ tristate "Enable UBI - Unsorted block images commands"
+ select CRC32
+ select MTD_UBI
+ help
+ UBI is a software layer above MTD layer which admits use of LVM-like
+ logical volumes on top of MTD devices, hides some complexities of
+ flash chips like wear and bad blocks and provides some other useful
+ capabilities. Please, consult the MTD web site for more details
+ (www.linux-mtd.infradead.org). Activate this option if you want
+ to use U-Boot UBI commands.
+
endmenu
diff --git a/cmd/fat.c b/cmd/fat.c
index 4e20746..ad1dc2a 100644
--- a/cmd/fat.c
+++ b/cmd/fat.c
@@ -126,7 +126,7 @@
return 1;
}
addr = simple_strtoul(argv[3], NULL, 16);
- count = simple_strtoul(argv[5], NULL, 16);
+ count = (argc <= 5) ? 0 : simple_strtoul(argv[5], NULL, 16);
buf = map_sysmem(addr, count);
ret = file_fat_write(argv[4], buf, 0, count, &size);
@@ -145,7 +145,7 @@
U_BOOT_CMD(
fatwrite, 6, 0, do_fat_fswrite,
"write file into a dos filesystem",
- "<interface> <dev[:part]> <addr> <filename> <bytes>\n"
+ "<interface> <dev[:part]> <addr> <filename> [<bytes>]\n"
" - write file 'filename' from the address 'addr' in RAM\n"
" to 'dev' on 'interface'"
);
diff --git a/cmd/fuse.c b/cmd/fuse.c
index 5998f9b..2917d83 100644
--- a/cmd/fuse.c
+++ b/cmd/fuse.c
@@ -13,7 +13,7 @@
#include <command.h>
#include <console.h>
#include <fuse.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
static int strtou32(const char *str, unsigned int base, u32 *result)
{
diff --git a/cmd/host.c b/cmd/host.c
index 8d84415..515621b 100644
--- a/cmd/host.c
+++ b/cmd/host.c
@@ -9,7 +9,7 @@
#include <fs.h>
#include <part.h>
#include <sandboxblockdev.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
static int host_curr_device = -1;
@@ -25,6 +25,12 @@
return do_ls(cmdtp, flag, argc, argv, FS_TYPE_SANDBOX);
}
+static int do_host_size(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ return do_size(cmdtp, flag, argc, argv, FS_TYPE_SANDBOX);
+}
+
static int do_host_save(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
@@ -138,6 +144,7 @@
U_BOOT_CMD_MKENT(load, 7, 0, do_host_load, "", ""),
U_BOOT_CMD_MKENT(ls, 3, 0, do_host_ls, "", ""),
U_BOOT_CMD_MKENT(save, 6, 0, do_host_save, "", ""),
+ U_BOOT_CMD_MKENT(size, 3, 0, do_host_size, "", ""),
U_BOOT_CMD_MKENT(bind, 3, 0, do_host_bind, "", ""),
U_BOOT_CMD_MKENT(info, 3, 0, do_host_info, "", ""),
U_BOOT_CMD_MKENT(dev, 0, 1, do_host_dev, "", ""),
@@ -174,6 +181,7 @@
"host ls hostfs - <filename> - list files on host\n"
"host save hostfs - <addr> <filename> <bytes> [<offset>] - "
"save a file to host\n"
+ "host size hostfs - <filename> - determine size of file on host"
"host bind <dev> [<filename>] - bind \"host\" device to file\n"
"host info [<dev>] - show device binding & info\n"
"host dev [<dev>] - Set or retrieve the current host device\n"
diff --git a/cmd/ubi.c b/cmd/ubi.c
index 4a92d84..b726f3f 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -21,7 +21,7 @@
#include <linux/mtd/partitions.h>
#include <linux/err.h>
#include <ubi_uboot.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <jffs2/load_kernel.h>
#undef ubi_msg
diff --git a/common/Kconfig b/common/Kconfig
index 63c4a67..c69c141 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -198,6 +198,11 @@
The buffer is allocated immediately after the malloc() region is
ready.
+config IDENT_STRING
+ string "Board specific string to be added to uboot version string"
+ help
+ This options adds the board specific name to u-boot version.
+
config SYS_NO_FLASH
bool "Disable support for parallel NOR flash"
default n
@@ -213,3 +218,5 @@
version as printed by the "version" command.
Any change to this variable will be reverted at the
next reset.
+
+source "common/spl/Kconfig"
diff --git a/common/Makefile b/common/Makefile
index 21619b3..9a9a065 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -99,10 +99,16 @@
obj-$(CONFIG_USB_STORAGE) += usb_storage.o
endif
# environment
-ifdef CONFIG_SPL_ENV_SUPPORT
+ifdef CONFIG_TPL_BUILD
+obj-$(CONFIG_TPL_ENV_SUPPORT) += env_attr.o
+obj-$(CONFIG_TPL_ENV_SUPPORT) += env_flags.o
+obj-$(CONFIG_TPL_ENV_SUPPORT) += env_callback.o
+else
obj-$(CONFIG_SPL_ENV_SUPPORT) += env_attr.o
obj-$(CONFIG_SPL_ENV_SUPPORT) += env_flags.o
obj-$(CONFIG_SPL_ENV_SUPPORT) += env_callback.o
+endif
+ifneq ($(CONFIG_TPL_ENV_SUPPORT)$(CONFIG_SPL_ENV_SUPPORT),)
obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
obj-$(CONFIG_ENV_IS_IN_FAT) += env_fat.o
@@ -123,7 +129,11 @@
obj-$(CONFIG_HWCONFIG) += hwconfig.o
obj-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o
ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_TPL_BUILD
+obj-$(CONFIG_TPL_SERIAL_SUPPORT) += console.o
+else
obj-$(CONFIG_SPL_SERIAL_SUPPORT) += console.o
+endif
else
obj-y += console.o
endif
diff --git a/common/board_f.c b/common/board_f.c
index da381db..2c88595 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -49,7 +49,7 @@
#include <trace.h>
#include <video.h>
#include <watchdog.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/sections.h>
#if defined(CONFIG_X86) || defined(CONFIG_ARC)
@@ -290,6 +290,11 @@
return 0;
}
+__weak int mach_cpu_init(void)
+{
+ return 0;
+}
+
#ifdef CONFIG_SANDBOX
static int setup_ram_buf(void)
{
@@ -860,6 +865,7 @@
x86_fsp_init,
#endif
arch_cpu_init, /* basic arch cpu dependent setup */
+ mach_cpu_init, /* SoC/machine dependent CPU setup */
initf_dm,
arch_cpu_init_dm,
mark_bootstage, /* need timer, go after init dm */
diff --git a/common/hash.c b/common/hash.c
index 41de4df..b645298 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -17,7 +17,7 @@
#include <mapmem.h>
#include <hw_sha.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#else
#include "mkimage.h"
#include <time.h>
diff --git a/common/image-fdt.c b/common/image-fdt.c
index d6ee225..3d23608 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -285,7 +285,7 @@
fdt_noffset = fit_get_node_from_config(images,
FIT_FDT_PROP,
fdt_addr);
- if (fdt_noffset == -ENOLINK)
+ if (fdt_noffset == -ENOENT)
return 0;
else if (fdt_noffset < 0)
return 1;
diff --git a/common/image-fit.c b/common/image-fit.c
index 9ce68f1..1b0234a 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1560,7 +1560,7 @@
cfg_noffset = fit_conf_get_node(fit_hdr, images->fit_uname_cfg);
if (cfg_noffset < 0) {
debug("* %s: no such config\n", prop_name);
- return -ENOENT;
+ return -EINVAL;
}
noffset = fit_conf_get_prop_node(fit_hdr, cfg_noffset, prop_name);
diff --git a/common/image.c b/common/image.c
index 7ad04ca..a5d19ab 100644
--- a/common/image.c
+++ b/common/image.c
@@ -38,7 +38,7 @@
#include <u-boot/md5.h>
#include <u-boot/sha1.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#ifdef CONFIG_CMD_BDI
@@ -1078,7 +1078,7 @@
rd_addr = map_to_sysmem(images->fit_hdr_os);
rd_noffset = fit_get_node_from_config(images,
FIT_RAMDISK_PROP, rd_addr);
- if (rd_noffset == -ENOLINK)
+ if (rd_noffset == -ENOENT)
return 0;
else if (rd_noffset < 0)
return 1;
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
new file mode 100644
index 0000000..2a8ddbc
--- /dev/null
+++ b/common/spl/Kconfig
@@ -0,0 +1,545 @@
+menu "SPL / TPL"
+
+config SUPPORT_SPL
+ bool
+
+config SUPPORT_TPL
+ bool
+
+config SPL
+ bool
+ depends on SUPPORT_SPL
+ prompt "Enable SPL"
+ help
+ If you want to build SPL as well as the normal image, say Y.
+
+config SPL_SYS_MALLOC_SIMPLE
+ bool
+ depends on SPL
+ prompt "Only use malloc_simple functions in the SPL"
+ help
+ Say Y here to only use the *_simple malloc functions from
+ malloc_simple.c, rather then using the versions from dlmalloc.c;
+ this will make the SPL binary smaller at the cost of more heap
+ usage as the *_simple malloc functions do not re-use free-ed mem.
+
+config SPL_STACK_R
+ depends on SPL
+ bool "Enable SDRAM location for SPL stack"
+ help
+ SPL starts off execution in SRAM and thus typically has only a small
+ stack available. Since SPL sets up DRAM while in its board_init_f()
+ function, it is possible for the stack to move there before
+ board_init_r() is reached. This option enables a special SDRAM
+ location for the SPL stack. U-Boot SPL switches to this after
+ board_init_f() completes, and before board_init_r() starts.
+
+config SPL_STACK_R_ADDR
+ depends on SPL_STACK_R
+ hex "SDRAM location for SPL stack"
+ help
+ Specify the address in SDRAM for the SPL stack. This will be set up
+ before board_init_r() is called.
+
+config SPL_STACK_R_MALLOC_SIMPLE_LEN
+ depends on SPL_STACK_R && SPL_SYS_MALLOC_SIMPLE
+ hex "Size of malloc_simple heap after switching to DRAM SPL stack"
+ default 0x100000
+ help
+ Specify the amount of the stack to use as memory pool for
+ malloc_simple after switching the stack to DRAM. This may be set
+ to give board_init_r() a larger heap then the initial heap in
+ SRAM which is limited to SYS_MALLOC_F_LEN bytes.
+
+config SPL_SEPARATE_BSS
+ depends on SPL
+ bool "BSS section is in a different memory region from text"
+ help
+ Some platforms need a large BSS region in SPL and can provide this
+ because RAM is already set up. In this case BSS can be moved to RAM.
+ This option should then be enabled so that the correct device tree
+ location is used. Normally we put the device tree at the end of BSS
+ but with this option enabled, it goes at _image_binary_end.
+
+config TPL
+ bool
+ depends on SPL && SUPPORT_TPL
+ prompt "Enable TPL"
+ help
+ If you want to build TPL as well as the normal image and SPL, say Y.
+
+config SPL_CRC32_SUPPORT
+ bool "Support CRC32"
+ depends on SPL_FIT
+ help
+ Enable this to support CRC32 in FIT images within SPL. This is a
+ 32-bit checksum value that can be used to verify images. This is
+ the least secure type of checksum, suitable for detected
+ accidental image corruption. For secure applications you should
+ consider SHA1 or SHA256.
+
+config SPL_MD5_SUPPORT
+ bool "Support MD5"
+ depends on SPL_FIT
+ help
+ Enable this to support MD5 in FIT images within SPL. An MD5
+ checksum is a 128-bit hash value used to check that the image
+ contents have not been corrupted. Note that MD5 is not considered
+ secure as it is possible (with a brute-force attack) to adjust the
+ image while still retaining the same MD5 hash value. For secure
+ applications where images may be changed maliciously, you should
+ consider SHA1 or SHA256.
+
+config SPL_SHA1_SUPPORT
+ bool "Support SHA1"
+ depends on SPL_FIT
+ help
+ Enable this to support SHA1 in FIT images within SPL. A SHA1
+ checksum is a 160-bit (20-byte) hash value used to check that the
+ image contents have not been corrupted or maliciously altered.
+ While SHA1 is fairly secure it is coming to the end of its life
+ due to the expanding computing power avaiable to brute-force
+ attacks. For more security, consider SHA256.
+
+config SPL_SHA256_SUPPORT
+ bool "Support SHA256"
+ depends on SPL_FIT
+ help
+ Enable this to support SHA256 in FIT images within SPL. A SHA256
+ checksum is a 256-bit (32-byte) hash value used to check that the
+ image contents have not been corrupted. SHA256 is recommended for
+ use in secure applications since (as at 2016) there is no known
+ feasible attack that could produce a 'collision' with differing
+ input data. Use this for the highest security. Note that only the
+ SHA256 variant is supported: SHA512 and others are not currently
+ supported in U-Boot.
+
+config SPL_CRYPTO_SUPPORT
+ bool "Support crypto drivers"
+ depends on SPL
+ help
+ Enable crypto drivers in SPL. These drivers can be used to
+ accelerate secure boot processing in secure applications. Enable
+ this option to build the drivers in drivers/crypto as part of an
+ SPL build.
+
+config SPL_HASH_SUPPORT
+ bool "Support hashing drivers"
+ depends on SPL
+ help
+ Enable hashing drivers in SPL. These drivers can be used to
+ accelerate secure boot processing in secure applications. Enable
+ this option to build system-specific drivers for hash acceleration
+ as part of an SPL build.
+
+config SPL_DMA_SUPPORT
+ bool "Support DMA drivers"
+ depends on SPL
+ help
+ Enable DMA (direct-memory-access) drivers in SPL. These drivers
+ can be used to handle memory-to-peripheral data transfer without
+ the CPU moving the data. Enable this option to build the drivers
+ in drivers/dma as part of an SPL build.
+
+config SPL_DRIVERS_MISC_SUPPORT
+ bool "Support misc drivers"
+ depends on SPL
+ help
+ Enable miscellaneous drivers in SPL. These drivers perform various
+ tasks that don't fall nicely into other categories, Enable this
+ option to build the drivers in drivers/misc as part of an SPL
+ build, for those that support building in SPL (not all drivers do).
+
+config SPL_ENV_SUPPORT
+ bool "Support an environment"
+ depends on SPL
+ help
+ Enable environment support in SPL. The U-Boot environment provides
+ a number of settings (essentially name/value pairs) which can
+ control many aspects of U-Boot's operation. Normally this is not
+ needed in SPL as it has a much simpler task with less
+ configuration. But some boards use this to support 'Falcon' boot
+ on EXT2 and FAT, where SPL boots directly into Linux without
+ starting U-Boot first. Enabling this option will make getenv()
+ and setenv() available in SPL.
+
+config SPL_ETH_SUPPORT
+ bool "Support Ethernet"
+ depends on SPL_ENV_SUPPORT
+ help
+ Enable access to the network subsystem and associated Ethernet
+ drivers in SPL. This permits SPL to load U-Boot over an Ethernet
+ link rather than from an on-board peripheral. Environment support
+ is required since the network stack uses a number of environment
+ variables. See also SPL_NET_SUPPORT.
+
+config SPL_EXT_SUPPORT
+ bool "Support EXT filesystems"
+ depends on SPL
+ help
+ Enable support for EXT2/3/4 filesystems with SPL. This permits
+ U-Boot (or Linux in Falcon mode) to be loaded from an EXT
+ filesystem from within SPL. Support for the underlying block
+ device (e.g. MMC or USB) must be enabled separately.
+
+config SPL_FAT_SUPPORT
+ bool "Support FAT filesystems"
+ depends on SPL
+ help
+ Enable support for FAT and VFAT filesystems with SPL. This
+ permits U-Boot (or Linux in Falcon mode) to be loaded from a FAT
+ filesystem from within SPL. Support for the underlying block
+ device (e.g. MMC or USB) must be enabled separately.
+
+config SPL_FPGA_SUPPORT
+ bool "Support FPGAs"
+ depends on SPL
+ help
+ Enable support for FPGAs in SPL. Field-programmable Gate Arrays
+ provide software-configurable hardware which is typically used to
+ implement peripherals (such as UARTs, LCD displays, MMC) or
+ accelerate custom processing functions, such as image processing
+ or machine learning. Sometimes it is useful to program the FPGA
+ as early as possible during boot, and this option can enable that
+ within SPL.
+
+config SPL_GPIO_SUPPORT
+ bool "Support GPIO"
+ depends on SPL
+ help
+ Enable support for GPIOs (General-purpose Input/Output) in SPL.
+ GPIOs allow U-Boot to read the state of an input line (high or
+ low) and set the state of an output line. This can be used to
+ drive LEDs, control power to various system parts and read user
+ input. GPIOs can be useful in SPL to enable a 'sign-of-life' LED,
+ for example. Enable this option to build the drivers in
+ drivers/gpio as part of an SPL build.
+
+config SPL_I2C_SUPPORT
+ bool "Support I2C"
+ depends on SPL
+ help
+ Enable support for the I2C (Inter-Integrated Circuit) bus in SPL.
+ I2C works with a clock and data line which can be driven by a
+ one or more masters or slaves. It is a fairly complex bus but is
+ widely used as it only needs two lines for communication. Speeds of
+ 400kbps are typical but up to 3.4Mbps is supported by some
+ hardware. I2C can be useful in SPL to configure power management
+ ICs (PMICs) before raising the CPU clock speed, for example.
+ Enable this option to build the drivers in drivers/i2c as part of
+ an SPL build.
+
+config SPL_LIBCOMMON_SUPPORT
+ bool "Support common libraries"
+ depends on SPL
+ help
+ Enable support for common U-Boot libraries within SPL. These
+ libraries include common code to deal with U-Boot images,
+ environment and USB, for example. This option is enabled on many
+ boards. Enable this option to build the code in common/ as part of
+ an SPL build.
+
+config SPL_LIBDISK_SUPPORT
+ bool "Support disk paritions"
+ depends on SPL
+ help
+ Enable support for disk partitions within SPL. 'Disk' is something
+ of a misnomer as it includes non-spinning media such as flash (as
+ used in MMC and USB sticks). Partitions provide a way for a disk
+ to be split up into separate regions, with a partition table placed
+ at the start or end which describes the location and size of each
+ 'partition'. These partitions are typically uses as individual block
+ devices, typically with an EXT2 or FAT filesystem in each. This
+ option enables whatever partition support has been enabled in
+ U-Boot to also be used in SPL. It brings in the code in disk/.
+
+config SPL_LIBGENERIC_SUPPORT
+ bool "Support generic libraries"
+ depends on SPL
+ help
+ Enable support for generic U-Boot libraries within SPL. These
+ libraries include generic code to deal with device tree, hashing,
+ printf(), compression and the like. This option is enabled on many
+ boards. Enable this option to build the code in lib/ as part of an
+ SPL build.
+
+config SPL_MMC_SUPPORT
+ bool "Support MMC"
+ depends on SPL
+ help
+ Enable support for MMC (Multimedia Card) within SPL. This enables
+ the MMC protocol implementation and allows any enabled drivers to
+ be used within SPL. MMC can be used with or without disk partition
+ support depending on the application (SPL_LIBDISK_SUPPORT). Enable
+ this option to build the drivers in drivers/mmc as part of an SPL
+ build.
+
+config SPL_MPC8XXX_INIT_DDR_SUPPORT
+ bool "Support MPC8XXX DDR init"
+ depends on SPL
+ help
+ Enable support for DDR-SDRAM (double-data-rate synchronous dynamic
+ random-access memory) on the MPC8XXX family within SPL. This
+ allows DRAM to be set up before loading U-Boot into that DRAM,
+ where it can run.
+
+config SPL_MTD_SUPPORT
+ bool "Support MTD drivers"
+ depends on SPL
+ help
+ Enable support for MTD (Memory Technology Device) within SPL. MTD
+ provides a block interface over raw NAND and can also be used with
+ SPI flash. This allows SPL to load U-Boot from supported MTD
+ devices. See SPL_NAND_SUPPORT and SPL_ONENAND_SUPPORT for how
+ to enable specific MTD drivers.
+
+config SPL_MUSB_NEW_SUPPORT
+ bool "Support new Mentor Graphics USB"
+ depends on SPL
+ help
+ Enable support for Mentor Graphics USB in SPL. This is a new
+ driver used by some boards. Enable this option to build
+ the drivers in drivers/usb/musb-new as part of an SPL build. The
+ old drivers are in drivers/usb/musb.
+
+config SPL_NAND_SUPPORT
+ bool "Support NAND flash"
+ depends on SPL
+ help
+ Enable support for NAND (Negative AND) flash in SPL. NAND flash
+ can be used to allow SPL to load U-Boot from supported devices.
+ This enables the drivers in drivers/mtd/nand as part of an SPL
+ build.
+
+config SPL_NET_SUPPORT
+ bool "Support networking"
+ depends on SPL
+ help
+ Enable support for network devices (such as Ethernet) in SPL.
+ This permits SPL to load U-Boot over a network link rather than
+ from an on-board peripheral. Environment support is required since
+ the network stack uses a number of environment variables. See also
+ SPL_ETH_SUPPORT.
+
+if SPL_NET_SUPPORT
+config SPL_NET_VCI_STRING
+ string "BOOTP Vendor Class Identifier string sent by SPL"
+ help
+ As defined by RFC 2132 the vendor class identifier field can be
+ sent by the client to identify the vendor type and configuration
+ of a client. This is often used in practice to allow for the DHCP
+ server to specify different files to load depending on if the ROM,
+ SPL or U-Boot itself makes the request
+endif # if SPL_NET_SUPPORT
+
+config SPL_NO_CPU_SUPPORT
+ bool "Drop CPU code in SPL"
+ depends on SPL
+ help
+ This is specific to the ARM926EJ-S CPU. It disables the standard
+ start.S start-up code, presumably so that a replacement can be
+ used on that CPU. You should not enable it unless you know what
+ you are doing.
+
+config SPL_NOR_SUPPORT
+ bool "Support NOR flash"
+ depends on SPL
+ help
+ Enable support for loading U-Boot from memory-mapped NOR (Negative
+ OR) flash in SPL. NOR flash is slow to write but fast to read, and
+ a memory-mapped device makes it very easy to access. Loading from
+ NOR is typically achieved with just a memcpy().
+
+config SPL_ONENAND_SUPPORT
+ bool "Support OneNAND flash"
+ depends on SPL
+ help
+ Enable support for OneNAND (Negative AND) flash in SPL. OneNAND is
+ a type of NAND flash and therefore can be used to allow SPL to
+ load U-Boot from supported devices. This enables the drivers in
+ drivers/mtd/onenand as part of an SPL build.
+
+config SPL_POST_MEM_SUPPORT
+ bool "Support POST drivers"
+ depends on SPL
+ help
+ Enable support for POST (Power-on Self Test) in SPL. POST is a
+ procedure that checks that the hardware (CPU or board) appears to
+ be functionally correctly. It is a sanity check that can be
+ performed before booting. This enables the drivers in post/drivers
+ as part of an SPL build.
+
+config SPL_POWER_SUPPORT
+ bool "Support power drivers"
+ depends on SPL
+ help
+ Enable support for power control in SPL. This includes support
+ for PMICs (Power-management Integrated Circuits) and some of the
+ features provided by PMICs. In particular, voltage regulators can
+ be used to enable/disable power and vary its voltage. That can be
+ useful in SPL to turn on boot peripherals and adjust CPU voltage
+ so that the clock speed can be increased. This enables the drivers
+ in drivers/power, drivers/power/pmic and drivers/power/regulator
+ as part of an SPL build.
+
+config SPL_SATA_SUPPORT
+ bool "Support loading from SATA"
+ depends on SPL
+ help
+ Enable support for SATA (Serial AT attachment) in SPL. This allows
+ use of SATA devices such as hard drives and flash drivers for
+ loading U-Boot. SATA is used in higher-end embedded systems and
+ can provide higher performance than MMC , at somewhat higher
+ expense and power consumption. This enables loading from SATA
+ using a configured device.
+
+config SPL_SERIAL_SUPPORT
+ bool "Support serial"
+ depends on SPL
+ help
+ Enable support for serial in SPL. This allows use of a serial UART
+ for displaying messages while SPL is running. It also brings in
+ printf() and panic() functions. This should normally be enabled
+ unless there are space reasons not to. Even then, consider
+ enabling USE_TINY_PRINTF which is a small printf() version.
+
+config SPL_SPI_FLASH_SUPPORT
+ bool "Support SPI flash drivers"
+ depends on SPL
+ help
+ Enable support for using SPI flash in SPL, and loading U-Boot from
+ SPI flash. SPI flash (Serial Peripheral Bus flash) is named after
+ the SPI bus that is used to connect it to a system. It is a simple
+ but fast bidirectional 4-wire bus (clock, chip select and two data
+ lines). This enables the drivers in drivers/mtd/spi as part of an
+ SPL build. This normally requires SPL_SPI_SUPPORT.
+
+config SPL_SPI_SUPPORT
+ bool "Support SPI drivers"
+ depends on SPL
+ help
+ Enable support for using SPI in SPL. This is used for connecting
+ to SPI flash for loading U-Boot. See SPL_SPI_FLASH_SUPPORT for
+ more details on that. The SPI driver provides the transport for
+ data between the SPI flash and the CPU. This option can be used to
+ enable SPI drivers that are needed for other purposes also, such
+ as a SPI PMIC.
+
+config SPL_USBETH_SUPPORT
+ bool "Support USB Ethernet drivers"
+ depends on SPL
+ help
+ Enable access to the USB network subsystem and associated
+ drivers in SPL. This permits SPL to load U-Boot over a
+ USB-connected Ethernet link (such as a USB Ethernet dongle) rather
+ than from an onboard peripheral. Environment support is required
+ since the network stack uses a number of environment variables.
+ See also SPL_NET_SUPPORT and SPL_ETH_SUPPORT.
+
+config SPL_USB_HOST_SUPPORT
+ bool "Support USB host drivers"
+ depends on SPL
+ help
+ Enable access to USB (Universal Serial Bus) host devices so that
+ SPL can load U-Boot from a connected USB peripheral, such as a USB
+ flash stick. While USB takes a little longer to start up than most
+ buses, it is very flexible since many different types of storage
+ device can be attached. This option enables the drivers in
+ drivers/usb/host as part of an SPL build.
+
+config SPL_USB_SUPPORT
+ bool "Support loading from USB"
+ depends on SPL_USB_HOST_SUPPORT
+ help
+ Enable support for USB devices in SPL. This allows use of USB
+ devices such as hard drives and flash drivers for loading U-Boot.
+ The actual drivers are enabled separately using the normal U-Boot
+ config options. This enables loading from USB using a configured
+ device.
+
+config SPL_WATCHDOG_SUPPORT
+ bool "Support watchdog drivers"
+ depends on SPL
+ help
+ Enable support for watchdog drivers in SPL. A watchdog is
+ typically a hardware peripheral which can reset the system when it
+ detects no activity for a while (such as a software crash). This
+ enables the drivers in drivers/watchdog as part of an SPL build.
+
+config SPL_YMODEM_SUPPORT
+ bool "Support loading using Ymodem"
+ depends on SPL
+ help
+ While loading from serial is slow it can be a useful backup when
+ there is no other option. The Ymodem protocol provides a reliable
+ means of transmitting U-Boot over a serial line for using in SPL,
+ with a checksum to ensure correctness.
+
+config TPL_ENV_SUPPORT
+ bool "Support an environment"
+ depends on TPL
+ help
+ Enable environment support in TPL. See SPL_ENV_SUPPORT for details.
+
+config TPL_I2C_SUPPORT
+ bool "Support I2C"
+ depends on TPL
+ help
+ Enable support for the I2C bus in SPL. See SPL_I2C_SUPPORT for
+ details.
+
+config TPL_LIBCOMMON_SUPPORT
+ bool "Support common libraries"
+ depends on TPL
+ help
+ Enable support for common U-Boot libraries within TPL. See
+ SPL_LIBCOMMON_SUPPORT for details.
+
+config TPL_LIBGENERIC_SUPPORT
+ bool "Support generic libraries"
+ depends on TPL
+ help
+ Enable support for generic U-Boot libraries within TPL. See
+ SPL_LIBGENERIC_SUPPORT for details.
+
+config TPL_MPC8XXX_INIT_DDR_SUPPORT
+ bool "Support MPC8XXX DDR init"
+ depends on TPL
+ help
+ Enable support for DDR-SDRAM on the MPC8XXX family within TPL. See
+ SPL_MPC8XXX_INIT_DDR_SUPPORT for details.
+
+config TPL_MMC_SUPPORT
+ bool "Support MMC"
+ depends on TPL
+ help
+ Enable support for MMC within TPL. See SPL_MMC_SUPPORT for details.
+
+config TPL_NAND_SUPPORT
+ bool "Support NAND flash"
+ depends on TPL
+ help
+ Enable support for NAND in SPL. See SPL_NAND_SUPPORT for details.
+
+config TPL_SERIAL_SUPPORT
+ bool "Support serial"
+ depends on TPL
+ help
+ Enable support for serial in SPL. See SPL_SERIAL_SUPPORT for
+ details.
+
+config TPL_SPI_FLASH_SUPPORT
+ bool "Support SPI flash drivers"
+ depends on TPL
+ help
+ Enable support for using SPI flash in SPL. See SPL_SPI_FLASH_SUPPORT
+ for details.
+
+config TPL_SPI_SUPPORT
+ bool "Support SPI drivers"
+ depends on TPL
+ help
+ Enable support for using SPI in SPL. See SPL_SPI_SUPPORT for
+ details.
+
+endmenu
diff --git a/common/usb.c b/common/usb.c
index b3ba487..15e1e4c 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -557,12 +557,10 @@
static int usb_get_descriptor(struct usb_device *dev, unsigned char type,
unsigned char index, void *buf, int size)
{
- int res;
- res = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
- USB_REQ_GET_DESCRIPTOR, USB_DIR_IN,
- (type << 8) + index, 0,
- buf, size, USB_CNTL_TIMEOUT);
- return res;
+ return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
+ USB_REQ_GET_DESCRIPTOR, USB_DIR_IN,
+ (type << 8) + index, 0, buf, size,
+ USB_CNTL_TIMEOUT);
}
/**********************************************************************
@@ -612,14 +610,10 @@
*/
static int usb_set_address(struct usb_device *dev)
{
- int res;
-
debug("set address %d\n", dev->devnum);
- res = usb_control_msg(dev, usb_snddefctrl(dev),
- USB_REQ_SET_ADDRESS, 0,
- (dev->devnum), 0,
- NULL, 0, USB_CNTL_TIMEOUT);
- return res;
+
+ return usb_control_msg(dev, usb_snddefctrl(dev), USB_REQ_SET_ADDRESS,
+ 0, (dev->devnum), 0, NULL, 0, USB_CNTL_TIMEOUT);
}
/********************************************************************
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 97f79f8..a9872a6 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -605,11 +605,8 @@
static int usb_kbd_probe(struct udevice *dev)
{
struct usb_device *udev = dev_get_parent_priv(dev);
- int ret;
-
- ret = probe_usb_keyboard(udev);
- return ret;
+ return probe_usb_keyboard(udev);
}
static int usb_kbd_remove(struct udevice *dev)
diff --git a/common/usb_storage.c b/common/usb_storage.c
index 7e6e52d..0345aa2 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -708,13 +708,10 @@
/* clear a stall on an endpoint - special for BBB devices */
static int usb_stor_BBB_clear_endpt_stall(struct us_data *us, __u8 endpt)
{
- int result;
-
/* ENDPOINT_HALT = 0, so set value to 0 */
- result = usb_control_msg(us->pusb_dev, usb_sndctrlpipe(us->pusb_dev, 0),
- USB_REQ_CLEAR_FEATURE, USB_RECIP_ENDPOINT,
- 0, endpt, NULL, 0, USB_CNTL_TIMEOUT * 5);
- return result;
+ return usb_control_msg(us->pusb_dev, usb_sndctrlpipe(us->pusb_dev, 0),
+ USB_REQ_CLEAR_FEATURE, USB_RECIP_ENDPOINT, 0,
+ endpt, NULL, 0, USB_CNTL_TIMEOUT * 5);
}
static int usb_stor_BBB_transport(ccb *srb, struct us_data *us)
diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig
index 8cb7ac7..04b720d 100644
--- a/configs/A10-OLinuXino-Lime_defconfig
+++ b/configs/A10-OLinuXino-Lime_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=480
CONFIG_DRAM_EMR1=4
@@ -7,8 +8,8 @@
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPC(3)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig
index 6a0d815..e2bebf8 100644
--- a/configs/A10s-OLinuXino-M_defconfig
+++ b/configs/A10s-OLinuXino-M_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_MMC0_CD_PIN="PG1"
@@ -8,8 +9,8 @@
CONFIG_USB1_VBUS_PIN="PB10"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig
index a790856..361d90a 100644
--- a/configs/A13-OLinuXinoM_defconfig
+++ b/configs/A13-OLinuXinoM_defconfig
@@ -12,8 +12,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig
index d12a3cc..64109a6 100644
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_EMR1=0
@@ -14,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index cc5858e..54343de 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
@@ -7,13 +8,21 @@
CONFIG_USB0_VBUS_DET="PH5"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
+CONFIG_G_DNL_VENDOR_NUM=0x1f3a
+CONFIG_G_DNL_PRODUCT_NUM=0x1010
diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
index 7b0309c..c4f6e1a 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -1,12 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPC(3)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
index f121cab..5809345 100644
--- a/configs/A20-OLinuXino_MICRO_defconfig
+++ b/configs/A20-OLinuXino_MICRO_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
@@ -8,8 +9,8 @@
CONFIG_VIDEO_VGA=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
index 57609b3..7a14a7b 100644
--- a/configs/A20-Olimex-SOM-EVB_defconfig
+++ b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
@@ -10,8 +11,8 @@
CONFIG_USB0_VBUS_DET="PH5"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig
index fc1be7d..46c5309 100644
--- a/configs/Ainol_AW1_defconfig
+++ b/configs/Ainol_AW1_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
CONFIG_DRAM_ZQ=123
diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig
index 8262be5..5020724 100644
--- a/configs/Ampe_A76_defconfig
+++ b/configs/Ampe_A76_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_MMC0_CD_PIN="PG0"
@@ -14,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig
index 44f3982..1e248a7 100644
--- a/configs/Auxtek-T003_defconfig
+++ b/configs/Auxtek-T003_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_EMR1=0
diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig
index 9d5365d..55f956e 100644
--- a/configs/Auxtek-T004_defconfig
+++ b/configs/Auxtek-T004_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_USB1_VBUS_PIN="PG13"
diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig
index cc3e9ec..c192177 100644
--- a/configs/B4420QDS_NAND_defconfig
+++ b/configs/B4420QDS_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_SF=y
diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig
index 7dbcb45..d01baaa 100644
--- a/configs/B4860QDS_NAND_defconfig
+++ b/configs/B4860QDS_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_SF=y
diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig
index c6e560d..75124a8 100644
--- a/configs/B4860QDS_SECURE_BOOT_defconfig
+++ b/configs/B4860QDS_SECURE_BOOT_defconfig
@@ -27,4 +27,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
index b8b654e..babcdd5 100644
--- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
@@ -1,13 +1,15 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND,SYS_CLK_100"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig
index c05ad2a..ad00622 100644
--- a/configs/BSC9131RDB_NAND_defconfig
+++ b/configs/BSC9131RDB_NAND_defconfig
@@ -1,13 +1,15 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
index 67dc545..e678144 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
index c4a824b..e6fde47 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
@@ -1,13 +1,15 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_100"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
index 3db7dea..1d9b541 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
index 3c4e296..235f304 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
@@ -1,13 +1,15 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_133"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
index bef3077..f193c4b 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
index 7e54d77..74c3385 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
index 9ecdff9..0bea345 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
index 773322c..d24f216 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
index 3e7b651..06a1770 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
index 7442025..6f6f2dc 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index d9b1bd6..366ef24 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
CONFIG_VIDEO_COMPOSITE=y
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
index 496c20e..9b39124 100644
--- a/configs/Bananapro_defconfig
+++ b/configs/Bananapro_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
CONFIG_USB1_VBUS_PIN="PH0"
@@ -8,8 +9,8 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig
index 7db345e..1c03d44 100644
--- a/configs/C29XPCIE_NAND_defconfig
+++ b/configs/C29XPCIE_NAND_defconfig
@@ -1,14 +1,23 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,NAND"
CONFIG_BOOTDELAY=-1
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig
index 1dbb8ad..f932373 100644
--- a/configs/C29XPCIE_NOR_SECBOOT_defconfig
+++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
@@ -22,4 +22,5 @@
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
index 407093c..7f4189e 100644
--- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
@@ -22,4 +22,5 @@
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig
index 19ae280..296a0b5 100644
--- a/configs/CHIP_defconfig
+++ b/configs/CHIP_defconfig
@@ -1,13 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
# CONFIG_MMC is not set
CONFIG_USB0_VBUS_PIN="PB10"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip"
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig
index 1cb010d..448ce95 100644
--- a/configs/CSQ_CS908_defconfig
+++ b/configs/CSQ_CS908_defconfig
@@ -6,8 +6,8 @@
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig
index 3257aae..8507f73 100644
--- a/configs/Chuwi_V7_CW0825_defconfig
+++ b/configs/Chuwi_V7_CW0825_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_EMR1=4
diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig
index 2ce8cb1..d8272c5 100644
--- a/configs/Colombus_defconfig
+++ b/configs/Colombus_defconfig
@@ -16,8 +16,8 @@
CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
index 4b9d722..ad6eb62 100644
--- a/configs/Cubieboard2_defconfig
+++ b/configs/Cubieboard2_defconfig
@@ -1,12 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig
index c884115..9b4f483 100644
--- a/configs/Cubieboard_defconfig
+++ b/configs/Cubieboard_defconfig
@@ -1,12 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index 4e25392..9e44cf7 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
CONFIG_MMC0_CD_PIN="PH1"
@@ -10,8 +11,8 @@
CONFIG_GMAC_TX_DELAY=1
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(12)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig
index 5f01760..831949a 100644
--- a/configs/Empire_electronix_d709_defconfig
+++ b/configs/Empire_electronix_d709_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_DRAM_EMR1=0
@@ -15,8 +16,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig
index 224098f..4b51380 100644
--- a/configs/Empire_electronix_m712_defconfig
+++ b/configs/Empire_electronix_m712_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=408
CONFIG_MMC0_CD_PIN="PG0"
@@ -14,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig
index 3b0c439..dc4133d 100644
--- a/configs/Hummingbird_A31_defconfig
+++ b/configs/Hummingbird_A31_defconfig
@@ -8,8 +8,8 @@
CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25"
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig
index fef3685..41cb877 100644
--- a/configs/Hyundai_A7HD_defconfig
+++ b/configs/Hyundai_A7HD_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_EMR1=4
CONFIG_USB0_VBUS_PIN="PB09"
diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig
index cb6dfe4..1a8fad7 100644
--- a/configs/Itead_Ibox_A20_defconfig
+++ b/configs/Itead_Ibox_A20_defconfig
@@ -1,12 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
index d2111c6..c2fc2b3 100644
--- a/configs/Lamobo_R1_defconfig
+++ b/configs/Lamobo_R1_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
CONFIG_MMC0_CD_PIN="PH10"
CONFIG_GMAC_TX_DELAY=4
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI,SATAPWR=SUNXI_GPB(3)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
index 378abce..a916e5d 100644
--- a/configs/Linksprite_pcDuino3_Nano_defconfig
+++ b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_ZQ=122
@@ -7,8 +8,8 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(2)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig
index c3f0421..8eea214 100644
--- a/configs/Linksprite_pcDuino3_defconfig
+++ b/configs/Linksprite_pcDuino3_defconfig
@@ -1,12 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_DRAM_ZQ=122
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPH(2)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig
index 9d8d325..ab094a6 100644
--- a/configs/Linksprite_pcDuino_defconfig
+++ b/configs/Linksprite_pcDuino_defconfig
@@ -1,12 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/MIP405T_defconfig b/configs/MIP405T_defconfig
index c9913ae..e5910cd 100644
--- a/configs/MIP405T_defconfig
+++ b/configs/MIP405T_defconfig
@@ -1,7 +1,7 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING="\n(c) 2003 by MPL AG Switzerland, MEV-10082-001 released"
CONFIG_4xx=y
-CONFIG_TARGET_MIP405=y
-CONFIG_SYS_EXTRA_OPTIONS="MIP405T"
+CONFIG_TARGET_MIP405T=y
CONFIG_BOOTDELAY=5
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
diff --git a/configs/MIP405_defconfig b/configs/MIP405_defconfig
index c32bdd3..a38eac1 100644
--- a/configs/MIP405_defconfig
+++ b/configs/MIP405_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING="\n(c) 2003 by MPL AG Switzerland, MEV-10072-001 released"
CONFIG_4xx=y
CONFIG_TARGET_MIP405=y
CONFIG_BOOTDELAY=5
diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig
index 49bb26a..1e8f9db 100644
--- a/configs/MK808C_defconfig
+++ b/configs/MK808C_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-mk808c"
diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig
index efabb9a..c64b4e8 100644
--- a/configs/MPC8313ERDB_NAND_33_defconfig
+++ b/configs/MPC8313ERDB_NAND_33_defconfig
@@ -1,11 +1,13 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8313ERDB=y
-CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ,NAND"
CONFIG_BOOTDELAY=6
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig
index be0e274..a97f634 100644
--- a/configs/MPC8313ERDB_NAND_66_defconfig
+++ b/configs/MPC8313ERDB_NAND_66_defconfig
@@ -1,11 +1,13 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8313ERDB=y
-CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ,NAND"
CONFIG_BOOTDELAY=6
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig
index 5559444..87fd3b9 100644
--- a/configs/MSI_Primo73_defconfig
+++ b/configs/MSI_Primo73_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:60000,le:60,ri:160,up:13,lo:12,hs:100,vs:10,sync:3,vmode:0"
diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig
index cef9794..b1d6b23 100644
--- a/configs/Marsboard_A10_defconfig
+++ b/configs/Marsboard_A10_defconfig
@@ -3,8 +3,8 @@
CONFIG_MACH_SUN4I=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,AHCI"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig
index 2ac2596..4097e5b 100644
--- a/configs/Mele_A1000G_quad_defconfig
+++ b/configs/Mele_A1000G_quad_defconfig
@@ -7,8 +7,8 @@
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig
index f076e30..eae5ead 100644
--- a/configs/Mele_A1000_defconfig
+++ b/configs/Mele_A1000_defconfig
@@ -1,12 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_VIDEO_VGA=y
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,MACPWR=SUNXI_GPH(15),AHCI"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig
index eccf372..eb3c74c 100644
--- a/configs/Mele_I7_defconfig
+++ b/configs/Mele_I7_defconfig
@@ -6,8 +6,8 @@
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig
index d72dcc0..037e768 100644
--- a/configs/Mele_M3_defconfig
+++ b/configs/Mele_M3_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
@@ -8,8 +9,8 @@
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig
index 0d1ba15..124dc22 100644
--- a/configs/Mele_M5_defconfig
+++ b/configs/Mele_M5_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
CONFIG_DRAM_ZQ=122
@@ -7,8 +8,8 @@
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,STATUSLED=234"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig
index f0b4384..c4e5993 100644
--- a/configs/Mele_M9_defconfig
+++ b/configs/Mele_M9_defconfig
@@ -6,8 +6,8 @@
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig
index 53f9bfe..87fac82 100644
--- a/configs/Mini-X_defconfig
+++ b/configs/Mini-X_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_VIDEO_COMPOSITE=y
diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
index 00c671b..c3eaae2 100644
--- a/configs/Orangepi_defconfig
+++ b/configs/Orangepi_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
CONFIG_USB1_VBUS_PIN="PH26"
@@ -9,8 +10,8 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
index a865255..2903d83 100644
--- a/configs/Orangepi_mini_defconfig
+++ b/configs/Orangepi_mini_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
CONFIG_MMC0_CD_PIN="PH10"
@@ -11,8 +12,8 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
index 003b332..864643c 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 42dbec3..fc14f50 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -1,15 +1,24 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
index 55f0765..17dd94b 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index 34e7d8f..4006383 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
index 63b9c31..6ff1f50 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 154c790..94f1501 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -1,14 +1,23 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
index 5f6d184..911f607 100644
--- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
@@ -27,4 +27,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 5bdcae0..db003ef 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -1,14 +1,23 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
index e0dff12..9599528 100644
--- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
@@ -27,4 +27,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index eb96978..d8d069e 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
index f1a2705..7050462 100644
--- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
@@ -27,4 +27,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 1cec61a..b8229fa 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
index 4639c2e..55da2e4 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 3056310..dd170a5 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -1,15 +1,24 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
index b70ff00..166df05 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index f4a9b37..b907459 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
index 5392e61..f26fa72 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -28,4 +28,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 9263b68..e87c9d6 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -1,14 +1,23 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
index 61d503d..7fad176 100644
--- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
@@ -27,4 +27,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index f2aefdd..11f0866 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -1,14 +1,24 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
index 899c8c8..6282ccb 100644
--- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
@@ -27,4 +27,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index 3b17795..613131a 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
index 832d3ae..c2238d6 100644
--- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
@@ -27,4 +27,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index a6b53b9..fb7334b 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
index 1af48fd..9858190 100644
--- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
@@ -1,14 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig
index f22730e..fe73db8 100644
--- a/configs/P1020MBG-PC_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_SDCARD_defconfig
@@ -1,13 +1,20 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index b715c76..ca98c31 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -1,15 +1,23 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 7951088..ffaca1e 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -1,14 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 0dba3b8..4caaad4 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 8aebfd2..4dea4a1 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 71d1d0e..83fed21 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -1,13 +1,20 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index ec7f62f..fa3b7f0 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 62d7e58..f2d8fe2 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 4606ab5..80516e0 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -1,13 +1,20 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index 8a4383c..6ac21e7 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
index bea36b5..1e7c608 100644
--- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
@@ -1,14 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig
index 94ba43d..20353a7 100644
--- a/configs/P1020UTM-PC_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_SDCARD_defconfig
@@ -1,13 +1,20 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig
index bc912d0..d06aa57 100644
--- a/configs/P1021RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig
@@ -1,15 +1,23 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
index eca4c59..98705dd 100644
--- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
@@ -1,14 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
index b1b57af..bc002af 100644
--- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig
index 139be5a..ebfc053 100644
--- a/configs/P1021RDB-PC_NAND_defconfig
+++ b/configs/P1021RDB-PC_NAND_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig
index 5891165..c9e4ed7 100644
--- a/configs/P1021RDB-PC_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_SDCARD_defconfig
@@ -1,13 +1,20 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig
index e5be60e..2fd40b7 100644
--- a/configs/P1021RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_SPIFLASH_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig
index 8303305..3d63c8e 100644
--- a/configs/P1022DS_36BIT_NAND_defconfig
+++ b/configs/P1022DS_36BIT_NAND_defconfig
@@ -1,15 +1,23 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig
index e365f1b..19f0b0d 100644
--- a/configs/P1022DS_36BIT_SDCARD_defconfig
+++ b/configs/P1022DS_36BIT_SDCARD_defconfig
@@ -1,14 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig
index f0ea572..fdf969d 100644
--- a/configs/P1022DS_36BIT_SPIFLASH_defconfig
+++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig
index 4292b51..11efa48 100644
--- a/configs/P1022DS_NAND_defconfig
+++ b/configs/P1022DS_NAND_defconfig
@@ -1,14 +1,23 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig
index 55fc15d..1f1f621 100644
--- a/configs/P1022DS_SDCARD_defconfig
+++ b/configs/P1022DS_SDCARD_defconfig
@@ -1,13 +1,20 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig
index d921bd7..60b4981 100644
--- a/configs/P1022DS_SPIFLASH_defconfig
+++ b/configs/P1022DS_SPIFLASH_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig
index 082aaa9..36d0867 100644
--- a/configs/P1024RDB_NAND_defconfig
+++ b/configs/P1024RDB_NAND_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig
index 529b9fd..9bbbae1 100644
--- a/configs/P1024RDB_SDCARD_defconfig
+++ b/configs/P1024RDB_SDCARD_defconfig
@@ -1,13 +1,20 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig
index ef7fb02..837b069 100644
--- a/configs/P1024RDB_SPIFLASH_defconfig
+++ b/configs/P1024RDB_SPIFLASH_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig
index 02d6d06..0cf5bd2 100644
--- a/configs/P1025RDB_NAND_defconfig
+++ b/configs/P1025RDB_NAND_defconfig
@@ -1,14 +1,23 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig
index b494a35..c9eda77 100644
--- a/configs/P1025RDB_SDCARD_defconfig
+++ b/configs/P1025RDB_SDCARD_defconfig
@@ -1,13 +1,20 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig
index 3bae2a8..a990a5e 100644
--- a/configs/P1025RDB_SPIFLASH_defconfig
+++ b/configs/P1025RDB_SPIFLASH_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 8b86e92..1661db2 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -1,15 +1,24 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index e1d1b12..220bafc 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -1,14 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index f4e3c6e..ebb89dd 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_PHYS_64BIT=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index ebf61aa..4af6039 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -1,14 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
-CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_TPL=y
+CONFIG_TPL_ENV_SUPPORT=y
+CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 88f211f..fc8378b 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -1,13 +1,20 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index cffbf4b..754ef24 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig
index cc572ff..295919a 100644
--- a/configs/P2041RDB_SECURE_BOOT_defconfig
+++ b/configs/P2041RDB_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
index c88b0e2..a359708 100644
--- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig
index 6fdbbb6..89108b5 100644
--- a/configs/P3041DS_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig
index 97d5da9..51b2bb5 100644
--- a/configs/P4080DS_SECURE_BOOT_defconfig
+++ b/configs/P4080DS_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
index 04da207..d89326c 100644
--- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig
index 313f95d..074d159 100644
--- a/configs/P5020DS_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
index 9d2f97f..abe6de2 100644
--- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig
index 68c1b3b..0b9b0d1 100644
--- a/configs/P5040DS_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/PATI_defconfig b/configs/PATI_defconfig
index 53fdfad..80f077a 100644
--- a/configs/PATI_defconfig
+++ b/configs/PATI_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING="\n(c) 2003 by MPL AG Switzerland, MEV-10084-001 released"
CONFIG_5xx=y
CONFIG_TARGET_PATI=y
CONFIG_BOOTDELAY=5
diff --git a/configs/PIP405_defconfig b/configs/PIP405_defconfig
index 8ed89a9..87f2f31 100644
--- a/configs/PIP405_defconfig
+++ b/configs/PIP405_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING="\n(c) 2002 by MPL AG Switzerland, MEV-10066-001 released"
CONFIG_4xx=y
CONFIG_TARGET_PIP405=y
CONFIG_BOOTDELAY=5
diff --git a/configs/PLU405_defconfig b/configs/PLU405_defconfig
index e84a88e..f694f77 100644
--- a/configs/PLU405_defconfig
+++ b/configs/PLU405_defconfig
@@ -14,6 +14,7 @@
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig
index ae1f1e8..9ac8912 100644
--- a/configs/Sinlinx_SinA31s_defconfig
+++ b/configs/Sinlinx_SinA31s_defconfig
@@ -10,8 +10,8 @@
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig
index 013c35e..b41bf67 100644
--- a/configs/Sinlinx_SinA33_defconfig
+++ b/configs/Sinlinx_SinA33_defconfig
@@ -3,9 +3,19 @@
CONFIG_MACH_SUN8I_A33=y
CONFIG_DRAM_CLK=552
CONFIG_DRAM_ZQ=15291
+CONFIG_MMC0_CD_PIN="PB4"
+CONFIG_USB0_ID_DET="PH8"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FPGA is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
+CONFIG_G_DNL_VENDOR_NUM=0x1f3a
+CONFIG_G_DNL_PRODUCT_NUM=0x1010
diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig
index 181e1e2..267aaf8 100644
--- a/configs/Sinovoip_BPI_M2_defconfig
+++ b/configs/Sinovoip_BPI_M2_defconfig
@@ -6,8 +6,8 @@
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig
index 77b0525..a9c7fc1 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -13,8 +13,8 @@
CONFIG_AXP_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-sinovoip-bpi-m3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPD(25)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig
index 8e6edda..b24d21b 100644
--- a/configs/T1023RDB_NAND_defconfig
+++ b/configs/T1023RDB_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig
index 9bf1a69..7f84498 100644
--- a/configs/T1023RDB_SDCARD_defconfig
+++ b/configs/T1023RDB_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig
index 25dd68c..fa538f3 100644
--- a/configs/T1023RDB_SECURE_BOOT_defconfig
+++ b/configs/T1023RDB_SECURE_BOOT_defconfig
@@ -30,4 +30,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig
index 42f2906..c75abbb 100644
--- a/configs/T1023RDB_SPIFLASH_defconfig
+++ b/configs/T1023RDB_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
index 2c6f6ad..828bb9b 100644
--- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
@@ -31,4 +31,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index 94ecedd..7173342 100644
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index 786e5fb..a1c93ae 100644
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index f502750..371d5f6 100644
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -31,4 +31,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index 4b1a22d..f134850 100644
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XQDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 2509db0..91beb24 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index e2e38af..11aceb8 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig
index cb33280..70961ec 100644
--- a/configs/T1024RDB_SECURE_BOOT_defconfig
+++ b/configs/T1024RDB_SECURE_BOOT_defconfig
@@ -30,4 +30,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index f9dd8a0..09fe6c4 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T102XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig
index 2cd364b..e9c7708 100644
--- a/configs/T1040D4RDB_NAND_defconfig
+++ b/configs/T1040D4RDB_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig
index 9e8e246..098ef3b 100644
--- a/configs/T1040D4RDB_SDCARD_defconfig
+++ b/configs/T1040D4RDB_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig
index 87ab7e2..d727450 100644
--- a/configs/T1040D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig
index 77ab8fb..002346a 100644
--- a/configs/T1040D4RDB_SPIFLASH_defconfig
+++ b/configs/T1040D4RDB_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index 1b4f654..ae6aacf 100644
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -31,4 +31,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig
index 26bbd62..9e5a409 100644
--- a/configs/T1040RDB_NAND_defconfig
+++ b/configs/T1040RDB_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig
index e66db8e..a43304b 100644
--- a/configs/T1040RDB_SDCARD_defconfig
+++ b/configs/T1040RDB_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig
index 43b0539..e0887de 100644
--- a/configs/T1040RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040RDB_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig
index f700359..1782e07 100644
--- a/configs/T1040RDB_SPIFLASH_defconfig
+++ b/configs/T1040RDB_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 0547eca..d2772fe 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index cbd2f0d..f8c5d45 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig
index 97a42db..fa3c412 100644
--- a/configs/T1042D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 319ebe2..fca6122 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
index 93d0b9b..aa02cec 100644
--- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
@@ -1,13 +1,23 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND,SECURE_BOOT"
CONFIG_BOOTDELAY=0
+CONFIG_SPL=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
@@ -20,6 +30,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
+CONFIG_SPL_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
@@ -29,4 +40,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index 1a90e8d..96985ac 100644
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index 9e0926f..fd5da57 100644
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index 3518087..bf41ff5 100644
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T104XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig
index c9d360c..1539c85 100644
--- a/configs/T1042RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index a0d709a..e42dd6b 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index 060144b..70a9965 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index f23fb9c..f6174e0 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -31,4 +31,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index de35db3..93b5ed6 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index ca1b699..5e17f3b 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MMC=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 78aaa29..76dcaf9 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MMC=y
diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig
index a4a9285..0818d9c 100644
--- a/configs/T2080RDB_SECURE_BOOT_defconfig
+++ b/configs/T2080RDB_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 5de5714..f33fd4e 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XRDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MMC=y
diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig
index 0b97fdb..410d375 100644
--- a/configs/T2081QDS_NAND_defconfig
+++ b/configs/T2081QDS_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig
index 9716886..a0f49d7 100644
--- a/configs/T2081QDS_SDCARD_defconfig
+++ b/configs/T2081QDS_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig
index 21a7a05..902566d 100644
--- a/configs/T2081QDS_SPIFLASH_defconfig
+++ b/configs/T2081QDS_SPIFLASH_defconfig
@@ -1,13 +1,22 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T208XQDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig
index e5cd04c..5c981aa 100644
--- a/configs/T4160QDS_NAND_defconfig
+++ b/configs/T4160QDS_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig
index ee5902c..8c5d4ad 100644
--- a/configs/T4160QDS_SDCARD_defconfig
+++ b/configs/T4160QDS_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig
index 1e32b64..70abd6e 100644
--- a/configs/T4160QDS_SECURE_BOOT_defconfig
+++ b/configs/T4160QDS_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig
index 4dea4fb..4cdbeb4 100644
--- a/configs/T4240QDS_NAND_defconfig
+++ b/configs/T4240QDS_NAND_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig
index 1aa1035..8f8837c 100644
--- a/configs/T4240QDS_SDCARD_defconfig
+++ b/configs/T4240QDS_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig
index 26a5717..85ca496 100644
--- a/configs/T4240QDS_SECURE_BOOT_defconfig
+++ b/configs/T4240QDS_SECURE_BOOT_defconfig
@@ -29,4 +29,5 @@
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index b1e4dec..2104a95 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -1,13 +1,21 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240RDB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig
index d36a5dc..205c9e2 100644
--- a/configs/UTOO_P66_defconfig
+++ b/configs/UTOO_P66_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_DRAM_EMR1=0
diff --git a/configs/VCMA9_defconfig b/configs/VCMA9_defconfig
index 123562c..da568a1 100644
--- a/configs/VCMA9_defconfig
+++ b/configs/VCMA9_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_VCMA9=y
+CONFIG_IDENT_STRING="\n(c) 2003 - 2011 by MPL AG Switzerland, MEV-10080-001 unstable"
CONFIG_BOOTDELAY=5
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="VCMA9 # "
@@ -10,5 +11,6 @@
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig
index 5f3d624..ecde5db 100644
--- a/configs/Wexler_TAB7200_defconfig
+++ b/configs/Wexler_TAB7200_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_USB0_VBUS_PIN="PB9"
diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig
index bfc8cba..d83cee7 100644
--- a/configs/Wits_Pro_A20_DKT_defconfig
+++ b/configs/Wits_Pro_A20_DKT_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_VIDEO_VGA=y
@@ -10,8 +11,8 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig
index 20382ae..907afe5 100644
--- a/configs/Wobo_i5_defconfig
+++ b/configs/Wobo_i5_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_MMC0_CD_PIN="PB3"
diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig
index 65c1d8e..1e42a68 100644
--- a/configs/Yones_Toptech_BD1078_defconfig
+++ b/configs/Yones_Toptech_BD1078_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=408
CONFIG_MMC0_CD_PIN="PH1"
diff --git a/configs/a3m071_defconfig b/configs/a3m071_defconfig
index c620183..9e573a7 100644
--- a/configs/a3m071_defconfig
+++ b/configs/a3m071_defconfig
@@ -1,10 +1,15 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_A3M071=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_LOOPW=y
# CONFIG_CMD_SETEXPR is not set
@@ -13,5 +18,6 @@
CONFIG_CMD_PING=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_UBI=y
CONFIG_LIB_RAND=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/a4m2k_defconfig b/configs/a4m2k_defconfig
index 61f7da7..aa09bf5 100644
--- a/configs/a4m2k_defconfig
+++ b/configs/a4m2k_defconfig
@@ -1,11 +1,16 @@
CONFIG_PPC=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC5xxx=y
CONFIG_TARGET_A3M071=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="A4M2K"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_LOOPW=y
# CONFIG_CMD_SETEXPR is not set
@@ -14,5 +19,6 @@
CONFIG_CMD_PING=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_UBI=y
CONFIG_LIB_RAND=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 9b0f7bc..16cdea1 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -1,13 +1,27 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_BALTOS=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -27,6 +41,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig
index b4e2a1c..a3994f7 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -1,11 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_EVM=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index 2c12402..69ee177 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -1,14 +1,16 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_EVM=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack"
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT,ENABLE_VBOOT"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 65a9002..86ebf0f 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -2,12 +2,14 @@
CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_SPL_LOAD_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig
index 74577fa..1a467c3 100644
--- a/configs/am335x_evm_nor_defconfig
+++ b/configs/am335x_evm_nor_defconfig
@@ -2,11 +2,13 @@
CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_NOR=y
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index af4fac3..00fa2aa 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -1,12 +1,16 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_EVM=y
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SPI_BOOT"
CONFIG_SPI_BOOT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index f8f7c7e..9e10d5f 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -1,11 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND,SPL_USBETH_SUPPORT"
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
+CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_USBETH_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep0033_defconfig
index efa3a9c..2088896 100644
--- a/configs/am335x_igep0033_defconfig
+++ b/configs/am335x_igep0033_defconfig
@@ -1,9 +1,23 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_IGEP0033=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
-CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index be9a99e..0c241e0 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -1,11 +1,23 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SERIES=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index 8d6c8d9..084cc28 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -1,12 +1,24 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SHC_ICT=y
CONFIG_SERIES=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index 2e70a51..8cc40c8 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -1,12 +1,25 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SHC_NETBOOT=y
CONFIG_SERIES=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig
index 764fc9f..caa004a 100644
--- a/configs/am335x_shc_prompt_defconfig
+++ b/configs/am335x_shc_prompt_defconfig
@@ -1,11 +1,23 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SERIES=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
CONFIG_AUTOBOOT_DELAY_STR="shc"
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index ba77c2d..83041d9 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -1,12 +1,24 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SHC_SDBOOT=y
CONFIG_SERIES=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig
index ba77c2d..83041d9 100644
--- a/configs/am335x_shc_sdboot_prompt_defconfig
+++ b/configs/am335x_shc_sdboot_prompt_defconfig
@@ -1,12 +1,24 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SHC_SDBOOT=y
CONFIG_SERIES=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index dae8f1b..92b5dc0 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -1,11 +1,24 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_SL50=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTOBOOT is not set
CONFIG_CMD_BOOTZ=y
diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig
index 339c487..08902b8 100644
--- a/configs/am3517_crane_defconfig
+++ b/configs/am3517_crane_defconfig
@@ -1,8 +1,10 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_GPIO_SUPPORT is not set
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_AM3517_CRANE=y
-CONFIG_SPL=y
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="AM3517_CRANE # "
# CONFIG_CMD_IMI is not set
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index d5a0e30..291f570 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -1,11 +1,14 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_GPIO_SUPPORT is not set
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_AM3517_EVM=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="AM3517_EVM # "
CONFIG_CMD_BOOTZ=y
@@ -27,6 +30,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index c465411..eb5b7fd 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -2,13 +2,15 @@
CONFIG_AM43XX=y
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
CONFIG_SPL_LOAD_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig
index 8676f32..bea1d0c 100644
--- a/configs/am43xx_evm_ethboot_defconfig
+++ b/configs/am43xx_evm_ethboot_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_AM43XX=y
CONFIG_TARGET_AM43XX_EVM=y
-CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND,SPL_ETH_SUPPORT"
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_ETH_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index d8a23c5..efe8be3 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -3,13 +3,17 @@
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_ISW_ENTRY_ADDR=0x40300350
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND,SPL_USB_HOST_SUPPORT"
+CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
CONFIG_SPL_LOAD_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 9494860..2a59a2b 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -2,17 +2,19 @@
CONFIG_AM43XX=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_TARGET_AM43XX_EVM=y
-CONFIG_ISW_ENTRY_ADDR=0x403018e0
+CONFIG_ISW_ENTRY_ADDR=0x40302ae0
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1, NAND"
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index d49129d..27ea472 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -1,14 +1,18 @@
CONFIG_ARM=y
CONFIG_OMAP54XX=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_AM57XX_EVM=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am57xx_evm_nodt_defconfig b/configs/am57xx_evm_nodt_defconfig
index 0066691..608cc10 100644
--- a/configs/am57xx_evm_nodt_defconfig
+++ b/configs/am57xx_evm_nodt_defconfig
@@ -1,8 +1,12 @@
CONFIG_ARM=y
CONFIG_OMAP54XX=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_AM57XX_EVM=y
-CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 86f7373..192997a 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -1,17 +1,21 @@
CONFIG_ARM=y
CONFIG_OMAP54XX=y
CONFIG_TI_SECURE_DEVICE=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_AM57XX_EVM=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig
index 0361418..5cc512c 100644
--- a/configs/amcore_defconfig
+++ b/configs/amcore_defconfig
@@ -3,6 +3,10 @@
CONFIG_SYS_TEXT_BASE=0xffc00000
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="amcore $ "
+CONFIG_DM=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_MALLOC_F=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_XIMG is not set
CONFIG_LOOPW=y
diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig
index 3f24da9..a02e180 100644
--- a/configs/apf27_defconfig
+++ b/configs/apf27_defconfig
@@ -1,8 +1,11 @@
CONFIG_ARM=y
CONFIG_TARGET_APF27=y
-CONFIG_SPL=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_IDENT_STRING=" apf27 patch 3.10"
CONFIG_BOOTDELAY=5
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="BIOS> "
# CONFIG_CMD_IMLS is not set
@@ -17,4 +20,5 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig
index 01d8190..5b9c0af 100644
--- a/configs/apx4devkit_defconfig
+++ b/configs/apx4devkit_defconfig
@@ -1,8 +1,12 @@
CONFIG_ARM=y
CONFIG_TARGET_APX4DEVKIT=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=1
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -16,6 +20,7 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig
index 84e3bf6..35d7e94 100644
--- a/configs/aristainetos2_defconfig
+++ b/configs/aristainetos2_defconfig
@@ -22,8 +22,11 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig
index 21765aa..6b2c44d 100644
--- a/configs/aristainetos2b_defconfig
+++ b/configs/aristainetos2b_defconfig
@@ -22,8 +22,11 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig
index 1e6954e..a06d9ee 100644
--- a/configs/aristainetos_defconfig
+++ b/configs/aristainetos_defconfig
@@ -22,8 +22,11 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig
index 22e2cb6..e04ff5b 100644
--- a/configs/arndale_defconfig
+++ b/configs/arndale_defconfig
@@ -2,10 +2,11 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS5=y
CONFIG_TARGET_ARNDALE=y
+CONFIG_IDENT_STRING=" for ARNDALE"
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ARNDALE # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/aspenite_defconfig b/configs/aspenite_defconfig
index 9ac6657..441e65f 100644
--- a/configs/aspenite_defconfig
+++ b/configs/aspenite_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_ASPENITE=y
+CONFIG_IDENT_STRING="\nMarvell-Aspenite DB"
CONFIG_BOOTDELAY=3
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig
index aaa27f1..0aaa888 100644
--- a/configs/at91sam9m10g45ek_mmc_defconfig
+++ b/configs/at91sam9m10g45ek_mmc_defconfig
@@ -1,9 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9M10G45EK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig
index 4924ac5..05140ac 100644
--- a/configs/at91sam9m10g45ek_nandflash_defconfig
+++ b/configs/at91sam9m10g45ek_nandflash_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9M10G45EK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index af86350..15e1970 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9N12EK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index 1ddfbf5..ebed1db 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -1,9 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9N12EK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_SPIFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index 6771f57..beeb8cc 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -17,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_USB=y
diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index 7995c23..eb88bbb 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -17,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_USB=y
diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index 7a72bcf..4b28d74 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9X5EK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
@@ -18,6 +23,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_USB=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index b869db0..4a1ea42 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -1,9 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9X5EK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_SPIFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
@@ -18,6 +24,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_USB=y
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index 220a49b..a5261d2 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_TAURUS=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig
index 1cfb380..c60766c 100644
--- a/configs/ba10_tv_box_defconfig
+++ b/configs/ba10_tv_box_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=384
CONFIG_DRAM_EMR1=4
@@ -8,8 +9,8 @@
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig
index ae54562..49ca7d9 100644
--- a/configs/bg0900_defconfig
+++ b/configs/bg0900_defconfig
@@ -1,8 +1,12 @@
CONFIG_ARM=y
CONFIG_TARGET_BG0900=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig
index c721ad5..0b23941 100644
--- a/configs/birdland_bav335a_defconfig
+++ b/configs/birdland_bav335a_defconfig
@@ -1,10 +1,23 @@
CONFIG_ARM=y
CONFIG_TARGET_BAV335X=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_BAV_VERSION=1
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig
index 4400bb1..8d590df 100644
--- a/configs/birdland_bav335b_defconfig
+++ b/configs/birdland_bav335b_defconfig
@@ -1,10 +1,23 @@
CONFIG_ARM=y
CONFIG_TARGET_BAV335X=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_BAV_VERSION=2
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
new file mode 100644
index 0000000..ca66248
--- /dev/null
+++ b/configs/boston32r2_defconfig
@@ -0,0 +1,41 @@
+CONFIG_MIPS=y
+CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_TEXT_BASE=0x9fc00000
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_FIT_BEST_MATCH=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="boston # "
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_EMBED=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_CFI_FLASH=y
+CONFIG_DM_ETH=y
+CONFIG_PCH_GBE=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_XILINX=y
+CONFIG_SYS_NS16550=y
+CONFIG_LZ4=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
new file mode 100644
index 0000000..67f54bf
--- /dev/null
+++ b/configs/boston32r2el_defconfig
@@ -0,0 +1,42 @@
+CONFIG_MIPS=y
+CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_TEXT_BASE=0x9fc00000
+CONFIG_SYS_LITTLE_ENDIAN=y
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_FIT_BEST_MATCH=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="boston # "
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_EMBED=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_CFI_FLASH=y
+CONFIG_DM_ETH=y
+CONFIG_PCH_GBE=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_XILINX=y
+CONFIG_SYS_NS16550=y
+CONFIG_LZ4=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
new file mode 100644
index 0000000..1245d1b
--- /dev/null
+++ b/configs/boston64r2_defconfig
@@ -0,0 +1,41 @@
+CONFIG_MIPS=y
+CONFIG_TARGET_BOSTON=y
+CONFIG_CPU_MIPS64_R2=y
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_FIT_BEST_MATCH=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="boston # "
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_EMBED=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_CFI_FLASH=y
+CONFIG_DM_ETH=y
+CONFIG_PCH_GBE=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_XILINX=y
+CONFIG_SYS_NS16550=y
+CONFIG_LZ4=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
new file mode 100644
index 0000000..9b5fa5a
--- /dev/null
+++ b/configs/boston64r2el_defconfig
@@ -0,0 +1,42 @@
+CONFIG_MIPS=y
+CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_CPU_MIPS64_R2=y
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_FIT_BEST_MATCH=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="boston # "
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_EMBED=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_CFI_FLASH=y
+CONFIG_DM_ETH=y
+CONFIG_PCH_GBE=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_XILINX=y
+CONFIG_SYS_NS16550=y
+CONFIG_LZ4=y
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
index 881930e..15365b9 100644
--- a/configs/brppt1_mmc_defconfig
+++ b/configs/brppt1_mmc_defconfig
@@ -1,10 +1,19 @@
CONFIG_ARM=y
CONFIG_TARGET_BRPPT1=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT"
CONFIG_BOOTDELAY=-2
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig
index 9c7c07e..05fc1e0 100644
--- a/configs/brppt1_nand_defconfig
+++ b/configs/brppt1_nand_defconfig
@@ -1,10 +1,19 @@
CONFIG_ARM=y
CONFIG_TARGET_BRPPT1=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
CONFIG_BOOTDELAY=-2
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
index fc1f1e6..4855acc 100644
--- a/configs/brppt1_spi_defconfig
+++ b/configs/brppt1_spi_defconfig
@@ -1,11 +1,22 @@
CONFIG_ARM=y
CONFIG_TARGET_BRPPT1=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT"
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=-2
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig
index 3895eec..8fe1100 100644
--- a/configs/brxre1_defconfig
+++ b/configs/brxre1_defconfig
@@ -1,9 +1,17 @@
CONFIG_ARM=y
CONFIG_TARGET_BRXRE1=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_BOOTDELAY=-2
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig
index 7d8fe11..e6c0b80 100644
--- a/configs/cairo_defconfig
+++ b/configs/cairo_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_CAIRO=y
-CONFIG_SPL=y
CONFIG_BOOTDELAY=-2
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Cairo # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig
index 20c0af0..645923c 100644
--- a/configs/cgtqmx6eval_defconfig
+++ b/configs/cgtqmx6eval_defconfig
@@ -1,9 +1,20 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_CGTQMX6EVAL=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6QDL"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index 8688abb..3729722 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_SPL_POWER_SUPPORT=y
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_CHROMEBOOK_JERRY=y
CONFIG_ROCKCHIP_FAST_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DM_KEYBOARD=y
CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry"
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 778cf06..588dfb2 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -1,9 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_CLEARFOG=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index f01a6dd..998bc05 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -1,10 +1,19 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_CM_FX6=y
-CONFIG_SPL=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CM-FX6 # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig
index 1528d1b..40fe861 100644
--- a/configs/cm_t335_defconfig
+++ b/configs/cm_t335_defconfig
@@ -1,7 +1,20 @@
CONFIG_ARM=y
CONFIG_TARGET_CM_T335=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CM-T335 # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
index 82738b2..79fa39c 100644
--- a/configs/cm_t35_defconfig
+++ b/configs/cm_t35_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_CM_T35=y
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CM-T3x # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index a2ffcb2..e8a95c8 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -1,7 +1,19 @@
CONFIG_ARM=y
CONFIG_TARGET_CM_T43=y
-CONFIG_SPL=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CM-T43 # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig
index 18bb04e..a22fa63 100644
--- a/configs/cm_t54_defconfig
+++ b/configs/cm_t54_defconfig
@@ -1,10 +1,12 @@
CONFIG_ARM=y
CONFIG_OMAP54XX=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_CM_T54=y
-CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_SATA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CM-T54 # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index 5302fe3..439bb19 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -29,6 +29,8 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_MTD_UBI_FASTMAP=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index fb5055b..4eb3916 100644
--- a/configs/colibri_t20_defconfig
+++ b/configs/colibri_t20_defconfig
@@ -29,7 +29,9 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
+CONFIG_MTD_UBI_FASTMAP=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index a045a3f..c7fc799 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -23,12 +23,14 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_VYBRID_GPIO=y
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y
+CONFIG_MTD_UBI_FASTMAP=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_SPI=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
index c0a2c77..88d189a 100644
--- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" controlcenterd 0.01"
CONFIG_MPC85xx=y
CONFIG_TARGET_CONTROLCENTERD=y
CONFIG_PHYS_64BIT=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig
index 73cd33d..c8679e2 100644
--- a/configs/controlcenterd_36BIT_SDCARD_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" controlcenterd 0.01"
CONFIG_MPC85xx=y
CONFIG_TARGET_CONTROLCENTERD=y
CONFIG_PHYS_64BIT=y
diff --git a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig
index efb8ad6..e94d72f 100644
--- a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig
+++ b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" controlcenterd trailblazer 0.01"
CONFIG_MPC85xx=y
CONFIG_TARGET_CONTROLCENTERD=y
CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH,DEVELOP"
diff --git a/configs/controlcenterd_TRAILBLAZER_defconfig b/configs/controlcenterd_TRAILBLAZER_defconfig
index 45e8b8f..257fa85 100644
--- a/configs/controlcenterd_TRAILBLAZER_defconfig
+++ b/configs/controlcenterd_TRAILBLAZER_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" controlcenterd trailblazer 0.01"
CONFIG_MPC85xx=y
CONFIG_TARGET_CONTROLCENTERD=y
CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH"
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 975ac4f..c486be0 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -1,10 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CORVUS=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus"
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index ae9175f..3b94de4 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NET2BIG_V2=y
+CONFIG_IDENT_STRING=" D2 v2"
CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig
index ce49340..9dc4831 100644
--- a/configs/da850_am18xxevm_defconfig
+++ b/configs/da850_am18xxevm_defconfig
@@ -1,10 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DA850EVM=y
-CONFIG_SPL=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50"
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index da6615f..256fd4f 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -1,10 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_DA850EVM=y
-CONFIG_SPL=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index b6df961..ce7976a 100644
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DB_88F6720=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
new file mode 100644
index 0000000..18fcf0e
--- /dev/null
+++ b/configs/db-88f6820-amc_defconfig
@@ -0,0 +1,45 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MVEBU=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_DB_88F6820_AMC=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="armada-385-amc"
+CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_NAND_PXA3XX=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xd0012000
+CONFIG_DEBUG_UART_CLOCK=200000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index 7ac7457..a883be0 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -1,9 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DB_88F6820_GP=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 510554e..b7d2ae2 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DB_MV784MP_GP=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
diff --git a/configs/devconcenter_defconfig b/configs/devconcenter_defconfig
index 8468d8d..cf41cd1 100644
--- a/configs/devconcenter_defconfig
+++ b/configs/devconcenter_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" devconcenter 0.06"
CONFIG_4xx=y
CONFIG_TARGET_INTIP=y
CONFIG_FIT=y
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index 5e4aefb..57f47f6 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -1,9 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_DEVKIT3250=y
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=1
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig
index 29a246c..e836e5e 100644
--- a/configs/devkit8000_defconfig
+++ b/configs/devkit8000_defconfig
@@ -1,8 +1,8 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_DEVKIT8000=y
-CONFIG_SPL=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig
index c76af0e..6149c94 100644
--- a/configs/difrnce_dit4350_defconfig
+++ b/configs/difrnce_dit4350_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=408
CONFIG_MMC0_CD_PIN="PG0"
@@ -14,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-difrnce-dit4350"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/dlvision-10g_defconfig b/configs/dlvision-10g_defconfig
index 4253b55..621ac44 100644
--- a/configs/dlvision-10g_defconfig
+++ b/configs/dlvision-10g_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" dlvision-10g 0.06"
CONFIG_4xx=y
CONFIG_TARGET_DLVISION_10G=y
CONFIG_FIT=y
diff --git a/configs/dlvision_defconfig b/configs/dlvision_defconfig
index 8fd5add..586b802 100644
--- a/configs/dlvision_defconfig
+++ b/configs/dlvision_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" dlvision 0.02"
CONFIG_4xx=y
CONFIG_TARGET_DLVISION=y
CONFIG_FIT=y
diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig
index a579af4..db5adcf 100644
--- a/configs/dms-ba16-1g_defconfig
+++ b/configs/dms-ba16-1g_defconfig
@@ -2,8 +2,8 @@
CONFIG_ARCH_MX6=y
CONFIG_TARGET_ADVANTECH_DMS_BA16=y
CONFIG_SYS_DDR_1G=y
-CONFIG_HUSH_PARSER=y
CONFIG_BOOTDELAY=1
+CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -24,7 +24,6 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_OF_LIBFDT=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_CI_UDC=y
@@ -32,3 +31,4 @@
CONFIG_G_DNL_MANUFACTURER="Advantech"
CONFIG_G_DNL_VENDOR_NUM=0x0525
CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_OF_LIBFDT=y
diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig
index 365d05c..e36f3dc 100644
--- a/configs/dms-ba16_defconfig
+++ b/configs/dms-ba16_defconfig
@@ -1,8 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_ADVANTECH_DMS_BA16=y
-CONFIG_HUSH_PARSER=y
CONFIG_BOOTDELAY=1
+CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -23,7 +23,6 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_OF_LIBFDT=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_CI_UDC=y
@@ -31,3 +30,4 @@
CONFIG_G_DNL_MANUFACTURER="Advantech"
CONFIG_G_DNL_VENDOR_NUM=0x0525
CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_OF_LIBFDT=y
diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index 905f6ff..a26629d 100644
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_DNS325=y
+CONFIG_IDENT_STRING="\nD-Link DNS-325"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
@@ -12,6 +13,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig
index 73740dd..645f652 100644
--- a/configs/dockstar_defconfig
+++ b/configs/dockstar_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_DOCKSTAR=y
+CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar"
CONFIG_BOOTDELAY=3
CONFIG_SYS_PROMPT="DockStar> "
# CONFIG_CMD_IMLS is not set
@@ -12,6 +13,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 64184de..64df490 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -1,14 +1,18 @@
CONFIG_ARM=y
CONFIG_OMAP54XX=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_DRA7XX_EVM=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 3dad0fa..5fdc2b7 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -2,17 +2,21 @@
CONFIG_OMAP54XX=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TI_SECURE_DEVICE=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_DRA7XX_EVM=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index 37f4664..6c432f3 100644
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -1,9 +1,22 @@
CONFIG_ARM=y
CONFIG_TARGET_DRACO=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
@@ -25,10 +38,13 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
index 656cc81..3ff055f 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SNAPDRAGON=y
+CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C"
CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="dragonboard410c => "
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 830b68b..3ff3ba4 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_DREAMPLUG=y
+CONFIG_IDENT_STRING="\nMarvell-DreamPlug"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index f95a9df..1d16833 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -1,9 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DS414=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
@@ -18,6 +25,7 @@
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig
index f8155b2..ebcfe58 100644
--- a/configs/dserve_dsrv9703c_defconfig
+++ b/configs/dserve_dsrv9703c_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_USB0_VBUS_PIN="PB9"
diff --git a/configs/duovero_defconfig b/configs/duovero_defconfig
index be65d6e..64f9cbc 100644
--- a/configs/duovero_defconfig
+++ b/configs/duovero_defconfig
@@ -1,8 +1,10 @@
CONFIG_ARM=y
CONFIG_OMAP44XX=y
+# CONFIG_SPL_I2C_SUPPORT is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_DUOVERO=y
-CONFIG_SPL=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="duovero # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig
index 5e31c1b..0e28878 100644
--- a/configs/ea20_defconfig
+++ b/configs/ea20_defconfig
@@ -16,6 +16,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig
index 85f857c..77f3cd5 100644
--- a/configs/eco5pk_defconfig
+++ b/configs/eco5pk_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_ECO5PK=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ECO5-PK # "
# CONFIG_CMD_IMLS is not set
@@ -18,6 +19,7 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig
index c9c7bc1..ef221b2 100644
--- a/configs/edminiv2_defconfig
+++ b/configs/edminiv2_defconfig
@@ -1,8 +1,13 @@
CONFIG_ARM=y
CONFIG_ORION5X=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TARGET_EDMINIV2=y
-CONFIG_SPL=y
+CONFIG_IDENT_STRING=" EDMiniV2"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="EDMiniV2> "
CONFIG_CMD_I2C=y
diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig
index c50da0c..e7163d3 100644
--- a/configs/espresso7420_defconfig
+++ b/configs/espresso7420_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS7=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_IDENT_STRING=" for ESPRESSO7420"
CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420"
CONFIG_SYS_PROMPT="ESPRESSO7420 # "
# CONFIG_AUTOBOOT is not set
diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig
index 7c2b6f8..6fc76bd 100644
--- a/configs/etamin_defconfig
+++ b/configs/etamin_defconfig
@@ -1,9 +1,22 @@
CONFIG_ARM=y
CONFIG_TARGET_ETAMIN=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
@@ -25,10 +38,13 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 58f0f7c..a89aa52 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -24,6 +24,7 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_USB=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index fbc23ef..25e8939 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -14,12 +14,15 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_USB=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_ROCKCHIP_DWMMC=y
CONFIG_ROCKCHIP_SDHCI=y
+CONFIG_ROCKCHIP_GPIO=y
CONFIG_PINCTRL=y
+CONFIG_ROCKCHIP_RK3399_PINCTRL=y
CONFIG_RAM=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
@@ -29,3 +32,11 @@
CONFIG_SYSRESET=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig
index 34e74af..02a8a78 100644
--- a/configs/ga10h_v1_1_defconfig
+++ b/configs/ga10h_v1_1_defconfig
@@ -16,8 +16,8 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index c463f60..22e8452 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_GOFLEXHOME=y
+CONFIG_IDENT_STRING="\nSeagate GoFlex Home"
CONFIG_BOOTDELAY=3
CONFIG_SYS_PROMPT="GoFlexHome> "
# CONFIG_CMD_IMLS is not set
@@ -13,6 +14,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig
index 6e14154..1a8ce9a 100644
--- a/configs/gplugd_defconfig
+++ b/configs/gplugd_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_GPLUGD=y
+CONFIG_IDENT_STRING="\nMarvell-gplugD"
CONFIG_BOOTDELAY=3
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
diff --git a/configs/gr_cpci_ax2000_defconfig b/configs/gr_cpci_ax2000_defconfig
index b30590e..faf493b 100644
--- a/configs/gr_cpci_ax2000_defconfig
+++ b/configs/gr_cpci_ax2000_defconfig
@@ -1,4 +1,5 @@
CONFIG_SPARC=y
+CONFIG_IDENT_STRING=" Gaisler LEON3 GR-CPCI-AX2000"
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_TARGET_GR_CPCI_AX2000=y
CONFIG_BOOTDELAY=5
diff --git a/configs/gr_ep2s60_defconfig b/configs/gr_ep2s60_defconfig
index 302d936..5b045e3 100644
--- a/configs/gr_ep2s60_defconfig
+++ b/configs/gr_ep2s60_defconfig
@@ -1,4 +1,5 @@
CONFIG_SPARC=y
+CONFIG_IDENT_STRING=" Gaisler LEON3 EP2S60"
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_TARGET_GR_EP2S60=y
CONFIG_BOOTDELAY=5
diff --git a/configs/gr_xc3s_1500_defconfig b/configs/gr_xc3s_1500_defconfig
index d6ed305..2319307 100644
--- a/configs/gr_xc3s_1500_defconfig
+++ b/configs/gr_xc3s_1500_defconfig
@@ -1,4 +1,5 @@
CONFIG_SPARC=y
+CONFIG_IDENT_STRING=" Gaisler LEON3 GR-XC3S-1500"
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_TARGET_GR_XC3S_1500=y
CONFIG_BOOTDELAY=5
diff --git a/configs/grsim_defconfig b/configs/grsim_defconfig
index f827113..7e83dc9 100644
--- a/configs/grsim_defconfig
+++ b/configs/grsim_defconfig
@@ -1,4 +1,5 @@
CONFIG_SPARC=y
+CONFIG_IDENT_STRING=" Gaisler GRSIM"
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_TARGET_GRSIM=y
CONFIG_BOOTDELAY=5
diff --git a/configs/grsim_leon2_defconfig b/configs/grsim_leon2_defconfig
index f5e7c43..97efdfc 100644
--- a/configs/grsim_leon2_defconfig
+++ b/configs/grsim_leon2_defconfig
@@ -1,4 +1,5 @@
CONFIG_SPARC=y
+CONFIG_IDENT_STRING=" Gaisler GRSIM LEON2"
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_TARGET_GRSIM_LEON2=y
CONFIG_BOOTDELAY=5
diff --git a/configs/gt90h_v4_defconfig b/configs/gt90h_v4_defconfig
index a14de0d..913a763 100644
--- a/configs/gt90h_v4_defconfig
+++ b/configs/gt90h_v4_defconfig
@@ -15,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-gt90h-v4"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
index a6e4344..becc587 100644
--- a/configs/guruplug_defconfig
+++ b/configs/guruplug_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_GURUPLUG=y
+CONFIG_IDENT_STRING="\nMarvell-GuruPlug"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -15,6 +16,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/gwventana_defconfig b/configs/gwventana_defconfig
index 71f2d50..0f726ae 100644
--- a/configs/gwventana_defconfig
+++ b/configs/gwventana_defconfig
@@ -1,14 +1,24 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_GW_VENTANA=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_CMD_BOOTZ=y
@@ -29,6 +39,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig
index e20f8bc..3901dfe 100644
--- a/configs/hikey_defconfig
+++ b/configs/hikey_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_IDENT_STRING="hikey"
CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig
index f67eda7..b6b583d 100644
--- a/configs/hrcon_defconfig
+++ b/configs/hrcon_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" hrcon 0.01"
CONFIG_MPC83xx=y
CONFIG_TARGET_HRCON=y
CONFIG_FIT=y
diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig
index 5eff4ac..82ebc5f 100644
--- a/configs/hrcon_dh_defconfig
+++ b/configs/hrcon_dh_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" hrcon dh 0.01"
CONFIG_MPC83xx=y
CONFIG_TARGET_HRCON=y
CONFIG_FIT=y
diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig
index 54fa819..8012c07 100644
--- a/configs/i12-tvbox_defconfig
+++ b/configs/i12-tvbox_defconfig
@@ -1,12 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,MACPWR=SUNXI_GPH(21)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig
index 7ec54a7..052454d 100644
--- a/configs/iNet_3F_defconfig
+++ b/configs/iNet_3F_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=432
CONFIG_DRAM_EMR1=4
diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig
index 5e68769..03d7ec9 100644
--- a/configs/iNet_3W_defconfig
+++ b/configs/iNet_3W_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_ZQ=127
diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig
index 3dea793..1901125 100644
--- a/configs/iNet_86VS_defconfig
+++ b/configs/iNet_86VS_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=408
CONFIG_USB0_VBUS_PIN="PG12"
diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig
index 554f5d5..d5e6309 100644
--- a/configs/iNet_D978_rev2_defconfig
+++ b/configs/iNet_D978_rev2_defconfig
@@ -16,8 +16,8 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig
index 89a971c..bfeb06e 100644
--- a/configs/ib62x0_defconfig
+++ b/configs/ib62x0_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_IB62X0=y
+CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ib62x0 => "
@@ -15,6 +16,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig
index 548a07e..78cc3bb 100644
--- a/configs/icnova-a20-swac_defconfig
+++ b/configs/icnova-a20-swac_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_OLD_SUNXI_KERNEL_COMPAT=y
@@ -12,8 +13,8 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,CMD_BMP,CMD_UNZIP"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig
index 8ccf515..b59ff09 100644
--- a/configs/iconnect_defconfig
+++ b/configs/iconnect_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_ICONNECT=y
+CONFIG_IDENT_STRING=" Iomega iConnect"
CONFIG_BOOTDELAY=3
CONFIG_SYS_PROMPT="iconnect => "
# CONFIG_CMD_IMLS is not set
@@ -11,6 +12,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index 02ca830..c083f8a 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -19,5 +19,6 @@
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/igep0020_defconfig b/configs/igep0020_defconfig
index 992d48f..0ec4ebc 100644
--- a/configs/igep0020_defconfig
+++ b/configs/igep0020_defconfig
@@ -1,10 +1,13 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_OMAP3_IGEP00X0=y
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0020"
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -24,6 +27,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/igep0030_defconfig b/configs/igep0030_defconfig
index 84dd4ad..bc0ec6a 100644
--- a/configs/igep0030_defconfig
+++ b/configs/igep0030_defconfig
@@ -1,9 +1,12 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_OMAP3_IGEP00X0=y
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_ONENAND"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -23,5 +26,6 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/igep0030_nand_defconfig b/configs/igep0030_nand_defconfig
index 37417c1..0750881 100644
--- a/configs/igep0030_nand_defconfig
+++ b/configs/igep0030_nand_defconfig
@@ -1,9 +1,12 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_OMAP3_IGEP00X0=y
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_NAND"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -23,5 +26,6 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig
index 9529631..280afbd 100644
--- a/configs/igep0032_defconfig
+++ b/configs/igep0032_defconfig
@@ -1,9 +1,12 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_OMAP3_IGEP00X0=y
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0032,BOOT_ONENAND"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -23,6 +26,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig
new file mode 100644
index 0000000..63f03cd
--- /dev/null
+++ b/configs/imgtec_xilfpga_defconfig
@@ -0,0 +1,25 @@
+CONFIG_MIPS=y
+CONFIG_SYS_MALLOC_F_LEN=0x600
+CONFIG_TARGET_XILFPGA=y
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="nexys4ddr"
+CONFIG_BOOTDELAY=5
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="MIPSfpga # "
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SAVEENV is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TIME=y
+CONFIG_OF_EMBED=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETCONSOLE=y
+CONFIG_CLK=y
+CONFIG_XILINX_EMACLITE=y
+CONFIG_SYS_NS16550=y
+CONFIG_CMD_DHRYSTONE=y
diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig
index a8b32cb..4fcd2d4 100644
--- a/configs/inet1_defconfig
+++ b/configs/inet1_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=432
CONFIG_DRAM_EMR1=4
diff --git a/configs/inet86dz_defconfig b/configs/inet86dz_defconfig
index 55768ba..4ed94dc 100644
--- a/configs/inet86dz_defconfig
+++ b/configs/inet86dz_defconfig
@@ -15,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-inet86dz"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig
index 0b03e16..bef3cd8 100644
--- a/configs/inet97fv2_defconfig
+++ b/configs/inet97fv2_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_EMR1=4
diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig
index 27b5019..7c306f8 100644
--- a/configs/inet98v_rev2_defconfig
+++ b/configs/inet98v_rev2_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_MMC0_CD_PIN="PG0"
@@ -14,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-98v-rev2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig
index 153450f..cc051bd 100644
--- a/configs/inet9f_rev03_defconfig
+++ b/configs/inet9f_rev03_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_EMR1=4
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index 6de6dde..3a5bf5e 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NETSPACE_V2=y
+CONFIG_IDENT_STRING=" IS v2"
CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/intip_defconfig b/configs/intip_defconfig
index 7e7a6c0..9e1b44a 100644
--- a/configs/intip_defconfig
+++ b/configs/intip_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" intip 0.06"
CONFIG_4xx=y
CONFIG_TARGET_INTIP=y
CONFIG_FIT=y
diff --git a/configs/io64_defconfig b/configs/io64_defconfig
index 2093210..6215c77 100644
--- a/configs/io64_defconfig
+++ b/configs/io64_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" io64 0.02"
CONFIG_4xx=y
CONFIG_TARGET_IO64=y
CONFIG_FIT=y
diff --git a/configs/io_defconfig b/configs/io_defconfig
index 6cca9bf..139556e5 100644
--- a/configs/io_defconfig
+++ b/configs/io_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" io 0.06"
CONFIG_4xx=y
CONFIG_TARGET_IO=y
CONFIG_FIT=y
diff --git a/configs/iocon_defconfig b/configs/iocon_defconfig
index 54b8c18..2cc836d 100644
--- a/configs/iocon_defconfig
+++ b/configs/iocon_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" iocon 0.06"
CONFIG_4xx=y
CONFIG_TARGET_IOCON=y
CONFIG_FIT=y
diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig
index 64fa54c..d0fdcac 100644
--- a/configs/ipam390_defconfig
+++ b/configs/ipam390_defconfig
@@ -1,8 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_IPAM390=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
# CONFIG_CMD_IMLS is not set
@@ -12,4 +17,5 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig
index 9cb8b1d..6e4e6ca 100644
--- a/configs/jesurun_q5_defconfig
+++ b/configs/jesurun_q5_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=312
CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,MACPWR=SUNXI_GPH(19)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index f41fa43..1c040aa 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2E_EVM=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="k2e-evm"
-CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="K2E EVM # "
CONFIG_CMD_BOOTZ=y
@@ -25,6 +32,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 9890ec6..13b91cd 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2G_EVM=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="k2g-evm"
-CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -25,6 +32,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_DM_MMC=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index b492db7..4ba0778 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2HK_EVM=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="k2hk-evm"
-CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="K2HK EVM # "
CONFIG_CMD_BOOTZ=y
@@ -25,6 +32,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 9ce8fd5..e91d1d0 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2L_EVM=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="k2l-evm"
-CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="K2L EVM # "
CONFIG_CMD_BOOTZ=y
@@ -25,6 +32,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
diff --git a/configs/kc1_defconfig b/configs/kc1_defconfig
index add96a8..4827934 100644
--- a/configs/kc1_defconfig
+++ b/configs/kc1_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_OMAP44XX=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_KC1=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig
index 67356b1..b3045c7 100644
--- a/configs/km_kirkwood_128m16_defconfig
+++ b/configs/km_kirkwood_128m16_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
+CONFIG_IDENT_STRING="\nKeymile Kirkwood 128M16"
CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
@@ -16,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig
index 7482b93..f261bd4 100644
--- a/configs/km_kirkwood_defconfig
+++ b/configs/km_kirkwood_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
+CONFIG_IDENT_STRING="\nKeymile Kirkwood"
CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
@@ -16,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig
index 9b7a5fb..c2a6a43 100644
--- a/configs/km_kirkwood_pci_defconfig
+++ b/configs/km_kirkwood_pci_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
+CONFIG_IDENT_STRING="\nKeymile Kirkwood PCI"
CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
@@ -16,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig
index 3125387..02a352a 100644
--- a/configs/kmcoge4_defconfig
+++ b/configs/kmcoge4_defconfig
@@ -20,6 +20,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig
index e03d71b..09b29b5 100644
--- a/configs/kmcoge5ne_defconfig
+++ b/configs/kmcoge5ne_defconfig
@@ -15,5 +15,6 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig
index 221dcb5..b0e5ab1 100644
--- a/configs/kmcoge5un_defconfig
+++ b/configs/kmcoge5un_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
+CONFIG_IDENT_STRING="\nKeymile COGE5UN"
CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
@@ -16,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig
index 52f8be1..61f887a 100644
--- a/configs/kmeter1_defconfig
+++ b/configs/kmeter1_defconfig
@@ -15,5 +15,6 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/kmlion1_defconfig b/configs/kmlion1_defconfig
index bb38814..39a85e1 100644
--- a/configs/kmlion1_defconfig
+++ b/configs/kmlion1_defconfig
@@ -20,6 +20,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig
index 01f4fce..d0dc6fd 100644
--- a/configs/kmnusa_defconfig
+++ b/configs/kmnusa_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
+CONFIG_IDENT_STRING="\nKeymile NUSA"
CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
@@ -16,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig
index daf5a96..e8a5b34 100644
--- a/configs/kmopti2_defconfig
+++ b/configs/kmopti2_defconfig
@@ -15,5 +15,6 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig
index 8e0f6da..e7ccc0a 100644
--- a/configs/kmsugp1_defconfig
+++ b/configs/kmsugp1_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
+CONFIG_IDENT_STRING="\nKeymile SUGP1"
CONFIG_SYS_EXTRA_OPTIONS="KM_SUGP1"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
@@ -16,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig
index 67e11f6..7894352 100644
--- a/configs/kmsupx5_defconfig
+++ b/configs/kmsupx5_defconfig
@@ -15,5 +15,6 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig
index eb4d583..9a06d58 100644
--- a/configs/kmsuv31_defconfig
+++ b/configs/kmsuv31_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
+CONFIG_IDENT_STRING="\nKeymile SUV31"
CONFIG_SYS_EXTRA_OPTIONS="KM_SUV31"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
@@ -16,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig
index f0b1cca..9bc00ad 100644
--- a/configs/kmtegr1_defconfig
+++ b/configs/kmtegr1_defconfig
@@ -15,5 +15,6 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig
index 936dd91..5248863 100644
--- a/configs/kmtepr2_defconfig
+++ b/configs/kmtepr2_defconfig
@@ -15,5 +15,6 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig
index 3e310ba..2e3413c 100644
--- a/configs/kmvect1_defconfig
+++ b/configs/kmvect1_defconfig
@@ -15,5 +15,6 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 084885e..628f2d5 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -1,6 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SPL=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -8,6 +15,8 @@
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index 07959f5..b511eb0 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -30,4 +30,5 @@
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index dc5b09a..f856ad7 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -1,12 +1,21 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index dbad7ee..09df451 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -1,12 +1,21 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021AQDS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index 1a5e0ef..34cbb4d 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -30,4 +30,5 @@
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index a7a4713..fefd174 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -1,12 +1,23 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021ATWR=y
-CONFIG_SPL=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SECURE_BOOT"
CONFIG_BOOTDELAY=0
+CONFIG_SPL=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
@@ -21,6 +32,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
+CONFIG_SPL_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
@@ -29,4 +41,5 @@
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index 439121d..68848d8 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -1,6 +1,12 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021ATWR=y
-CONFIG_SPL=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -8,6 +14,8 @@
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 70eb312..9faba8d 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -1,7 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1021ATWR=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -9,6 +15,8 @@
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index db85aed..593f244 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -1,13 +1,22 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index 6bd36ae..e360906 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -1,13 +1,22 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index 71e40ad..b6ece37 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -1,13 +1,22 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 818657b..f51e020 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -27,3 +27,4 @@
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index 330666d..a203030 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -1,13 +1,22 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT,SYS_FSL_DDR4"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index daa802f..323bb77 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -1,13 +1,22 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SYS_FSL_DDR4"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/ls2080a_emu_defconfig b/configs/ls2080a_emu_defconfig
index 21a0283..dfc1415 100644
--- a/configs/ls2080a_emu_defconfig
+++ b/configs/ls2080a_emu_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080A_EMU=y
+CONFIG_IDENT_STRING=" LS2080A-EMU"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/ls2080a_simu_defconfig b/configs/ls2080a_simu_defconfig
index 1b670b0..a677cb9 100644
--- a/configs/ls2080a_simu_defconfig
+++ b/configs/ls2080a_simu_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080A_SIMU=y
+CONFIG_IDENT_STRING=" LS2080A-SIMU"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 7d2fe10..6a434c0 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -35,4 +35,5 @@
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index 6282f58..8eb4121 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -1,13 +1,21 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080AQDS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 163554b..932a4bd 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -35,4 +35,5 @@
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
+CONFIG_SPL_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index a362f0d..551f158 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -1,12 +1,20 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080ARDB=y
-CONFIG_SPL=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A"
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MMC=y
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index b9aa961..5393084 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_LSXL=y
+CONFIG_IDENT_STRING=" LS-CHLv2"
CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index 794ec18..48bacaa 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_LSXL=y
+CONFIG_IDENT_STRING=" LS-XHL"
CONFIG_SYS_EXTRA_OPTIONS="LSXHL"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/lwmon5_defconfig b/configs/lwmon5_defconfig
index 807b936..b6a0bef 100644
--- a/configs/lwmon5_defconfig
+++ b/configs/lwmon5_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" - v2.0"
CONFIG_4xx=y
CONFIG_TARGET_LWMON5=y
CONFIG_FIT=y
diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig
index bace4f6..2bfed59 100644
--- a/configs/m28evk_defconfig
+++ b/configs/m28evk_defconfig
@@ -1,9 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_M28EVK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
@@ -23,6 +27,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_USB=y
diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig
index 042f522..03a4bfd 100644
--- a/configs/m53evk_defconfig
+++ b/configs/m53evk_defconfig
@@ -1,10 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_M53EVK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/denx/m53evk/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
@@ -20,6 +25,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/ma5d4evk_defconfig b/configs/ma5d4evk_defconfig
index e3431ae..638764d 100644
--- a/configs/ma5d4evk_defconfig
+++ b/configs/ma5d4evk_defconfig
@@ -1,11 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_MA5D4EVK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4"
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index 22186c3..d689c63 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -1,9 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MAXBCM=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig
index feea816..28837f9 100644
--- a/configs/mcx_defconfig
+++ b/configs/mcx_defconfig
@@ -1,9 +1,11 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_GPIO_SUPPORT is not set
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_MCX=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="mcx # "
# CONFIG_CMD_IMI is not set
@@ -21,6 +23,7 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_ULPI_VIEWPORT_OMAP=y
diff --git a/configs/mgcoge3ne_defconfig b/configs/mgcoge3ne_defconfig
index 3c3449c..5ed7c1b 100644
--- a/configs/mgcoge3ne_defconfig
+++ b/configs/mgcoge3ne_defconfig
@@ -15,4 +15,5 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig
index 6f62fc0..8b9231c 100644
--- a/configs/mgcoge3un_defconfig
+++ b/configs/mgcoge3un_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
+CONFIG_IDENT_STRING="\nKeymile COGE3UN"
CONFIG_SYS_EXTRA_OPTIONS="KM_MGCOGE3UN"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
@@ -16,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/mgcoge_defconfig b/configs/mgcoge_defconfig
index 54c277f..c42ceb3 100644
--- a/configs/mgcoge_defconfig
+++ b/configs/mgcoge_defconfig
@@ -15,4 +15,5 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index c184923..cf6c4b1 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -1,4 +1,7 @@
CONFIG_MICROBLAZE=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TARGET_MICROBLAZE_GENERIC=y
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
@@ -6,11 +9,12 @@
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_SYS_TEXT_BASE=0x29000000
CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=-1
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot-mONStR> "
CONFIG_CMD_ASKENV=y
@@ -20,6 +24,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NETCONSOLE=y
diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig
index ce81309..8ca8467 100644
--- a/configs/mixtile_loftq_defconfig
+++ b/configs/mixtile_loftq_defconfig
@@ -7,8 +7,8 @@
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPA(21)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig
index 720aefa..bfd591a 100644
--- a/configs/mk802_a10s_defconfig
+++ b/configs/mk802_a10s_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=432
CONFIG_DRAM_EMR1=0
diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig
index d38bc7f..47bbf62 100644
--- a/configs/mk802_defconfig
+++ b/configs/mk802_defconfig
@@ -4,8 +4,8 @@
CONFIG_USB2_VBUS_PIN="PH12"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig
index de1b73f..f9516d1 100644
--- a/configs/mk802ii_defconfig
+++ b/configs/mk802ii_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig
index 648e759..0fdec87 100644
--- a/configs/mt_ventoux_defconfig
+++ b/configs/mt_ventoux_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_MT_VENTOUX=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="mt_ventoux => "
# CONFIG_CMD_IMLS is not set
@@ -19,6 +20,7 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_ULPI_VIEWPORT_OMAP=y
diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig
index 322d941..4c1a505 100644
--- a/configs/mx23_olinuxino_defconfig
+++ b/configs/mx23_olinuxino_defconfig
@@ -1,8 +1,12 @@
CONFIG_ARM=y
CONFIG_TARGET_MX23_OLINUXINO=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig
index 4d3a4eb..8db7064 100644
--- a/configs/mx23evk_defconfig
+++ b/configs/mx23evk_defconfig
@@ -1,8 +1,12 @@
CONFIG_ARM=y
CONFIG_TARGET_MX23EVK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=1
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig
index d026486..f833edc 100644
--- a/configs/mx28evk_auart_console_defconfig
+++ b/configs/mx28evk_auart_console_defconfig
@@ -1,9 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_MX28EVK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_MMC"
CONFIG_BOOTDELAY=1
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -21,6 +25,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_USB=y
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index c6a9be0..1ab2747 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -1,10 +1,14 @@
CONFIG_ARM=y
CONFIG_TARGET_MX28EVK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC"
CONFIG_BOOTDELAY=1
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -22,6 +26,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_USB=y
diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig
index 26c9762..af35c49 100644
--- a/configs/mx28evk_nand_defconfig
+++ b/configs/mx28evk_nand_defconfig
@@ -1,9 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_MX28EVK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_NAND"
CONFIG_BOOTDELAY=1
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -21,6 +25,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_USB=y
diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig
index 73e5fc0..02a50bf 100644
--- a/configs/mx28evk_spi_defconfig
+++ b/configs/mx28evk_spi_defconfig
@@ -1,9 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_MX28EVK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_SPI_FLASH"
CONFIG_BOOTDELAY=1
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -21,6 +25,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_USB=y
diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig
index 901f992..a31ad5b 100644
--- a/configs/mx31pdk_defconfig
+++ b/configs/mx31pdk_defconfig
@@ -1,7 +1,10 @@
CONFIG_ARM=y
CONFIG_TARGET_MX31PDK=y
-CONFIG_SPL=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=1
+CONFIG_SPL=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPI=y
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index e380570..27c3d3b 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -1,8 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6CUBOXI=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig
index 36d33bb..e9edba6 100644
--- a/configs/mx6sabresd_spl_defconfig
+++ b/configs/mx6sabresd_spl_defconfig
@@ -1,9 +1,18 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6SABRESD=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig
index bb57869..4dd2484 100644
--- a/configs/mx6slevk_spl_defconfig
+++ b/configs/mx6slevk_spl_defconfig
@@ -1,9 +1,18 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6SLEVK=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6SL"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index 41d46f6..e80bb4e 100644
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -23,6 +23,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_FSL_QSPI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig
index b984081..d013cb0 100644
--- a/configs/mx6sxsabresd_spl_defconfig
+++ b/configs/mx6sxsabresd_spl_defconfig
@@ -1,9 +1,18 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6SXSABRESD=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig
index 49dee49..a829a18 100644
--- a/configs/mx6ul_14x14_evk_defconfig
+++ b/configs/mx6ul_14x14_evk_defconfig
@@ -1,9 +1,18 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6UL_14X14_EVK=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -23,4 +32,8 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
+CONFIG_FSL_QSPI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
index f120119..eaf3cfd 100644
--- a/configs/mx6ul_9x9_evk_defconfig
+++ b/configs/mx6ul_9x9_evk_defconfig
@@ -1,9 +1,18 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6UL_9X9_EVK=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -23,4 +32,8 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
+CONFIG_FSL_QSPI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig
new file mode 100644
index 0000000..5adf1ff
--- /dev/null
+++ b/configs/nanopi_neo_defconfig
@@ -0,0 +1,14 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=408
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index 91e33d0..c4e7307 100644
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NAS220=y
+CONFIG_IDENT_STRING="\nNAS 220"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="nas220> "
@@ -14,6 +15,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/neo_defconfig b/configs/neo_defconfig
index 93a402f..18b43e4 100644
--- a/configs/neo_defconfig
+++ b/configs/neo_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" neo 0.02"
CONFIG_4xx=y
CONFIG_TARGET_NEO=y
CONFIG_FIT=y
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index f30c56b..122ed7a 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NET2BIG_V2=y
+CONFIG_IDENT_STRING=" 2Big v2"
CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index 47aad38..0547aa6 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NETSPACE_V2=y
+CONFIG_IDENT_STRING=" NS v2 Lite"
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index 7b9f190..e72815d 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NETSPACE_V2=y
+CONFIG_IDENT_STRING=" NS Max v2"
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index f46b9a1..1422787 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NETSPACE_V2=y
+CONFIG_IDENT_STRING=" NS v2 Mini"
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index 1b94cee..6373255 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NETSPACE_V2=y
+CONFIG_IDENT_STRING=" NS v2"
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 33877ad..1ffdddc 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -1,10 +1,20 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_KOSAGI_NOVENA=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index 0a9c153..ec4fb53 100644
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -15,6 +15,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 3e9ef68..ee70df0 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_MESON=y
CONFIG_MESON_GXBB=y
CONFIG_TARGET_ODROID_C2=y
+CONFIG_IDENT_STRING=" odroid-c2"
CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BDI is not set
diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig
index 15e9bd9..af2e4f7 100644
--- a/configs/odroid-xu3_defconfig
+++ b/configs/odroid-xu3_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS5=y
+CONFIG_IDENT_STRING=" for ODROID-XU3"
CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index 5fd86af..ece9638 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_BEAGLE=y
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index 82314bd..6ca7e2c 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_OMAP3_EVM=y
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="OMAP3_EVM # "
# CONFIG_CMD_IMI is not set
diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig
index 3ef3f59..3fcbb76 100644
--- a/configs/omap3_ha_defconfig
+++ b/configs/omap3_ha_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_TAO3530=y
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BOARD_OMAP3_HA"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index dfd7611..26146d2 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -1,10 +1,11 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_LOGIC=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="OMAP Logic # "
CONFIG_CMD_BOOTZ=y
@@ -26,6 +27,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig
index 1e282c1..a416072 100644
--- a/configs/omap3_overo_defconfig
+++ b/configs/omap3_overo_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_OVERO=y
-CONFIG_SPL=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Overo # "
CONFIG_CMD_BOOTZ=y
@@ -27,6 +28,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig
index 0c2c12b..e101614 100644
--- a/configs/omap3_pandora_defconfig
+++ b/configs/omap3_pandora_defconfig
@@ -26,5 +26,6 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig
index b69124e..e496afe 100644
--- a/configs/omap4_panda_defconfig
+++ b/configs/omap4_panda_defconfig
@@ -1,8 +1,11 @@
CONFIG_ARM=y
CONFIG_OMAP44XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
+# CONFIG_SPL_I2C_SUPPORT is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_OMAP4_PANDA=y
-CONFIG_SPL=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig
index 684f4e1..ea62104 100644
--- a/configs/omap4_sdp4430_defconfig
+++ b/configs/omap4_sdp4430_defconfig
@@ -1,8 +1,10 @@
CONFIG_ARM=y
CONFIG_OMAP44XX=y
+# CONFIG_SPL_I2C_SUPPORT is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_OMAP4_SDP4430=y
-CONFIG_SPL=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig
index ec75672..ed0917b 100644
--- a/configs/omap5_uevm_defconfig
+++ b/configs/omap5_uevm_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
CONFIG_OMAP54XX=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_OMAP5_UEVM=y
-CONFIG_SPL=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 8cb486d..4d5f408 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -1,9 +1,12 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_TARGET_OMAPL138_LCDK=y
-CONFIG_SPL=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
# CONFIG_CMD_IMLS is not set
@@ -16,6 +19,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
index 2e14052..be99ea9 100644
--- a/configs/openrd_base_defconfig
+++ b/configs/openrd_base_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_OPENRD=y
+CONFIG_IDENT_STRING="\nOpenRD-Base"
CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE"
CONFIG_BOOTDELAY=3
# CONFIG_CMD_IMLS is not set
@@ -13,6 +14,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
index 49bd597..87b2e45 100644
--- a/configs/openrd_client_defconfig
+++ b/configs/openrd_client_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_OPENRD=y
+CONFIG_IDENT_STRING="\nOpenRD-Client"
CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT"
CONFIG_BOOTDELAY=3
# CONFIG_CMD_IMLS is not set
@@ -13,6 +14,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
index 5ee4ba2..c216b9b 100644
--- a/configs/openrd_ultimate_defconfig
+++ b/configs/openrd_ultimate_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_OPENRD=y
+CONFIG_IDENT_STRING="\nOpenRD-Ultimate"
CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE"
CONFIG_BOOTDELAY=3
# CONFIG_CMD_IMLS is not set
@@ -13,6 +14,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig
index 95075c2..2207b81 100644
--- a/configs/orangepi_2_defconfig
+++ b/configs/orangepi_2_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881979
diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig
index 0c156bd..3f8010c 100644
--- a/configs/orangepi_pc_defconfig
+++ b/configs/orangepi_pc_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=624
CONFIG_DRAM_ZQ=3881979
diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig
index 8caca59..f8f6dab 100644
--- a/configs/orangepi_pc_plus_defconfig
+++ b/configs/orangepi_pc_plus_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=624
CONFIG_DRAM_ZQ=3881979
diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig
index 2374f1d..cfae5f0 100644
--- a/configs/orangepi_plus2e_defconfig
+++ b/configs/orangepi_plus2e_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881979
@@ -7,8 +8,8 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPD(6)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
index f2ed941..6c99aa2 100644
--- a/configs/orangepi_plus_defconfig
+++ b/configs/orangepi_plus_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881979
@@ -8,8 +9,8 @@
CONFIG_USB1_VBUS_PIN="PG13"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPG(11),MACPWR=SUNXI_GPD(6)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/origen_defconfig b/configs/origen_defconfig
index 6ad01af..0eff767 100644
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS4=y
CONFIG_TARGET_ORIGEN=y
+CONFIG_IDENT_STRING=" for ORIGEN"
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen"
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig
index 782accd..d1bdbde 100644
--- a/configs/ot1200_spl_defconfig
+++ b/configs/ot1200_spl_defconfig
@@ -1,9 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_OT1200=y
-CONFIG_SPL=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig
index f14ba67..d55e4fe 100644
--- a/configs/pcm051_rev1_defconfig
+++ b/configs/pcm051_rev1_defconfig
@@ -1,8 +1,24 @@
CONFIG_ARM=y
CONFIG_TARGET_PCM051=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="REV1"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_ETH_SUPPORT=y
+CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
index 3921886..cc824e6 100644
--- a/configs/pcm051_rev3_defconfig
+++ b/configs/pcm051_rev3_defconfig
@@ -1,8 +1,24 @@
CONFIG_ARM=y
CONFIG_TARGET_PCM051=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="REV3"
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_ETH_SUPPORT=y
+CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig
index 52cb1d5..f7db263 100644
--- a/configs/pcm052_defconfig
+++ b/configs/pcm052_defconfig
@@ -14,6 +14,7 @@
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig
index 5c08171..b2f70ea 100644
--- a/configs/pcm058_defconfig
+++ b/configs/pcm058_defconfig
@@ -1,10 +1,23 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_PCM058=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -22,6 +35,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_DM=y
CONFIG_MTD=y
CONFIG_SPI_FLASH=y
diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig
index e6a47cc..9472bb0 100644
--- a/configs/peach-pi_defconfig
+++ b/configs/peach-pi_defconfig
@@ -2,10 +2,11 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS5=y
CONFIG_TARGET_PEACH_PI=y
+CONFIG_IDENT_STRING=" for Peach-Pi"
CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Peach-Pi # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig
index 9778341..d208d68 100644
--- a/configs/peach-pit_defconfig
+++ b/configs/peach-pit_defconfig
@@ -2,10 +2,11 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS5=y
CONFIG_TARGET_PEACH_PIT=y
+CONFIG_IDENT_STRING=" for Peach-Pit"
CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Peach-Pit # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig
index 0035d89..135a40f 100644
--- a/configs/pengwyn_defconfig
+++ b/configs/pengwyn_defconfig
@@ -1,7 +1,25 @@
CONFIG_ARM=y
CONFIG_TARGET_PENGWYN=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_ETH_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig
index 8a38b89..17cd66f 100644
--- a/configs/pepper_defconfig
+++ b/configs/pepper_defconfig
@@ -1,7 +1,18 @@
CONFIG_ARM=y
CONFIG_TARGET_PEPPER=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="pepper# "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/picosam9g45_defconfig b/configs/picosam9g45_defconfig
index 3ecc272..2536ca7 100644
--- a/configs/picosam9g45_defconfig
+++ b/configs/picosam9g45_defconfig
@@ -1,9 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_PICOSAM9G45=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig
index 1dbb3d3..71ebc25 100644
--- a/configs/platinum_picon_defconfig
+++ b/configs/platinum_picon_defconfig
@@ -1,9 +1,20 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_PLATINUM_PICON=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6DL"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="picon > "
CONFIG_CMD_BOOTZ=y
@@ -24,6 +35,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig
index 8174481..51aeff1 100644
--- a/configs/platinum_titanium_defconfig
+++ b/configs/platinum_titanium_defconfig
@@ -1,9 +1,20 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_PLATINUM_TITANIUM=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="titanium > "
CONFIG_CMD_BOOTZ=y
@@ -24,6 +35,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig
index 2b1d873..cdb85d2 100644
--- a/configs/pogo_e02_defconfig
+++ b/configs/pogo_e02_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_POGO_E02=y
+CONFIG_IDENT_STRING="\nPogo E02"
CONFIG_BOOTDELAY=3
CONFIG_SYS_PROMPT="PogoE02> "
# CONFIG_CMD_IMLS is not set
@@ -12,6 +13,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/polaroid_mid2407pxe03_defconfig b/configs/polaroid_mid2407pxe03_defconfig
index 9bf6fbf..2ac6f4c 100644
--- a/configs/polaroid_mid2407pxe03_defconfig
+++ b/configs/polaroid_mid2407pxe03_defconfig
@@ -15,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2407pxe03"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/polaroid_mid2809pxe04_defconfig b/configs/polaroid_mid2809pxe04_defconfig
index 04c99b9..d9bcd4f 100644
--- a/configs/polaroid_mid2809pxe04_defconfig
+++ b/configs/polaroid_mid2809pxe04_defconfig
@@ -15,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2809pxe04"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig
index 94f9349..866171b 100644
--- a/configs/portl2_defconfig
+++ b/configs/portl2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_KM_KIRKWOOD=y
+CONFIG_IDENT_STRING="\nKeymile Port-L2"
CONFIG_SYS_EXTRA_OPTIONS="KM_PORTL2"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
@@ -16,6 +17,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig
index 9aa5280..8e81e69 100644
--- a/configs/pov_protab2_ips9_defconfig
+++ b/configs/pov_protab2_ips9_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=432
CONFIG_USB0_VBUS_PIN="PB9"
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index bafe4f4..35fd2e8 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -1,10 +1,23 @@
CONFIG_ARM=y
CONFIG_TARGET_PXM2=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
@@ -27,10 +40,13 @@
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig
index b467b62..6b516db 100644
--- a/configs/q8_a13_tablet_defconfig
+++ b/configs/q8_a13_tablet_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PG0"
@@ -14,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig
index 7391464..971dcea 100644
--- a/configs/q8_a23_tablet_800x480_defconfig
+++ b/configs/q8_a23_tablet_800x480_defconfig
@@ -15,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig
index 16f8600..f99e347 100644
--- a/configs/q8_a33_tablet_1024x600_defconfig
+++ b/configs/q8_a33_tablet_1024x600_defconfig
@@ -15,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig
index 6378918..182bd9a 100644
--- a/configs/q8_a33_tablet_800x480_defconfig
+++ b/configs/q8_a33_tablet_800x480_defconfig
@@ -15,8 +15,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig
index 9d9d4bf..afbc9a6 100644
--- a/configs/r7-tv-dongle_defconfig
+++ b/configs/r7-tv-dongle_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_CLK=384
CONFIG_USB1_VBUS_PIN="PG13"
diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index f3bdd79..8664cab 100644
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -1,9 +1,22 @@
CONFIG_ARM=y
CONFIG_TARGET_RASTABAN=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
@@ -25,10 +38,13 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 33e47ba..dde3747 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -1,10 +1,23 @@
CONFIG_ARM=y
CONFIG_TARGET_RUT=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-rut"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
@@ -27,10 +40,13 @@
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/sama5d2_ptc_nandflash_defconfig b/configs/sama5d2_ptc_nandflash_defconfig
index d65aed0..b64527d 100644
--- a/configs/sama5d2_ptc_nandflash_defconfig
+++ b/configs/sama5d2_ptc_nandflash_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D2_PTC=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d2_ptc_spiflash_defconfig b/configs/sama5d2_ptc_spiflash_defconfig
index 799111a..9dc3976 100644
--- a/configs/sama5d2_ptc_spiflash_defconfig
+++ b/configs/sama5d2_ptc_spiflash_defconfig
@@ -1,9 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D2_PTC=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index 8051fc8..8ac42a3 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D2_XPLAINED=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index 69b136c..12b7e07 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -1,10 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D2_XPLAINED=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index 225284a..521409a 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D3_XPLAINED=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
@@ -20,6 +27,7 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 8710f07..18dfb5c 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -1,10 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D3_XPLAINED=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
@@ -20,6 +25,7 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index a9cddf1..ccc0b19 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D3XEK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 9690de7..2ed8a33 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -1,10 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D3XEK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 064b9a9..81be7f5 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -1,10 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D3XEK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 820aca8..8a3d160 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D4_XPLAINED=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index 8d31742..ad5d935 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -1,10 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D4_XPLAINED=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index ccc9298..8fc650f 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -1,10 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D4_XPLAINED=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index 4cfd821..e7398dd 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D4EK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index 5cbe6e7..e4032f9 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -1,10 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D4EK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index 219a8c2..903ddcb 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -1,10 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D4EK=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 808ac34..ebaf768 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -1,9 +1,14 @@
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_MMC=y
CONFIG_SANDBOX_SPL=y
CONFIG_PCI=y
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_I8042_KEYB=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
@@ -17,6 +22,7 @@
CONFIG_BOOTSTAGE_STASH_SIZE=0x4096
CONFIG_CONSOLE_RECORD=y
CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig
index 7af5935..de07139 100644
--- a/configs/sansa_fuze_plus_defconfig
+++ b/configs/sansa_fuze_plus_defconfig
@@ -1,8 +1,12 @@
CONFIG_ARM=y
CONFIG_TARGET_SANSA_FUZE_PLUS=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
diff --git a/configs/sc_sps_1_defconfig b/configs/sc_sps_1_defconfig
index 30233fc..f3b74b6 100644
--- a/configs/sc_sps_1_defconfig
+++ b/configs/sc_sps_1_defconfig
@@ -1,8 +1,12 @@
CONFIG_ARM=y
CONFIG_TARGET_SC_SPS_1=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index dbafcf2..67d75ec 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_SHEEVAPLUG=y
+CONFIG_IDENT_STRING="\nMarvell-Sheevaplug"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -16,6 +17,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index cf8bff6..68ede03 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -1,11 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SMARTWEB=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/smdk2410_defconfig b/configs/smdk2410_defconfig
index 3d098ba..1cb7960 100644
--- a/configs/smdk2410_defconfig
+++ b/configs/smdk2410_defconfig
@@ -10,5 +10,6 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig
index dbd3137..6e335f0 100644
--- a/configs/smdk5250_defconfig
+++ b/configs/smdk5250_defconfig
@@ -2,10 +2,11 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS5=y
CONFIG_TARGET_SMDK5250=y
+CONFIG_IDENT_STRING=" for SMDK5250"
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SMDK5250 # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig
index 63a95a8..c1d8c45 100644
--- a/configs/smdk5420_defconfig
+++ b/configs/smdk5420_defconfig
@@ -2,10 +2,11 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS5=y
CONFIG_TARGET_SMDK5420=y
+CONFIG_IDENT_STRING=" for SMDK5420"
CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SMDK5420 # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig
index 0948534..6bfe26c 100644
--- a/configs/smdkc100_defconfig
+++ b/configs/smdkc100_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_S5PC1XX=y
CONFIG_TARGET_SMDKC100=y
+CONFIG_IDENT_STRING=" for SMDKC100"
CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig
index 5e3844c..c8c182b 100644
--- a/configs/smdkv310_defconfig
+++ b/configs/smdkv310_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS4=y
+CONFIG_IDENT_STRING=" for SMDKC210/V310"
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310"
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig
index 1b313c4..a44082e 100644
--- a/configs/sniper_defconfig
+++ b/configs/sniper_defconfig
@@ -1,5 +1,7 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_TARGET_SNIPER=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/snow_defconfig b/configs/snow_defconfig
index 0c9e3f1..3d8c8ea 100644
--- a/configs/snow_defconfig
+++ b/configs/snow_defconfig
@@ -2,10 +2,11 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS5=y
CONFIG_TARGET_SNOW=y
+CONFIG_IDENT_STRING=" for snow"
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="snow # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index a6d4945..7170879 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
+CONFIG_FIT=y
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_FIT=y
-CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -30,6 +31,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index b34e7e5..e523176 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
+CONFIG_FIT=y
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_FIT=y
-CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -30,6 +31,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 127f36c..a22c022 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
+CONFIG_FIT=y
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_FIT=y
-CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -30,6 +31,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index d23afbf..c3217f2 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -1,12 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_IS1=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -26,6 +27,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index 0100726..4e6b3d4 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
+CONFIG_FIT=y
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_FIT=y
-CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -30,6 +31,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index d708e13..3879cc9 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
+CONFIG_FIT=y
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_FIT=y
-CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -30,6 +31,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 35dad70..d763b99 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
+CONFIG_FIT=y
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_FIT=y
-CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -31,6 +32,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index 2a4494f..814b111 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_SR1500=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
+CONFIG_FIT=y
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_FIT=y
-CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -29,6 +30,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 7fdaeca..e9105b9 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -1,14 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga"
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=5
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
@@ -32,6 +33,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
@@ -42,6 +44,7 @@
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_MTD_UBI_FASTMAP=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/spear300_defconfig b/configs/spear300_defconfig
index 2ef309c..620758e 100644
--- a/configs/spear300_defconfig
+++ b/configs/spear300_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
-CONFIG_SYS_EXTRA_OPTIONS="spear300"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR300"
CONFIG_BOOTDELAY=1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear300_nand_defconfig b/configs/spear300_nand_defconfig
index 611631e..497b29d 100644
--- a/configs/spear300_nand_defconfig
+++ b/configs/spear300_nand_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
-CONFIG_SYS_EXTRA_OPTIONS="spear300,nand"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,NAND"
CONFIG_BOOTDELAY=1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear300_usbtty_defconfig b/configs/spear300_usbtty_defconfig
index 5338418..34f0ec0 100644
--- a/configs/spear300_usbtty_defconfig
+++ b/configs/spear300_usbtty_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
-CONFIG_SYS_EXTRA_OPTIONS="spear300,usbtty"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY"
CONFIG_BOOTDELAY=-1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear300_usbtty_nand_defconfig b/configs/spear300_usbtty_nand_defconfig
index d525edf..d2cf814 100644
--- a/configs/spear300_usbtty_nand_defconfig
+++ b/configs/spear300_usbtty_nand_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
-CONFIG_SYS_EXTRA_OPTIONS="spear300,usbtty,nand"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY,NAND"
CONFIG_BOOTDELAY=-1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear310_defconfig b/configs/spear310_defconfig
index 3f20387..1b4483d 100644
--- a/configs/spear310_defconfig
+++ b/configs/spear310_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_SYS_EXTRA_OPTIONS="spear310"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR310"
CONFIG_BOOTDELAY=1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear310_nand_defconfig b/configs/spear310_nand_defconfig
index 2feb9ccf..6a51538 100644
--- a/configs/spear310_nand_defconfig
+++ b/configs/spear310_nand_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_SYS_EXTRA_OPTIONS="spear310,nand"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,NAND"
CONFIG_BOOTDELAY=1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear310_pnor_defconfig b/configs/spear310_pnor_defconfig
index 4ab49d9..f6424f8 100644
--- a/configs/spear310_pnor_defconfig
+++ b/configs/spear310_pnor_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_SYS_EXTRA_OPTIONS="spear310,FLASH_PNOR"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,FLASH_PNOR"
CONFIG_BOOTDELAY=1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear310_usbtty_defconfig b/configs/spear310_usbtty_defconfig
index 299cf6d..f35d363 100644
--- a/configs/spear310_usbtty_defconfig
+++ b/configs/spear310_usbtty_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY"
CONFIG_BOOTDELAY=-1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear310_usbtty_nand_defconfig b/configs/spear310_usbtty_nand_defconfig
index 9ac10f2..a1f9fbf 100644
--- a/configs/spear310_usbtty_nand_defconfig
+++ b/configs/spear310_usbtty_nand_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty,nand"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY,NAND"
CONFIG_BOOTDELAY=-1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear310_usbtty_pnor_defconfig b/configs/spear310_usbtty_pnor_defconfig
index f582b46..4ac4da5 100644
--- a/configs/spear310_usbtty_pnor_defconfig
+++ b/configs/spear310_usbtty_pnor_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
-CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty,FLASH_PNOR"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY,FLASH_PNOR"
CONFIG_BOOTDELAY=-1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear320_defconfig b/configs/spear320_defconfig
index 4b4f2f6..7b09882 100644
--- a/configs/spear320_defconfig
+++ b/configs/spear320_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_SYS_EXTRA_OPTIONS="spear320"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR320"
CONFIG_BOOTDELAY=1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear320_nand_defconfig b/configs/spear320_nand_defconfig
index 7308879..53e3f01 100644
--- a/configs/spear320_nand_defconfig
+++ b/configs/spear320_nand_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_SYS_EXTRA_OPTIONS="spear320,nand"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,NAND"
CONFIG_BOOTDELAY=1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear320_pnor_defconfig b/configs/spear320_pnor_defconfig
index fdffa97..d23eb36 100644
--- a/configs/spear320_pnor_defconfig
+++ b/configs/spear320_pnor_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_SYS_EXTRA_OPTIONS="spear320,FLASH_PNOR"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,FLASH_PNOR"
CONFIG_BOOTDELAY=1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear320_usbtty_defconfig b/configs/spear320_usbtty_defconfig
index ee873e9..26ca01f 100644
--- a/configs/spear320_usbtty_defconfig
+++ b/configs/spear320_usbtty_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY"
CONFIG_BOOTDELAY=-1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear320_usbtty_nand_defconfig b/configs/spear320_usbtty_nand_defconfig
index a587470..2478fe0 100644
--- a/configs/spear320_usbtty_nand_defconfig
+++ b/configs/spear320_usbtty_nand_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty,nand"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY,NAND"
CONFIG_BOOTDELAY=-1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear320_usbtty_pnor_defconfig b/configs/spear320_usbtty_pnor_defconfig
index a65dc11..e774225 100644
--- a/configs/spear320_usbtty_pnor_defconfig
+++ b/configs/spear320_usbtty_pnor_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
-CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty,FLASH_PNOR"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY,FLASH_PNOR"
CONFIG_BOOTDELAY=-1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig
index 623800c..e14dcc0 100644
--- a/configs/spear600_defconfig
+++ b/configs/spear600_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
-CONFIG_SYS_EXTRA_OPTIONS="spear600"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR600"
CONFIG_BOOTDELAY=1
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig
index 8da9b34..6c45fec 100644
--- a/configs/spear600_nand_defconfig
+++ b/configs/spear600_nand_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
-CONFIG_SYS_EXTRA_OPTIONS="spear600,nand"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,NAND"
CONFIG_BOOTDELAY=1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig
index 68b11cc..4531168 100644
--- a/configs/spear600_usbtty_defconfig
+++ b/configs/spear600_usbtty_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
-CONFIG_SYS_EXTRA_OPTIONS="spear600,usbtty"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY"
CONFIG_BOOTDELAY=-1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig
index 776c611..968e7e4 100644
--- a/configs/spear600_usbtty_nand_defconfig
+++ b/configs/spear600_usbtty_nand_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
-CONFIG_SYS_EXTRA_OPTIONS="spear600,usbtty,nand"
+CONFIG_IDENT_STRING="-SPEAr"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY,NAND"
CONFIG_BOOTDELAY=-1
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/spring_defconfig b/configs/spring_defconfig
index 030973b..74287ea 100644
--- a/configs/spring_defconfig
+++ b/configs/spring_defconfig
@@ -2,10 +2,11 @@
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS5=y
CONFIG_TARGET_SPRING=y
+CONFIG_IDENT_STRING=" for spring"
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="spring # "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig
index 6253615..66a0b97 100644
--- a/configs/strider_con_defconfig
+++ b/configs/strider_con_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" strider con 0.01"
CONFIG_MPC83xx=y
CONFIG_TARGET_STRIDER=y
CONFIG_FIT=y
diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig
index 3d325f4..3482653 100644
--- a/configs/strider_con_dp_defconfig
+++ b/configs/strider_con_dp_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" strider con dp 0.01"
CONFIG_MPC83xx=y
CONFIG_TARGET_STRIDER=y
CONFIG_FIT=y
diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig
index 160df24..d554b0c 100644
--- a/configs/strider_cpu_defconfig
+++ b/configs/strider_cpu_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" strider cpu 0.01"
CONFIG_MPC83xx=y
CONFIG_TARGET_STRIDER=y
CONFIG_FIT=y
diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig
index 2a2733d..5394d2f 100644
--- a/configs/strider_cpu_dp_defconfig
+++ b/configs/strider_cpu_dp_defconfig
@@ -1,4 +1,5 @@
CONFIG_PPC=y
+CONFIG_IDENT_STRING=" strider cpu dp 0.01"
CONFIG_MPC83xx=y
CONFIG_TARGET_STRIDER=y
CONFIG_FIT=y
diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig
index 40ca293..4db028e 100644
--- a/configs/stv0991_defconfig
+++ b/configs/stv0991_defconfig
@@ -2,7 +2,7 @@
CONFIG_TARGET_STV0991=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="stv0991"
-CONFIG_SYS_EXTRA_OPTIONS="stv0991"
+CONFIG_SYS_EXTRA_OPTIONS="STV0991"
CONFIG_BOOTDELAY=3
CONFIG_SYS_PROMPT="STV0991> "
CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig
index 6d39dec..7309022 100644
--- a/configs/sunxi_Gemei_G9_defconfig
+++ b/configs/sunxi_Gemei_G9_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=432
CONFIG_DRAM_EMR1=4
diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig
index 86c258b..e1b7cd8 100644
--- a/configs/suvd3_defconfig
+++ b/configs/suvd3_defconfig
@@ -15,5 +15,6 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig
index 0f69138..88a3725 100644
--- a/configs/tao3530_defconfig
+++ b/configs/tao3530_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_TAO3530=y
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="TAO-3530 # "
# CONFIG_CMD_IMI is not set
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index f0e95a4..c84809f 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -1,10 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_TAURUS=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index a918d1f..ec6a8f1 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -1,11 +1,18 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_THEADORABLE=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/theadorable_defconfig b/configs/theadorable_defconfig
index 8757c60..ecba1ec 100644
--- a/configs/theadorable_defconfig
+++ b/configs/theadorable_defconfig
@@ -1,11 +1,18 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_THEADORABLE=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig
index 365627f..ed36d73 100644
--- a/configs/thuban_defconfig
+++ b/configs/thuban_defconfig
@@ -1,9 +1,22 @@
CONFIG_ARM=y
CONFIG_TARGET_THUBAN=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
-CONFIG_SPL=y
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_AUTOBOOT_KEYED=y
@@ -25,10 +38,13 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig
index 8242103..9bbff6c 100644
--- a/configs/thunderx_88xx_defconfig
+++ b/configs/thunderx_88xx_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_THUNDERX_88XX=y
+CONFIG_IDENT_STRING=" for Cavium Thunder CN88XX ARM v8 Multi-Core"
CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx"
CONFIG_BOOTDELAY=5
CONFIG_HUSH_PARSER=y
diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig
index 122dc3d..e66ea7d 100644
--- a/configs/ti814x_evm_defconfig
+++ b/configs/ti814x_evm_defconfig
@@ -1,8 +1,16 @@
CONFIG_ARM=y
CONFIG_TARGET_TI814X_EVM=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_BOOTDELAY=1
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
index 7df29cc..318751c 100644
--- a/configs/ti816x_evm_defconfig
+++ b/configs/ti816x_evm_defconfig
@@ -1,8 +1,16 @@
CONFIG_ARM=y
CONFIG_TARGET_TI816X_EVM=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot/ti816x# "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig
index c64acf2..478eba9 100644
--- a/configs/titanium_defconfig
+++ b/configs/titanium_defconfig
@@ -23,6 +23,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig
index 2482888..281eabb 100644
--- a/configs/tricorder_defconfig
+++ b/configs/tricorder_defconfig
@@ -1,8 +1,8 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_TRICORDER=y
-CONFIG_SPL=y
CONFIG_BOOTDELAY=0
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="OMAP3 Tricorder # "
# CONFIG_CMD_IMI is not set
@@ -16,5 +16,6 @@
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig
index b285a81..7bdf5f5 100644
--- a/configs/tricorder_flash_defconfig
+++ b/configs/tricorder_flash_defconfig
@@ -1,9 +1,9 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_TRICORDER=y
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="FLASHCARD"
CONFIG_BOOTDELAY=0
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
@@ -16,5 +16,6 @@
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig
index a042cf2..2465d82 100644
--- a/configs/tuge1_defconfig
+++ b/configs/tuge1_defconfig
@@ -15,5 +15,6 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig
index f3f7857..02f98c9 100644
--- a/configs/tuxx1_defconfig
+++ b/configs/tuxx1_defconfig
@@ -15,5 +15,6 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/twister_defconfig b/configs/twister_defconfig
index 42b88fb..f419140 100644
--- a/configs/twister_defconfig
+++ b/configs/twister_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
CONFIG_OMAP34XX=y
+# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_TARGET_TWISTER=y
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="twister => "
# CONFIG_CMD_IMLS is not set
@@ -19,6 +20,7 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_ULPI_VIEWPORT_OMAP=y
diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig
index 3c75706..a4a17c1 100644
--- a/configs/udoo_defconfig
+++ b/configs/udoo_defconfig
@@ -1,9 +1,18 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_UDOO=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/uniphier_ld11_defconfig b/configs/uniphier_ld11_defconfig
index 703d871..864e04e 100644
--- a/configs/uniphier_ld11_defconfig
+++ b/configs/uniphier_ld11_defconfig
@@ -1,9 +1,12 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ARCH_UNIPHIER_LD11=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld11-ref"
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
@@ -23,10 +26,7 @@
CONFIG_GPIO_UNIPHIER=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
-CONFIG_PINCTRL=y
-CONFIG_SPL_PINCTRL=y
CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
diff --git a/configs/uniphier_ld20_defconfig b/configs/uniphier_ld20_defconfig
index c4a8547..3fe3758 100644
--- a/configs/uniphier_ld20_defconfig
+++ b/configs/uniphier_ld20_defconfig
@@ -1,9 +1,12 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ARCH_UNIPHIER_LD20=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld20-ref"
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
@@ -24,8 +27,6 @@
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_UNIPHIER=y
-CONFIG_PINCTRL=y
-CONFIG_SPL_PINCTRL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index e3ad160..c18f042 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ARCH_UNIPHIER_LD4_SLD8=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref"
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
@@ -29,10 +34,7 @@
CONFIG_SYS_NAND_DENALI_64BIT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
CONFIG_SPL_NAND_DENALI=y
-CONFIG_PINCTRL=y
-CONFIG_SPL_PINCTRL=y
CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
diff --git a/configs/uniphier_pro4_defconfig b/configs/uniphier_pro4_defconfig
index a7dcc56..9441b05 100644
--- a/configs/uniphier_pro4_defconfig
+++ b/configs/uniphier_pro4_defconfig
@@ -1,8 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref"
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
@@ -28,8 +33,8 @@
CONFIG_SYS_NAND_DENALI_64BIT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
CONFIG_SPL_NAND_DENALI=y
-CONFIG_PINCTRL=y
-CONFIG_SPL_PINCTRL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
diff --git a/configs/uniphier_pxs2_ld6b_defconfig b/configs/uniphier_pxs2_ld6b_defconfig
index 131c416..0bf39f4 100644
--- a/configs/uniphier_pxs2_ld6b_defconfig
+++ b/configs/uniphier_pxs2_ld6b_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ARCH_UNIPHIER_PRO5_PXS2_LD6B=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-proxstream2-vodka"
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
@@ -29,8 +34,6 @@
CONFIG_SYS_NAND_DENALI_64BIT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
CONFIG_SPL_NAND_DENALI=y
-CONFIG_PINCTRL=y
-CONFIG_SPL_PINCTRL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/uniphier_sld3_defconfig b/configs/uniphier_sld3_defconfig
index 1c5cece..bd9c327 100644
--- a/configs/uniphier_sld3_defconfig
+++ b/configs/uniphier_sld3_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ARCH_UNIPHIER_SLD3=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld3-ref"
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
@@ -30,7 +35,6 @@
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
CONFIG_SPL_NAND_DENALI=y
CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
diff --git a/configs/vct_platinum_onenand_defconfig b/configs/vct_platinum_onenand_defconfig
index 54f85ab..5dcad0b 100644
--- a/configs/vct_platinum_onenand_defconfig
+++ b/configs/vct_platinum_onenand_defconfig
@@ -13,6 +13,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/vct_platinum_onenand_small_defconfig b/configs/vct_platinum_onenand_small_defconfig
index 3306a45e..63e670e 100644
--- a/configs/vct_platinum_onenand_small_defconfig
+++ b/configs/vct_platinum_onenand_small_defconfig
@@ -19,4 +19,5 @@
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/vct_platinumavc_onenand_defconfig b/configs/vct_platinumavc_onenand_defconfig
index 55dfd4c..d0ef4dc 100644
--- a/configs/vct_platinumavc_onenand_defconfig
+++ b/configs/vct_platinumavc_onenand_defconfig
@@ -11,4 +11,5 @@
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/vct_platinumavc_onenand_small_defconfig b/configs/vct_platinumavc_onenand_small_defconfig
index 98b5ea2..bdc2864 100644
--- a/configs/vct_platinumavc_onenand_small_defconfig
+++ b/configs/vct_platinumavc_onenand_small_defconfig
@@ -19,4 +19,5 @@
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/vct_premium_onenand_defconfig b/configs/vct_premium_onenand_defconfig
index f5ed55a..e7a0a49 100644
--- a/configs/vct_premium_onenand_defconfig
+++ b/configs/vct_premium_onenand_defconfig
@@ -13,6 +13,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/vct_premium_onenand_small_defconfig b/configs/vct_premium_onenand_small_defconfig
index ff5e7a6..64f6dfb 100644
--- a/configs/vct_premium_onenand_small_defconfig
+++ b/configs/vct_premium_onenand_small_defconfig
@@ -19,4 +19,5 @@
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+CONFIG_CMD_UBI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/vexpress_aemv8a_dram_defconfig b/configs/vexpress_aemv8a_dram_defconfig
index 15a7f6f..59fe412 100644
--- a/configs/vexpress_aemv8a_dram_defconfig
+++ b/configs/vexpress_aemv8a_dram_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_IDENT_STRING=" vexpress_aemv8a"
CONFIG_BOOTDELAY=1
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="VExpress64# "
diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
index 6930c1c..e7a0369 100644
--- a/configs/vexpress_aemv8a_juno_defconfig
+++ b/configs/vexpress_aemv8a_juno_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS64_JUNO=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_IDENT_STRING=" vexpress_aemv8a"
CONFIG_BOOTDELAY=1
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="VExpress64# "
diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
index cb04d19..7e5b53f 100644
--- a/configs/vexpress_aemv8a_semi_defconfig
+++ b/configs/vexpress_aemv8a_semi_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS64_BASE_FVP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_IDENT_STRING=" vexpress_aemv8a"
CONFIG_BOOTDELAY=1
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="VExpress64# "
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index d196738..5794c28 100644
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -15,6 +15,7 @@
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index faed3e0..60d0126 100644
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -15,6 +15,7 @@
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig
index d465270..5a91de4 100644
--- a/configs/wandboard_defconfig
+++ b/configs/wandboard_defconfig
@@ -1,8 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_WANDBOARD=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/warp7_secure_defconfig b/configs/warp7_secure_defconfig
index 34fcdea..b6458d1 100644
--- a/configs/warp7_secure_defconfig
+++ b/configs/warp7_secure_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_TARGET_WARP7=y
+CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
@@ -24,13 +25,12 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_MXC_USB_OTG_HACTIVE=y
CONFIG_USB_GADGET=y
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="FSL"
CONFIG_G_DNL_VENDOR_NUM=0x0525
CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
-CONFIG_USB_EHCI_HCD=y
-CONFIG_MXC_USB_OTG_HACTIVE=y
CONFIG_OF_LIBFDT=y
-CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig
index 3b38130..379d7fa 100644
--- a/configs/woodburn_sd_defconfig
+++ b/configs/woodburn_sd_defconfig
@@ -1,8 +1,14 @@
CONFIG_ARM=y
CONFIG_TARGET_WOODBURN_SD=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/woodburn/imximage.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="woodburn U-Boot > "
CONFIG_CMD_MMC=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index 0c2fb99..d5e5b38 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -1,9 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_WORK_92105=y
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/x600_defconfig b/configs/x600_defconfig
index dc4f42b..47579a5 100644
--- a/configs/x600_defconfig
+++ b/configs/x600_defconfig
@@ -1,7 +1,12 @@
CONFIG_ARM=y
CONFIG_TARGET_X600=y
-CONFIG_SPL=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_IDENT_STRING="-SPEAr"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="X600> "
CONFIG_AUTOBOOT_KEYED=y
@@ -18,6 +23,7 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_I2C_DW=y
CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig
index bc0828c..9f0c378 100644
--- a/configs/xfi3_defconfig
+++ b/configs/xfi3_defconfig
@@ -1,8 +1,12 @@
CONFIG_ARM=y
CONFIG_TARGET_XFI3=y
-CONFIG_SPL=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig
index 5f285d8..bd8b906 100644
--- a/configs/xilinx_zynqmp_ep_defconfig
+++ b/configs/xilinx_zynqmp_ep_defconfig
@@ -5,11 +5,12 @@
CONFIG_ZYNQMP_USB=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108"
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_AHCI=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_CONSOLE is not set
@@ -46,6 +47,8 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
index 059db84..6afacd2 100644
--- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
@@ -3,13 +3,14 @@
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_ZYNQMP_USB=y
+CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm015 dc1"
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1"
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
@@ -37,6 +38,8 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
index 0620646..4068c28 100644
--- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
@@ -2,14 +2,18 @@
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm016_dc2"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
+# CONFIG_SPL_FAT_SUPPORT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
+# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_ZYNQMP_USB=y
+CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm016 dc2"
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm016-dc2"
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
@@ -37,6 +41,8 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
index 3ac22cb..c717f04 100644
--- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
@@ -1,14 +1,14 @@
CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm018_dc4"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm018 dc4"
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
@@ -33,6 +33,8 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
index 0e82bf2..1a27bd0 100644
--- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
@@ -2,13 +2,14 @@
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm019_dc5"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm019 dc5"
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5"
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
@@ -32,6 +33,8 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig
index 07e29fb..90b5ff6 100644
--- a/configs/xilinx_zynqmp_zcu102_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_defconfig
@@ -3,13 +3,15 @@
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_ZYNQMP_USB=y
+CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102"
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102"
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_AHCI=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
@@ -37,6 +39,8 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_DM_MMC_OPS=y
diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig
index 72679db..5a0d686 100644
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@@ -3,13 +3,15 @@
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_ZYNQMP_USB=y
+CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102"
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB"
-CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_AHCI=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
@@ -37,6 +39,8 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_DM_MMC_OPS=y
diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig
index 39406d1..838515d 100644
--- a/configs/xpress_spl_defconfig
+++ b/configs/xpress_spl_defconfig
@@ -1,9 +1,18 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_XPRESS=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig
index cd5cd73..8d3f1df 100644
--- a/configs/zc5202_defconfig
+++ b/configs/zc5202_defconfig
@@ -1,9 +1,20 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_ZC5202=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig
index 4ef7ca1..a72c0e9 100644
--- a/configs/zc5601_defconfig
+++ b/configs/zc5601_defconfig
@@ -1,9 +1,20 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_ZC5601=y
-CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index 3bb090a..8726e7b 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -1,11 +1,11 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-microzed"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_NO_FLASH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index 5416141..8ae7b59 100644
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -1,8 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed"
-CONFIG_SPL=y
CONFIG_SYS_NO_FLASH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 817ccc1..9f5acbf 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -2,11 +2,11 @@
CONFIG_SYS_CONFIG_NAME="zynq_zc70x"
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_NO_FLASH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index d9c1d64..1a44c20 100644
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -2,11 +2,11 @@
CONFIG_SYS_CONFIG_NAME="zynq_zc70x"
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_NO_FLASH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig
index 9664b92..a1a2fe4 100644
--- a/configs/zynq_zc770_xm010_defconfig
+++ b/configs/zynq_zc770_xm010_defconfig
@@ -1,12 +1,12 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010"
CONFIG_SYS_NO_FLASH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig
index 98a348e..b841fdc 100644
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -1,12 +1,12 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM011"
CONFIG_SYS_NO_FLASH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig
index 00e2e6f..3436c9d 100644
--- a/configs/zynq_zc770_xm012_defconfig
+++ b/configs/zynq_zc770_xm012_defconfig
@@ -1,11 +1,11 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm012"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012"
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_GPIO=y
diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig
index 1b78fdf..7a43e68f 100644
--- a/configs/zynq_zc770_xm013_defconfig
+++ b/configs/zynq_zc770_xm013_defconfig
@@ -1,12 +1,12 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm013"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013"
CONFIG_SYS_NO_FLASH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig
index 22d3419..0f4e308 100644
--- a/configs/zynq_zed_defconfig
+++ b/configs/zynq_zed_defconfig
@@ -1,11 +1,11 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zed"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_NO_FLASH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig
index 4b85cdb..e5ecb79 100644
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@@ -2,11 +2,11 @@
CONFIG_SYS_CONFIG_NAME="zynq_zybo"
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zybo"
-CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_NO_FLASH=y
+CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
diff --git a/doc/README.boston b/doc/README.boston
new file mode 100644
index 0000000..38f6710
--- /dev/null
+++ b/doc/README.boston
@@ -0,0 +1,58 @@
+MIPS Boston Development Board
+
+---------
+ About
+---------
+
+The MIPS Boston development board is built around an FPGA & 3 PCIe controllers,
+one of which is connected to an Intel EG20T Platform Controller Hub which
+provides most connectivity to the board. It is used during the development &
+testing of both new CPUs and the software support for them. It is essentially
+the successor of the older MIPS Malta board.
+
+--------
+ QEMU
+--------
+
+U-Boot can be run on a currently out-of-tree branch of QEMU with support for
+the Boston board added. This QEMU code can currently be found in the "boston"
+branch of git://git.linux-mips.org/pub/scm/paul/qemu.git and used like so:
+
+ $ git clone git://git.linux-mips.org/pub/scm/paul/qemu.git -b boston
+ $ cd qemu
+ $ ./configure --target-list=mips64el-softmmu
+ $ make
+ $ ./mips64el-softmmu/qemu-system-mips64el -M boston -m 2G \
+ -bios u-boot.bin -serial stdio
+
+Please note that QEMU will default to emulating the I6400 CPU which implements
+the MIPS64r6 ISA, and at the time of writing doesn't implement any earlier CPUs
+with support for the CPS features the Boston board relies upon. You will
+therefore need to configure U-Boot to build for MIPSr6 in order to obtain a
+binary that will work in QEMU.
+
+-------------
+ Toolchain
+-------------
+
+If building for MIPSr6 then you will need a toolchain including GCC 5.x or
+newer, or the Codescape toolchain available for download from Imagination
+Technologies:
+
+ http://codescape-mips-sdk.imgtec.com/components/toolchain/2015.06-05/
+
+The "IMG GNU Linux Toolchain" is capable of building for all current MIPS ISAs,
+architecture revisions & both endiannesses.
+
+--------
+ TODO
+--------
+
+ - AHCI support
+ - CPU driver
+ - Exception handling (+UHI?)
+ - Flash support
+ - IOCU support
+ - L2 cache support
+ - More general LCD display driver
+ - Multi-arch-variant multi-endian fat binary
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 4f84469..4c555a0 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -20,6 +20,8 @@
source "drivers/dma/Kconfig"
+source "drivers/fpga/Kconfig"
+
source "drivers/gpio/Kconfig"
source "drivers/hwmon/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 7861d34..ca982731 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -40,8 +40,22 @@
obj-$(CONFIG_SPL_SATA_SUPPORT) += block/
obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
+endif
+
+ifdef CONFIG_TPL_BUILD
+
+obj-$(CONFIG_TPL_I2C_SUPPORT) += i2c/
+obj-$(CONFIG_TPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/
+obj-$(CONFIG_TPL_MMC_SUPPORT) += mmc/
+obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
+obj-$(CONFIG_TPL_NAND_SUPPORT) += mtd/nand/
+obj-$(CONFIG_TPL_SERIAL_SUPPORT) += serial/
+obj-$(CONFIG_TPL_SPI_FLASH_SUPPORT) += mtd/spi/
+obj-$(CONFIG_TPL_SPI_SUPPORT) += spi/
+
+endif
-else
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
obj-y += adc/
obj-$(CONFIG_DM_DEMO) += demo/
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index e3e783a..2e1ddf9 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -13,7 +13,7 @@
#include <dm.h>
#include <pci.h>
#include <asm/processor.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <malloc.h>
#include <memalign.h>
diff --git a/drivers/block/dwc_ahsata.c b/drivers/block/dwc_ahsata.c
index 6056fe5..c306e92 100644
--- a/drivers/block/dwc_ahsata.c
+++ b/drivers/block/dwc_ahsata.c
@@ -13,7 +13,7 @@
#include <common.h>
#include <malloc.h>
#include <linux/ctype.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <linux/bitops.h>
#include <asm/arch/clock.h>
diff --git a/drivers/block/pata_bfin.c b/drivers/block/pata_bfin.c
index 26569d7..36a1512 100644
--- a/drivers/block/pata_bfin.c
+++ b/drivers/block/pata_bfin.c
@@ -14,7 +14,7 @@
#include <asm/byteorder.h>
#include <asm/clock.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/portmux.h>
#include <asm/mach-common/bits/pata.h>
#include <ata.h>
diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c
index ac28f83..36c2ff3 100644
--- a/drivers/block/sandbox.c
+++ b/drivers/block/sandbox.c
@@ -12,7 +12,7 @@
#include <os.h>
#include <malloc.h>
#include <sandboxblockdev.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <dm/device-internal.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/block/sata_dwc.c b/drivers/block/sata_dwc.c
index b14985a..a226ca2 100644
--- a/drivers/block/sata_dwc.c
+++ b/drivers/block/sata_dwc.c
@@ -26,7 +26,7 @@
#include <command.h>
#include <pci.h>
#include <asm/processor.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <malloc.h>
#include <ata.h>
diff --git a/drivers/block/sata_mv.c b/drivers/block/sata_mv.c
index 8824934..414d2dc 100644
--- a/drivers/block/sata_mv.c
+++ b/drivers/block/sata_mv.c
@@ -37,7 +37,7 @@
#include <libata.h>
#include <malloc.h>
#include <sata.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <linux/mbus.h>
diff --git a/drivers/block/sym53c8xx.c b/drivers/block/sym53c8xx.c
index 5daede7..50043e6 100644
--- a/drivers/block/sym53c8xx.c
+++ b/drivers/block/sym53c8xx.c
@@ -284,9 +284,8 @@
*/
unsigned long swap_script(unsigned long val)
{
- unsigned long tmp;
- tmp = ((val>>24)&0xff) | ((val>>8)&0xff00) | ((val<<8)&0xff0000) | ((val<<24)&0xff000000);
- return tmp;
+ return ((val >> 24) & 0xff) | ((val >> 8) & 0xff00) |
+ ((val << 8) & 0xff0000) | ((val << 24) & 0xff000000);
}
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 8f3b96a..c05ce2a 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -20,6 +20,14 @@
setting up clocks within SPL, and allows the same drivers to be
used as U-Boot proper.
+config CLK_BOSTON
+ def_bool y if TARGET_BOSTON
+ depends on CLK
+ select REGMAP
+ select SYSCON
+ help
+ Enable this to support the clocks
+
source "drivers/clk/tegra/Kconfig"
source "drivers/clk/uniphier/Kconfig"
source "drivers/clk/exynos/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 778d748..40a5e8c 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -15,3 +15,4 @@
obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
obj-$(CONFIG_CLK_EXYNOS) += exynos/
obj-$(CONFIG_CLK_AT91) += at91/
+obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c
new file mode 100644
index 0000000..78f1b75
--- /dev/null
+++ b/drivers/clk/clk_boston.c
@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <dt-bindings/clock/boston-clock.h>
+#include <regmap.h>
+#include <syscon.h>
+
+struct clk_boston {
+ struct regmap *regmap;
+};
+
+#define BOSTON_PLAT_MMCMDIV 0x30
+# define BOSTON_PLAT_MMCMDIV_CLK0DIV (0xff << 0)
+# define BOSTON_PLAT_MMCMDIV_INPUT (0xff << 8)
+# define BOSTON_PLAT_MMCMDIV_MUL (0xff << 16)
+# define BOSTON_PLAT_MMCMDIV_CLK1DIV (0xff << 24)
+
+static uint32_t ext_field(uint32_t val, uint32_t mask)
+{
+ return (val & mask) >> (ffs(mask) - 1);
+}
+
+static ulong clk_boston_get_rate(struct clk *clk)
+{
+ struct clk_boston *state = dev_get_platdata(clk->dev);
+ uint32_t in_rate, mul, div;
+ uint mmcmdiv;
+ int err;
+
+ err = regmap_read(state->regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv);
+ if (err)
+ return 0;
+
+ in_rate = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT);
+ mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL);
+
+ switch (clk->id) {
+ case BOSTON_CLK_SYS:
+ div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV);
+ break;
+ case BOSTON_CLK_CPU:
+ div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV);
+ break;
+ default:
+ return 0;
+ }
+
+ return (in_rate * mul * 1000000) / div;
+}
+
+const struct clk_ops clk_boston_ops = {
+ .get_rate = clk_boston_get_rate,
+};
+
+static int clk_boston_ofdata_to_platdata(struct udevice *dev)
+{
+ struct clk_boston *state = dev_get_platdata(dev);
+ struct udevice *syscon;
+ int err;
+
+ err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+ "regmap", &syscon);
+ if (err) {
+ error("unable to find syscon device\n");
+ return err;
+ }
+
+ state->regmap = syscon_get_regmap(syscon);
+ if (!state->regmap) {
+ error("unable to find regmap\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id clk_boston_match[] = {
+ {
+ .compatible = "img,boston-clock",
+ },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(clk_boston) = {
+ .name = "boston_clock",
+ .id = UCLASS_CLK,
+ .of_match = clk_boston_match,
+ .ofdata_to_platdata = clk_boston_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct clk_boston),
+ .ops = &clk_boston_ops,
+};
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index c07203d..bd71a96 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -695,6 +695,8 @@
case PCLK_I2C4:
case PCLK_I2C5:
return gclk_rate;
+ case PCLK_PWM:
+ return PD_BUS_PCLK_HZ;
default:
return -ENOENT;
}
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 0b4ea82..ea0ce2a 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -23,6 +23,10 @@
ulong rate;
};
+struct rk3399_pmuclk_priv {
+ struct rk3399_pmucru *pmucru;
+};
+
struct pll_div {
u32 refdiv;
u32 fbdiv;
@@ -95,11 +99,11 @@
/* PMUCRU_CLKSEL_CON2 */
I2C_DIV_CON_MASK = 0x7f,
- I2C8_DIV_CON_SHIFT = 8,
- I2C0_DIV_CON_SHIFT = 0,
+ CLK_I2C8_DIV_CON_SHIFT = 8,
+ CLK_I2C0_DIV_CON_SHIFT = 0,
/* PMUCRU_CLKSEL_CON3 */
- I2C4_DIV_CON_SHIFT = 0,
+ CLK_I2C4_DIV_CON_SHIFT = 0,
/* CLKSEL_CON0 */
ACLKM_CORE_L_DIV_CON_SHIFT = 8,
@@ -507,6 +511,14 @@
(con >> CLK_I2C ##bus## _DIV_CON_SHIFT) & \
I2C_DIV_CON_MASK;
+#define I2C_PMUCLK_REG_MASK(bus) \
+ (I2C_DIV_CON_MASK << \
+ CLK_I2C ##bus## _DIV_CON_SHIFT)
+
+#define I2C_PMUCLK_REG_VALUE(bus, clk_div) \
+ ((clk_div - 1) << \
+ CLK_I2C ##bus## _DIV_CON_SHIFT)
+
static ulong rk3399_i2c_get_clk(struct rk3399_cru *cru, ulong clk_id)
{
u32 div, con;
@@ -754,7 +766,7 @@
break;
case DCLK_VOP0:
case DCLK_VOP1:
- rate = rk3399_vop_set_clk(priv->cru, clk->id, rate);
+ ret = rk3399_vop_set_clk(priv->cru, clk->id, rate);
break;
default:
return -ENOENT;
@@ -830,3 +842,160 @@
.bind = rk3399_clk_bind,
.probe = rk3399_clk_probe,
};
+
+static ulong rk3399_i2c_get_pmuclk(struct rk3399_pmucru *pmucru, ulong clk_id)
+{
+ u32 div, con;
+
+ switch (clk_id) {
+ case SCLK_I2C0_PMU:
+ con = readl(&pmucru->pmucru_clksel[2]);
+ div = I2C_CLK_DIV_VALUE(con, 0);
+ break;
+ case SCLK_I2C4_PMU:
+ con = readl(&pmucru->pmucru_clksel[3]);
+ div = I2C_CLK_DIV_VALUE(con, 4);
+ break;
+ case SCLK_I2C8_PMU:
+ con = readl(&pmucru->pmucru_clksel[2]);
+ div = I2C_CLK_DIV_VALUE(con, 8);
+ break;
+ default:
+ printf("do not support this i2c bus\n");
+ return -EINVAL;
+ }
+
+ return DIV_TO_RATE(PPLL_HZ, div);
+}
+
+static ulong rk3399_i2c_set_pmuclk(struct rk3399_pmucru *pmucru, ulong clk_id,
+ uint hz)
+{
+ int src_clk_div;
+
+ src_clk_div = PPLL_HZ / hz;
+ assert(src_clk_div - 1 < 127);
+
+ switch (clk_id) {
+ case SCLK_I2C0_PMU:
+ rk_clrsetreg(&pmucru->pmucru_clksel[2], I2C_PMUCLK_REG_MASK(0),
+ I2C_PMUCLK_REG_VALUE(0, src_clk_div));
+ break;
+ case SCLK_I2C4_PMU:
+ rk_clrsetreg(&pmucru->pmucru_clksel[3], I2C_PMUCLK_REG_MASK(4),
+ I2C_PMUCLK_REG_VALUE(4, src_clk_div));
+ break;
+ case SCLK_I2C8_PMU:
+ rk_clrsetreg(&pmucru->pmucru_clksel[2], I2C_PMUCLK_REG_MASK(8),
+ I2C_PMUCLK_REG_VALUE(8, src_clk_div));
+ break;
+ default:
+ printf("do not support this i2c bus\n");
+ return -EINVAL;
+ }
+
+ return DIV_TO_RATE(PPLL_HZ, src_clk_div);
+}
+
+static ulong rk3399_pwm_get_clk(struct rk3399_pmucru *pmucru)
+{
+ u32 div, con;
+
+ /* PWM closk rate is same as pclk_pmu */
+ con = readl(&pmucru->pmucru_clksel[0]);
+ div = con & PMU_PCLK_DIV_CON_MASK;
+
+ return DIV_TO_RATE(PPLL_HZ, div);
+}
+
+static ulong rk3399_pmuclk_get_rate(struct clk *clk)
+{
+ struct rk3399_pmuclk_priv *priv = dev_get_priv(clk->dev);
+ ulong rate = 0;
+
+ switch (clk->id) {
+ case PCLK_RKPWM_PMU:
+ rate = rk3399_pwm_get_clk(priv->pmucru);
+ break;
+ case SCLK_I2C0_PMU:
+ case SCLK_I2C4_PMU:
+ case SCLK_I2C8_PMU:
+ rate = rk3399_i2c_get_pmuclk(priv->pmucru, clk->id);
+ break;
+ default:
+ return -ENOENT;
+ }
+
+ return rate;
+}
+
+static ulong rk3399_pmuclk_set_rate(struct clk *clk, ulong rate)
+{
+ struct rk3399_pmuclk_priv *priv = dev_get_priv(clk->dev);
+ ulong ret = 0;
+
+ switch (clk->id) {
+ case SCLK_I2C0_PMU:
+ case SCLK_I2C4_PMU:
+ case SCLK_I2C8_PMU:
+ ret = rk3399_i2c_set_pmuclk(priv->pmucru, clk->id, rate);
+ break;
+ default:
+ return -ENOENT;
+ }
+
+ return ret;
+}
+
+static struct clk_ops rk3399_pmuclk_ops = {
+ .get_rate = rk3399_pmuclk_get_rate,
+ .set_rate = rk3399_pmuclk_set_rate,
+};
+
+static void pmuclk_init(struct rk3399_pmucru *pmucru)
+{
+ u32 pclk_div;
+
+ /* configure pmu pll(ppll) */
+ rkclk_set_pll(&pmucru->ppll_con[0], &ppll_init_cfg);
+
+ /* configure pmu pclk */
+ pclk_div = PPLL_HZ / PMU_PCLK_HZ - 1;
+ assert((pclk_div + 1) * PMU_PCLK_HZ == PPLL_HZ && pclk_div < 0x1f);
+ rk_clrsetreg(&pmucru->pmucru_clksel[0],
+ PMU_PCLK_DIV_CON_MASK,
+ pclk_div << PMU_PCLK_DIV_CON_SHIFT);
+}
+
+static int rk3399_pmuclk_probe(struct udevice *dev)
+{
+ struct rk3399_pmuclk_priv *priv = dev_get_priv(dev);
+
+ pmuclk_init(priv->pmucru);
+
+ return 0;
+}
+
+static int rk3399_pmuclk_ofdata_to_platdata(struct udevice *dev)
+{
+ struct rk3399_pmuclk_priv *priv = dev_get_priv(dev);
+
+ priv->pmucru = (struct rk3399_pmucru *)dev_get_addr(dev);
+
+ return 0;
+}
+
+static const struct udevice_id rk3399_pmuclk_ids[] = {
+ { .compatible = "rockchip,rk3399-pmucru" },
+ { }
+};
+
+U_BOOT_DRIVER(pmuclk_rk3399) = {
+ .name = "pmuclk_rk3399",
+ .id = UCLASS_CLK,
+ .of_match = rk3399_pmuclk_ids,
+ .priv_auto_alloc_size = sizeof(struct rk3399_pmuclk_priv),
+ .ofdata_to_platdata = rk3399_pmuclk_ofdata_to_platdata,
+ .ops = &rk3399_pmuclk_ops,
+ .probe = rk3399_pmuclk_probe,
+};
diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c
index a91924e..3948326 100644
--- a/drivers/clk/uniphier/clk-uniphier-core.c
+++ b/drivers/clk/uniphier/clk-uniphier-core.c
@@ -14,10 +14,39 @@
#include "clk-uniphier.h"
+/**
+ * struct uniphier_clk_priv - private data for UniPhier clock driver
+ *
+ * @base: base address of the clock provider
+ * @socdata: SoC specific data
+ */
+struct uniphier_clk_priv {
+ void __iomem *base;
+ const struct uniphier_clk_soc_data *socdata;
+};
+
+int uniphier_clk_probe(struct udevice *dev)
+{
+ struct uniphier_clk_priv *priv = dev_get_priv(dev);
+ fdt_addr_t addr;
+
+ addr = dev_get_addr(dev->parent);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ priv->base = devm_ioremap(dev, addr, SZ_4K);
+ if (!priv->base)
+ return -ENOMEM;
+
+ priv->socdata = (void *)dev_get_driver_data(dev);
+
+ return 0;
+}
+
static int uniphier_clk_enable(struct clk *clk)
{
struct uniphier_clk_priv *priv = dev_get_priv(clk->dev);
- struct uniphier_clk_gate_data *gate = priv->socdata->gate;
+ const struct uniphier_clk_gate_data *gate = priv->socdata->gate;
unsigned int nr_gate = priv->socdata->nr_gate;
void __iomem *reg;
u32 mask, data, tmp;
@@ -44,7 +73,7 @@
static ulong uniphier_clk_get_rate(struct clk *clk)
{
struct uniphier_clk_priv *priv = dev_get_priv(clk->dev);
- struct uniphier_clk_rate_data *rdata = priv->socdata->rate;
+ const struct uniphier_clk_rate_data *rdata = priv->socdata->rate;
unsigned int nr_rdata = priv->socdata->nr_rate;
void __iomem *reg;
u32 mask, data;
@@ -78,7 +107,7 @@
static ulong uniphier_clk_set_rate(struct clk *clk, ulong rate)
{
struct uniphier_clk_priv *priv = dev_get_priv(clk->dev);
- struct uniphier_clk_rate_data *rdata = priv->socdata->rate;
+ const struct uniphier_clk_rate_data *rdata = priv->socdata->rate;
unsigned int nr_rdata = priv->socdata->nr_rate;
void __iomem *reg;
u32 mask, data, tmp;
@@ -128,20 +157,47 @@
.set_rate = uniphier_clk_set_rate,
};
-int uniphier_clk_probe(struct udevice *dev)
-{
- struct uniphier_clk_priv *priv = dev_get_priv(dev);
- fdt_addr_t addr;
-
- addr = dev_get_addr(dev);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
-
- priv->base = devm_ioremap(dev, addr, SZ_4K);
- if (!priv->base)
- return -ENOMEM;
-
- priv->socdata = (void *)dev_get_driver_data(dev);
+static const struct udevice_id uniphier_clk_match[] = {
+ {
+ .compatible = "socionext,uniphier-sld3-mio-clock",
+ .data = (ulong)&uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-ld4-mio-clock",
+ .data = (ulong)&uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pro4-mio-clock",
+ .data = (ulong)&uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-sld8-mio-clock",
+ .data = (ulong)&uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pro5-mio-clock",
+ .data = (ulong)&uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pxs2-mio-clock",
+ .data = (ulong)&uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-ld11-mio-clock",
+ .data = (ulong)&uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-ld20-mio-clock",
+ .data = (ulong)&uniphier_mio_clk_data,
+ },
+ { /* sentinel */ }
+};
- return 0;
-}
+U_BOOT_DRIVER(uniphier_clk) = {
+ .name = "uniphier-clk",
+ .id = UCLASS_CLK,
+ .of_match = uniphier_clk_match,
+ .probe = uniphier_clk_probe,
+ .priv_auto_alloc_size = sizeof(struct uniphier_clk_priv),
+ .ops = &uniphier_clk_ops,
+};
diff --git a/drivers/clk/uniphier/clk-uniphier-mio.c b/drivers/clk/uniphier/clk-uniphier-mio.c
index 2eea5eb..c1e7197 100644
--- a/drivers/clk/uniphier/clk-uniphier-mio.c
+++ b/drivers/clk/uniphier/clk-uniphier-mio.c
@@ -115,7 +115,7 @@
.data = 0x00020000, \
}
-static struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = {
+static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = {
UNIPHIER_MIO_CLK_GATE_SD(0, 0),
UNIPHIER_MIO_CLK_GATE_SD(1, 1),
UNIPHIER_MIO_CLK_GATE_SD(2, 2), /* for PH1-Pro4 only */
@@ -126,60 +126,15 @@
UNIPHIER_MIO_CLK_GATE_USB(3, 7), /* for PH1-sLD3 only */
};
-static struct uniphier_clk_rate_data uniphier_mio_clk_rate[] = {
+static const struct uniphier_clk_rate_data uniphier_mio_clk_rate[] = {
UNIPHIER_MIO_CLK_RATE_SD(0, 0),
UNIPHIER_MIO_CLK_RATE_SD(1, 1),
UNIPHIER_MIO_CLK_RATE_SD(2, 2), /* for PH1-Pro4 only */
};
-static struct uniphier_clk_soc_data uniphier_mio_clk_data = {
+const struct uniphier_clk_soc_data uniphier_mio_clk_data = {
.gate = uniphier_mio_clk_gate,
.nr_gate = ARRAY_SIZE(uniphier_mio_clk_gate),
.rate = uniphier_mio_clk_rate,
.nr_rate = ARRAY_SIZE(uniphier_mio_clk_rate),
};
-
-static const struct udevice_id uniphier_mio_clk_match[] = {
- {
- .compatible = "socionext,ph1-sld3-mioctrl",
- .data = (ulong)&uniphier_mio_clk_data,
- },
- {
- .compatible = "socionext,ph1-ld4-mioctrl",
- .data = (ulong)&uniphier_mio_clk_data,
- },
- {
- .compatible = "socionext,ph1-pro4-mioctrl",
- .data = (ulong)&uniphier_mio_clk_data,
- },
- {
- .compatible = "socionext,ph1-sld8-mioctrl",
- .data = (ulong)&uniphier_mio_clk_data,
- },
- {
- .compatible = "socionext,ph1-pro5-mioctrl",
- .data = (ulong)&uniphier_mio_clk_data,
- },
- {
- .compatible = "socionext,proxstream2-mioctrl",
- .data = (ulong)&uniphier_mio_clk_data,
- },
- {
- .compatible = "socionext,ph1-ld11-mioctrl",
- .data = (ulong)&uniphier_mio_clk_data,
- },
- {
- .compatible = "socionext,ph1-ld20-mioctrl",
- .data = (ulong)&uniphier_mio_clk_data,
- },
- { /* sentinel */ }
-};
-
-U_BOOT_DRIVER(uniphier_mio_clk) = {
- .name = "uniphier-mio-clk",
- .id = UCLASS_CLK,
- .of_match = uniphier_mio_clk_match,
- .probe = uniphier_clk_probe,
- .priv_auto_alloc_size = sizeof(struct uniphier_clk_priv),
- .ops = &uniphier_clk_ops,
-};
diff --git a/drivers/clk/uniphier/clk-uniphier.h b/drivers/clk/uniphier/clk-uniphier.h
index 18aa888..0b60337 100644
--- a/drivers/clk/uniphier/clk-uniphier.h
+++ b/drivers/clk/uniphier/clk-uniphier.h
@@ -27,9 +27,9 @@
};
struct uniphier_clk_soc_data {
- struct uniphier_clk_gate_data *gate;
+ const struct uniphier_clk_gate_data *gate;
unsigned int nr_gate;
- struct uniphier_clk_rate_data *rate;
+ const struct uniphier_clk_rate_data *rate;
unsigned int nr_rate;
};
@@ -40,18 +40,6 @@
.rate = f, \
}
-/**
- * struct uniphier_clk_priv - private data for UniPhier clock driver
- *
- * @base: base address of the clock provider
- * @socdata: SoC specific data
- */
-struct uniphier_clk_priv {
- void __iomem *base;
- struct uniphier_clk_soc_data *socdata;
-};
-
-extern const struct clk_ops uniphier_clk_ops;
-int uniphier_clk_probe(struct udevice *dev);
+extern const struct uniphier_clk_soc_data uniphier_mio_clk_data;
#endif /* __CLK_UNIPHIER_H__ */
diff --git a/drivers/core/lists.c b/drivers/core/lists.c
index 6a634e6..23b6ba7 100644
--- a/drivers/core/lists.c
+++ b/drivers/core/lists.c
@@ -101,36 +101,24 @@
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
/**
- * driver_check_compatible() - Check if a driver is compatible with this node
+ * driver_check_compatible() - Check if a driver matches a compatible string
*
- * @param blob: Device tree pointer
- * @param offset: Offset of node in device tree
* @param of_match: List of compatible strings to match
* @param of_idp: Returns the match that was found
- * @return 0 if there is a match, -ENOENT if no match, -ENODEV if the node
- * does not have a compatible string, other error <0 if there is a device
- * tree error
+ * @param compat: The compatible string to search for
+ * @return 0 if there is a match, -ENOENT if no match
*/
-static int driver_check_compatible(const void *blob, int offset,
- const struct udevice_id *of_match,
- const struct udevice_id **of_idp)
+static int driver_check_compatible(const struct udevice_id *of_match,
+ const struct udevice_id **of_idp,
+ const char *compat)
{
- int ret;
-
- *of_idp = NULL;
if (!of_match)
return -ENOENT;
while (of_match->compatible) {
- ret = fdt_node_check_compatible(blob, offset,
- of_match->compatible);
- if (!ret) {
+ if (!strcmp(of_match->compatible, compat)) {
*of_idp = of_match;
return 0;
- } else if (ret == -FDT_ERR_NOTFOUND) {
- return -ENODEV;
- } else if (ret < 0) {
- return -EINVAL;
}
of_match++;
}
@@ -147,28 +135,46 @@
struct driver *entry;
struct udevice *dev;
bool found = false;
- const char *name;
+ const char *name, *compat_list, *compat;
+ int compat_length, i;
int result = 0;
int ret = 0;
- dm_dbg("bind node %s\n", fdt_get_name(blob, offset, NULL));
+ name = fdt_get_name(blob, offset, NULL);
+ dm_dbg("bind node %s\n", name);
if (devp)
*devp = NULL;
- for (entry = driver; entry != driver + n_ents; entry++) {
- ret = driver_check_compatible(blob, offset, entry->of_match,
- &id);
- name = fdt_get_name(blob, offset, NULL);
- if (ret == -ENOENT) {
- continue;
- } else if (ret == -ENODEV) {
+
+ compat_list = fdt_getprop(blob, offset, "compatible", &compat_length);
+ if (!compat_list) {
+ if (compat_length == -FDT_ERR_NOTFOUND) {
dm_dbg("Device '%s' has no compatible string\n", name);
- break;
- } else if (ret) {
- dm_warn("Device tree error at offset %d\n", offset);
- result = ret;
- break;
+ return 0;
}
+ dm_warn("Device tree error at offset %d\n", offset);
+ return compat_length;
+ }
+
+ /*
+ * Walk through the compatible string list, attempting to match each
+ * compatible string in order such that we match in order of priority
+ * from the first string to the last.
+ */
+ for (i = 0; i < compat_length; i += strlen(compat) + 1) {
+ compat = compat_list + i;
+ dm_dbg(" - attempt to match compatible string '%s'\n",
+ compat);
+
+ for (entry = driver; entry != driver + n_ents; entry++) {
+ ret = driver_check_compatible(entry->of_match, &id,
+ compat);
+ if (!ret)
+ break;
+ }
+ if (entry == driver + n_ents)
+ continue;
+
dm_dbg(" - found match at '%s'\n", entry->name);
ret = device_bind_with_driver_data(parent, entry, name,
id->data, offset, &dev);
@@ -188,10 +194,8 @@
break;
}
- if (!found && !result && ret != -ENODEV) {
- dm_dbg("No match for node '%s'\n",
- fdt_get_name(blob, offset, NULL));
- }
+ if (!found && !result && ret != -ENODEV)
+ dm_dbg("No match for node '%s'\n", name);
return result;
}
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 0299ff0..c68bcba 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -13,6 +13,8 @@
#include <mapmem.h>
#include <regmap.h>
+#include <asm/io.h>
+
DECLARE_GLOBAL_DATA_PTR;
static struct regmap *regmap_alloc_count(int count)
@@ -117,3 +119,21 @@
return 0;
}
+
+int regmap_read(struct regmap *map, uint offset, uint *valp)
+{
+ uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE);
+
+ *valp = le32_to_cpu(readl(ptr));
+
+ return 0;
+}
+
+int regmap_write(struct regmap *map, uint offset, uint val)
+{
+ uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE);
+
+ writel(cpu_to_le32(val), ptr);
+
+ return 0;
+}
diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
index 01bd968..2148469 100644
--- a/drivers/core/syscon-uclass.c
+++ b/drivers/core/syscon-uclass.c
@@ -95,3 +95,14 @@
.per_device_auto_alloc_size = sizeof(struct syscon_uc_info),
.pre_probe = syscon_pre_probe,
};
+
+static const struct udevice_id generic_syscon_ids[] = {
+ { .compatible = "syscon" },
+ { }
+};
+
+U_BOOT_DRIVER(generic_syscon) = {
+ .name = "syscon",
+ .id = UCLASS_SYSCON,
+ .of_match = generic_syscon_ids,
+};
diff --git a/drivers/crypto/ace_sha.c b/drivers/crypto/ace_sha.c
index efef491..8f3b8b2 100644
--- a/drivers/crypto/ace_sha.c
+++ b/drivers/crypto/ace_sha.c
@@ -10,7 +10,7 @@
#ifdef CONFIG_SHA_HW_ACCEL
#include <u-boot/sha256.h>
#include <u-boot/sha1.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
/* SHA1 value for the message of zero length */
static const unsigned char sha1_digest_emptymsg[SHA1_SUM_LEN] = {
diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c
index d24b8fc..38c6f94 100644
--- a/drivers/crypto/fsl/fsl_blob.c
+++ b/drivers/crypto/fsl/fsl_blob.c
@@ -8,7 +8,7 @@
#include <common.h>
#include <malloc.h>
#include <fsl_sec.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include "jobdesc.h"
#include "desc.h"
#include "jr.h"
diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index 887e88c..a63eba3 100644
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -12,7 +12,7 @@
#include "jr.h"
#include "fsl_hash.h"
#include <hw_sha.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#define CRYPTO_MAX_ALG_NAME 80
#define SHA1_DIGEST_SIZE 20
diff --git a/drivers/ddr/fsl/ddr1_dimm_params.c b/drivers/ddr/fsl/ddr1_dimm_params.c
index 00cdc22..369b325 100644
--- a/drivers/ddr/fsl/ddr1_dimm_params.c
+++ b/drivers/ddr/fsl/ddr1_dimm_params.c
@@ -108,22 +108,14 @@
static unsigned int
compute_trfc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trfc)
{
- unsigned int trfc_ps;
-
- trfc_ps = (((trctrfc_ext & 0x1) * 256) + trfc) * 1000
+ return ((trctrfc_ext & 0x1) * 256 + trfc) * 1000
+ byte40_table_ps[(trctrfc_ext >> 1) & 0x7];
-
- return trfc_ps;
}
static unsigned int
compute_trc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trc)
{
- unsigned int trc_ps;
-
- trc_ps = trc * 1000 + byte40_table_ps[(trctrfc_ext >> 4) & 0x7];
-
- return trc_ps;
+ return trc * 1000 + byte40_table_ps[(trctrfc_ext >> 4) & 0x7];
}
/*
diff --git a/drivers/ddr/fsl/ddr2_dimm_params.c b/drivers/ddr/fsl/ddr2_dimm_params.c
index 59baf6b..af752cc 100644
--- a/drivers/ddr/fsl/ddr2_dimm_params.c
+++ b/drivers/ddr/fsl/ddr2_dimm_params.c
@@ -107,22 +107,14 @@
static unsigned int
compute_trfc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trfc)
{
- unsigned int trfc_ps;
-
- trfc_ps = (((trctrfc_ext & 0x1) * 256) + trfc) * 1000
+ return (((trctrfc_ext & 0x1) * 256) + trfc) * 1000
+ byte40_table_ps[(trctrfc_ext >> 1) & 0x7];
-
- return trfc_ps;
}
static unsigned int
compute_trc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trc)
{
- unsigned int trc_ps;
-
- trc_ps = trc * 1000 + byte40_table_ps[(trctrfc_ext >> 4) & 0x7];
-
- return trc_ps;
+ return trc * 1000 + byte40_table_ps[(trctrfc_ext >> 4) & 0x7];
}
/*
diff --git a/drivers/ddr/marvell/a38x/ddr3_a38x.c b/drivers/ddr/marvell/a38x/ddr3_a38x.c
index f469907..c082122 100644
--- a/drivers/ddr/marvell/a38x/ddr3_a38x.c
+++ b/drivers/ddr/marvell/a38x/ddr3_a38x.c
@@ -706,11 +706,7 @@
int ddr3_silicon_pre_init(void)
{
- int result;
-
- result = ddr3_silicon_init();
-
- return result;
+ return ddr3_silicon_init();
}
int ddr3_post_run_alg(void)
diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index a6dc935..a97fa85 100644
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -14,7 +14,7 @@
#include <common.h>
#include <malloc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
new file mode 100644
index 0000000..f3f6bf7
--- /dev/null
+++ b/drivers/fpga/Kconfig
@@ -0,0 +1,20 @@
+menu "FPGA support"
+
+config FPGA
+ bool
+
+config FPGA_XILINX
+ bool "Enable Xilinx FPGA drivers"
+ select FPGA
+ help
+ Enable Xilinx FPGA specific functions which includes bitstream
+ (in BIT format), fpga and device validation.
+
+config FPGA_ZYNQMPPL
+ bool "Enable Xilinx FPGA driver for ZynqMP"
+ depends on FPGA_XILINX
+ help
+ Enable FPGA driver for loading bitstream in BIT and BIN format
+ on Xilinx Zynq UltraScale+ (ZynqMP) device.
+
+endmenu
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index fec3fec..777706f 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@
obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
obj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
obj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o
+obj-$(CONFIG_FPGA_ZYNQMPPL) += zynqmppl.o
obj-$(CONFIG_FPGA_XILINX) += xilinx.o
obj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
ifdef CONFIG_FPGA_ALTERA
diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
index 4448250..f1b2f2c 100644
--- a/drivers/fpga/socfpga.c
+++ b/drivers/fpga/socfpga.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/fpga_manager.h>
#include <asm/arch/reset_manager.h>
#include <asm/arch/system_manager.h>
diff --git a/drivers/fpga/stratixv.c b/drivers/fpga/stratixv.c
index cc035eb..9a81aca 100644
--- a/drivers/fpga/stratixv.c
+++ b/drivers/fpga/stratixv.c
@@ -8,7 +8,7 @@
#include <altera.h>
#include <spi.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
/* Write the RBF data to FPGA via SPI */
static int program_write(int spi_bus, int spi_dev, const void *rbf_data,
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index d459a2f..2cd0104 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -199,6 +199,9 @@
case xilinx_zynq:
printf("Zynq PL\n");
break;
+ case xilinx_zynqmp:
+ printf("ZynqMP PL\n");
+ break;
/* Add new family types here */
default:
printf ("Unknown family type, %d\n", desc->family);
@@ -227,6 +230,9 @@
case devcfg:
printf("Device configuration interface (Zynq)\n");
break;
+ case csu_dma:
+ printf("csu_dma configuration interface (ZynqMP)\n");
+ break;
/* Add new interface types here */
default:
printf ("Unsupported interface type, %d\n", desc->iface);
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
new file mode 100644
index 0000000..23039c3
--- /dev/null
+++ b/drivers/fpga/zynqmppl.c
@@ -0,0 +1,238 @@
+/*
+ * (C) Copyright 2015 - 2016, Xilinx, Inc,
+ * Michal Simek <michal.simek@xilinx.com>
+ * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <console.h>
+#include <common.h>
+#include <zynqmppl.h>
+#include <linux/sizes.h>
+
+#define DUMMY_WORD 0xffffffff
+
+/* Xilinx binary format header */
+static const u32 bin_format[] = {
+ DUMMY_WORD, /* Dummy words */
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ DUMMY_WORD,
+ 0x000000bb, /* Sync word */
+ 0x11220044, /* Sync word */
+ DUMMY_WORD,
+ DUMMY_WORD,
+ 0xaa995566, /* Sync word */
+};
+
+#define SWAP_NO 1
+#define SWAP_DONE 2
+
+/*
+ * Load the whole word from unaligned buffer
+ * Keep in your mind that it is byte loading on little-endian system
+ */
+static u32 load_word(const void *buf, u32 swap)
+{
+ u32 word = 0;
+ u8 *bitc = (u8 *)buf;
+ int p;
+
+ if (swap == SWAP_NO) {
+ for (p = 0; p < 4; p++) {
+ word <<= 8;
+ word |= bitc[p];
+ }
+ } else {
+ for (p = 3; p >= 0; p--) {
+ word <<= 8;
+ word |= bitc[p];
+ }
+ }
+
+ return word;
+}
+
+static u32 check_header(const void *buf)
+{
+ u32 i, pattern;
+ int swap = SWAP_NO;
+ u32 *test = (u32 *)buf;
+
+ debug("%s: Let's check bitstream header\n", __func__);
+
+ /* Checking that passing bin is not a bitstream */
+ for (i = 0; i < ARRAY_SIZE(bin_format); i++) {
+ pattern = load_word(&test[i], swap);
+
+ /*
+ * Bitstreams in binary format are swapped
+ * compare to regular bistream.
+ * Do not swap dummy word but if swap is done assume
+ * that parsing buffer is binary format
+ */
+ if ((__swab32(pattern) != DUMMY_WORD) &&
+ (__swab32(pattern) == bin_format[i])) {
+ swap = SWAP_DONE;
+ debug("%s: data swapped - let's swap\n", __func__);
+ }
+
+ debug("%s: %d/%px: pattern %x/%x bin_format\n", __func__, i,
+ &test[i], pattern, bin_format[i]);
+ }
+ debug("%s: Found bitstream header at %px %s swapinng\n", __func__,
+ buf, swap == SWAP_NO ? "without" : "with");
+
+ return swap;
+}
+
+static void *check_data(u8 *buf, size_t bsize, u32 *swap)
+{
+ u32 word, p = 0; /* possition */
+
+ /* Because buf doesn't need to be aligned let's read it by chars */
+ for (p = 0; p < bsize; p++) {
+ word = load_word(&buf[p], SWAP_NO);
+ debug("%s: word %x %x/%px\n", __func__, word, p, &buf[p]);
+
+ /* Find the first bitstream dummy word */
+ if (word == DUMMY_WORD) {
+ debug("%s: Found dummy word at position %x/%px\n",
+ __func__, p, &buf[p]);
+ *swap = check_header(&buf[p]);
+ if (*swap) {
+ /* FIXME add full bitstream checking here */
+ return &buf[p];
+ }
+ }
+ /* Loop can be huge - support CTRL + C */
+ if (ctrlc())
+ return NULL;
+ }
+ return NULL;
+}
+
+static ulong zynqmp_align_dma_buffer(u32 *buf, u32 len, u32 swap)
+{
+ u32 *new_buf;
+ u32 i;
+
+ if ((ulong)buf != ALIGN((ulong)buf, ARCH_DMA_MINALIGN)) {
+ new_buf = (u32 *)ALIGN((ulong)buf, ARCH_DMA_MINALIGN);
+
+ /*
+ * This might be dangerous but permits to flash if
+ * ARCH_DMA_MINALIGN is greater than header size
+ */
+ if (new_buf > (u32 *)buf) {
+ debug("%s: Aligned buffer is after buffer start\n",
+ __func__);
+ new_buf -= ARCH_DMA_MINALIGN;
+ }
+ printf("%s: Align buffer at %px to %px(swap %d)\n", __func__,
+ buf, new_buf, swap);
+
+ for (i = 0; i < (len/4); i++)
+ new_buf[i] = load_word(&buf[i], swap);
+
+ buf = new_buf;
+ } else if (swap != SWAP_DONE) {
+ /* For bitstream which are aligned */
+ u32 *new_buf = (u32 *)buf;
+
+ printf("%s: Bitstream is not swapped(%d) - swap it\n", __func__,
+ swap);
+
+ for (i = 0; i < (len/4); i++)
+ new_buf[i] = load_word(&buf[i], swap);
+ }
+
+ return (ulong)buf;
+}
+
+static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf,
+ size_t bsize, u32 blocksize, u32 *swap)
+{
+ ulong *buf_start;
+ ulong diff;
+
+ buf_start = check_data((u8 *)buf, blocksize, swap);
+
+ if (!buf_start)
+ return FPGA_FAIL;
+
+ /* Check if data is postpone from start */
+ diff = (ulong)buf_start - (ulong)buf;
+ if (diff) {
+ printf("%s: Bitstream is not validated yet (diff %lx)\n",
+ __func__, diff);
+ return FPGA_FAIL;
+ }
+
+ if ((ulong)buf < SZ_1M) {
+ printf("%s: Bitstream has to be placed up to 1MB (%px)\n",
+ __func__, buf);
+ return FPGA_FAIL;
+ }
+
+ return 0;
+}
+
+static int invoke_smc(ulong id, ulong reg0, ulong reg1, ulong reg2)
+{
+ struct pt_regs regs;
+ regs.regs[0] = id;
+ regs.regs[1] = reg0;
+ regs.regs[2] = reg1;
+ regs.regs[3] = reg2;
+
+ smc_call(®s);
+
+ return regs.regs[0];
+}
+
+static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
+ bitstream_type bstype)
+{
+ u32 swap;
+ ulong bin_buf, flags;
+ int ret;
+
+ if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap))
+ return FPGA_FAIL;
+
+ bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
+
+ debug("%s called!\n", __func__);
+ flush_dcache_range(bin_buf, bin_buf + bsize);
+
+ if (bsize % 4)
+ bsize = bsize / 4 + 1;
+ else
+ bsize = bsize / 4;
+
+ flags = (u32)bsize | ((u64)bstype << 32);
+
+ ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, bin_buf, flags, 0);
+ if (ret)
+ debug("PL FPGA LOAD fail\n");
+
+ return ret;
+}
+
+struct xilinx_fpga_op zynqmp_op = {
+ .load = zynqmp_load,
+};
diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c
index 88cd65b..4db08a3 100644
--- a/drivers/gpio/adi_gpio2.c
+++ b/drivers/gpio/adi_gpio2.c
@@ -8,7 +8,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#define RESOURCE_LABEL_SIZE 16
diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c
index afb27a3..ad11764 100644
--- a/drivers/gpio/gpio-uniphier.c
+++ b/drivers/gpio/gpio-uniphier.c
@@ -10,7 +10,7 @@
#include <linux/bitops.h>
#include <linux/io.h>
#include <linux/sizes.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#define UNIPHIER_GPIO_PORTS_PER_BANK 8
diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c
index 888aa07..8bfbc3a 100644
--- a/drivers/gpio/mvgpio.c
+++ b/drivers/gpio/mvgpio.c
@@ -11,7 +11,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "mvgpio.h"
#include <asm/gpio.h>
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index c25b4c1..367b852 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -8,7 +8,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/iomux.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index cd960dc..f906b97 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -23,7 +23,7 @@
#include <fdtdec.h>
#include <asm/gpio.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/gpio/pca9698.c b/drivers/gpio/pca9698.c
index 3152bf6..d2663f7 100644
--- a/drivers/gpio/pca9698.c
+++ b/drivers/gpio/pca9698.c
@@ -11,7 +11,7 @@
#include <common.h>
#include <i2c.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <pca9698.h>
/*
diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 64abcba..5dbd228 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <dm.h>
#include <syscon.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index 50f86d3..ff245db 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -13,7 +13,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/stm32.h>
#include <asm/arch/gpio.h>
diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c
index 4ab2356..8a448c9 100644
--- a/drivers/gpio/zynq_gpio.c
+++ b/drivers/gpio/zynq_gpio.c
@@ -12,7 +12,7 @@
#include <common.h>
#include <asm/gpio.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c
index 8e9c3ad..d71f75c 100644
--- a/drivers/i2c/at91_i2c.c
+++ b/drivers/i2c/at91_i2c.c
@@ -8,7 +8,7 @@
#include <asm/io.h>
#include <common.h>
-#include <clk_client.h>
+#include <clk.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c
index 5642cd9..f49f60b 100644
--- a/drivers/i2c/i2c-cdns.c
+++ b/drivers/i2c/i2c-cdns.c
@@ -11,7 +11,7 @@
#include <common.h>
#include <linux/types.h>
#include <linux/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <dm/device.h>
#include <dm/root.h>
#include <i2c.h>
diff --git a/drivers/i2c/i2c-uniphier-f.c b/drivers/i2c/i2c-uniphier-f.c
index a56e058..8bfa916 100644
--- a/drivers/i2c/i2c-uniphier-f.c
+++ b/drivers/i2c/i2c-uniphier-f.c
@@ -10,7 +10,7 @@
#include <linux/types.h>
#include <linux/io.h>
#include <linux/sizes.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <dm/device.h>
#include <dm/root.h>
#include <i2c.h>
diff --git a/drivers/i2c/i2c-uniphier.c b/drivers/i2c/i2c-uniphier.c
index 39a3ebd..f391f11 100644
--- a/drivers/i2c/i2c-uniphier.c
+++ b/drivers/i2c/i2c-uniphier.c
@@ -10,7 +10,7 @@
#include <linux/types.h>
#include <linux/io.h>
#include <linux/sizes.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <dm/device.h>
#include <dm/root.h>
#include <i2c.h>
diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c
index 11f29d9..1228ef3 100644
--- a/drivers/i2c/kona_i2c.c
+++ b/drivers/i2c/kona_i2c.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include <i2c.h>
diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c
index 47163cc..3e842e7 100644
--- a/drivers/i2c/lpc32xx_i2c.c
+++ b/drivers/i2c/lpc32xx_i2c.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <asm/io.h>
#include <i2c.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/clk.h>
/*
diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c
index fc02e65..7f52fa2 100644
--- a/drivers/i2c/mv_i2c.c
+++ b/drivers/i2c/mv_i2c.c
@@ -18,18 +18,11 @@
*/
#include <common.h>
-#include <asm/io.h>
-
-#ifdef CONFIG_HARD_I2C
+#include <dm.h>
#include <i2c.h>
+#include <asm/io.h>
#include "mv_i2c.h"
-#ifdef DEBUG_I2C
-#define PRINTD(x) printf x
-#else
-#define PRINTD(x)
-#endif
-
/* All transfers are described by this data structure */
struct mv_i2c_msg {
u8 condition;
@@ -38,6 +31,16 @@
u8 data;
};
+#ifdef CONFIG_ARMADA_3700
+/* Armada 3700 has no padding between the registers */
+struct mv_i2c {
+ u32 ibmr;
+ u32 idbr;
+ u32 icr;
+ u32 isr;
+ u32 isar;
+};
+#else
struct mv_i2c {
u32 ibmr;
u32 pad0;
@@ -49,64 +52,26 @@
u32 pad3;
u32 isar;
};
-
-static struct mv_i2c *base;
-static void i2c_board_init(struct mv_i2c *base)
-{
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
- u32 icr;
- /*
- * call board specific i2c bus reset routine before accessing the
- * environment, which might be in a chip on that bus. For details
- * about this problem see doc/I2C_Edge_Conditions.
- *
- * disable I2C controller first, otherwhise it thinks we want to
- * talk to the slave port...
- */
- icr = readl(&base->icr);
- writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr);
-
- i2c_init_board();
-
- writel(icr, &base->icr);
#endif
-}
-
-#ifdef CONFIG_I2C_MULTI_BUS
-static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;
-static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];
-static unsigned int current_bus;
-
-int i2c_set_bus_num(unsigned int bus)
-{
- if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) {
- printf("Bad bus: %d\n", bus);
- return -1;
- }
- base = (struct mv_i2c *)i2c_regs[bus];
- current_bus = bus;
-
- if (!bus_initialized[current_bus]) {
- i2c_board_init(base);
- bus_initialized[current_bus] = 1;
- }
-
- return 0;
-}
-
-unsigned int i2c_get_bus_num(void)
+/*
+ * Dummy implementation that can be overwritten by a board
+ * specific function
+ */
+__weak void i2c_clk_enable(void)
{
- return current_bus;
}
-#endif
/*
* i2c_reset: - reset the host controller
*
*/
-static void i2c_reset(void)
+static void i2c_reset(struct mv_i2c *base)
{
+ u32 icr_mode;
+
+ /* Save bus mode (standard or fast speed) for later use */
+ icr_mode = readl(&base->icr) & ICR_MODE_MASK;
writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */
udelay(100);
@@ -115,7 +80,8 @@
i2c_clk_enable();
writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */
- writel(I2C_ICR_INIT, &base->icr); /* set control reg values */
+ /* set control reg values */
+ writel(I2C_ICR_INIT | icr_mode, &base->icr);
writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */
writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */
udelay(100);
@@ -127,7 +93,7 @@
*
* @return: 1 in case of success, 0 means timeout (no match within 10 ms).
*/
-static int i2c_isr_set_cleared(unsigned long set_mask,
+static int i2c_isr_set_cleared(struct mv_i2c *base, unsigned long set_mask,
unsigned long cleared_mask)
{
int timeout = 1000, isr;
@@ -157,7 +123,7 @@
* -5: illegal parameters
* -6: bus is busy and couldn't be aquired
*/
-int i2c_transfer(struct mv_i2c_msg *msg)
+static int i2c_transfer(struct mv_i2c *base, struct mv_i2c_msg *msg)
{
int ret;
@@ -167,7 +133,7 @@
switch (msg->direction) {
case I2C_WRITE:
/* check if bus is not busy */
- if (!i2c_isr_set_cleared(0, ISR_IBB))
+ if (!i2c_isr_set_cleared(base, 0, ISR_IBB))
goto transfer_error_bus_busy;
/* start transmission */
@@ -186,7 +152,7 @@
writel(readl(&base->icr) | ICR_TB, &base->icr);
/* transmit register empty? */
- if (!i2c_isr_set_cleared(ISR_ITE, 0))
+ if (!i2c_isr_set_cleared(base, ISR_ITE, 0))
goto transfer_error_transmit_timeout;
/* clear 'transmit empty' state */
@@ -194,14 +160,14 @@
/* wait for ACK from slave */
if (msg->acknack == I2C_ACKNAK_WAITACK)
- if (!i2c_isr_set_cleared(0, ISR_ACKNAK))
+ if (!i2c_isr_set_cleared(base, 0, ISR_ACKNAK))
goto transfer_error_ack_missing;
break;
case I2C_READ:
/* check if bus is not busy */
- if (!i2c_isr_set_cleared(0, ISR_IBB))
+ if (!i2c_isr_set_cleared(base, 0, ISR_IBB))
goto transfer_error_bus_busy;
/* start receive */
@@ -219,7 +185,7 @@
writel(readl(&base->icr) | ICR_TB, &base->icr);
/* receive register full? */
- if (!i2c_isr_set_cleared(ISR_IRF, 0))
+ if (!i2c_isr_set_cleared(base, ISR_IRF, 0))
goto transfer_error_receive_timeout;
msg->data = readl(&base->idbr);
@@ -234,139 +200,89 @@
return 0;
transfer_error_msg_empty:
- PRINTD(("i2c_transfer: error: 'msg' is empty\n"));
- ret = -1; goto i2c_transfer_finish;
+ debug("i2c_transfer: error: 'msg' is empty\n");
+ ret = -1;
+ goto i2c_transfer_finish;
transfer_error_transmit_timeout:
- PRINTD(("i2c_transfer: error: transmit timeout\n"));
- ret = -2; goto i2c_transfer_finish;
+ debug("i2c_transfer: error: transmit timeout\n");
+ ret = -2;
+ goto i2c_transfer_finish;
transfer_error_ack_missing:
- PRINTD(("i2c_transfer: error: ACK missing\n"));
- ret = -3; goto i2c_transfer_finish;
+ debug("i2c_transfer: error: ACK missing\n");
+ ret = -3;
+ goto i2c_transfer_finish;
transfer_error_receive_timeout:
- PRINTD(("i2c_transfer: error: receive timeout\n"));
- ret = -4; goto i2c_transfer_finish;
+ debug("i2c_transfer: error: receive timeout\n");
+ ret = -4;
+ goto i2c_transfer_finish;
transfer_error_illegal_param:
- PRINTD(("i2c_transfer: error: illegal parameters\n"));
- ret = -5; goto i2c_transfer_finish;
+ debug("i2c_transfer: error: illegal parameters\n");
+ ret = -5;
+ goto i2c_transfer_finish;
transfer_error_bus_busy:
- PRINTD(("i2c_transfer: error: bus is busy\n"));
- ret = -6; goto i2c_transfer_finish;
+ debug("i2c_transfer: error: bus is busy\n");
+ ret = -6;
+ goto i2c_transfer_finish;
i2c_transfer_finish:
- PRINTD(("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr)));
- i2c_reset();
- return ret;
+ debug("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr));
+ i2c_reset(base);
+ return ret;
}
-/* ------------------------------------------------------------------------ */
-/* API Functions */
-/* ------------------------------------------------------------------------ */
-void i2c_init(int speed, int slaveaddr)
-{
-#ifdef CONFIG_I2C_MULTI_BUS
- current_bus = 0;
- base = (struct mv_i2c *)i2c_regs[current_bus];
-#else
- base = (struct mv_i2c *)CONFIG_MV_I2C_REG;
-#endif
-
- i2c_board_init(base);
-}
-
-/*
- * i2c_probe: - Test if a chip answers for a given i2c address
- *
- * @chip: address of the chip which is searched for
- * @return: 0 if a chip was found, -1 otherwhise
- */
-int i2c_probe(uchar chip)
+static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen,
+ uchar *buffer, int len)
{
struct mv_i2c_msg msg;
- i2c_reset();
-
- msg.condition = I2C_COND_START;
- msg.acknack = I2C_ACKNAK_WAITACK;
- msg.direction = I2C_WRITE;
- msg.data = (chip << 1) + 1;
- if (i2c_transfer(&msg))
- return -1;
+ debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
+ "len=0x%02x)\n", chip, *addr, alen, len);
- msg.condition = I2C_COND_STOP;
- msg.acknack = I2C_ACKNAK_SENDNAK;
- msg.direction = I2C_READ;
- msg.data = 0x00;
- if (i2c_transfer(&msg))
- return -1;
-
- return 0;
-}
-
-/*
- * i2c_read: - Read multiple bytes from an i2c device
- *
- * The higher level routines take into account that this function is only
- * called with len < page length of the device (see configuration file)
- *
- * @chip: address of the chip which is to be read
- * @addr: i2c data address within the chip
- * @alen: length of the i2c data address (1..2 bytes)
- * @buffer: where to write the data
- * @len: how much byte do we want to read
- * @return: 0 in case of success
- */
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
- struct mv_i2c_msg msg;
- u8 addr_bytes[3]; /* lowest...highest byte of data address */
-
- PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
- "len=0x%02x)\n", chip, addr, alen, len));
+ if (len == 0) {
+ printf("reading zero byte is invalid\n");
+ return -EINVAL;
+ }
- i2c_reset();
+ i2c_reset(base);
/* dummy chip address write */
- PRINTD(("i2c_read: dummy chip address write\n"));
+ debug("i2c_read: dummy chip address write\n");
msg.condition = I2C_COND_START;
msg.acknack = I2C_ACKNAK_WAITACK;
msg.direction = I2C_WRITE;
msg.data = (chip << 1);
msg.data &= 0xFE;
- if (i2c_transfer(&msg))
+ if (i2c_transfer(base, &msg))
return -1;
/*
* send memory address bytes;
* alen defines how much bytes we have to send.
*/
- /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */
- addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
- addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
- addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
-
while (--alen >= 0) {
- PRINTD(("i2c_read: send memory word address byte %1d\n", alen));
+ debug("i2c_read: send address byte %02x (alen=%d)\n",
+ *addr, alen);
msg.condition = I2C_COND_NORMAL;
msg.acknack = I2C_ACKNAK_WAITACK;
msg.direction = I2C_WRITE;
- msg.data = addr_bytes[alen];
- if (i2c_transfer(&msg))
+ msg.data = *(addr++);
+ if (i2c_transfer(base, &msg))
return -1;
}
/* start read sequence */
- PRINTD(("i2c_read: start read sequence\n"));
+ debug("i2c_read: start read sequence\n");
msg.condition = I2C_COND_START;
msg.acknack = I2C_ACKNAK_WAITACK;
msg.direction = I2C_WRITE;
msg.data = (chip << 1);
msg.data |= 0x01;
- if (i2c_transfer(&msg))
+ if (i2c_transfer(base, &msg))
return -1;
/* read bytes; send NACK at last byte */
@@ -381,75 +297,59 @@
msg.direction = I2C_READ;
msg.data = 0x00;
- if (i2c_transfer(&msg))
+ if (i2c_transfer(base, &msg))
return -1;
*buffer = msg.data;
- PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",
- (unsigned int)buffer, *buffer));
+ debug("i2c_read: reading byte (%p)=0x%02x\n",
+ buffer, *buffer);
buffer++;
}
- i2c_reset();
+ i2c_reset(base);
return 0;
}
-/*
- * i2c_write: - Write multiple bytes to an i2c device
- *
- * The higher level routines take into account that this function is only
- * called with len < page length of the device (see configuration file)
- *
- * @chip: address of the chip which is to be written
- * @addr: i2c data address within the chip
- * @alen: length of the i2c data address (1..2 bytes)
- * @buffer: where to find the data to be written
- * @len: how much byte do we want to read
- * @return: 0 in case of success
- */
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen,
+ uchar *buffer, int len)
{
struct mv_i2c_msg msg;
- u8 addr_bytes[3]; /* lowest...highest byte of data address */
- PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
- "len=0x%02x)\n", chip, addr, alen, len));
+ debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
+ "len=0x%02x)\n", chip, *addr, alen, len);
- i2c_reset();
+ i2c_reset(base);
/* chip address write */
- PRINTD(("i2c_write: chip address write\n"));
+ debug("i2c_write: chip address write\n");
msg.condition = I2C_COND_START;
msg.acknack = I2C_ACKNAK_WAITACK;
msg.direction = I2C_WRITE;
msg.data = (chip << 1);
msg.data &= 0xFE;
- if (i2c_transfer(&msg))
+ if (i2c_transfer(base, &msg))
return -1;
/*
* send memory address bytes;
* alen defines how much bytes we have to send.
*/
- addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
- addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
- addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
-
while (--alen >= 0) {
- PRINTD(("i2c_write: send memory word address\n"));
+ debug("i2c_read: send address byte %02x (alen=%d)\n",
+ *addr, alen);
msg.condition = I2C_COND_NORMAL;
msg.acknack = I2C_ACKNAK_WAITACK;
msg.direction = I2C_WRITE;
- msg.data = addr_bytes[alen];
- if (i2c_transfer(&msg))
+ msg.data = *(addr++);
+ if (i2c_transfer(base, &msg))
return -1;
}
/* write bytes; send NACK at last byte */
while (len--) {
- PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",
- (unsigned int)buffer, *buffer));
+ debug("i2c_write: writing byte (%p)=0x%02x\n",
+ buffer, *buffer);
if (len == 0)
msg.condition = I2C_COND_STOP;
@@ -460,12 +360,246 @@
msg.direction = I2C_WRITE;
msg.data = *(buffer++);
- if (i2c_transfer(&msg))
+ if (i2c_transfer(base, &msg))
return -1;
}
+ i2c_reset(base);
+
+ return 0;
+}
+
+#ifndef CONFIG_DM_I2C
+
+static struct mv_i2c *base_glob;
+
+static void i2c_board_init(struct mv_i2c *base)
+{
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+ u32 icr;
+ /*
+ * call board specific i2c bus reset routine before accessing the
+ * environment, which might be in a chip on that bus. For details
+ * about this problem see doc/I2C_Edge_Conditions.
+ *
+ * disable I2C controller first, otherwhise it thinks we want to
+ * talk to the slave port...
+ */
+ icr = readl(&base->icr);
+ writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr);
+
+ i2c_init_board();
+
+ writel(icr, &base->icr);
+#endif
+}
+
+#ifdef CONFIG_I2C_MULTI_BUS
+static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;
+static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];
+static unsigned int current_bus;
+
+int i2c_set_bus_num(unsigned int bus)
+{
+ if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) {
+ printf("Bad bus: %d\n", bus);
+ return -1;
+ }
+
+ base_glob = (struct mv_i2c *)i2c_regs[bus];
+ current_bus = bus;
+
+ if (!bus_initialized[current_bus]) {
+ i2c_board_init(base_glob);
+ bus_initialized[current_bus] = 1;
+ }
+
+ return 0;
+}
+
+unsigned int i2c_get_bus_num(void)
+{
+ return current_bus;
+}
+#endif
+
+/* API Functions */
+void i2c_init(int speed, int slaveaddr)
+{
+ u32 val;
+
+#ifdef CONFIG_I2C_MULTI_BUS
+ current_bus = 0;
+ base_glob = (struct mv_i2c *)i2c_regs[current_bus];
+#else
+ base_glob = (struct mv_i2c *)CONFIG_MV_I2C_REG;
+#endif
+
+ if (speed > 100000)
+ val = ICR_FM;
+ else
+ val = ICR_SM;
+ clrsetbits_le32(&base_glob->icr, ICR_MODE_MASK, val);
+
+ i2c_board_init(base_glob);
+}
+
+static int __i2c_probe_chip(struct mv_i2c *base, uchar chip)
+{
+ struct mv_i2c_msg msg;
+
- i2c_reset();
+ i2c_reset(base);
+
+ msg.condition = I2C_COND_START;
+ msg.acknack = I2C_ACKNAK_WAITACK;
+ msg.direction = I2C_WRITE;
+ msg.data = (chip << 1) + 1;
+ if (i2c_transfer(base, &msg))
+ return -1;
+
+ msg.condition = I2C_COND_STOP;
+ msg.acknack = I2C_ACKNAK_SENDNAK;
+ msg.direction = I2C_READ;
+ msg.data = 0x00;
+ if (i2c_transfer(base, &msg))
+ return -1;
return 0;
}
-#endif /* CONFIG_HARD_I2C */
+
+/*
+ * i2c_probe: - Test if a chip answers for a given i2c address
+ *
+ * @chip: address of the chip which is searched for
+ * @return: 0 if a chip was found, -1 otherwhise
+ */
+int i2c_probe(uchar chip)
+{
+ return __i2c_probe_chip(base_glob, chip);
+}
+
+/*
+ * i2c_read: - Read multiple bytes from an i2c device
+ *
+ * The higher level routines take into account that this function is only
+ * called with len < page length of the device (see configuration file)
+ *
+ * @chip: address of the chip which is to be read
+ * @addr: i2c data address within the chip
+ * @alen: length of the i2c data address (1..2 bytes)
+ * @buffer: where to write the data
+ * @len: how much byte do we want to read
+ * @return: 0 in case of success
+ */
+int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+{
+ u8 addr_bytes[4];
+
+ addr_bytes[0] = (addr >> 0) & 0xFF;
+ addr_bytes[1] = (addr >> 8) & 0xFF;
+ addr_bytes[2] = (addr >> 16) & 0xFF;
+ addr_bytes[3] = (addr >> 24) & 0xFF;
+
+ return __i2c_read(base_glob, chip, addr_bytes, alen, buffer, len);
+}
+
+/*
+ * i2c_write: - Write multiple bytes to an i2c device
+ *
+ * The higher level routines take into account that this function is only
+ * called with len < page length of the device (see configuration file)
+ *
+ * @chip: address of the chip which is to be written
+ * @addr: i2c data address within the chip
+ * @alen: length of the i2c data address (1..2 bytes)
+ * @buffer: where to find the data to be written
+ * @len: how much byte do we want to read
+ * @return: 0 in case of success
+ */
+int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+{
+ u8 addr_bytes[4];
+
+ addr_bytes[0] = (addr >> 0) & 0xFF;
+ addr_bytes[1] = (addr >> 8) & 0xFF;
+ addr_bytes[2] = (addr >> 16) & 0xFF;
+ addr_bytes[3] = (addr >> 24) & 0xFF;
+
+ return __i2c_write(base_glob, chip, addr_bytes, alen, buffer, len);
+}
+
+#else /* CONFIG_DM_I2C */
+
+struct mv_i2c_priv {
+ struct mv_i2c *base;
+};
+
+static int mv_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
+{
+ struct mv_i2c_priv *i2c = dev_get_priv(bus);
+ struct i2c_msg *dmsg, *omsg, dummy;
+
+ memset(&dummy, 0, sizeof(struct i2c_msg));
+
+ /*
+ * We expect either two messages (one with an offset and one with the
+ * actual data) or one message (just data or offset/data combined)
+ */
+ if (nmsgs > 2 || nmsgs == 0) {
+ debug("%s: Only one or two messages are supported.", __func__);
+ return -1;
+ }
+
+ omsg = nmsgs == 1 ? &dummy : msg;
+ dmsg = nmsgs == 1 ? msg : msg + 1;
+
+ if (dmsg->flags & I2C_M_RD)
+ return __i2c_read(i2c->base, dmsg->addr, omsg->buf,
+ omsg->len, dmsg->buf, dmsg->len);
+ else
+ return __i2c_write(i2c->base, dmsg->addr, omsg->buf,
+ omsg->len, dmsg->buf, dmsg->len);
+}
+
+static int mv_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
+{
+ struct mv_i2c_priv *priv = dev_get_priv(bus);
+ u32 val;
+
+ if (speed > 100000)
+ val = ICR_FM;
+ else
+ val = ICR_SM;
+ clrsetbits_le32(&priv->base->icr, ICR_MODE_MASK, val);
+
+ return 0;
+}
+
+static int mv_i2c_probe(struct udevice *bus)
+{
+ struct mv_i2c_priv *priv = dev_get_priv(bus);
+
+ priv->base = (void *)dev_get_addr_ptr(bus);
+
+ return 0;
+}
+
+static const struct dm_i2c_ops mv_i2c_ops = {
+ .xfer = mv_i2c_xfer,
+ .set_bus_speed = mv_i2c_set_bus_speed,
+};
+
+static const struct udevice_id mv_i2c_ids[] = {
+ { .compatible = "marvell,armada-3700-i2c" },
+ { }
+};
+
+U_BOOT_DRIVER(i2c_mv) = {
+ .name = "i2c_mv",
+ .id = UCLASS_I2C,
+ .of_match = mv_i2c_ids,
+ .probe = mv_i2c_probe,
+ .priv_auto_alloc_size = sizeof(struct mv_i2c_priv),
+ .ops = &mv_i2c_ops,
+};
+#endif /* CONFIG_DM_I2C */
diff --git a/drivers/i2c/mv_i2c.h b/drivers/i2c/mv_i2c.h
index ae27c44..1e62892 100644
--- a/drivers/i2c/mv_i2c.h
+++ b/drivers/i2c/mv_i2c.h
@@ -23,12 +23,7 @@
#define I2C_READ 0
#define I2C_WRITE 1
-#if (CONFIG_SYS_I2C_SPEED == 400000)
-#define I2C_ICR_INIT (ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD \
- | ICR_SCLE)
-#else
#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
-#endif
#define I2C_ISR_INIT 0x7FF
/* ----- Control register bits ---------------------------------------- */
@@ -48,7 +43,15 @@
#define ICR_ALDIE 0x1000 /* enable arbitration interrupt */
#define ICR_SADIE 0x2000 /* slave address detected int enable */
#define ICR_UR 0x4000 /* unit reset */
-#define ICR_FM 0x8000 /* Fast Mode */
+#ifdef CONFIG_ARMADA_3700
+#define ICR_SM 0x00000 /* Standard Mode */
+#define ICR_FM 0x10000 /* Fast Mode */
+#define ICR_MODE_MASK 0x30000 /* Mode mask */
+#else
+#define ICR_SM 0x00000 /* Standard Mode */
+#define ICR_FM 0x08000 /* Fast Mode */
+#define ICR_MODE_MASK 0x18000 /* Mode mask */
+#endif
/* ----- Status register bits ----------------------------------------- */
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index 3765fed..60c8ea1 100644
--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <i2c.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <linux/compat.h>
#ifdef CONFIG_DM_I2C
@@ -830,6 +830,7 @@
static const struct udevice_id mvtwsi_i2c_ids[] = {
{ .compatible = "marvell,mv64xxx-i2c", },
+ { .compatible = "marvell,mv78230-i2c", },
{ /* sentinel */ }
};
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index f340208..a26f44e 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -17,7 +17,7 @@
#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/imx-common/mxc_i2c.h>
#include <asm/io.h>
#include <i2c.h>
diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c
index 87e05c7..d454410 100644
--- a/drivers/i2c/mxs_i2c.c
+++ b/drivers/i2c/mxs_i2c.c
@@ -16,7 +16,7 @@
#include <common.h>
#include <malloc.h>
#include <i2c.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 63b1418..7c701cb 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -258,7 +258,7 @@
while (bytes_remain_len) {
if (bytes_remain_len > RK_I2C_FIFO_SIZE)
- bytes_xferred = 32;
+ bytes_xferred = RK_I2C_FIFO_SIZE;
else
bytes_xferred = bytes_remain_len;
words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
@@ -269,17 +269,17 @@
if ((i * 4 + j) == bytes_xferred)
break;
- if (i == 0 && j == 0) {
+ if (i == 0 && j == 0 && pbuf == buf) {
txdata |= (chip << 1);
- } else if (i == 0 && j <= r_len) {
+ } else if (i == 0 && j <= r_len && pbuf == buf) {
txdata |= (reg &
(0xff << ((j - 1) * 8))) << 8;
} else {
txdata |= (*pbuf++)<<(j * 8);
}
- writel(txdata, ®s->txdata[i]);
}
- debug("I2c Write TXDATA[%d] = 0x%x\n", i, txdata);
+ writel(txdata, ®s->txdata[i]);
+ debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
}
writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con);
diff --git a/drivers/i2c/zynq_i2c.c b/drivers/i2c/zynq_i2c.c
index 380863b..2f6b364 100644
--- a/drivers/i2c/zynq_i2c.c
+++ b/drivers/i2c/zynq_i2c.c
@@ -13,7 +13,7 @@
#include <common.h>
#include <asm/io.h>
#include <i2c.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/hardware.h>
/* i2c register set */
diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c
index aea8d61..9378e96 100644
--- a/drivers/misc/cros_ec.c
+++ b/drivers/misc/cros_ec.c
@@ -22,7 +22,7 @@
#include <fdtdec.h>
#include <malloc.h>
#include <spi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm-generic/gpio.h>
#include <dm/device-internal.h>
diff --git a/drivers/misc/fsl_iim.c b/drivers/misc/fsl_iim.c
index 36433a7..2feb182 100644
--- a/drivers/misc/fsl_iim.c
+++ b/drivers/misc/fsl_iim.c
@@ -11,7 +11,7 @@
#include <common.h>
#include <fuse.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#ifndef CONFIG_MPC512X
#include <asm/arch/imx-regs.h>
diff --git a/drivers/misc/mc9sdz60.c b/drivers/misc/mc9sdz60.c
index cd56b58..61ed50d 100644
--- a/drivers/misc/mc9sdz60.c
+++ b/drivers/misc/mc9sdz60.c
@@ -7,7 +7,7 @@
#include <config.h>
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/types.h>
#include <i2c.h>
#include <mc9sdz60.h>
diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c
index 38344e8..6b8566c 100644
--- a/drivers/misc/mxc_ocotp.c
+++ b/drivers/misc/mxc_ocotp.c
@@ -14,7 +14,7 @@
#include <common.h>
#include <fuse.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/misc/mxs_ocotp.c b/drivers/misc/mxs_ocotp.c
index 6c0d247..a42164c 100644
--- a/drivers/misc/mxs_ocotp.c
+++ b/drivers/misc/mxs_ocotp.c
@@ -14,7 +14,7 @@
#include <common.h>
#include <fuse.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index a71afa5..ba9a723 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -80,6 +80,7 @@
config MMC_UNIPHIER
bool "UniPhier SD/MMC Host Controller support"
depends on ARCH_UNIPHIER
+ depends on BLK
select DM_MMC_OPS
help
This selects support for the SD/MMC Host Controller on UniPhier SoCs.
diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c
index dd6bd33..d8f8087 100644
--- a/drivers/mmc/atmel_sdhci.c
+++ b/drivers/mmc/atmel_sdhci.c
@@ -136,13 +136,8 @@
static int atmel_sdhci_bind(struct udevice *dev)
{
struct atmel_sdhci_plat *plat = dev_get_platdata(dev);
- int ret;
-
- ret = sdhci_bind(dev, &plat->mmc, &plat->cfg);
- if (ret)
- return ret;
- return 0;
+ return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static const struct udevice_id atmel_sdhci_ids[] = {
diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index 0e493da..993a00c 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -12,7 +12,7 @@
#include <mmc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/byteorder.h>
#include <asm/blackfin.h>
#include <asm/clock.h>
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index afc674d..074f86c 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -120,9 +120,9 @@
if (host->fifo_mode && size) {
len = 0;
- if (data->flags == MMC_DATA_READ) {
- if ((dwmci_readl(host, DWMCI_RINTSTS) &
- DWMCI_INTMSK_RXDR)) {
+ if (data->flags == MMC_DATA_READ &&
+ (mask & DWMCI_INTMSK_RXDR)) {
+ while (size) {
len = dwmci_readl(host, DWMCI_STATUS);
len = (len >> DWMCI_FIFO_SHIFT) &
DWMCI_FIFO_MASK;
@@ -130,12 +130,13 @@
for (i = 0; i < len; i++)
*buf++ =
dwmci_readl(host, DWMCI_DATA);
- dwmci_writel(host, DWMCI_RINTSTS,
- DWMCI_INTMSK_RXDR);
+ size = size > len ? (size - len) : 0;
}
- } else {
- if ((dwmci_readl(host, DWMCI_RINTSTS) &
- DWMCI_INTMSK_TXDR)) {
+ dwmci_writel(host, DWMCI_RINTSTS,
+ DWMCI_INTMSK_RXDR);
+ } else if (data->flags == MMC_DATA_WRITE &&
+ (mask & DWMCI_INTMSK_TXDR)) {
+ while (size) {
len = dwmci_readl(host, DWMCI_STATUS);
len = fifo_depth - ((len >>
DWMCI_FIFO_SHIFT) &
@@ -144,11 +145,11 @@
for (i = 0; i < len; i++)
dwmci_writel(host, DWMCI_DATA,
*buf++);
- dwmci_writel(host, DWMCI_RINTSTS,
- DWMCI_INTMSK_TXDR);
+ size = size > len ? (size - len) : 0;
}
+ dwmci_writel(host, DWMCI_RINTSTS,
+ DWMCI_INTMSK_TXDR);
}
- size = size > len ? (size - len) : 0;
}
/* Data arrived correctly. */
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 57271f1..568fed7 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -284,13 +284,8 @@
static int exynos_dwmmc_bind(struct udevice *dev)
{
struct exynos_mmc_plat *plat = dev_get_platdata(dev);
- int ret;
-
- ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
- if (ret)
- return ret;
- return 0;
+ return dwmci_bind(dev, &plat->mmc, &plat->cfg);
}
static const struct udevice_id exynos_dwmmc_ids[] = {
diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
index c02740f..e88c632 100644
--- a/drivers/mmc/ftsdc010_mci.c
+++ b/drivers/mmc/ftsdc010_mci.c
@@ -13,7 +13,7 @@
#include <mmc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/byteorder.h>
#include <faraday/ftsdc010.h>
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index 69770df..cca0b04 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -14,7 +14,7 @@
#include <part.h>
#include <malloc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/byteorder.h>
#include <asm/arch/clk.h>
#include <asm/arch/hardware.h>
diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c
index b0d063c..fdaf1e4 100644
--- a/drivers/mmc/hi6220_dw_mmc.c
+++ b/drivers/mmc/hi6220_dw_mmc.c
@@ -8,7 +8,7 @@
#include <common.h>
#include <dwmmc.h>
#include <malloc.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#define DWMMC_MAX_CH_NUM 4
diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
index 3653d00..e730caa 100644
--- a/drivers/mmc/kona_sdhci.c
+++ b/drivers/mmc/kona_sdhci.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <malloc.h>
#include <sdhci.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/kona-common/clk.h>
#define SDHCI_CORECTRL_OFFSET 0x00008000
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 43ea0bb..0312da9 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -21,6 +21,14 @@
#include <div64.h>
#include "mmc_private.h"
+static const unsigned int sd_au_size[] = {
+ 0, SZ_16K / 512, SZ_32K / 512,
+ SZ_64K / 512, SZ_128K / 512, SZ_256K / 512,
+ SZ_512K / 512, SZ_1M / 512, SZ_2M / 512,
+ SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512,
+ SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, SZ_64M / 512,
+};
+
#ifndef CONFIG_DM_MMC_OPS
__weak int board_mmc_getwp(struct mmc *mmc)
{
@@ -945,6 +953,62 @@
return 0;
}
+static int sd_read_ssr(struct mmc *mmc)
+{
+ int err, i;
+ struct mmc_cmd cmd;
+ ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
+ struct mmc_data data;
+ int timeout = 3;
+ unsigned int au, eo, et, es;
+
+ cmd.cmdidx = MMC_CMD_APP_CMD;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = mmc->rca << 16;
+
+ err = mmc_send_cmd(mmc, &cmd, NULL);
+ if (err)
+ return err;
+
+ cmd.cmdidx = SD_CMD_APP_SD_STATUS;
+ cmd.resp_type = MMC_RSP_R1;
+ cmd.cmdarg = 0;
+
+retry_ssr:
+ data.dest = (char *)ssr;
+ data.blocksize = 64;
+ data.blocks = 1;
+ data.flags = MMC_DATA_READ;
+
+ err = mmc_send_cmd(mmc, &cmd, &data);
+ if (err) {
+ if (timeout--)
+ goto retry_ssr;
+
+ return err;
+ }
+
+ for (i = 0; i < 16; i++)
+ ssr[i] = be32_to_cpu(ssr[i]);
+
+ au = (ssr[2] >> 12) & 0xF;
+ if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
+ mmc->ssr.au = sd_au_size[au];
+ es = (ssr[3] >> 24) & 0xFF;
+ es |= (ssr[2] & 0xFF) << 8;
+ et = (ssr[3] >> 18) & 0x3F;
+ if (es && et) {
+ eo = (ssr[3] >> 16) & 0x3;
+ mmc->ssr.erase_timeout = (et * 1000) / es;
+ mmc->ssr.erase_offset = eo * 1000;
+ }
+ } else {
+ debug("Invalid Allocation Unit Size.\n");
+ }
+
+ return 0;
+}
+
/* frequency bases */
/* divided by 10 to be nice to platforms without floating point */
static const int fbase[] = {
@@ -1350,6 +1414,10 @@
mmc_set_bus_width(mmc, 4);
}
+ err = sd_read_ssr(mmc);
+ if (err)
+ return err;
+
if (mmc->card_caps & MMC_MODE_HS)
mmc->tran_speed = 50000000;
else
diff --git a/drivers/mmc/mmc_boot.c b/drivers/mmc/mmc_boot.c
index 756a982..ac6f56f 100644
--- a/drivers/mmc/mmc_boot.c
+++ b/drivers/mmc/mmc_boot.c
@@ -85,16 +85,10 @@
*/
int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
{
- int err;
-
- err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
- EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
- EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
- EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
-
- if (err)
- return err;
- return 0;
+ return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
+ EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
+ EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
+ EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
}
/*
@@ -106,16 +100,10 @@
*/
int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
{
- int err;
-
- err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
- EXT_CSD_BOOT_ACK(ack) |
- EXT_CSD_BOOT_PART_NUM(part_num) |
- EXT_CSD_PARTITION_ACCESS(access));
-
- if (err)
- return err;
- return 0;
+ return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
+ EXT_CSD_BOOT_ACK(ack) |
+ EXT_CSD_BOOT_PART_NUM(part_num) |
+ EXT_CSD_PARTITION_ACCESS(access));
}
/*
diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
index 0f8b5c7..2289640 100644
--- a/drivers/mmc/mmc_write.c
+++ b/drivers/mmc/mmc_write.c
@@ -100,8 +100,13 @@
& ~(mmc->erase_grp_size - 1)) - 1);
while (blk < blkcnt) {
- blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
- mmc->erase_grp_size : (blkcnt - blk);
+ if (IS_SD(mmc) && mmc->ssr.au) {
+ blk_r = ((blkcnt - blk) > mmc->ssr.au) ?
+ mmc->ssr.au : (blkcnt - blk);
+ } else {
+ blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
+ mmc->erase_grp_size : (blkcnt - blk);
+ }
err = mmc_erase_t(mmc, start + blk, blk_r);
if (err)
break;
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
index 8d4399e..1b82991 100644
--- a/drivers/mmc/msm_sdhci.c
+++ b/drivers/mmc/msm_sdhci.c
@@ -190,13 +190,8 @@
static int msm_sdc_bind(struct udevice *dev)
{
struct msm_sdhc_plat *plat = dev_get_platdata(dev);
- int ret;
-
- ret = sdhci_bind(dev, &plat->mmc, &plat->cfg);
- if (ret)
- return ret;
- return 0;
+ return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static const struct udevice_id msm_mmc_ids[] = {
diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c
index 8038f90..5a385a3 100644
--- a/drivers/mmc/mxcmmc.c
+++ b/drivers/mmc/mxcmmc.c
@@ -23,7 +23,7 @@
#include <part.h>
#include <malloc.h>
#include <mmc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 40f3eaa..0896028 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -20,7 +20,7 @@
#include <common.h>
#include <malloc.h>
#include <mmc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/mmc/pic32_sdhci.c b/drivers/mmc/pic32_sdhci.c
index abe7429..2abf943 100644
--- a/drivers/mmc/pic32_sdhci.c
+++ b/drivers/mmc/pic32_sdhci.c
@@ -10,7 +10,7 @@
#include <dm.h>
#include <common.h>
#include <sdhci.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <mach/pic32.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c
index 19ae81d..a5462e2 100644
--- a/drivers/mmc/pxa_mmc_gen.c
+++ b/drivers/mmc/pxa_mmc_gen.c
@@ -9,7 +9,7 @@
#include <common.h>
#include <asm/arch/hardware.h>
#include <asm/arch/regs-mmc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <malloc.h>
#include <mmc.h>
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 020a59b..859760b 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -142,13 +142,8 @@
static int rockchip_dwmmc_bind(struct udevice *dev)
{
struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
- int ret;
-
- ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
- if (ret)
- return ret;
- return 0;
+ return dwmci_bind(dev, &plat->mmc, &plat->cfg);
}
static const struct udevice_id rockchip_dwmmc_ids[] = {
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 624029b..c56e1a3 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -62,13 +62,8 @@
static int rockchip_sdhci_bind(struct udevice *dev)
{
struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);
- int ret;
-
- ret = sdhci_bind(dev, &plat->mmc, &plat->cfg);
- if (ret)
- return ret;
- return 0;
+ return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static const struct udevice_id arasan_sdhci_ids[] = {
diff --git a/drivers/mmc/sandbox_mmc.c b/drivers/mmc/sandbox_mmc.c
index 5f1333b..fdb29a5 100644
--- a/drivers/mmc/sandbox_mmc.c
+++ b/drivers/mmc/sandbox_mmc.c
@@ -112,7 +112,6 @@
{
struct sandbox_mmc_plat *plat = dev_get_platdata(dev);
struct mmc_config *cfg = &plat->cfg;
- int ret;
cfg->name = dev->name;
cfg->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_8BIT;
@@ -121,11 +120,7 @@
cfg->f_max = 52000000;
cfg->b_max = U32_MAX;
- ret = mmc_bind(dev, &plat->mmc, cfg);
- if (ret)
- return ret;
-
- return 0;
+ return mmc_bind(dev, &plat->mmc, cfg);
}
int sandbox_mmc_unbind(struct udevice *dev)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 7ddb549..b2bf5a0 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -121,13 +121,10 @@
* for card ready state.
* Every time when card is busy after timeout then (last) timeout value will be
* increased twice but only if it doesn't exceed global defined maximum.
- * Each function call will use last timeout value. Max timeout can be redefined
- * in board config file.
+ * Each function call will use last timeout value.
*/
-#ifndef CONFIG_SDHCI_CMD_MAX_TIMEOUT
-#define CONFIG_SDHCI_CMD_MAX_TIMEOUT 3200
-#endif
-#define CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT 100
+#define SDHCI_CMD_MAX_TIMEOUT 3200
+#define SDHCI_CMD_DEFAULT_TIMEOUT 100
#define SDHCI_READ_STATUS_TIMEOUT 1000
#ifdef CONFIG_DM_MMC_OPS
@@ -151,7 +148,7 @@
unsigned start = get_timer(0);
/* Timeout unit - ms */
- static unsigned int cmd_timeout = CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT;
+ static unsigned int cmd_timeout = SDHCI_CMD_DEFAULT_TIMEOUT;
sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
@@ -164,7 +161,7 @@
while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
if (time >= cmd_timeout) {
printf("%s: MMC: %d busy ", __func__, mmc_dev);
- if (2 * cmd_timeout <= CONFIG_SDHCI_CMD_MAX_TIMEOUT) {
+ if (2 * cmd_timeout <= SDHCI_CMD_MAX_TIMEOUT) {
cmd_timeout += cmd_timeout;
printf("timeout increasing to: %u ms.\n",
cmd_timeout);
@@ -297,7 +294,7 @@
static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
{
struct sdhci_host *host = mmc->priv;
- unsigned int div, clk, timeout, reg;
+ unsigned int div, clk = 0, timeout, reg;
/* Wait max 20 ms */
timeout = 200;
@@ -321,14 +318,36 @@
return 0;
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
- /* Version 3.00 divisors must be a multiple of 2. */
- if (mmc->cfg->f_max <= clock)
- div = 1;
- else {
- for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) {
- if ((mmc->cfg->f_max / div) <= clock)
+ /*
+ * Check if the Host Controller supports Programmable Clock
+ * Mode.
+ */
+ if (host->clk_mul) {
+ for (div = 1; div <= 1024; div++) {
+ if ((mmc->cfg->f_max * host->clk_mul / div)
+ <= clock)
break;
}
+
+ /*
+ * Set Programmable Clock Mode in the Clock
+ * Control register.
+ */
+ clk = SDHCI_PROG_CLOCK_MODE;
+ div--;
+ } else {
+ /* Version 3.00 divisors must be a multiple of 2. */
+ if (mmc->cfg->f_max <= clock) {
+ div = 1;
+ } else {
+ for (div = 2;
+ div < SDHCI_MAX_DIV_SPEC_300;
+ div += 2) {
+ if ((mmc->cfg->f_max / div) <= clock)
+ break;
+ }
+ }
+ div >>= 1;
}
} else {
/* Version 2.00 divisors must be a power of 2. */
@@ -336,13 +355,13 @@
if ((mmc->cfg->f_max / div) <= clock)
break;
}
+ div >>= 1;
}
- div >>= 1;
if (host->set_clock)
host->set_clock(host->index, div);
- clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
+ clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
<< SDHCI_DIVIDER_HI_SHIFT;
clk |= SDHCI_CLOCK_INT_EN;
@@ -451,6 +470,8 @@
{
struct sdhci_host *host = mmc->priv;
+ sdhci_reset(host, SDHCI_RESET_ALL);
+
if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) {
aligned_buffer = memalign(8, 512*1024);
if (!aligned_buffer) {
@@ -514,9 +535,17 @@
int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
u32 max_clk, u32 min_clk)
{
- u32 caps;
+ u32 caps, caps_1;
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
+
+#ifdef CONFIG_MMC_SDMA
+ if (!(caps & SDHCI_CAN_DO_SDMA)) {
+ printf("%s: Your controller doesn't support SDMA!!\n",
+ __func__);
+ return -EINVAL;
+ }
+#endif
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
cfg->name = host->name;
@@ -534,8 +563,11 @@
SDHCI_CLOCK_BASE_SHIFT;
cfg->f_max *= 1000000;
}
- if (cfg->f_max == 0)
+ if (cfg->f_max == 0) {
+ printf("%s: Hardware doesn't specify base clock frequency\n",
+ __func__);
return -EINVAL;
+ }
if (min_clk)
cfg->f_min = min_clk;
else {
@@ -552,6 +584,9 @@
if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;
+ if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
+ cfg->voltages |= host->voltages;
+
cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
if (caps & SDHCI_CAN_DO_8BIT)
@@ -564,6 +599,14 @@
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+ /*
+ * In case of Host Controller v3.00, find out whether clock
+ * multiplier is supported.
+ */
+ caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
+ host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
+ SDHCI_CLOCK_MUL_SHIFT;
+
return 0;
}
@@ -575,27 +618,11 @@
#else
int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
{
-#ifdef CONFIG_MMC_SDMA
- unsigned int caps;
+ int ret;
- caps = sdhci_readl(host, SDHCI_CAPABILITIES);
- if (!(caps & SDHCI_CAN_DO_SDMA)) {
- printf("%s: Your controller doesn't support SDMA!!\n",
- __func__);
- return -1;
- }
-#endif
-
- if (sdhci_setup_cfg(&host->cfg, host, max_clk, min_clk)) {
- printf("%s: Hardware doesn't specify base clock frequency\n",
- __func__);
- return -EINVAL;
- }
-
- if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
- host->cfg.voltages |= host->voltages;
-
- sdhci_reset(host, SDHCI_RESET_ALL);
+ ret = sdhci_setup_cfg(&host->cfg, host, max_clk, min_clk);
+ if (ret)
+ return ret;
host->mmc = mmc_create(&host->cfg, host);
if (host->mmc == NULL) {
diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c
index bc4b344..69ded9e 100644
--- a/drivers/mmc/sh_mmcif.c
+++ b/drivers/mmc/sh_mmcif.c
@@ -12,7 +12,7 @@
#include <command.h>
#include <mmc.h>
#include <malloc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include "sh_mmcif.h"
diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c
index ea82e2b..78e2ef6 100644
--- a/drivers/mmc/sh_sdhi.c
+++ b/drivers/mmc/sh_sdhi.c
@@ -13,7 +13,7 @@
#include <common.h>
#include <malloc.h>
#include <mmc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/rmobile.h>
#include <asm/arch/sh_sdhi.h>
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
index 701b26f..4af7fdb 100644
--- a/drivers/mmc/uniphier-sd.c
+++ b/drivers/mmc/uniphier-sd.c
@@ -119,9 +119,12 @@
/* alignment required by the DMA engine of this controller */
#define UNIPHIER_SD_DMA_MINALIGN 0x10
-struct uniphier_sd_priv {
+struct uniphier_sd_plat {
struct mmc_config cfg;
- struct mmc *mmc;
+ struct mmc mmc;
+};
+
+struct uniphier_sd_priv {
void __iomem *regbase;
unsigned long mclk;
unsigned int version;
@@ -654,8 +657,16 @@
}
}
+static int uniphier_sd_bind(struct udevice *dev)
+{
+ struct uniphier_sd_plat *plat = dev_get_platdata(dev);
+
+ return mmc_bind(dev, &plat->mmc, &plat->cfg);
+}
+
static int uniphier_sd_probe(struct udevice *dev)
{
+ struct uniphier_sd_plat *plat = dev_get_platdata(dev);
struct uniphier_sd_priv *priv = dev_get_priv(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
fdt_addr_t base;
@@ -691,15 +702,15 @@
return ret;
}
- priv->cfg.name = dev->name;
- priv->cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS;
+ plat->cfg.name = dev->name;
+ plat->cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS;
switch (fdtdec_get_int(gd->fdt_blob, dev->of_offset, "bus-width", 1)) {
case 8:
- priv->cfg.host_caps |= MMC_MODE_8BIT;
+ plat->cfg.host_caps |= MMC_MODE_8BIT;
break;
case 4:
- priv->cfg.host_caps |= MMC_MODE_4BIT;
+ plat->cfg.host_caps |= MMC_MODE_4BIT;
break;
case 1:
break;
@@ -722,27 +733,13 @@
uniphier_sd_host_init(priv);
- priv->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34;
- priv->cfg.f_min = priv->mclk /
+ plat->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34;
+ plat->cfg.f_min = priv->mclk /
(priv->caps & UNIPHIER_SD_CAP_DIV1024 ? 1024 : 512);
- priv->cfg.f_max = priv->mclk;
- priv->cfg.b_max = U32_MAX; /* max value of UNIPHIER_SD_SECCNT */
-
- priv->mmc = mmc_create(&priv->cfg, priv);
- if (!priv->mmc)
- return -EIO;
-
- upriv->mmc = priv->mmc;
- priv->mmc->dev = dev;
-
- return 0;
-}
-
-static int uniphier_sd_remove(struct udevice *dev)
-{
- struct uniphier_sd_priv *priv = dev_get_priv(dev);
+ plat->cfg.f_max = priv->mclk;
+ plat->cfg.b_max = U32_MAX; /* max value of UNIPHIER_SD_SECCNT */
- mmc_destroy(priv->mmc);
+ upriv->mmc = &plat->mmc;
return 0;
}
@@ -756,8 +753,9 @@
.name = "uniphier-mmc",
.id = UCLASS_MMC,
.of_match = uniphier_sd_match,
+ .bind = uniphier_sd_bind,
.probe = uniphier_sd_probe,
- .remove = uniphier_sd_remove,
.priv_auto_alloc_size = sizeof(struct uniphier_sd_priv),
+ .platdata_auto_alloc_size = sizeof(struct uniphier_sd_plat),
.ops = &uniphier_sd_ops,
};
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 3815b94..b991102 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -63,13 +63,8 @@
static int arasan_sdhci_bind(struct udevice *dev)
{
struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
- int ret;
-
- ret = sdhci_bind(dev, &plat->mmc, &plat->cfg);
- if (ret)
- return ret;
- return 0;
+ return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static const struct udevice_id arasan_sdhci_ids[] = {
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 390e9e4..3a9705c 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -40,3 +40,5 @@
source "drivers/mtd/nand/Kconfig"
source "drivers/mtd/spi/Kconfig"
+
+source "drivers/mtd/ubi/Kconfig"
diff --git a/drivers/mtd/cfi_mtd.c b/drivers/mtd/cfi_mtd.c
index 709a486..3c06173 100644
--- a/drivers/mtd/cfi_mtd.c
+++ b/drivers/mtd/cfi_mtd.c
@@ -10,7 +10,7 @@
#include <flash.h>
#include <malloc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/concat.h>
#include <mtd/cfi_flash.h>
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index cddfb16..5e42c4b 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -20,7 +20,7 @@
#include <common.h>
#include <malloc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/compat.h>
#include <ubi_uboot.h>
diff --git a/drivers/mtd/nand/arasan_nfc.c b/drivers/mtd/nand/arasan_nfc.c
index 320cbaa..86f7526 100644
--- a/drivers/mtd/nand/arasan_nfc.c
+++ b/drivers/mtd/nand/arasan_nfc.c
@@ -9,7 +9,7 @@
#include <common.h>
#include <malloc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 601e744..18280b0 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -9,7 +9,7 @@
#include <common.h>
#include <malloc.h>
#include <nand.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include "denali.h"
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index f621f14..b3c23b0 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -17,7 +17,7 @@
#include <linux/mtd/nand_ecc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#ifdef VERBOSE_DEBUG
#define DEBUG_ELBC
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 7001cbd..bc6bdc9 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -16,7 +16,7 @@
#include <linux/mtd/nand_ecc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <fsl_ifc.h>
#ifndef CONFIG_SYS_FSL_IFC_BANK_COUNT
diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
index d2b3881..4a45b87 100644
--- a/drivers/mtd/nand/fsl_upm.c
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -10,7 +10,7 @@
#include <config.h>
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/fsl_upm.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/lpc32xx_nand_mlc.c b/drivers/mtd/nand/lpc32xx_nand_mlc.c
index a793115..3af7e6d 100644
--- a/drivers/mtd/nand/lpc32xx_nand_mlc.c
+++ b/drivers/mtd/nand/lpc32xx_nand_mlc.c
@@ -22,7 +22,7 @@
#include <common.h>
#include <nand.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <nand.h>
#include <asm/arch/clk.h>
diff --git a/drivers/mtd/nand/lpc32xx_nand_slc.c b/drivers/mtd/nand/lpc32xx_nand_slc.c
index daa1e7a..f7e27b3 100644
--- a/drivers/mtd/nand/lpc32xx_nand_slc.c
+++ b/drivers/mtd/nand/lpc32xx_nand_slc.c
@@ -15,7 +15,7 @@
#include <common.h>
#include <nand.h>
#include <linux/mtd/nand_ecc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/config.h>
#include <asm/arch/clk.h>
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index 8a8775c..7faabdd 100644
--- a/drivers/mtd/nand/mpc5121_nfc.c
+++ b/drivers/mtd/nand/mpc5121_nfc.c
@@ -19,7 +19,7 @@
#include <linux/mtd/nand_ecc.h>
#include <linux/compat.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 4bf564e..9200544 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -18,7 +18,7 @@
#include <linux/mtd/nand.h>
#include <linux/types.h>
#include <malloc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index d1287bc..d9e5fc9 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -44,7 +44,7 @@
#include <linux/mtd/partitions.h>
#endif
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
/* Define default oob placement schemes for large and small page devices */
static struct nand_ecclayout nand_oob_8 = {
diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c
index 083e0e9..8b548b2 100644
--- a/drivers/mtd/nand/nand_ecc.c
+++ b/drivers/mtd/nand/nand_ecc.c
@@ -25,7 +25,7 @@
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand_ecc.h>
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c
index e8bcc34..9c8a373 100644
--- a/drivers/mtd/nand/nand_util.c
+++ b/drivers/mtd/nand/nand_util.c
@@ -26,7 +26,7 @@
#include <memalign.h>
#include <div64.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/mtd/mtd.h>
#include <nand.h>
#include <jffs2/jffs2.h>
diff --git a/drivers/mtd/nand/omap_elm.c b/drivers/mtd/nand/omap_elm.c
index d963e6c..9ef1b21 100644
--- a/drivers/mtd/nand/omap_elm.c
+++ b/drivers/mtd/nand/omap_elm.c
@@ -15,7 +15,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/mtd/omap_elm.h>
#include <asm/arch/hardware.h>
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index af618fc..d1e1bdd 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/mem.h>
#include <linux/mtd/omap_gpmc.h>
#include <linux/mtd/nand_ecc.h>
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index b1d58e0..dfe8966 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <malloc.h>
#include <nand.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <linux/mtd/mtd.h>
diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c
index 38bd7a5..5c9b485 100644
--- a/drivers/mtd/nand/tegra_nand.c
+++ b/drivers/mtd/nand/tegra_nand.c
@@ -14,7 +14,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
#include <asm/arch-tegra/clk_rst.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <fdtdec.h>
#include <bouncebuf.h>
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index 0e35dc5..2e3d0e5 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -27,7 +27,7 @@
#include <linux/mtd/onenand.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <malloc.h>
/* It should access 16-bit instead of 8-bit */
diff --git a/drivers/mtd/onenand/onenand_bbt.c b/drivers/mtd/onenand/onenand_bbt.c
index 52509f1..2050700 100644
--- a/drivers/mtd/onenand/onenand_bbt.c
+++ b/drivers/mtd/onenand/onenand_bbt.c
@@ -20,7 +20,7 @@
#include <linux/mtd/onenand.h>
#include <malloc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
/**
* check_short_pattern - [GENERIC] check if a pattern is in the buffer
diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index 5e56a29..10dd268 100644
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -19,7 +19,7 @@
#include <linux/mtd/samsung_onenand.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#define ONENAND_ERASE_STATUS 0x00
#define ONENAND_MULTI_ERASE_SET 0x01
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 53470b9..f59134f 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -292,10 +292,7 @@
sbsf->data->nr_sectors;
} else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) {
sbsf->erase_size = 4 << 10;
- } else if (sbsf->cmd == CMD_ERASE_32K && (flags & SECT_32K)) {
- sbsf->erase_size = 32 << 10;
- } else if (sbsf->cmd == CMD_ERASE_64K &&
- !(flags & (SECT_4K | SECT_32K))) {
+ } else if (sbsf->cmd == CMD_ERASE_64K && !(flags & SECT_4K)) {
sbsf->erase_size = 64 << 10;
} else {
debug(" cmd unknown: %#x\n", sbsf->cmd);
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index da2bb7b..cde4cfb 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -20,34 +20,6 @@
SF_DUAL_PARALLEL_FLASH = BIT(1),
};
-/* Enum list - Full read commands */
-enum spi_read_cmds {
- ARRAY_SLOW = BIT(0),
- ARRAY_FAST = BIT(1),
- DUAL_OUTPUT_FAST = BIT(2),
- QUAD_OUTPUT_FAST = BIT(3),
- DUAL_IO_FAST = BIT(4),
- QUAD_IO_FAST = BIT(5),
-};
-
-/* Normal - Extended - Full command set */
-#define RD_NORM (ARRAY_SLOW | ARRAY_FAST)
-#define RD_EXTN (RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
-#define RD_FULL (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
-
-/* sf param flags */
-enum {
-#ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS
- SECT_4K = 0,
-#else
- SECT_4K = BIT(0),
-#endif
- SECT_32K = BIT(1),
- E_FSR = BIT(2),
- SST_WR = BIT(3),
- WR_QPP = BIT(4),
-};
-
enum spi_nor_option_flags {
SNOR_F_SST_WR = BIT(0),
SNOR_F_USE_FSR = BIT(1),
@@ -67,7 +39,6 @@
/* Erase commands */
#define CMD_ERASE_4K 0x20
-#define CMD_ERASE_32K 0x52
#define CMD_ERASE_CHIP 0xc7
#define CMD_ERASE_64K 0xd8
@@ -141,7 +112,6 @@
* @sector_size: Isn't necessarily a sector size from vendor,
* the size listed here is what works with CMD_ERASE_64K
* @nr_sectors: No.of sectors on this device
- * @e_rd_cmd: Enum list for read commands
* @flags: Important param, for flash specific behaviour
*/
struct spi_flash_params {
@@ -150,8 +120,17 @@
u16 ext_jedec;
u32 sector_size;
u32 nr_sectors;
- u8 e_rd_cmd;
+
u16 flags;
+#define SECT_4K BIT(0)
+#define E_FSR BIT(1)
+#define SST_WR BIT(2)
+#define WR_QPP BIT(3)
+#define RD_QUAD BIT(4)
+#define RD_DUAL BIT(5)
+#define RD_QUADIO BIT(6)
+#define RD_DUALIO BIT(7)
+#define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
};
extern const struct spi_flash_params spi_flash_params_table[];
diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c
index 0b9cb62..935ae4d 100644
--- a/drivers/mtd/spi/sf_mtd.c
+++ b/drivers/mtd/spi/sf_mtd.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <malloc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/mtd/mtd.h>
#include <spi_flash.h>
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 70ca236..5b50114 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -15,122 +15,122 @@
/* SPI/QSPI flash device params structure */
const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K},
- {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K},
- {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K},
- {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K},
- {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K},
- {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
- {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
- {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
- {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K},
+ {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K},
+ {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K},
+ {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K},
+ {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K},
+ {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K},
+ {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K},
+ {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K},
+ {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K},
+ {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K},
+ {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_EON /* EON */
- {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, RD_NORM, 0},
- {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, RD_NORM, 0},
+ {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
+ {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
+ {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
+ {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
+ {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
+ {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
- {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, RD_NORM, 0},
- {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, RD_NORM, 0},
+ {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0},
+ {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0},
+ {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0},
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, RD_NORM, 0},
- {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, RD_NORM, 0},
- {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, RD_NORM, 0},
- {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, RD_NORM, 0},
- {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, RD_NORM, 0},
- {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
- {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP},
- {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP},
- {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
+ {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0},
+ {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
+ {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
+ {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
+ {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
+ {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
+ {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP},
+ {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP},
+ {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
- {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, RD_NORM, 0},
- {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, RD_NORM, 0},
- {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, RD_NORM, 0},
- {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, RD_NORM, 0},
- {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, RD_NORM, 0},
- {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL, WR_QPP},
- {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL, WR_QPP},
- {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL, WR_QPP},
- {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL, WR_QPP},
- {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL, WR_QPP},
- {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL, WR_QPP},
- {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL, WR_QPP},
- {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL, WR_QPP},
- {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL, WR_QPP},
- {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL, WR_QPP},
- {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL, WR_QPP},
- {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL, WR_QPP},
+ {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
+ {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
+ {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
+ {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
+ {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0},
+ {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0},
+ {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP},
+ {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP},
+ {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP},
+ {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP},
+ {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP},
+ {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP},
+ {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP},
+ {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP},
+ {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP},
+ {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP},
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
- {"M25P10", 0x202011, 0x0, 32 * 1024, 4, RD_NORM, 0},
- {"M25P20", 0x202012, 0x0, 64 * 1024, 4, RD_NORM, 0},
- {"M25P40", 0x202013, 0x0, 64 * 1024, 8, RD_NORM, 0},
- {"M25P80", 0x202014, 0x0, 64 * 1024, 16, RD_NORM, 0},
- {"M25P16", 0x202015, 0x0, 64 * 1024, 32, RD_NORM, 0},
- {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, RD_NORM, 0},
- {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_EXTN, 0},
- {"M25P32", 0x202016, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"M25P64", 0x202017, 0x0, 64 * 1024, 128, RD_NORM, 0},
- {"M25P128", 0x202018, 0x0, 256 * 1024, 64, RD_NORM, 0},
- {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K},
- {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
- {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
- {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
- {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
- {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
- {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
- {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
+ {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
+ {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
+ {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
+ {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
+ {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
+ {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0},
+ {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL},
+ {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
+ {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
+ {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
+ {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K},
+ {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K},
+ {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
+ {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
+ {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+ {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+ {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+ {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */
- {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR},
- {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR},
- {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K | SST_WR},
- {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K | SST_WR},
- {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, RD_NORM, SECT_4K | SST_WR},
- {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, RD_NORM, SECT_4K | SST_WR},
- {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K | SST_WR},
- {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR},
- {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K},
- {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR},
+ {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR},
+ {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR},
+ {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR},
+ {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR},
+ {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K},
+ {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR},
+ {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR},
+ {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR},
+ {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR},
+ {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, SECT_4K},
+ {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR},
#endif
#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
- {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, RD_NORM, 0},
- {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, RD_NORM, 0},
- {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, RD_NORM, 0},
- {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K},
- {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K},
- {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
- {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
- {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
- {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K},
+ {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
+ {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
+ {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
+ {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
+ {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
+ {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
+ {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
+ {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
+ {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K},
#endif
{}, /* Empty entry to terminate the list */
/*
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 64d4e0f..7f6e9ae 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1013,15 +1013,8 @@
struct spi_slave *spi = flash->spi;
const struct spi_flash_params *params;
u16 jedec, ext_jedec;
- u8 cmd, idcode[5];
+ u8 idcode[5];
int ret;
- static u8 spi_read_cmds_array[] = {
- CMD_READ_ARRAY_SLOW,
- CMD_READ_ARRAY_FAST,
- CMD_READ_DUAL_OUTPUT_FAST,
- CMD_READ_QUAD_OUTPUT_FAST,
- CMD_READ_DUAL_IO_FAST,
- CMD_READ_QUAD_IO_FAST };
/* Read the ID codes */
ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
@@ -1162,14 +1155,14 @@
flash->size <<= 1;
#endif
+#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
/* Compute erase sector and command */
if (params->flags & SECT_4K) {
flash->erase_cmd = CMD_ERASE_4K;
flash->erase_size = 4096 << flash->shift;
- } else if (params->flags & SECT_32K) {
- flash->erase_cmd = CMD_ERASE_32K;
- flash->erase_size = 32768 << flash->shift;
- } else {
+ } else
+#endif
+ {
flash->erase_cmd = CMD_ERASE_64K;
flash->erase_size = flash->sector_size;
}
@@ -1177,17 +1170,16 @@
/* Now erase size becomes valid sector size */
flash->sector_size = flash->erase_size;
- /* Look for the fastest read cmd */
- cmd = fls(params->e_rd_cmd & spi->mode_rx);
- if (cmd) {
- cmd = spi_read_cmds_array[cmd - 1];
- flash->read_cmd = cmd;
- } else {
- /* Go for default supported read cmd */
- flash->read_cmd = CMD_READ_ARRAY_FAST;
- }
+ /* Look for read commands */
+ flash->read_cmd = CMD_READ_ARRAY_FAST;
+ if (spi->mode & SPI_RX_SLOW)
+ flash->read_cmd = CMD_READ_ARRAY_SLOW;
+ else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD)
+ flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
+ else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL)
+ flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
- /* Not require to look for fastest only two write cmds yet */
+ /* Look for write commands */
if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
else
diff --git a/drivers/mtd/ubi/Kconfig b/drivers/mtd/ubi/Kconfig
new file mode 100644
index 0000000..0c82395
--- /dev/null
+++ b/drivers/mtd/ubi/Kconfig
@@ -0,0 +1,98 @@
+menu "UBI support"
+
+config MTD_UBI
+ bool "Enable UBI - Unsorted block images"
+ select CRC32
+ help
+ UBI is a software layer above MTD layer which admits of LVM-like
+ logical volumes on top of MTD devices, hides some complexities of
+ flash chips like wear and bad blocks and provides some other useful
+ capabilities. Please, consult the MTD web site for more details
+ (www.linux-mtd.infradead.org).
+
+if MTD_UBI
+
+config MTD_UBI_WL_THRESHOLD
+ int "UBI wear-leveling threshold"
+ default 4096
+ range 2 65536
+ help
+ This parameter defines the maximum difference between the highest
+ erase counter value and the lowest erase counter value of eraseblocks
+ of UBI devices. When this threshold is exceeded, UBI starts performing
+ wear leveling by means of moving data from eraseblock with low erase
+ counter to eraseblocks with high erase counter.
+
+ The default value should be OK for SLC NAND flashes, NOR flashes and
+ other flashes which have eraseblock life-cycle 100000 or more.
+ However, in case of MLC NAND flashes which typically have eraseblock
+ life-cycle less than 10000, the threshold should be lessened (e.g.,
+ to 128 or 256, although it does not have to be power of 2).
+
+config MTD_UBI_BEB_LIMIT
+ int "Maximum expected bad eraseblock count per 1024 eraseblocks"
+ default 20
+ range 0 768
+ help
+ This option specifies the maximum bad physical eraseblocks UBI
+ expects on the MTD device (per 1024 eraseblocks). If the underlying
+ flash does not admit of bad eraseblocks (e.g. NOR flash), this value
+ is ignored.
+
+ NAND datasheets often specify the minimum and maximum NVM (Number of
+ Valid Blocks) for the flashes' endurance lifetime. The maximum
+ expected bad eraseblocks per 1024 eraseblocks then can be calculated
+ as "1024 * (1 - MinNVB / MaxNVB)", which gives 20 for most NANDs
+ (MaxNVB is basically the total count of eraseblocks on the chip).
+
+ To put it differently, if this value is 20, UBI will try to reserve
+ about 1.9% of physical eraseblocks for bad blocks handling. And that
+ will be 1.9% of eraseblocks on the entire NAND chip, not just the MTD
+ partition UBI attaches. This means that if you have, say, a NAND
+ flash chip admits maximum 40 bad eraseblocks, and it is split on two
+ MTD partitions of the same size, UBI will reserve 40 eraseblocks when
+ attaching a partition.
+
+ This option can be overridden by the "mtd=" UBI module parameter or
+ by the "attach" ioctl.
+
+ Leave the default value if unsure.
+
+config MTD_UBI_FASTMAP
+ bool "UBI Fastmap (Experimental feature)"
+ default n
+ help
+ Important: this feature is experimental so far and the on-flash
+ format for fastmap may change in the next kernel versions
+
+ Fastmap is a mechanism which allows attaching an UBI device
+ in nearly constant time. Instead of scanning the whole MTD device it
+ only has to locate a checkpoint (called fastmap) on the device.
+ The on-flash fastmap contains all information needed to attach
+ the device. Using fastmap makes only sense on large devices where
+ attaching by scanning takes long. UBI will not automatically install
+ a fastmap on old images, but you can set the UBI module parameter
+ fm_autoconvert to 1 if you want so. Please note that fastmap-enabled
+ images are still usable with UBI implementations without
+ fastmap support. On typical flash devices the whole fastmap fits
+ into one PEB. UBI will reserve PEBs to hold two fastmaps.
+
+ If in doubt, say "N".
+
+config MTD_UBI_FASTMAP_AUTOCONVERT
+ int "enable UBI Fastmap autoconvert"
+ depends on MTD_UBI_FASTMAP
+ default 0
+ help
+ Set this parameter to enable fastmap automatically on images
+ without a fastmap.
+
+config MTD_UBI_FM_DEBUG
+ int "Enable UBI fastmap debug"
+ depends on MTD_UBI_FASTMAP
+ default 0
+ help
+ Enable UBI fastmap debug
+
+endif # MTD_UBI
+endmenu # "Enable UBI - Unsorted block images"
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index be3ed73..302c005 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -175,7 +175,7 @@
This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
config XILINX_EMACLITE
- depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
+ depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS)
select PHYLIB
select MII
bool "Xilinx Ethernetlite"
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index 81ccc61..d17505e 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -21,7 +21,7 @@
#include <net.h>
#include <netdev.h>
#include <cpsw.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <phy.h>
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index e871b3e..8e3b839 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -20,7 +20,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/sys_proto.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/compiler.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index 17a0886..89f0d6a 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <malloc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "fm.h"
#include <fsl_qe.h> /* For struct qe_firmware */
diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c
index 77b9739..bd56166 100644
--- a/drivers/net/fsl_mdio.c
+++ b/drivers/net/fsl_mdio.c
@@ -11,7 +11,7 @@
#include <phy.h>
#include <fsl_mdio.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr,
int dev_addr, int regnum, int value)
diff --git a/drivers/net/ftmac110.c b/drivers/net/ftmac110.c
index 8fa767a..bbe56f1 100644
--- a/drivers/net/ftmac110.c
+++ b/drivers/net/ftmac110.c
@@ -11,7 +11,7 @@
#include <command.h>
#include <malloc.h>
#include <net.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/dma-mapping.h>
diff --git a/drivers/net/lpc32xx_eth.c b/drivers/net/lpc32xx_eth.c
index 2dd69f3..cbef335 100644
--- a/drivers/net/lpc32xx_eth.c
+++ b/drivers/net/lpc32xx_eth.c
@@ -12,7 +12,7 @@
#include <malloc.h>
#include <miiphy.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/types.h>
#include <asm/system.h>
#include <asm/byteorder.h>
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 921537f..8c1774e 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -39,7 +39,7 @@
#include <asm/io.h>
#include <asm/dma-mapping.h>
#include <asm/arch/clk.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include "macb.h"
diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
index a1c7ea0..c784cdc 100644
--- a/drivers/net/mvgbe.c
+++ b/drivers/net/mvgbe.c
@@ -17,7 +17,7 @@
#include <malloc.h>
#include <miiphy.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/types.h>
#include <asm/system.h>
#include <asm/byteorder.h>
diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index fa20f54..6d51b9f 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -20,7 +20,7 @@
#include <config.h>
#include <malloc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <phy.h>
#include <miiphy.h>
#include <watchdog.h>
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 900a04c..340b85a 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -22,7 +22,7 @@
#include <config.h>
#include <malloc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <phy.h>
#include <miiphy.h>
#include <watchdog.h>
diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c
index 137818b..d40fff0 100644
--- a/drivers/net/pch_gbe.c
+++ b/drivers/net/pch_gbe.c
@@ -118,14 +118,14 @@
memset(rx_desc, 0, sizeof(struct pch_gbe_rx_desc) * PCH_GBE_DESC_NUM);
for (i = 0; i < PCH_GBE_DESC_NUM; i++)
rx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev,
- (u32)(priv->rx_buff[i]));
+ (ulong)(priv->rx_buff[i]));
- writel(dm_pci_phys_to_mem(priv->dev, (u32)rx_desc),
+ writel(dm_pci_phys_to_mem(priv->dev, (ulong)rx_desc),
&mac_regs->rx_dsc_base);
writel(sizeof(struct pch_gbe_rx_desc) * (PCH_GBE_DESC_NUM - 1),
&mac_regs->rx_dsc_size);
- writel(dm_pci_phys_to_mem(priv->dev, (u32)(rx_desc + 1)),
+ writel(dm_pci_phys_to_mem(priv->dev, (ulong)(rx_desc + 1)),
&mac_regs->rx_dsc_sw_p);
}
@@ -137,11 +137,11 @@
memset(tx_desc, 0, sizeof(struct pch_gbe_tx_desc) * PCH_GBE_DESC_NUM);
- writel(dm_pci_phys_to_mem(priv->dev, (u32)tx_desc),
+ writel(dm_pci_phys_to_mem(priv->dev, (ulong)tx_desc),
&mac_regs->tx_dsc_base);
writel(sizeof(struct pch_gbe_tx_desc) * (PCH_GBE_DESC_NUM - 1),
&mac_regs->tx_dsc_size);
- writel(dm_pci_phys_to_mem(priv->dev, (u32)(tx_desc + 1)),
+ writel(dm_pci_phys_to_mem(priv->dev, (ulong)(tx_desc + 1)),
&mac_regs->tx_dsc_sw_p);
}
@@ -251,7 +251,7 @@
if (length < 64)
frame_ctrl |= PCH_GBE_TXD_CTRL_APAD;
- tx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev, (u32)packet);
+ tx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev, (ulong)packet);
tx_desc->length = length;
tx_desc->tx_words_eob = length + 3;
tx_desc->tx_frame_ctrl = frame_ctrl;
@@ -262,7 +262,7 @@
if (++priv->tx_idx >= PCH_GBE_DESC_NUM)
priv->tx_idx = 0;
- writel(dm_pci_phys_to_mem(priv->dev, (u32)(tx_head + priv->tx_idx)),
+ writel(dm_pci_phys_to_mem(priv->dev, (ulong)(tx_head + priv->tx_idx)),
&mac_regs->tx_dsc_sw_p);
start = get_timer(0);
@@ -283,7 +283,7 @@
struct pch_gbe_priv *priv = dev_get_priv(dev);
struct pch_gbe_regs *mac_regs = priv->mac_regs;
struct pch_gbe_rx_desc *rx_desc;
- u32 hw_desc, buffer_addr, length;
+ ulong hw_desc, buffer_addr, length;
rx_desc = &priv->rx_desc[priv->rx_idx];
@@ -291,7 +291,7 @@
hw_desc = readl(&mac_regs->rx_dsc_hw_p_hld);
/* Just return if not receiving any packet */
- if ((u32)rx_desc == hw_desc)
+ if ((ulong)rx_desc == hw_desc)
return -EAGAIN;
buffer_addr = dm_pci_mem_to_phys(priv->dev, rx_desc->buffer_addr);
@@ -315,7 +315,7 @@
if (++rx_swp >= PCH_GBE_DESC_NUM)
rx_swp = 0;
- writel(dm_pci_phys_to_mem(priv->dev, (u32)(rx_head + rx_swp)),
+ writel(dm_pci_phys_to_mem(priv->dev, (ulong)(rx_head + rx_swp)),
&mac_regs->rx_dsc_sw_p);
return 0;
@@ -421,7 +421,7 @@
{
struct pch_gbe_priv *priv;
struct eth_pdata *plat = dev_get_platdata(dev);
- u32 iobase;
+ void *iobase;
/*
* The priv structure contains the descriptors and frame buffers which
@@ -432,11 +432,9 @@
priv->dev = dev;
- dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase);
- iobase &= PCI_BASE_ADDRESS_MEM_MASK;
- iobase = dm_pci_mem_to_phys(dev, iobase);
+ iobase = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_1, PCI_REGION_MEM);
- plat->iobase = iobase;
+ plat->iobase = (ulong)iobase;
priv->mac_regs = (struct pch_gbe_regs *)iobase;
/* Read MAC address from SROM and initialize dev->enetaddr with it */
diff --git a/drivers/net/phy/mv88e6352.c b/drivers/net/phy/mv88e6352.c
index f639a42..d2b3ce6 100644
--- a/drivers/net/phy/mv88e6352.c
+++ b/drivers/net/phy/mv88e6352.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <miiphy.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <mv88e6352.h>
#define SMI_HDR ((0x8 | 0x1) << 12)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 79c1db2..a7c265b 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -15,7 +15,7 @@
#include <net.h>
#include <netdev.h>
#include <miiphy.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include "sh_eth.h"
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index be0f382..7df4c63 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -16,7 +16,7 @@
#include <command.h>
#include <tsec.h>
#include <fsl_mdio.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/drivers/net/vsc7385.c b/drivers/net/vsc7385.c
index c6d6dce..0724210 100644
--- a/drivers/net/vsc7385.c
+++ b/drivers/net/vsc7385.c
@@ -16,7 +16,7 @@
#include <common.h>
#include <console.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "vsc7385.h"
/*
diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
index 7b85aa0..78ff44c 100644
--- a/drivers/net/xilinx_emaclite.c
+++ b/drivers/net/xilinx_emaclite.c
@@ -17,8 +17,9 @@
#include <phy.h>
#include <miiphy.h>
#include <fdtdec.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include <linux/kernel.h>
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -154,7 +155,7 @@
unsigned long start = get_timer(0);
while (1) {
- val = readl(reg);
+ val = __raw_readl(reg);
if (!set)
val = ~val;
@@ -193,16 +194,17 @@
if (mdio_wait(regs))
return 1;
- u32 ctrl_reg = in_be32(®s->mdioctrl);
- out_be32(®s->mdioaddr, XEL_MDIOADDR_OP_MASK |
- ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) | registernum));
- out_be32(®s->mdioctrl, ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
+ u32 ctrl_reg = __raw_readl(®s->mdioctrl);
+ __raw_writel(XEL_MDIOADDR_OP_MASK
+ | ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT)
+ | registernum), ®s->mdioaddr);
+ __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, ®s->mdioctrl);
if (mdio_wait(regs))
return 1;
/* Read data */
- *data = in_be32(®s->mdiord);
+ *data = __raw_readl(®s->mdiord);
return 0;
}
@@ -220,11 +222,12 @@
* Data register. Finally, set the Status bit in the MDIO Control
* register to start a MDIO write transaction.
*/
- u32 ctrl_reg = in_be32(®s->mdioctrl);
- out_be32(®s->mdioaddr, ~XEL_MDIOADDR_OP_MASK &
- ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) | registernum));
- out_be32(®s->mdiowr, data);
- out_be32(®s->mdioctrl, ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
+ u32 ctrl_reg = __raw_readl(®s->mdioctrl);
+ __raw_writel(~XEL_MDIOADDR_OP_MASK
+ & ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT)
+ | registernum), ®s->mdioaddr);
+ __raw_writel(data, ®s->mdiowr);
+ __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, ®s->mdioctrl);
if (mdio_wait(regs))
return 1;
@@ -327,27 +330,27 @@
* TX - TX_PING & TX_PONG initialization
*/
/* Restart PING TX */
- out_be32(®s->tx_ping_tsr, 0);
+ __raw_writel(0, ®s->tx_ping_tsr);
/* Copy MAC address */
xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_ping,
ENET_ADDR_LENGTH);
/* Set the length */
- out_be32(®s->tx_ping_tplr, ENET_ADDR_LENGTH);
+ __raw_writel(ENET_ADDR_LENGTH, ®s->tx_ping_tplr);
/* Update the MAC address in the EMAC Lite */
- out_be32(®s->tx_ping_tsr, XEL_TSR_PROG_MAC_ADDR);
+ __raw_writel(XEL_TSR_PROG_MAC_ADDR, ®s->tx_ping_tsr);
/* Wait for EMAC Lite to finish with the MAC address update */
- while ((in_be32 (®s->tx_ping_tsr) &
+ while ((__raw_readl(®s->tx_ping_tsr) &
XEL_TSR_PROG_MAC_ADDR) != 0)
;
if (emaclite->txpp) {
/* The same operation with PONG TX */
- out_be32(®s->tx_pong_tsr, 0);
+ __raw_writel(0, ®s->tx_pong_tsr);
xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_pong,
ENET_ADDR_LENGTH);
- out_be32(®s->tx_pong_tplr, ENET_ADDR_LENGTH);
- out_be32(®s->tx_pong_tsr, XEL_TSR_PROG_MAC_ADDR);
- while ((in_be32(®s->tx_pong_tsr) &
+ __raw_writel(ENET_ADDR_LENGTH, ®s->tx_pong_tplr);
+ __raw_writel(XEL_TSR_PROG_MAC_ADDR, ®s->tx_pong_tsr);
+ while ((__raw_readl(®s->tx_pong_tsr) &
XEL_TSR_PROG_MAC_ADDR) != 0)
;
}
@@ -356,13 +359,13 @@
* RX - RX_PING & RX_PONG initialization
*/
/* Write out the value to flush the RX buffer */
- out_be32(®s->rx_ping_rsr, XEL_RSR_RECV_IE_MASK);
+ __raw_writel(XEL_RSR_RECV_IE_MASK, ®s->rx_ping_rsr);
if (emaclite->rxpp)
- out_be32(®s->rx_pong_rsr, XEL_RSR_RECV_IE_MASK);
+ __raw_writel(XEL_RSR_RECV_IE_MASK, ®s->rx_pong_rsr);
- out_be32(®s->mdioctrl, XEL_MDIOCTRL_MDIOEN_MASK);
- if (in_be32(®s->mdioctrl) & XEL_MDIOCTRL_MDIOEN_MASK)
+ __raw_writel(XEL_MDIOCTRL_MDIOEN_MASK, ®s->mdioctrl);
+ if (__raw_readl(®s->mdioctrl) & XEL_MDIOCTRL_MDIOEN_MASK)
if (!setup_phy(dev))
return -1;
@@ -379,9 +382,9 @@
* Read the other buffer register
* and determine if the other buffer is available
*/
- tmp = ~in_be32(®s->tx_ping_tsr);
+ tmp = ~__raw_readl(®s->tx_ping_tsr);
if (emaclite->txpp)
- tmp |= ~in_be32(®s->tx_pong_tsr);
+ tmp |= ~__raw_readl(®s->tx_pong_tsr);
return !(tmp & XEL_TSR_XMIT_BUSY_MASK);
}
@@ -405,40 +408,42 @@
if (!maxtry) {
printf("Error: Timeout waiting for ethernet TX buffer\n");
/* Restart PING TX */
- out_be32(®s->tx_ping_tsr, 0);
+ __raw_writel(0, ®s->tx_ping_tsr);
if (emaclite->txpp) {
- out_be32(®s->tx_pong_tsr, 0);
+ __raw_writel(0, ®s->tx_pong_tsr);
}
return -1;
}
/* Determine if the expected buffer address is empty */
- reg = in_be32(®s->tx_ping_tsr);
+ reg = __raw_readl(®s->tx_ping_tsr);
if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) {
debug("Send packet from tx_ping buffer\n");
/* Write the frame to the buffer */
xemaclite_alignedwrite(ptr, ®s->tx_ping, len);
- out_be32(®s->tx_ping_tplr, len &
- (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO));
- reg = in_be32(®s->tx_ping_tsr);
+ __raw_writel(len
+ & (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO),
+ ®s->tx_ping_tplr);
+ reg = __raw_readl(®s->tx_ping_tsr);
reg |= XEL_TSR_XMIT_BUSY_MASK;
- out_be32(®s->tx_ping_tsr, reg);
+ __raw_writel(reg, ®s->tx_ping_tsr);
return 0;
}
if (emaclite->txpp) {
/* Determine if the expected buffer address is empty */
- reg = in_be32(®s->tx_pong_tsr);
+ reg = __raw_readl(®s->tx_pong_tsr);
if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) {
debug("Send packet from tx_pong buffer\n");
/* Write the frame to the buffer */
xemaclite_alignedwrite(ptr, ®s->tx_pong, len);
- out_be32(®s->tx_pong_tplr, len &
+ __raw_writel(len &
(XEL_TPLR_LENGTH_MASK_HI |
- XEL_TPLR_LENGTH_MASK_LO));
- reg = in_be32(®s->tx_pong_tsr);
+ XEL_TPLR_LENGTH_MASK_LO),
+ ®s->tx_pong_tplr);
+ reg = __raw_readl(®s->tx_pong_tsr);
reg |= XEL_TSR_XMIT_BUSY_MASK;
- out_be32(®s->tx_pong_tsr, reg);
+ __raw_writel(reg, ®s->tx_pong_tsr);
return 0;
}
}
@@ -458,7 +463,7 @@
try_again:
if (!emaclite->use_rx_pong_buffer_next) {
- reg = in_be32(®s->rx_ping_rsr);
+ reg = __raw_readl(®s->rx_ping_rsr);
debug("Testing data at rx_ping\n");
if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
debug("Data found in rx_ping buffer\n");
@@ -478,7 +483,7 @@
goto try_again;
}
} else {
- reg = in_be32(®s->rx_pong_rsr);
+ reg = __raw_readl(®s->rx_pong_rsr);
debug("Testing data at rx_pong\n");
if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
debug("Data found in rx_pong buffer\n");
@@ -525,9 +530,9 @@
length - first_read);
/* Acknowledge the frame */
- reg = in_be32(ack);
+ reg = __raw_readl(ack);
reg &= ~XEL_RSR_RECV_DONE_MASK;
- out_be32(ack, reg);
+ __raw_writel(reg, ack);
debug("Packet receive from 0x%p, length %dB\n", addr, length);
*packetp = etherrxbuff;
@@ -595,7 +600,8 @@
int offset = 0;
pdata->iobase = (phys_addr_t)dev_get_addr(dev);
- emaclite->regs = (struct emaclite_regs *)pdata->iobase;
+ emaclite->regs = (struct emaclite_regs *)ioremap_nocache(pdata->iobase,
+ 0x10000);
emaclite->phyaddr = -1;
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 519699d..8b7c1be 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -24,7 +24,7 @@
#include <asm/system.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 669e37b..9a7c187 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -39,4 +39,11 @@
with a total of 5 lanes. Some boards require this for Ethernet
support to work (e.g. beaver, jetson-tk1).
+config PCI_XILINX
+ bool "Xilinx AXI Bridge for PCI Express"
+ depends on DM_PCI
+ help
+ Enable support for the Xilinx AXI bridge for PCI express, an IP block
+ which can be used on some generations of Xilinx FPGAs.
+
endmenu
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index f8be9bf..9583e91 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -31,3 +31,4 @@
obj-$(CONFIG_TSI108_PCI) += tsi108_pci.o
obj-$(CONFIG_WINBOND_83C553) += w83c553f.o
obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
+obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 342b78c..3b00e6a 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -837,7 +837,7 @@
hose = bus->uclass_priv;
/* For bridges, use the top-level PCI controller */
- if (device_get_uclass_id(bus->parent) == UCLASS_ROOT) {
+ if (!device_is_on_pci_bus(bus)) {
hose->ctlr = bus;
ret = decode_regions(hose, gd->fdt_blob, bus->parent->of_offset,
bus->of_offset);
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index 4eedfe1..0f44970 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -12,7 +12,7 @@
#include <common.h>
#include <pci.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
new file mode 100644
index 0000000..5216001
--- /dev/null
+++ b/drivers/pci/pcie_xilinx.c
@@ -0,0 +1,220 @@
+/*
+ * Xilinx AXI Bridge for PCI Express Driver
+ *
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pci.h>
+
+#include <asm/io.h>
+
+/**
+ * struct xilinx_pcie - Xilinx PCIe controller state
+ * @hose: The parent classes PCI controller state
+ * @cfg_base: The base address of memory mapped configuration space
+ */
+struct xilinx_pcie {
+ struct pci_controller hose;
+ void *cfg_base;
+};
+
+/* Register definitions */
+#define XILINX_PCIE_REG_PSCR 0x144
+#define XILINX_PCIE_REG_PSCR_LNKUP BIT(11)
+
+/**
+ * pcie_xilinx_link_up() - Check whether the PCIe link is up
+ * @pcie: Pointer to the PCI controller state
+ *
+ * Checks whether the PCIe link for the given device is up or down.
+ *
+ * Return: true if the link is up, else false
+ */
+static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie)
+{
+ uint32_t pscr = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_PSCR);
+
+ return pscr & XILINX_PCIE_REG_PSCR_LNKUP;
+}
+
+/**
+ * pcie_xilinx_config_address() - Calculate the address of a config access
+ * @pcie: Pointer to the PCI controller state
+ * @bdf: Identifies the PCIe device to access
+ * @offset: The offset into the device's configuration space
+ * @paddress: Pointer to the pointer to write the calculates address to
+ *
+ * Calculates the address that should be accessed to perform a PCIe
+ * configuration space access for a given device identified by the PCIe
+ * controller device @pcie and the bus, device & function numbers in @bdf. If
+ * access to the device is not valid then the function will return an error
+ * code. Otherwise the address to access will be written to the pointer pointed
+ * to by @paddress.
+ *
+ * Return: 0 on success, else -ENODEV
+ */
+static int pcie_xilinx_config_address(struct xilinx_pcie *pcie, pci_dev_t bdf,
+ uint offset, void **paddress)
+{
+ unsigned int bus = PCI_BUS(bdf);
+ unsigned int dev = PCI_DEV(bdf);
+ unsigned int func = PCI_FUNC(bdf);
+ void *addr;
+
+ if ((bus > 0) && !pcie_xilinx_link_up(pcie))
+ return -ENODEV;
+
+ /*
+ * Busses 0 (host-PCIe bridge) & 1 (its immediate child) are
+ * limited to a single device each.
+ */
+ if ((bus < 2) && (dev > 0))
+ return -ENODEV;
+
+ addr = pcie->cfg_base;
+ addr += bus << 20;
+ addr += dev << 15;
+ addr += func << 12;
+ addr += offset;
+ *paddress = addr;
+
+ return 0;
+}
+
+/**
+ * pcie_xilinx_read_config() - Read from configuration space
+ * @pcie: Pointer to the PCI controller state
+ * @bdf: Identifies the PCIe device to access
+ * @offset: The offset into the device's configuration space
+ * @valuep: A pointer at which to store the read value
+ * @size: Indicates the size of access to perform
+ *
+ * Read a value of size @size from offset @offset within the configuration
+ * space of the device identified by the bus, device & function numbers in @bdf
+ * on the PCI bus @bus.
+ *
+ * Return: 0 on success, else -ENODEV or -EINVAL
+ */
+static int pcie_xilinx_read_config(struct udevice *bus, pci_dev_t bdf,
+ uint offset, ulong *valuep,
+ enum pci_size_t size)
+{
+ struct xilinx_pcie *pcie = dev_get_priv(bus);
+ void *address;
+ int err;
+
+ err = pcie_xilinx_config_address(pcie, bdf, offset, &address);
+ if (err < 0) {
+ *valuep = pci_get_ff(size);
+ return 0;
+ }
+
+ switch (size) {
+ case PCI_SIZE_8:
+ *valuep = __raw_readb(address);
+ return 0;
+ case PCI_SIZE_16:
+ *valuep = __raw_readw(address);
+ return 0;
+ case PCI_SIZE_32:
+ *valuep = __raw_readl(address);
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
+/**
+ * pcie_xilinx_write_config() - Write to configuration space
+ * @pcie: Pointer to the PCI controller state
+ * @bdf: Identifies the PCIe device to access
+ * @offset: The offset into the device's configuration space
+ * @value: The value to write
+ * @size: Indicates the size of access to perform
+ *
+ * Write the value @value of size @size from offset @offset within the
+ * configuration space of the device identified by the bus, device & function
+ * numbers in @bdf on the PCI bus @bus.
+ *
+ * Return: 0 on success, else -ENODEV or -EINVAL
+ */
+static int pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf,
+ uint offset, ulong value,
+ enum pci_size_t size)
+{
+ struct xilinx_pcie *pcie = dev_get_priv(bus);
+ void *address;
+ int err;
+
+ err = pcie_xilinx_config_address(pcie, bdf, offset, &address);
+ if (err < 0)
+ return 0;
+
+ switch (size) {
+ case PCI_SIZE_8:
+ __raw_writeb(value, address);
+ return 0;
+ case PCI_SIZE_16:
+ __raw_writew(value, address);
+ return 0;
+ case PCI_SIZE_32:
+ __raw_writel(value, address);
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
+/**
+ * pcie_xilinx_ofdata_to_platdata() - Translate from DT to device state
+ * @dev: A pointer to the device being operated on
+ *
+ * Translate relevant data from the device tree pertaining to device @dev into
+ * state that the driver will later make use of. This state is stored in the
+ * device's private data structure.
+ *
+ * Return: 0 on success, else -EINVAL
+ */
+static int pcie_xilinx_ofdata_to_platdata(struct udevice *dev)
+{
+ struct xilinx_pcie *pcie = dev_get_priv(dev);
+ struct fdt_resource reg_res;
+ DECLARE_GLOBAL_DATA_PTR;
+ int err;
+
+ err = fdt_get_resource(gd->fdt_blob, dev->of_offset, "reg",
+ 0, ®_res);
+ if (err < 0) {
+ error("\"reg\" resource not found\n");
+ return err;
+ }
+
+ pcie->cfg_base = map_physmem(reg_res.start,
+ fdt_resource_size(®_res),
+ MAP_NOCACHE);
+
+ return 0;
+}
+
+static const struct dm_pci_ops pcie_xilinx_ops = {
+ .read_config = pcie_xilinx_read_config,
+ .write_config = pcie_xilinx_write_config,
+};
+
+static const struct udevice_id pcie_xilinx_ids[] = {
+ { .compatible = "xlnx,axi-pcie-host-1.00.a" },
+ { }
+};
+
+U_BOOT_DRIVER(pcie_xilinx) = {
+ .name = "pcie_xilinx",
+ .id = UCLASS_PCI,
+ .of_match = pcie_xilinx_ids,
+ .ops = &pcie_xilinx_ops,
+ .ofdata_to_platdata = pcie_xilinx_ofdata_to_platdata,
+ .priv_auto_alloc_size = sizeof(struct xilinx_pcie),
+};
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index f8cfd4b..12be3cf 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -148,6 +148,15 @@
This option is to enable the AT91 pinctrl driver for AT91 PIO4
controller which is available on SAMA5D2 SoC.
+config ROCKCHIP_RK3399_PINCTRL
+ bool "Rockchip pin control driver"
+ depends on DM
+ help
+ Support pin multiplexing control on Rockchip rk3399 SoCs. The driver
+ is controlled by a device tree node which contains both the GPIO
+ definitions and pin control functions for each available multiplex
+ function.
+
config PINCTRL_SANDBOX
bool "Sandbox pinctrl driver"
depends on SANDBOX
diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
index 64e9587..805c833 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -7,3 +7,4 @@
obj-$(CONFIG_ROCKCHIP_RK3036_PINCTRL) += pinctrl_rk3036.o
obj-$(CONFIG_ROCKCHIP_RK3288_PINCTRL) += pinctrl_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3399_PINCTRL) += pinctrl_rk3399.o
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
new file mode 100644
index 0000000..17ea165
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
@@ -0,0 +1,439 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/grf_rk3399.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/clock.h>
+#include <dm/pinctrl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rk3399_pinctrl_priv {
+ struct rk3399_grf_regs *grf;
+ struct rk3399_pmugrf_regs *pmugrf;
+};
+
+enum {
+ /* GRF_GPIO2B_IOMUX */
+ GRF_GPIO2B1_SEL_SHIFT = 0,
+ GRF_GPIO2B1_SEL_MASK = 3 << GRF_GPIO2B1_SEL_SHIFT,
+ GRF_SPI2TPM_RXD = 1,
+ GRF_GPIO2B2_SEL_SHIFT = 2,
+ GRF_GPIO2B2_SEL_MASK = 3 << GRF_GPIO2B2_SEL_SHIFT,
+ GRF_SPI2TPM_TXD = 1,
+ GRF_GPIO2B3_SEL_SHIFT = 6,
+ GRF_GPIO2B3_SEL_MASK = 3 << GRF_GPIO2B3_SEL_SHIFT,
+ GRF_SPI2TPM_CLK = 1,
+ GRF_GPIO2B4_SEL_SHIFT = 8,
+ GRF_GPIO2B4_SEL_MASK = 3 << GRF_GPIO2B4_SEL_SHIFT,
+ GRF_SPI2TPM_CSN0 = 1,
+
+ /* GRF_GPIO3A_IOMUX */
+ GRF_GPIO3A4_SEL_SHIFT = 8,
+ GRF_GPIO3A4_SEL_MASK = 3 << GRF_GPIO3A4_SEL_SHIFT,
+ GRF_SPI0NORCODEC_RXD = 2,
+ GRF_GPIO3A5_SEL_SHIFT = 10,
+ GRF_GPIO3A5_SEL_MASK = 3 << GRF_GPIO3A5_SEL_SHIFT,
+ GRF_SPI0NORCODEC_TXD = 2,
+ GRF_GPIO3A6_SEL_SHIFT = 12,
+ GRF_GPIO3A6_SEL_MASK = 3 << GRF_GPIO3A6_SEL_SHIFT,
+ GRF_SPI0NORCODEC_CLK = 2,
+ GRF_GPIO3A7_SEL_SHIFT = 14,
+ GRF_GPIO3A7_SEL_MASK = 3 << GRF_GPIO3A7_SEL_SHIFT,
+ GRF_SPI0NORCODEC_CSN0 = 2,
+
+ /* GRF_GPIO3B_IOMUX */
+ GRF_GPIO3B0_SEL_SHIFT = 0,
+ GRF_GPIO3B0_SEL_MASK = 3 << GRF_GPIO3B0_SEL_SHIFT,
+ GRF_SPI0NORCODEC_CSN1 = 2,
+
+ /* GRF_GPIO4B_IOMUX */
+ GRF_GPIO4B0_SEL_SHIFT = 0,
+ GRF_GPIO4B0_SEL_MASK = 3 << GRF_GPIO4B0_SEL_SHIFT,
+ GRF_SDMMC_DATA0 = 1,
+ GRF_UART2DBGA_SIN = 2,
+ GRF_GPIO4B1_SEL_SHIFT = 2,
+ GRF_GPIO4B1_SEL_MASK = 3 << GRF_GPIO4B1_SEL_SHIFT,
+ GRF_SDMMC_DATA1 = 1,
+ GRF_UART2DBGA_SOUT = 2,
+ GRF_GPIO4B2_SEL_SHIFT = 4,
+ GRF_GPIO4B2_SEL_MASK = 3 << GRF_GPIO4B2_SEL_SHIFT,
+ GRF_SDMMC_DATA2 = 1,
+ GRF_GPIO4B3_SEL_SHIFT = 6,
+ GRF_GPIO4B3_SEL_MASK = 3 << GRF_GPIO4B3_SEL_SHIFT,
+ GRF_SDMMC_DATA3 = 1,
+ GRF_GPIO4B4_SEL_SHIFT = 8,
+ GRF_GPIO4B4_SEL_MASK = 3 << GRF_GPIO4B4_SEL_SHIFT,
+ GRF_SDMMC_CLKOUT = 1,
+ GRF_GPIO4B5_SEL_SHIFT = 10,
+ GRF_GPIO4B5_SEL_MASK = 3 << GRF_GPIO4B5_SEL_SHIFT,
+ GRF_SDMMC_CMD = 1,
+
+ /* GRF_GPIO4C_IOMUX */
+ GRF_GPIO4C2_SEL_SHIFT = 4,
+ GRF_GPIO4C2_SEL_MASK = 3 << GRF_GPIO4C2_SEL_SHIFT,
+ GRF_PWM_0 = 1,
+ GRF_GPIO4C3_SEL_SHIFT = 6,
+ GRF_GPIO4C3_SEL_MASK = 3 << GRF_GPIO4C3_SEL_SHIFT,
+ GRF_UART2DGBC_SIN = 1,
+ GRF_GPIO4C4_SEL_SHIFT = 8,
+ GRF_GPIO4C4_SEL_MASK = 3 << GRF_GPIO4C4_SEL_SHIFT,
+ GRF_UART2DBGC_SOUT = 1,
+ GRF_GPIO4C6_SEL_SHIFT = 12,
+ GRF_GPIO4C6_SEL_MASK = 3 << GRF_GPIO4C6_SEL_SHIFT,
+ GRF_PWM_1 = 1,
+
+ /* PMUGRF_GPIO0A_IOMUX */
+ PMUGRF_GPIO0A6_SEL_SHIFT = 12,
+ PMUGRF_GPIO0A6_SEL_MASK = 3 << PMUGRF_GPIO0A6_SEL_SHIFT,
+ PMUGRF_PWM_3A = 1,
+
+ /* PMUGRF_GPIO1A_IOMUX */
+ PMUGRF_GPIO1A7_SEL_SHIFT = 14,
+ PMUGRF_GPIO1A7_SEL_MASK = 3 << PMUGRF_GPIO1A7_SEL_SHIFT,
+ PMUGRF_SPI1EC_RXD = 2,
+
+ /* PMUGRF_GPIO1B_IOMUX */
+ PMUGRF_GPIO1B0_SEL_SHIFT = 0,
+ PMUGRF_GPIO1B0_SEL_MASK = 3 << PMUGRF_GPIO1B0_SEL_SHIFT,
+ PMUGRF_SPI1EC_TXD = 2,
+ PMUGRF_GPIO1B1_SEL_SHIFT = 2,
+ PMUGRF_GPIO1B1_SEL_MASK = 3 << PMUGRF_GPIO1B1_SEL_SHIFT,
+ PMUGRF_SPI1EC_CLK = 2,
+ PMUGRF_GPIO1B2_SEL_SHIFT = 4,
+ PMUGRF_GPIO1B2_SEL_MASK = 3 << PMUGRF_GPIO1B2_SEL_SHIFT,
+ PMUGRF_SPI1EC_CSN0 = 2,
+ PMUGRF_GPIO1B6_SEL_SHIFT = 12,
+ PMUGRF_GPIO1B6_SEL_MASK = 3 << PMUGRF_GPIO1B6_SEL_SHIFT,
+ PMUGRF_PWM_3B = 1,
+ PMUGRF_GPIO1B7_SEL_SHIFT = 14,
+ PMUGRF_GPIO1B7_SEL_MASK = 3 << PMUGRF_GPIO1B7_SEL_SHIFT,
+ PMUGRF_I2C0PMU_SDA = 2,
+
+ /* PMUGRF_GPIO1C_IOMUX */
+ PMUGRF_GPIO1C0_SEL_SHIFT = 0,
+ PMUGRF_GPIO1C0_SEL_MASK = 3 << PMUGRF_GPIO1C0_SEL_SHIFT,
+ PMUGRF_I2C0PMU_SCL = 2,
+ PMUGRF_GPIO1C3_SEL_SHIFT = 6,
+ PMUGRF_GPIO1C3_SEL_MASK = 3 << PMUGRF_GPIO1C3_SEL_SHIFT,
+ PMUGRF_PWM_2 = 1,
+
+};
+static void pinctrl_rk3399_pwm_config(struct rk3399_grf_regs *grf,
+ struct rk3399_pmugrf_regs *pmugrf, int pwm_id)
+{
+ switch (pwm_id) {
+ case PERIPH_ID_PWM0:
+ rk_clrsetreg(&grf->gpio4c_iomux,
+ GRF_GPIO4C2_SEL_MASK,
+ GRF_PWM_0 << GRF_GPIO4C2_SEL_SHIFT);
+ break;
+ case PERIPH_ID_PWM1:
+ rk_clrsetreg(&grf->gpio4c_iomux,
+ GRF_GPIO4C6_SEL_MASK,
+ GRF_PWM_1 << GRF_GPIO4C6_SEL_SHIFT);
+ break;
+ case PERIPH_ID_PWM2:
+ rk_clrsetreg(&pmugrf->gpio1c_iomux,
+ PMUGRF_GPIO1C3_SEL_MASK,
+ PMUGRF_PWM_2 << PMUGRF_GPIO1C3_SEL_SHIFT);
+ break;
+ case PERIPH_ID_PWM3:
+ if (readl(&pmugrf->soc_con0) & (1 << 5))
+ rk_clrsetreg(&pmugrf->gpio1b_iomux,
+ PMUGRF_GPIO1B6_SEL_MASK,
+ PMUGRF_PWM_3B << PMUGRF_GPIO1B6_SEL_SHIFT);
+ else
+ rk_clrsetreg(&pmugrf->gpio0a_iomux,
+ PMUGRF_GPIO0A6_SEL_MASK,
+ PMUGRF_PWM_3A << PMUGRF_GPIO0A6_SEL_SHIFT);
+ break;
+ default:
+ debug("pwm id = %d iomux error!\n", pwm_id);
+ break;
+ }
+}
+
+static void pinctrl_rk3399_i2c_config(struct rk3399_grf_regs *grf,
+ struct rk3399_pmugrf_regs *pmugrf,
+ int i2c_id)
+{
+ switch (i2c_id) {
+ case PERIPH_ID_I2C0:
+ rk_clrsetreg(&pmugrf->gpio1b_iomux,
+ PMUGRF_GPIO1B7_SEL_MASK,
+ PMUGRF_I2C0PMU_SDA << PMUGRF_GPIO1B7_SEL_SHIFT);
+ rk_clrsetreg(&pmugrf->gpio1c_iomux,
+ PMUGRF_GPIO1C0_SEL_MASK,
+ PMUGRF_I2C0PMU_SCL << PMUGRF_GPIO1C0_SEL_SHIFT);
+ break;
+ case PERIPH_ID_I2C1:
+ case PERIPH_ID_I2C2:
+ case PERIPH_ID_I2C3:
+ case PERIPH_ID_I2C4:
+ case PERIPH_ID_I2C5:
+ default:
+ debug("i2c id = %d iomux error!\n", i2c_id);
+ break;
+ }
+}
+
+static void pinctrl_rk3399_lcdc_config(struct rk3399_grf_regs *grf, int lcd_id)
+{
+ switch (lcd_id) {
+ case PERIPH_ID_LCDC0:
+ break;
+ default:
+ debug("lcdc id = %d iomux error!\n", lcd_id);
+ break;
+ }
+}
+
+static int pinctrl_rk3399_spi_config(struct rk3399_grf_regs *grf,
+ struct rk3399_pmugrf_regs *pmugrf,
+ enum periph_id spi_id, int cs)
+{
+ switch (spi_id) {
+ case PERIPH_ID_SPI0:
+ switch (cs) {
+ case 0:
+ rk_clrsetreg(&grf->gpio3a_iomux,
+ GRF_GPIO3A7_SEL_MASK,
+ GRF_SPI0NORCODEC_CSN0
+ << GRF_GPIO3A7_SEL_SHIFT);
+ break;
+ case 1:
+ rk_clrsetreg(&grf->gpio3b_iomux,
+ GRF_GPIO3B0_SEL_MASK,
+ GRF_SPI0NORCODEC_CSN1
+ << GRF_GPIO3B0_SEL_SHIFT);
+ break;
+ default:
+ goto err;
+ }
+ rk_clrsetreg(&grf->gpio3a_iomux,
+ GRF_GPIO3A4_SEL_MASK | GRF_GPIO3A5_SEL_SHIFT
+ | GRF_GPIO3A6_SEL_SHIFT,
+ GRF_SPI0NORCODEC_RXD << GRF_GPIO3A4_SEL_SHIFT
+ | GRF_SPI0NORCODEC_RXD << GRF_GPIO3A5_SEL_SHIFT
+ | GRF_SPI0NORCODEC_RXD << GRF_GPIO3A6_SEL_SHIFT);
+ break;
+ case PERIPH_ID_SPI1:
+ if (cs != 0)
+ goto err;
+ rk_clrsetreg(&pmugrf->gpio1a_iomux,
+ PMUGRF_GPIO1A7_SEL_MASK,
+ PMUGRF_SPI1EC_RXD << PMUGRF_GPIO1A7_SEL_SHIFT);
+ rk_clrsetreg(&pmugrf->gpio1b_iomux,
+ PMUGRF_GPIO1B0_SEL_MASK | PMUGRF_GPIO1B1_SEL_MASK
+ | PMUGRF_GPIO1B2_SEL_MASK,
+ PMUGRF_SPI1EC_TXD << PMUGRF_GPIO1B0_SEL_SHIFT
+ | PMUGRF_SPI1EC_CLK << PMUGRF_GPIO1B1_SEL_SHIFT
+ | PMUGRF_SPI1EC_CSN0 << PMUGRF_GPIO1B2_SEL_SHIFT);
+ break;
+ case PERIPH_ID_SPI2:
+ if (cs != 0)
+ goto err;
+ rk_clrsetreg(&grf->gpio2b_iomux,
+ GRF_GPIO2B1_SEL_MASK | GRF_GPIO2B2_SEL_MASK
+ | GRF_GPIO2B3_SEL_MASK | GRF_GPIO2B4_SEL_MASK,
+ GRF_SPI2TPM_RXD << GRF_GPIO2B1_SEL_SHIFT
+ | GRF_SPI2TPM_TXD << GRF_GPIO2B2_SEL_SHIFT
+ | GRF_SPI2TPM_CLK << GRF_GPIO2B3_SEL_SHIFT
+ | GRF_SPI2TPM_CSN0 << GRF_GPIO2B4_SEL_SHIFT);
+ break;
+ default:
+ goto err;
+ }
+
+ return 0;
+err:
+ debug("rkspi: periph%d cs=%d not supported", spi_id, cs);
+ return -ENOENT;
+}
+
+static void pinctrl_rk3399_uart_config(struct rk3399_grf_regs *grf,
+ struct rk3399_pmugrf_regs *pmugrf,
+ int uart_id)
+{
+ switch (uart_id) {
+ case PERIPH_ID_UART2:
+ /* Using channel-C by default */
+ rk_clrsetreg(&grf->gpio4c_iomux,
+ GRF_GPIO4C3_SEL_MASK,
+ GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
+ rk_clrsetreg(&grf->gpio4c_iomux,
+ GRF_GPIO4C4_SEL_MASK,
+ GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
+ break;
+ case PERIPH_ID_UART0:
+ case PERIPH_ID_UART1:
+ case PERIPH_ID_UART3:
+ case PERIPH_ID_UART4:
+ default:
+ debug("uart id = %d iomux error!\n", uart_id);
+ break;
+ }
+}
+
+static void pinctrl_rk3399_sdmmc_config(struct rk3399_grf_regs *grf, int mmc_id)
+{
+ switch (mmc_id) {
+ case PERIPH_ID_EMMC:
+ break;
+ case PERIPH_ID_SDCARD:
+ rk_clrsetreg(&grf->gpio4b_iomux,
+ GRF_GPIO4B0_SEL_MASK | GRF_GPIO4B1_SEL_MASK
+ | GRF_GPIO4B2_SEL_MASK | GRF_GPIO4B3_SEL_MASK
+ | GRF_GPIO4B4_SEL_MASK | GRF_GPIO4B5_SEL_MASK,
+ GRF_SDMMC_DATA0 << GRF_GPIO4B0_SEL_SHIFT
+ | GRF_SDMMC_DATA1 << GRF_GPIO4B1_SEL_SHIFT
+ | GRF_SDMMC_DATA2 << GRF_GPIO4B2_SEL_SHIFT
+ | GRF_SDMMC_DATA3 << GRF_GPIO4B3_SEL_SHIFT
+ | GRF_SDMMC_CLKOUT << GRF_GPIO4B4_SEL_SHIFT
+ | GRF_SDMMC_CMD << GRF_GPIO4B5_SEL_SHIFT);
+ break;
+ default:
+ debug("mmc id = %d iomux error!\n", mmc_id);
+ break;
+ }
+}
+
+static int rk3399_pinctrl_request(struct udevice *dev, int func, int flags)
+{
+ struct rk3399_pinctrl_priv *priv = dev_get_priv(dev);
+
+ debug("%s: func=%x, flags=%x\n", __func__, func, flags);
+ switch (func) {
+ case PERIPH_ID_PWM0:
+ case PERIPH_ID_PWM1:
+ case PERIPH_ID_PWM2:
+ case PERIPH_ID_PWM3:
+ case PERIPH_ID_PWM4:
+ pinctrl_rk3399_pwm_config(priv->grf, priv->pmugrf, func);
+ break;
+ case PERIPH_ID_I2C0:
+ case PERIPH_ID_I2C1:
+ case PERIPH_ID_I2C2:
+ case PERIPH_ID_I2C3:
+ case PERIPH_ID_I2C4:
+ case PERIPH_ID_I2C5:
+ pinctrl_rk3399_i2c_config(priv->grf, priv->pmugrf, func);
+ break;
+ case PERIPH_ID_SPI0:
+ case PERIPH_ID_SPI1:
+ case PERIPH_ID_SPI2:
+ pinctrl_rk3399_spi_config(priv->grf, priv->pmugrf, func, flags);
+ break;
+ case PERIPH_ID_UART0:
+ case PERIPH_ID_UART1:
+ case PERIPH_ID_UART2:
+ case PERIPH_ID_UART3:
+ case PERIPH_ID_UART4:
+ pinctrl_rk3399_uart_config(priv->grf, priv->pmugrf, func);
+ break;
+ case PERIPH_ID_LCDC0:
+ case PERIPH_ID_LCDC1:
+ pinctrl_rk3399_lcdc_config(priv->grf, func);
+ break;
+ case PERIPH_ID_SDMMC0:
+ case PERIPH_ID_SDMMC1:
+ pinctrl_rk3399_sdmmc_config(priv->grf, func);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int rk3399_pinctrl_get_periph_id(struct udevice *dev,
+ struct udevice *periph)
+{
+ u32 cell[3];
+ int ret;
+
+ ret = fdtdec_get_int_array(gd->fdt_blob, periph->of_offset,
+ "interrupts", cell, ARRAY_SIZE(cell));
+ if (ret < 0)
+ return -EINVAL;
+
+ switch (cell[1]) {
+ case 68:
+ return PERIPH_ID_SPI0;
+ case 53:
+ return PERIPH_ID_SPI1;
+ case 52:
+ return PERIPH_ID_SPI2;
+ case 57:
+ return PERIPH_ID_I2C0;
+ case 59: /* Note strange order */
+ return PERIPH_ID_I2C1;
+ case 35:
+ return PERIPH_ID_I2C2;
+ case 34:
+ return PERIPH_ID_I2C3;
+ case 56:
+ return PERIPH_ID_I2C4;
+ case 38:
+ return PERIPH_ID_I2C5;
+ case 65:
+ return PERIPH_ID_SDMMC1;
+ }
+
+ return -ENOENT;
+}
+
+static int rk3399_pinctrl_set_state_simple(struct udevice *dev,
+ struct udevice *periph)
+{
+ int func;
+
+ func = rk3399_pinctrl_get_periph_id(dev, periph);
+ if (func < 0)
+ return func;
+
+ return rk3399_pinctrl_request(dev, func, 0);
+}
+
+static struct pinctrl_ops rk3399_pinctrl_ops = {
+ .set_state_simple = rk3399_pinctrl_set_state_simple,
+ .request = rk3399_pinctrl_request,
+ .get_periph_id = rk3399_pinctrl_get_periph_id,
+};
+
+static int rk3399_pinctrl_probe(struct udevice *dev)
+{
+ struct rk3399_pinctrl_priv *priv = dev_get_priv(dev);
+ int ret = 0;
+
+ priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+ debug("%s: grf=%p, pmugrf=%p\n", __func__, priv->grf, priv->pmugrf);
+
+ return ret;
+}
+
+static const struct udevice_id rk3399_pinctrl_ids[] = {
+ { .compatible = "rockchip,rk3399-pinctrl" },
+ { }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3399) = {
+ .name = "rockchip_rk3399_pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = rk3399_pinctrl_ids,
+ .priv_auto_alloc_size = sizeof(struct rk3399_pinctrl_priv),
+ .ops = &rk3399_pinctrl_ops,
+ .bind = dm_scan_fdt_dev,
+ .probe = rk3399_pinctrl_probe,
+};
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig
index 7febea2..689e576 100644
--- a/drivers/pinctrl/uniphier/Kconfig
+++ b/drivers/pinctrl/uniphier/Kconfig
@@ -3,6 +3,12 @@
config PINCTRL_UNIPHIER
bool
+config PINCTRL_UNIPHIER_SLD3
+ bool "UniPhier PH1-sLD3 SoC pinctrl driver"
+ depends on ARCH_UNIPHIER_SLD3
+ default y
+ select PINCTRL_UNIPHIER
+
config PINCTRL_UNIPHIER_LD4
bool "UniPhier PH1-LD4 SoC pinctrl driver"
depends on ARCH_UNIPHIER_LD4
diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile
index 4de251b..fd003ad 100644
--- a/drivers/pinctrl/uniphier/Makefile
+++ b/drivers/pinctrl/uniphier/Makefile
@@ -4,6 +4,7 @@
obj-y += pinctrl-uniphier-core.o
+obj-$(CONFIG_PINCTRL_UNIPHIER_SLD3) += pinctrl-uniphier-sld3.o
obj-$(CONFIG_PINCTRL_UNIPHIER_LD4) += pinctrl-uniphier-ld4.o
obj-$(CONFIG_PINCTRL_UNIPHIER_PRO4) += pinctrl-uniphier-pro4.o
obj-$(CONFIG_PINCTRL_UNIPHIER_SLD8) += pinctrl-uniphier-sld8.o
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index 3f891f1..51144b8 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -13,6 +13,10 @@
#include "pinctrl-uniphier.h"
+#define UNIPHIER_PINCTRL_PINMUX_BASE 0x1000
+#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x1700
+#define UNIPHIER_PINCTRL_IECTRL 0x1d00
+
static const char *uniphier_pinctrl_dummy_name = "_dummy";
static int uniphier_pinctrl_get_groups_count(struct udevice *dev)
@@ -101,8 +105,10 @@
int muxval)
{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
- unsigned mux_bits, reg_stride, reg, reg_end, shift, mask;
- bool load_pinctrl;
+ unsigned reg, reg_end, shift, mask;
+ unsigned mux_bits = 8;
+ unsigned reg_stride = 4;
+ bool load_pinctrl = false;
u32 tmp;
/* some pins need input-enabling */
@@ -111,24 +117,18 @@
if (muxval < 0)
return; /* dedicated pin; nothing to do for pin-mux */
+ if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_MUX_4BIT)
+ mux_bits = 4;
+
if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) {
/*
* Mode offset bit
* Normal 4 * n shift+3:shift
* Debug 4 * n shift+7:shift+4
*/
- mux_bits = 4;
+ mux_bits /= 2;
reg_stride = 8;
load_pinctrl = true;
- } else {
- /*
- * Mode offset bit
- * Normal 8 * n shift+3:shift
- * Debug 8 * n + 4 shift+3:shift
- */
- mux_bits = 8;
- reg_stride = 4;
- load_pinctrl = false;
}
reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
index e42602b..1d318d8 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
@@ -28,6 +28,12 @@
static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
15, 16, 17};
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned system_bus_pins[] = {1, 2, 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17};
+static const int system_bus_muxvals[] = {0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2};
+static const unsigned system_bus_cs1_pins[] = {0};
+static const int system_bus_cs1_muxvals[] = {0};
static const unsigned uart0_pins[] = {54, 55};
static const int uart0_muxvals[] = {0, 0};
static const unsigned uart1_pins[] = {58, 59};
@@ -52,6 +58,8 @@
UNIPHIER_PINCTRL_GROUP(i2c3),
UNIPHIER_PINCTRL_GROUP(i2c4),
UNIPHIER_PINCTRL_GROUP(nand),
+ UNIPHIER_PINCTRL_GROUP_SPL(system_bus),
+ UNIPHIER_PINCTRL_GROUP_SPL(system_bus_cs1),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
@@ -69,6 +77,7 @@
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(i2c4),
UNIPHIER_PINMUX_FUNCTION(nand),
+ UNIPHIER_PINMUX_FUNCTION_SPL(system_bus),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
index d6ae512..4ca39e6 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
@@ -34,6 +34,12 @@
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned sd_pins[] = {10, 11, 12, 13, 14, 15, 16, 17};
static const int sd_muxvals[] = {3, 3, 3, 3, 3, 3, 3, 3}; /* No SDVOLC */
+static const unsigned system_bus_pins[] = {1, 2, 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17};
+static const int system_bus_muxvals[] = {0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2};
+static const unsigned system_bus_cs1_pins[] = {0};
+static const int system_bus_cs1_muxvals[] = {0};
static const unsigned uart0_pins[] = {54, 55};
static const int uart0_muxvals[] = {0, 0};
static const unsigned uart1_pins[] = {58, 59};
@@ -62,6 +68,8 @@
UNIPHIER_PINCTRL_GROUP(i2c4),
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(sd),
+ UNIPHIER_PINCTRL_GROUP_SPL(system_bus),
+ UNIPHIER_PINCTRL_GROUP_SPL(system_bus_cs1),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
@@ -82,6 +90,7 @@
UNIPHIER_PINMUX_FUNCTION(i2c4),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
+ UNIPHIER_PINMUX_FUNCTION_SPL(system_bus),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c
index 955858a..9b3db9d 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c
@@ -51,6 +51,18 @@
static const int nand_cs1_muxvals[] = {0, 0};
static const unsigned sd_pins[] = {44, 45, 46, 47, 48, 49, 50, 51, 52};
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned system_bus_pins[] = {16, 17, 18, 19, 20, 165, 166, 167,
+ 168, 169, 170, 171, 172, 173};
+static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1};
+static const unsigned system_bus_cs0_pins[] = {155};
+static const int system_bus_cs0_muxvals[] = {1};
+static const unsigned system_bus_cs1_pins[] = {174};
+static const int system_bus_cs1_muxvals[] = {-1};
+static const unsigned system_bus_cs2_pins[] = {64};
+static const int system_bus_cs2_muxvals[] = {1};
+static const unsigned system_bus_cs3_pins[] = {156};
+static const int system_bus_cs3_muxvals[] = {1};
static const unsigned uart0_pins[] = {85, 88};
static const int uart0_muxvals[] = {1, 1};
static const unsigned uart1_pins[] = {155, 156};
@@ -82,6 +94,11 @@
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
+ UNIPHIER_PINCTRL_GROUP(system_bus),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs0),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs2),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs3),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart1b),
@@ -103,6 +120,7 @@
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
+ UNIPHIER_PINMUX_FUNCTION(system_bus),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
index 5f9407e..80d782c8 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
@@ -48,6 +48,20 @@
static const int nand_cs1_muxvals[] = {0, 0};
static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55};
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
+ 11, 12, 13};
+static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0};
+static const unsigned system_bus_cs1_pins[] = {14};
+static const int system_bus_cs1_muxvals[] = {0};
+static const unsigned system_bus_cs2_pins[] = {37};
+static const int system_bus_cs2_muxvals[] = {6};
+static const unsigned system_bus_cs3_pins[] = {38};
+static const int system_bus_cs3_muxvals[] = {6};
+static const unsigned system_bus_cs4_pins[] = {115};
+static const int system_bus_cs4_muxvals[] = {6};
+static const unsigned system_bus_cs5_pins[] = {55};
+static const int system_bus_cs5_muxvals[] = {6};
static const unsigned uart0_pins[] = {135, 136};
static const int uart0_muxvals[] = {3, 3};
static const unsigned uart0b_pins[] = {11, 12};
@@ -81,6 +95,12 @@
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
+ UNIPHIER_PINCTRL_GROUP(system_bus),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs2),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs3),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs4),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs5),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart0b),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
@@ -103,6 +123,7 @@
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
+ UNIPHIER_PINMUX_FUNCTION(system_bus),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c
index 6f349dc..f1624da 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c
@@ -53,6 +53,26 @@
static const unsigned sd1_pins[] = {319, 320, 321, 322, 323, 324, 325, 326,
327};
static const int sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned system_bus_pins[] = {25, 26, 27, 28, 29, 30, 31, 32, 33,
+ 34, 35, 36, 37, 38};
+static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0};
+static const unsigned system_bus_cs0_pins[] = {318};
+static const int system_bus_cs0_muxvals[] = {5};
+static const unsigned system_bus_cs1_pins[] = {24};
+static const int system_bus_cs1_muxvals[] = {0};
+static const unsigned system_bus_cs2_pins[] = {315};
+static const int system_bus_cs2_muxvals[] = {5};
+static const unsigned system_bus_cs3_pins[] = {313};
+static const int system_bus_cs3_muxvals[] = {5};
+static const unsigned system_bus_cs4_pins[] = {305};
+static const int system_bus_cs4_muxvals[] = {5};
+static const unsigned system_bus_cs5_pins[] = {303};
+static const int system_bus_cs5_muxvals[] = {6};
+static const unsigned system_bus_cs6_pins[] = {307};
+static const int system_bus_cs6_muxvals[] = {6};
+static const unsigned system_bus_cs7_pins[] = {312};
+static const int system_bus_cs7_muxvals[] = {6};
static const unsigned uart0_pins[] = {127, 128};
static const int uart0_muxvals[] = {0, 0};
static const unsigned uart1_pins[] = {129, 130};
@@ -86,6 +106,15 @@
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
UNIPHIER_PINCTRL_GROUP(sd1),
+ UNIPHIER_PINCTRL_GROUP(system_bus),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs0),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs2),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs3),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs4),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs5),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs6),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs7),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
@@ -109,6 +138,7 @@
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
UNIPHIER_PINMUX_FUNCTION(sd1),
+ UNIPHIER_PINMUX_FUNCTION(system_bus),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
index 268cdea..9670f25 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
@@ -50,6 +50,26 @@
static const int nand_cs1_muxvals[] = {0, 0};
static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258};
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned system_bus_pins[] = {4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17};
+static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0};
+static const unsigned system_bus_cs0_pins[] = {105};
+static const int system_bus_cs0_muxvals[] = {1};
+static const unsigned system_bus_cs1_pins[] = {18};
+static const int system_bus_cs1_muxvals[] = {0};
+static const unsigned system_bus_cs2_pins[] = {106};
+static const int system_bus_cs2_muxvals[] = {1};
+static const unsigned system_bus_cs3_pins[] = {100};
+static const int system_bus_cs3_muxvals[] = {1};
+static const unsigned system_bus_cs4_pins[] = {101};
+static const int system_bus_cs4_muxvals[] = {1};
+static const unsigned system_bus_cs5_pins[] = {102};
+static const int system_bus_cs5_muxvals[] = {1};
+static const unsigned system_bus_cs6_pins[] = {69};
+static const int system_bus_cs6_muxvals[] = {5};
+static const unsigned system_bus_cs7_pins[] = {70};
+static const int system_bus_cs7_muxvals[] = {5};
static const unsigned uart0_pins[] = {47, 48};
static const int uart0_muxvals[] = {0, 0};
static const unsigned uart0b_pins[] = {227, 228};
@@ -81,6 +101,15 @@
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
+ UNIPHIER_PINCTRL_GROUP(system_bus),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs0),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs2),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs3),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs4),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs5),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs6),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs7),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart0b),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
@@ -101,6 +130,7 @@
UNIPHIER_PINMUX_FUNCTION(i2c6),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
+ UNIPHIER_PINMUX_FUNCTION(system_bus),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c
index b534274..1d29170 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c
@@ -53,6 +53,12 @@
static const int nand_cs1_muxvals[] = {8, 8};
static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55};
static const int sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8};
+static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
+ 11, 12, 13};
+static const int system_bus_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8};
+static const unsigned system_bus_cs1_pins[] = {14};
+static const int system_bus_cs1_muxvals[] = {8};
static const unsigned uart0_pins[] = {217, 218};
static const int uart0_muxvals[] = {8, 8};
static const unsigned uart0b_pins[] = {179, 180};
@@ -89,6 +95,8 @@
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
+ UNIPHIER_PINCTRL_GROUP(system_bus),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart0b),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
@@ -114,6 +122,7 @@
UNIPHIER_PINMUX_FUNCTION(i2c6),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
+ UNIPHIER_PINMUX_FUNCTION(system_bus),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c
new file mode 100644
index 0000000..d3a507e
--- /dev/null
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dm/device.h>
+#include <dm/pinctrl.h>
+
+#include "pinctrl-uniphier.h"
+
+static const unsigned emmc_pins[] = {55, 56, 60};
+static const int emmc_muxvals[] = {1, 1, 1};
+static const unsigned emmc_dat8_pins[] = {57};
+static const int emmc_dat8_muxvals[] = {1};
+static const unsigned ether_mii_pins[] = {35, 107, 108, 109, 110, 111, 112,
+ 113};
+static const int ether_mii_muxvals[] = {1, 2, 2, 2, 2, 2, 2, 2};
+static const unsigned ether_rmii_pins[] = {35};
+static const int ether_rmii_muxvals[] = {1};
+static const unsigned i2c0_pins[] = {36};
+static const int i2c0_muxvals[] = {0};
+static const unsigned nand_pins[] = {38, 39, 40, 58, 59};
+static const int nand_muxvals[] = {1, 1, 1, 1, 1};
+static const unsigned nand_cs1_pins[] = {41};
+static const int nand_cs1_muxvals[] = {1};
+static const unsigned sd_pins[] = {42, 43, 44, 45};
+static const int sd_muxvals[] = {1, 1, 1, 1};
+static const unsigned system_bus_pins[] = {46, 50, 51, 53, 54, 73, 74, 75, 76,
+ 77, 78, 79, 80, 88, 89, 91, 92, 99};
+static const int system_bus_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1};
+static const unsigned system_bus_cs0_pins[] = {93};
+static const int system_bus_cs0_muxvals[] = {1};
+static const unsigned system_bus_cs1_pins[] = {94};
+static const int system_bus_cs1_muxvals[] = {1};
+static const unsigned system_bus_cs2_pins[] = {95};
+static const int system_bus_cs2_muxvals[] = {1};
+static const unsigned system_bus_cs3_pins[] = {96};
+static const int system_bus_cs3_muxvals[] = {1};
+static const unsigned system_bus_cs4_pins[] = {81};
+static const int system_bus_cs4_muxvals[] = {1};
+static const unsigned system_bus_cs5_pins[] = {82};
+static const int system_bus_cs5_muxvals[] = {1};
+static const unsigned uart0_pins[] = {63, 64};
+static const int uart0_muxvals[] = {0, 1};
+static const unsigned uart1_pins[] = {65, 66};
+static const int uart1_muxvals[] = {0, 1};
+static const unsigned uart2_pins[] = {96, 102};
+static const int uart2_muxvals[] = {2, 2};
+static const unsigned usb0_pins[] = {13, 14};
+static const int usb0_muxvals[] = {0, 1};
+static const unsigned usb1_pins[] = {15, 16};
+static const int usb1_muxvals[] = {0, 1};
+static const unsigned usb2_pins[] = {17, 18};
+static const int usb2_muxvals[] = {0, 1};
+static const unsigned usb3_pins[] = {19, 20};
+static const int usb3_muxvals[] = {0, 1};
+
+static const struct uniphier_pinctrl_group uniphier_sld3_groups[] = {
+ UNIPHIER_PINCTRL_GROUP_SPL(emmc),
+ UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),
+ UNIPHIER_PINCTRL_GROUP(ether_mii),
+ UNIPHIER_PINCTRL_GROUP(ether_rmii),
+ UNIPHIER_PINCTRL_GROUP(i2c0),
+ UNIPHIER_PINCTRL_GROUP(nand),
+ UNIPHIER_PINCTRL_GROUP(nand_cs1),
+ UNIPHIER_PINCTRL_GROUP(sd),
+ UNIPHIER_PINCTRL_GROUP(system_bus),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs0),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs2),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs3),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs4),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs5),
+ UNIPHIER_PINCTRL_GROUP_SPL(uart0),
+ UNIPHIER_PINCTRL_GROUP_SPL(uart1),
+ UNIPHIER_PINCTRL_GROUP_SPL(uart2),
+ UNIPHIER_PINCTRL_GROUP(usb0),
+ UNIPHIER_PINCTRL_GROUP(usb1),
+ UNIPHIER_PINCTRL_GROUP(usb2),
+ UNIPHIER_PINCTRL_GROUP(usb3)
+};
+
+static const char * const uniphier_sld3_functions[] = {
+ UNIPHIER_PINMUX_FUNCTION_SPL(emmc),
+ UNIPHIER_PINMUX_FUNCTION(ether_mii),
+ UNIPHIER_PINMUX_FUNCTION(ether_rmii),
+ UNIPHIER_PINMUX_FUNCTION(i2c0),
+ UNIPHIER_PINMUX_FUNCTION(nand),
+ UNIPHIER_PINMUX_FUNCTION(sd),
+ UNIPHIER_PINMUX_FUNCTION(system_bus),
+ UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
+ UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
+ UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
+ UNIPHIER_PINMUX_FUNCTION(usb0),
+ UNIPHIER_PINMUX_FUNCTION(usb1),
+ UNIPHIER_PINMUX_FUNCTION(usb2),
+ UNIPHIER_PINMUX_FUNCTION(usb3),
+};
+
+static struct uniphier_pinctrl_socdata uniphier_sld3_pinctrl_socdata = {
+ .groups = uniphier_sld3_groups,
+ .groups_count = ARRAY_SIZE(uniphier_sld3_groups),
+ .functions = uniphier_sld3_functions,
+ .functions_count = ARRAY_SIZE(uniphier_sld3_functions),
+ .caps = UNIPHIER_PINCTRL_CAPS_MUX_4BIT,
+};
+
+static int uniphier_sld3_pinctrl_probe(struct udevice *dev)
+{
+ return uniphier_pinctrl_probe(dev, &uniphier_sld3_pinctrl_socdata);
+}
+
+static const struct udevice_id uniphier_sld3_pinctrl_match[] = {
+ { .compatible = "socionext,uniphier-sld3-pinctrl" },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(uniphier_sld3_pinctrl) = {
+ .name = "uniphier-sld3-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = of_match_ptr(uniphier_sld3_pinctrl_match),
+ .probe = uniphier_sld3_pinctrl_probe,
+ .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv),
+ .ops = &uniphier_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c
index a85e055..471fb67 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c
@@ -65,6 +65,20 @@
static const int nand_cs1_muxvals[] = {0, 0};
static const unsigned sd_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40};
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned system_bus_pins[] = {136, 137, 138, 139, 140, 141, 142,
+ 143, 144, 145, 146, 147, 148, 149};
+static const int system_bus_muxvals[] = {-1, -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1};
+static const unsigned system_bus_cs1_pins[] = {150};
+static const int system_bus_cs1_muxvals[] = {-1};
+static const unsigned system_bus_cs2_pins[] = {10};
+static const int system_bus_cs2_muxvals[] = {1};
+static const unsigned system_bus_cs3_pins[] = {11};
+static const int system_bus_cs3_muxvals[] = {1};
+static const unsigned system_bus_cs4_pins[] = {12};
+static const int system_bus_cs4_muxvals[] = {1};
+static const unsigned system_bus_cs5_pins[] = {13};
+static const int system_bus_cs5_muxvals[] = {1};
static const unsigned uart0_pins[] = {70, 71};
static const int uart0_muxvals[] = {3, 3};
static const unsigned uart1_pins[] = {114, 115};
@@ -92,6 +106,12 @@
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
+ UNIPHIER_PINCTRL_GROUP(system_bus),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs2),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs3),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs4),
+ UNIPHIER_PINCTRL_GROUP(system_bus_cs5),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
@@ -111,6 +131,7 @@
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
+ UNIPHIER_PINMUX_FUNCTION(system_bus),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
index 4de5b03..5c3db2a 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
@@ -13,10 +13,6 @@
#include <linux/kernel.h>
#include <linux/types.h>
-#define UNIPHIER_PINCTRL_PINMUX_BASE 0x1000
-#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x1700
-#define UNIPHIER_PINCTRL_IECTRL 0x1d00
-
#define UNIPHIER_PIN_ATTR_PACKED(iectrl) (iectrl)
static inline unsigned int uniphier_pin_get_iectrl(unsigned long data)
@@ -71,8 +67,9 @@
const char * const *functions;
int functions_count;
unsigned caps;
-#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1)
-#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0)
+#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(2)
+#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(1)
+#define UNIPHIER_PINCTRL_CAPS_MUX_4BIT BIT(0)
};
#define UNIPHIER_PINCTRL_PIN(a, b) \
diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c
index fc162a1..731b75e 100644
--- a/drivers/power/axp209.c
+++ b/drivers/power/axp209.c
@@ -167,6 +167,22 @@
return rc;
}
+ /*
+ * Turn off LDOIO regulators / tri-state GPIO pins, when rebooting
+ * from android these are sometimes on.
+ */
+ rc = pmic_bus_write(AXP_GPIO0_CTRL, AXP_GPIO_CTRL_INPUT);
+ if (rc)
+ return rc;
+
+ rc = pmic_bus_write(AXP_GPIO1_CTRL, AXP_GPIO_CTRL_INPUT);
+ if (rc)
+ return rc;
+
+ rc = pmic_bus_write(AXP_GPIO2_CTRL, AXP_GPIO_CTRL_INPUT);
+ if (rc)
+ return rc;
+
return 0;
}
diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c
index 727ab09..109d3f4 100644
--- a/drivers/power/axp221.c
+++ b/drivers/power/axp221.c
@@ -223,6 +223,18 @@
if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17))
return -ENODEV;
+ /*
+ * Turn off LDOIO regulators / tri-state GPIO pins, when rebooting
+ * from android these are sometimes on.
+ */
+ ret = pmic_bus_write(AXP_GPIO0_CTRL, AXP_GPIO_CTRL_INPUT);
+ if (ret)
+ return ret;
+
+ ret = pmic_bus_write(AXP_GPIO1_CTRL, AXP_GPIO_CTRL_INPUT);
+ if (ret)
+ return ret;
+
return 0;
}
diff --git a/drivers/power/axp809.c b/drivers/power/axp809.c
index c8b76cf..c5b608d 100644
--- a/drivers/power/axp809.c
+++ b/drivers/power/axp809.c
@@ -217,13 +217,7 @@
int axp_init(void)
{
- int ret;
-
- ret = pmic_bus_init();
- if (ret)
- return ret;
-
- return 0;
+ return pmic_bus_init();
}
int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
diff --git a/drivers/power/pmic/pmic_tps62362.c b/drivers/power/pmic/pmic_tps62362.c
index 2123685..23f9a9c 100644
--- a/drivers/power/pmic/pmic_tps62362.c
+++ b/drivers/power/pmic/pmic_tps62362.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <i2c.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <power/pmic.h>
#include <power/tps62362.h>
diff --git a/drivers/power/pmic/pmic_tps65218.c b/drivers/power/pmic/pmic_tps65218.c
index 0fd0ad4..f32fa40 100644
--- a/drivers/power/pmic/pmic_tps65218.c
+++ b/drivers/power/pmic/pmic_tps65218.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <i2c.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <power/pmic.h>
#include <power/tps65218.h>
diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 2d289a4..9254f5b 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -6,15 +6,13 @@
*/
#include <common.h>
+#include <clk.h>
#include <div64.h>
#include <dm.h>
#include <pwm.h>
#include <regmap.h>
#include <syscon.h>
#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3288.h>
-#include <asm/arch/grf_rk3288.h>
#include <asm/arch/pwm.h>
#include <power/regulator.h>
@@ -22,7 +20,7 @@
struct rk_pwm_priv {
struct rk3288_pwm *regs;
- struct rk3288_grf *grf;
+ ulong freq;
};
static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
@@ -38,8 +36,8 @@
RK_PWM_DISABLE,
®s->ctrl);
- period = lldiv((uint64_t)(PD_BUS_PCLK_HZ / 1000) * period_ns, 1000000);
- duty = lldiv((uint64_t)(PD_BUS_PCLK_HZ / 1000) * duty_ns, 1000000);
+ period = lldiv((uint64_t)(priv->freq / 1000) * period_ns, 1000000);
+ duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns, 1000000);
writel(period, ®s->period_hpr);
writel(duty, ®s->duty_lpr);
@@ -62,13 +60,8 @@
static int rk_pwm_ofdata_to_platdata(struct udevice *dev)
{
struct rk_pwm_priv *priv = dev_get_priv(dev);
- struct regmap *map;
priv->regs = (struct rk3288_pwm *)dev_get_addr(dev);
- map = syscon_get_regmap_by_driver_data(ROCKCHIP_SYSCON_GRF);
- if (IS_ERR(map))
- return PTR_ERR(map);
- priv->grf = regmap_get_range(map, 0);
return 0;
}
@@ -76,8 +69,15 @@
static int rk_pwm_probe(struct udevice *dev)
{
struct rk_pwm_priv *priv = dev_get_priv(dev);
+ struct clk clk;
+ int ret = 0;
- rk_setreg(&priv->grf->soc_con2, 1 << 0);
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret < 0) {
+ debug("%s get clock fail!\n", __func__);
+ return -EINVAL;
+ }
+ priv->freq = clk_get_rate(&clk);
return 0;
}
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 2b98984..4231594 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -7,11 +7,11 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include "common.h"
+#include <common.h>
#include <command.h>
-#include "asm/errno.h"
-#include "asm/io.h"
-#include "linux/immap_qe.h"
+#include <linux/errno.h>
+#include <asm/io.h>
+#include <linux/immap_qe.h>
#include <fsl_qe.h>
#ifdef CONFIG_LS102XA
#include <asm/arch/immap_ls102xa.h>
diff --git a/drivers/qe/uccf.c b/drivers/qe/uccf.c
index e011886..bab5453 100644
--- a/drivers/qe/uccf.c
+++ b/drivers/qe/uccf.c
@@ -7,11 +7,11 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include "common.h"
-#include "malloc.h"
-#include "asm/errno.h"
-#include "asm/io.h"
-#include "linux/immap_qe.h"
+#include <common.h>
+#include <malloc.h>
+#include <linux/errno.h>
+#include <asm/io.h>
+#include <linux/immap_qe.h>
#include "uccf.h"
#include <fsl_qe.h>
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index 468c92e..5fd956a 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -6,12 +6,12 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include "common.h"
-#include "net.h"
-#include "malloc.h"
-#include "asm/errno.h"
-#include "asm/io.h"
-#include "linux/immap_qe.h"
+#include <common.h>
+#include <net.h>
+#include <malloc.h>
+#include <linux/errno.h>
+#include <asm/io.h>
+#include <linux/immap_qe.h>
#include "uccf.h"
#include "uec.h"
#include "uec_phy.h"
diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index 272874d..9604270 100644
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -10,12 +10,12 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include "common.h"
-#include "net.h"
-#include "malloc.h"
-#include "asm/errno.h"
-#include "linux/immap_qe.h"
-#include "asm/io.h"
+#include <common.h>
+#include <net.h>
+#include <malloc.h>
+#include <linux/errno.h>
+#include <linux/immap_qe.h>
+#include <asm/io.h>
#include "uccf.h"
#include "uec.h"
#include "uec_phy.h"
diff --git a/drivers/rtc/at91sam9_rtt.c b/drivers/rtc/at91sam9_rtt.c
index a684ad6..18fb09d 100644
--- a/drivers/rtc/at91sam9_rtt.c
+++ b/drivers/rtc/at91sam9_rtt.c
@@ -23,7 +23,7 @@
#include <command.h>
#include <rtc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_rtt.h>
#include <asm/arch/at91_gpbr.h>
diff --git a/drivers/rtc/m48t35ax.c b/drivers/rtc/m48t35ax.c
index 021b91f..36011a5 100644
--- a/drivers/rtc/m48t35ax.c
+++ b/drivers/rtc/m48t35ax.c
@@ -127,10 +127,8 @@
static uchar rtc_read (uchar reg)
{
- uchar val;
- val = *(unsigned char *)
+ return *(unsigned char *)
((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg);
- return val;
}
static void rtc_write (uchar reg, uchar val)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 88fca15..765499d 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <clk.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
@@ -12,6 +13,7 @@
#include <serial.h>
#include <watchdog.h>
#include <linux/types.h>
+#include <linux/compiler.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -352,6 +354,8 @@
{
struct ns16550_platdata *plat = dev->platdata;
fdt_addr_t addr;
+ __maybe_unused struct clk clk;
+ __maybe_unused int err;
/* try Processor Local Bus device first */
addr = dev_get_addr(dev);
@@ -397,9 +401,23 @@
"reg-offset", 0);
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"reg-shift", 0);
- plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
- "clock-frequency",
- CONFIG_SYS_NS16550_CLK);
+
+#ifdef CONFIG_CLK
+ err = clk_get_by_index(dev, 0, &clk);
+ if (!err) {
+ err = clk_get_rate(&clk);
+ if (!IS_ERR_VALUE(err))
+ plat->clock = err;
+ } else if (err != -ENODEV && err != -ENOSYS) {
+ debug("ns16550 failed to get clock\n");
+ return err;
+ }
+#endif
+
+ if (!plat->clock)
+ plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ "clock-frequency",
+ CONFIG_SYS_NS16550_CLK);
if (!plat->clock) {
debug("ns16550 clock not defined\n");
return -EINVAL;
diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c
index ab607b7..4ea5304 100644
--- a/drivers/serial/serial_uniphier.c
+++ b/drivers/serial/serial_uniphier.c
@@ -9,7 +9,7 @@
#include <linux/io.h>
#include <linux/serial_reg.h>
#include <linux/sizes.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <dm/device.h>
#include <serial.h>
#include <fdtdec.h>
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index aca385d..5da66a6 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -61,13 +61,6 @@
this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
use this driver.
-config FSL_QSPI
- bool "Freescale QSPI driver"
- help
- Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
- used to access the SPI NOR flash on platforms embedding this
- Freescale IP core.
-
config ICH_SPI
bool "Intel ICH SPI driver"
help
@@ -188,6 +181,13 @@
access the SPI interface and SPI NOR flash on platforms embedding
this Freescale eSPI IP core.
+config FSL_QSPI
+ bool "Freescale QSPI driver"
+ help
+ Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
+ used to access the SPI NOR flash on platforms embedding this
+ Freescale IP core.
+
config TI_QSPI
bool "TI QSPI driver"
help
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index a5244ff..1051afb 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -10,7 +10,7 @@
#include <fdtdec.h>
#include <malloc.h>
#include <spi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "cadence_qspi.h"
#define CQSPI_STIG_READ 0
@@ -251,7 +251,7 @@
break;
case CQSPI_INDIRECT_READ:
err = cadence_qspi_apb_indirect_read_setup(plat,
- priv->cmd_len, dm_plat->mode_rx, cmd_buf);
+ priv->cmd_len, dm_plat->mode, cmd_buf);
if (!err) {
err = cadence_qspi_apb_indirect_read_execute
(plat, data_bytes, din);
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 1d68379..e285d3c 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -27,7 +27,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <wait_bit.h>
#include <spi.h>
#include "cadence_qspi.h"
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 00b2fed..caf0103 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -649,10 +649,8 @@
* ICH 7 SPI controller only supports array read command
* and byte program command for SST flash
*/
- if (plat->ich_version == ICHV_7) {
- slave->mode_rx = SPI_RX_SLOW;
- slave->mode = SPI_TX_BYTE;
- }
+ if (plat->ich_version == ICHV_7)
+ slave->mode = SPI_RX_SLOW | SPI_TX_BYTE;
return 0;
}
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 0881599..fc2786e 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <malloc.h>
#include <spi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 627644b..61daeba 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -14,7 +14,7 @@
#include <malloc.h>
#include <memalign.h>
#include <spi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index bc6dfd8..105ee4a 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -14,7 +14,7 @@
#include <dm.h>
#include <errno.h>
#include <spi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/periph.h>
diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c
index bad5660..092b13b 100644
--- a/drivers/spi/sandbox_spi.c
+++ b/drivers/spi/sandbox_spi.c
@@ -15,7 +15,7 @@
#include <spi_flash.h>
#include <os.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/spi.h>
#include <asm/state.h>
#include <dm/device-internal.h>
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 247abfa..d9c49e4 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -164,7 +164,6 @@
slave->max_hz = plat->max_hz;
slave->mode = plat->mode;
- slave->mode_rx = plat->mode_rx;
slave->wordlen = SPI_DEFAULT_WORDLEN;
return 0;
@@ -381,7 +380,7 @@
int spi_slave_ofdata_to_platdata(const void *blob, int node,
struct dm_spi_slave_platdata *plat)
{
- int mode = 0, mode_rx = 0;
+ int mode = 0;
int value;
plat->cs = fdtdec_get_int(blob, node, "reg", -1);
@@ -413,24 +412,22 @@
break;
}
- plat->mode = mode;
-
value = fdtdec_get_uint(blob, node, "spi-rx-bus-width", 1);
switch (value) {
case 1:
break;
case 2:
- mode_rx |= SPI_RX_DUAL;
+ mode |= SPI_RX_DUAL;
break;
case 4:
- mode_rx |= SPI_RX_QUAD;
+ mode |= SPI_RX_QUAD;
break;
default:
error("spi-rx-bus-width %d not supported\n", value);
break;
}
- plat->mode_rx = mode_rx;
+ plat->mode = mode;
return 0;
}
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index bb72cb0..52520df 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -23,6 +23,9 @@
#define QSPI_TIMEOUT 2000000
#define QSPI_FCLK 192000000
#define QSPI_DRA7XX_FCLK 76800000
+#define QSPI_WLEN_MAX_BITS 128
+#define QSPI_WLEN_MAX_BYTES (QSPI_WLEN_MAX_BITS >> 3)
+#define QSPI_WLEN_MASK QSPI_WLEN(QSPI_WLEN_MAX_BITS)
/* clock control */
#define QSPI_CLK_EN BIT(31)
#define QSPI_CLK_DIV_MAX 0xffff
@@ -223,20 +226,34 @@
priv->cmd |= QSPI_3_PIN;
priv->cmd |= 0xfff;
-/* FIXME: This delay is required for successfull
- * completion of read/write/erase. Once its root
- * caused, it will be remove from the driver.
- */
-#ifdef CONFIG_AM43XX
- udelay(100);
-#endif
- while (words--) {
+ while (words) {
+ u8 xfer_len = 0;
+
if (txp) {
- debug("tx cmd %08x dc %08x data %02x\n",
- priv->cmd | QSPI_WR_SNGL, priv->dc, *txp);
- writel(*txp++, &priv->base->data);
- writel(priv->cmd | QSPI_WR_SNGL,
- &priv->base->cmd);
+ u32 cmd = priv->cmd;
+
+ if (words >= QSPI_WLEN_MAX_BYTES) {
+ u32 *txbuf = (u32 *)txp;
+ u32 data;
+
+ data = cpu_to_be32(*txbuf++);
+ writel(data, &priv->base->data3);
+ data = cpu_to_be32(*txbuf++);
+ writel(data, &priv->base->data2);
+ data = cpu_to_be32(*txbuf++);
+ writel(data, &priv->base->data1);
+ data = cpu_to_be32(*txbuf++);
+ writel(data, &priv->base->data);
+ cmd &= ~QSPI_WLEN_MASK;
+ cmd |= QSPI_WLEN(QSPI_WLEN_MAX_BITS);
+ xfer_len = QSPI_WLEN_MAX_BYTES;
+ } else {
+ writeb(*txp, &priv->base->data);
+ xfer_len = 1;
+ }
+ debug("tx cmd %08x dc %08x\n",
+ cmd | QSPI_WR_SNGL, priv->dc);
+ writel(cmd | QSPI_WR_SNGL, &priv->base->cmd);
status = readl(&priv->base->status);
timeout = QSPI_TIMEOUT;
while ((status & QSPI_WC_BUSY) != QSPI_XFER_DONE) {
@@ -246,6 +263,7 @@
}
status = readl(&priv->base->status);
}
+ txp += xfer_len;
debug("tx done, status %08x\n", status);
}
if (rxp) {
@@ -262,9 +280,11 @@
status = readl(&priv->base->status);
}
*rxp++ = readl(&priv->base->data);
+ xfer_len = 1;
debug("rx done, status %08x, read %02x\n",
status, *(rxp-1));
}
+ words -= xfer_len;
}
/* Terminate frame */
@@ -336,7 +356,7 @@
QSPI_SETUP0_NUM_D_BYTES_8_BITS |
QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE |
QSPI_NUM_DUMMY_BITS);
- slave->mode_rx = SPI_RX_QUAD;
+ slave->mode |= SPI_RX_QUAD;
#else
memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
QSPI_SETUP0_NUM_D_BYTES_NO_BITS |
@@ -422,7 +442,7 @@
bool enable)
{
u32 memval;
- u32 mode = slave->mode_rx & (SPI_RX_QUAD | SPI_RX_DUAL);
+ u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL);
if (!enable) {
writel(0, &priv->base->setup0);
@@ -436,7 +456,7 @@
memval |= QSPI_CMD_READ_QUAD;
memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS;
memval |= QSPI_SETUP0_READ_QUAD;
- slave->mode_rx = SPI_RX_QUAD;
+ slave->mode |= SPI_RX_QUAD;
break;
case SPI_RX_DUAL:
memval |= QSPI_CMD_READ_DUAL;
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index 09ae1be..15ca271 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -92,7 +92,8 @@
u32 confr;
/* Disable SPI */
- writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr);
+ confr = ZYNQ_SPI_ENR_SPI_EN_MASK;
+ writel(~confr, ®s->enr);
/* Disable Interrupts */
writel(ZYNQ_SPI_IXR_ALL_MASK, ®s->idr);
@@ -173,8 +174,10 @@
struct udevice *bus = dev->parent;
struct zynq_spi_priv *priv = dev_get_priv(bus);
struct zynq_spi_regs *regs = priv->regs;
+ u32 confr;
- writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr);
+ confr = ZYNQ_SPI_ENR_SPI_EN_MASK;
+ writel(~confr, ®s->enr);
return 0;
}
@@ -230,7 +233,7 @@
/* Read the data from RX FIFO */
status = readl(®s->isr);
- while (status & ZYNQ_SPI_IXR_RXNEMPTY_MASK) {
+ while ((status & ZYNQ_SPI_IXR_RXNEMPTY_MASK) && rx_len) {
buf = readl(®s->rxdr);
if (rx_buf)
*rx_buf++ = buf;
diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c
index a4b6741..ef3ff0d 100644
--- a/drivers/tpm/tpm_tis_infineon.c
+++ b/drivers/tpm/tpm_tis_infineon.c
@@ -25,7 +25,7 @@
#include <fdtdec.h>
#include <i2c.h>
#include <tpm.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include <linux/compiler.h>
#include <linux/types.h>
#include <linux/unaligned/be_byteshift.h>
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 4070803..f5bc277 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -15,7 +15,7 @@
#undef PACKET_TRACE
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/hardware.h>
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index 1e23d09..ad31703 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -9,7 +9,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/hardware.h>
#include <linux/list.h>
diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c
index d36bcf6..05c01ce 100644
--- a/drivers/usb/gadget/ci_udc.c
+++ b/drivers/usb/gadget/ci_udc.c
@@ -14,7 +14,7 @@
#include <net.h>
#include <malloc.h>
#include <asm/byteorder.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/unaligned.h>
#include <linux/types.h>
diff --git a/drivers/usb/gadget/config.c b/drivers/usb/gadget/config.c
index 64284b0..525dc79 100644
--- a/drivers/usb/gadget/config.c
+++ b/drivers/usb/gadget/config.c
@@ -11,7 +11,7 @@
#include <common.h>
#include <asm/unaligned.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/list.h>
#include <linux/string.h>
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 029927f..d72bfdf 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -19,7 +19,7 @@
*/
#undef DEBUG
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/list.h>
#include <malloc.h>
diff --git a/drivers/usb/gadget/dwc2_udc_otg_phy.c b/drivers/usb/gadget/dwc2_udc_otg_phy.c
index e0cbbc0..0c4620d 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_phy.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_phy.c
@@ -19,7 +19,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/list.h>
#include <malloc.h>
diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h
index b2c1fc4..c40ecf8 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_priv.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h
@@ -8,7 +8,7 @@
#ifndef __DWC2_UDC_OTG_PRIV__
#define __DWC2_UDC_OTG_PRIV__
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/sizes.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c
index a53a6dc..6d6dbcb 100644
--- a/drivers/usb/gadget/epautoconf.c
+++ b/drivers/usb/gadget/epautoconf.c
@@ -13,7 +13,7 @@
#include <common.h>
#include <linux/usb/ch9.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/usb/gadget.h>
#include <asm/unaligned.h>
#include "gadget_chips.h"
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 9b06f02..497b981 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <console.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/netdevice.h>
#include <linux/usb/ch9.h>
#include <linux/usb/cdc.h>
diff --git a/drivers/usb/gadget/fotg210.c b/drivers/usb/gadget/fotg210.c
index 1d8f58f..e061b2e 100644
--- a/drivers/usb/gadget/fotg210.c
+++ b/drivers/usb/gadget/fotg210.c
@@ -13,7 +13,7 @@
#include <net.h>
#include <malloc.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/types.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c
index 48463db..844a0c7 100644
--- a/drivers/usb/gadget/rndis.c
+++ b/drivers/usb/gadget/rndis.c
@@ -28,7 +28,7 @@
#include <asm/byteorder.h>
#include <asm/unaligned.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#undef RNDIS_PM
#undef RNDIS_WAKEUP
@@ -41,8 +41,6 @@
#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */
#define ETH_DATA_LEN 1500 /* Max. octets in payload */
#define ETH_FRAME_LEN PKTSIZE_ALIGN /* Max. octets in frame sans FCS */
-#define ENOTSUPP 524 /* Operation is not supported */
-
/*
* The driver for your USB chip needs to support ep0 OUT to work with
diff --git a/drivers/usb/gadget/usbstring.c b/drivers/usb/gadget/usbstring.c
index 3e24fbf..67e98c0 100644
--- a/drivers/usb/gadget/usbstring.c
+++ b/drivers/usb/gadget/usbstring.c
@@ -8,7 +8,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index e0699d4..61e13d7 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -15,19 +15,19 @@
if USB_XHCI_HCD
-config USB_XHCI_UNIPHIER
- bool "Support for UniPhier on-chip xHCI USB controller"
- depends on ARCH_UNIPHIER
- default y
- ---help---
- Enables support for the on-chip xHCI controller on UniPhier SoCs.
-
config USB_XHCI_DWC3
bool "DesignWare USB3 DRD Core Support"
help
Say Y or if your system has a Dual Role SuperSpeed
USB controller based on the DesignWare USB3 IP Core.
+config USB_XHCI_ROCKCHIP
+ bool "Support for Rockchip on-chip xHCI USB controller"
+ depends on ARCH_ROCKCHIP
+ default y
+ help
+ Enables support for the on-chip xHCI controller on Rockchip SoCs.
+
endif # USB_XHCI_HCD
config USB_EHCI_HCD
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 620d114..de25328 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -56,13 +56,13 @@
# xhci
obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
+obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
-obj-$(CONFIG_USB_XHCI_UNIPHIER) += xhci-uniphier.o
# designware
obj-$(CONFIG_USB_DWC2) += dwc2.o
diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
index d65bbe9..2b138c5 100644
--- a/drivers/usb/host/ehci-atmel.c
+++ b/drivers/usb/host/ehci-atmel.c
@@ -128,17 +128,6 @@
return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
}
-static int ehci_atmel_remove(struct udevice *dev)
-{
- int ret;
-
- ret = ehci_deregister(dev);
- if (ret)
- return ret;
-
- return 0;
-}
-
static const struct udevice_id ehci_usb_ids[] = {
{ .compatible = "atmel,at91sam9g45-ehci", },
{ }
@@ -149,7 +138,7 @@
.id = UCLASS_USB,
.of_match = ehci_usb_ids,
.probe = ehci_atmel_probe,
- .remove = ehci_atmel_remove,
+ .remove = ehci_deregister,
.ops = &ehci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
.priv_auto_alloc_size = sizeof(struct ehci_atmel_priv),
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index bede04b..53281d7 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -18,7 +18,7 @@
#include <asm/arch/system.h>
#include <asm/arch/power.h>
#include <asm/gpio.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include <linux/compat.h>
#include "ehci.h"
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index f5e3ae7..9c32921 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -118,17 +118,6 @@
return ehci_register(dev, hccr, hcor, &fsl_ehci_ops, 0, USB_INIT_HOST);
}
-static int ehci_fsl_remove(struct udevice *dev)
-{
- int ret;
-
- ret = ehci_deregister(dev);
- if (ret)
- return ret;
-
- return 0;
-}
-
static const struct udevice_id ehci_usb_ids[] = {
{ .compatible = "fsl-usb2-mph", },
{ .compatible = "fsl-usb2-dr", },
@@ -141,7 +130,7 @@
.of_match = ehci_usb_ids,
.ofdata_to_platdata = ehci_fsl_ofdata_to_platdata,
.probe = ehci_fsl_probe,
- .remove = ehci_fsl_remove,
+ .remove = ehci_deregister,
.ops = &ehci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
.priv_auto_alloc_size = sizeof(struct ehci_fsl_priv),
diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index e0377ca..2190adb 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <clk.h>
+#include <reset.h>
#include <asm/io.h>
#include <dm.h>
#include "ehci.h"
@@ -37,6 +38,18 @@
clk_free(&clk);
}
+ for (i = 0; ; i++) {
+ struct reset_ctl reset;
+ int ret;
+
+ ret = reset_get_by_index(dev, i, &reset);
+ if (ret < 0)
+ break;
+ if (reset_deassert(&reset))
+ printf("failed to deassert reset %d\n", i);
+ reset_free(&reset);
+ }
+
hccr = map_physmem(dev_get_addr(dev), 0x100, MAP_NOCACHE);
hcor = (struct ehci_hcor *)((uintptr_t)hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
@@ -44,11 +57,6 @@
return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
}
-static int ehci_usb_remove(struct udevice *dev)
-{
- return ehci_deregister(dev);
-}
-
static const struct udevice_id ehci_usb_ids[] = {
{ .compatible = "generic-ehci" },
{ }
@@ -59,7 +67,7 @@
.id = UCLASS_USB,
.of_match = ehci_usb_ids,
.probe = ehci_usb_probe,
- .remove = ehci_usb_remove,
+ .remove = ehci_deregister,
.ops = &ehci_usb_ops,
.priv_auto_alloc_size = sizeof(struct generic_ehci),
.flags = DM_FLAG_ALLOC_PRIV_DMA,
diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c
index 5b0f46a..253fcb3 100644
--- a/drivers/usb/host/ehci-marvell.c
+++ b/drivers/usb/host/ehci-marvell.c
@@ -94,17 +94,6 @@
return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
}
-static int ehci_mvebu_remove(struct udevice *dev)
-{
- int ret;
-
- ret = ehci_deregister(dev);
- if (ret)
- return ret;
-
- return 0;
-}
-
static const struct udevice_id ehci_usb_ids[] = {
{ .compatible = "marvell,orion-ehci", },
{ }
@@ -115,7 +104,7 @@
.id = UCLASS_USB,
.of_match = ehci_usb_ids,
.probe = ehci_mvebu_probe,
- .remove = ehci_mvebu_remove,
+ .remove = ehci_deregister,
.ops = &ehci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
.priv_auto_alloc_size = sizeof(struct ehci_mvebu_priv),
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 602fec5..48889c1 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -451,17 +451,6 @@
return ehci_register(dev, hccr, hcor, &mx6_ehci_ops, 0, priv->init_type);
}
-static int ehci_usb_remove(struct udevice *dev)
-{
- int ret;
-
- ret = ehci_deregister(dev);
- if (ret)
- return ret;
-
- return 0;
-}
-
static const struct udevice_id mx6_usb_ids[] = {
{ .compatible = "fsl,imx27-usb" },
{ }
@@ -472,7 +461,7 @@
.id = UCLASS_USB,
.of_match = mx6_usb_ids,
.probe = ehci_usb_probe,
- .remove = ehci_usb_remove,
+ .remove = ehci_deregister,
.ops = &ehci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
.priv_auto_alloc_size = sizeof(struct ehci_mx6_priv_data),
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index f21a1fa..6fc2479 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -126,17 +126,6 @@
return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
}
-static int ehci_pci_remove(struct udevice *dev)
-{
- int ret;
-
- ret = ehci_deregister(dev);
- if (ret)
- return ret;
-
- return 0;
-}
-
static const struct udevice_id ehci_pci_ids[] = {
{ .compatible = "ehci-pci" },
{ }
@@ -146,7 +135,7 @@
.name = "ehci_pci",
.id = UCLASS_USB,
.probe = ehci_pci_probe,
- .remove = ehci_pci_remove,
+ .remove = ehci_deregister,
.of_match = ehci_pci_ids,
.ops = &ehci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 31d54ab..eb54df4 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -8,7 +8,7 @@
#include <common.h>
#include <dm.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm-generic/gpio.h>
#include <asm/arch/clock.h>
@@ -846,17 +846,6 @@
plat->init_type);
}
-static int ehci_usb_remove(struct udevice *dev)
-{
- int ret;
-
- ret = ehci_deregister(dev);
- if (ret)
- return ret;
-
- return 0;
-}
-
static const struct udevice_id ehci_usb_ids[] = {
{ .compatible = "nvidia,tegra20-ehci", .data = USB_CTLR_T20 },
{ .compatible = "nvidia,tegra30-ehci", .data = USB_CTLR_T30 },
@@ -871,7 +860,7 @@
.of_match = ehci_usb_ids,
.ofdata_to_platdata = ehci_usb_ofdata_to_platdata,
.probe = ehci_usb_probe,
- .remove = ehci_usb_remove,
+ .remove = ehci_deregister,
.ops = &ehci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
.priv_auto_alloc_size = sizeof(struct fdt_usb),
diff --git a/drivers/usb/host/ehci-zynq.c b/drivers/usb/host/ehci-zynq.c
index 76642cd..1e3b800 100644
--- a/drivers/usb/host/ehci-zynq.c
+++ b/drivers/usb/host/ehci-zynq.c
@@ -73,17 +73,6 @@
return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
}
-static int ehci_zynq_remove(struct udevice *dev)
-{
- int ret;
-
- ret = ehci_deregister(dev);
- if (ret)
- return ret;
-
- return 0;
-}
-
static const struct udevice_id ehci_zynq_ids[] = {
{ .compatible = "xlnx,zynq-usb-2.20a" },
{ }
@@ -95,7 +84,7 @@
.of_match = ehci_zynq_ids,
.ofdata_to_platdata = ehci_zynq_ofdata_to_platdata,
.probe = ehci_zynq_probe,
- .remove = ehci_zynq_remove,
+ .remove = ehci_deregister,
.ops = &ehci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
.priv_auto_alloc_size = sizeof(struct zynq_ehci_priv),
diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c
index 28416ed..82fcd84 100644
--- a/drivers/usb/host/xhci-exynos5.c
+++ b/drivers/usb/host/xhci-exynos5.c
@@ -24,7 +24,7 @@
#include <asm/arch/power.h>
#include <asm/arch/xhci-exynos.h>
#include <asm/gpio.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include <linux/compat.h>
#include <linux/usb/dwc3.h>
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index bdcd4f1..bda5b5f 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -10,7 +10,7 @@
#include <common.h>
#include <usb.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include <linux/compat.h>
#include <linux/usb/xhci-fsl.h>
#include <linux/usb/dwc3.h>
@@ -129,15 +129,10 @@
static int xhci_fsl_remove(struct udevice *dev)
{
struct xhci_fsl_priv *priv = dev_get_priv(dev);
- int ret;
fsl_xhci_core_exit(&priv->ctx);
- ret = xhci_deregister(dev);
- if (ret)
- return ret;
-
- return 0;
+ return xhci_deregister(dev);
}
static const struct udevice_id xhci_usb_ids[] = {
diff --git a/drivers/usb/host/xhci-keystone.c b/drivers/usb/host/xhci-keystone.c
index 924fb76..f322a80 100644
--- a/drivers/usb/host/xhci-keystone.c
+++ b/drivers/usb/host/xhci-keystone.c
@@ -14,7 +14,7 @@
#include <asm/io.h>
#include <linux/usb/dwc3.h>
#include <asm/arch/xhci-keystone.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include <linux/list.h>
#include "xhci.h"
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 3744452..62db51d 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -20,7 +20,7 @@
#include <usb.h>
#include <malloc.h>
#include <asm/cache.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include "xhci.h"
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index fd19f79..b881b19 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -11,7 +11,7 @@
#include <common.h>
#include <usb.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include <asm/omap_common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/sys_proto.h>
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 5a1391f..2675a8f 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -18,7 +18,7 @@
#include <asm/byteorder.h>
#include <usb.h>
#include <asm/unaligned.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include "xhci.h"
diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c
new file mode 100644
index 0000000..8cbcb8f
--- /dev/null
+++ b/drivers/usb/host/xhci-rockchip.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright (c) 2016 Rockchip, Inc.
+ * Authors: Daniel Meng <daniel.meng@rock-chips.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <libfdt.h>
+#include <malloc.h>
+#include <usb.h>
+#include <watchdog.h>
+#include <asm/gpio.h>
+#include <linux/errno.h>
+#include <linux/compat.h>
+#include <linux/usb/dwc3.h>
+
+#include "xhci.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rockchip_xhci_platdata {
+ fdt_addr_t hcd_base;
+ fdt_addr_t phy_base;
+ struct gpio_desc vbus_gpio;
+};
+
+/*
+ * Contains pointers to register base addresses
+ * for the usb controller.
+ */
+struct rockchip_xhci {
+ struct usb_platdata usb_plat;
+ struct xhci_ctrl ctrl;
+ struct xhci_hccr *hcd;
+ struct dwc3 *dwc3_reg;
+};
+
+static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
+{
+ struct rockchip_xhci_platdata *plat = dev_get_platdata(dev);
+ struct udevice *child;
+ int ret = 0;
+
+ /*
+ * Get the base address for XHCI controller from the device node
+ */
+ plat->hcd_base = dev_get_addr(dev);
+ if (plat->hcd_base == FDT_ADDR_T_NONE) {
+ debug("Can't get the XHCI register base address\n");
+ return -ENXIO;
+ }
+
+ /* Get the base address for usbphy from the device node */
+ for (device_find_first_child(dev, &child); child;
+ device_find_next_child(&child)) {
+ if (!of_device_is_compatible(child, "rockchip,rk3399-usb3-phy"))
+ continue;
+ plat->phy_base = dev_get_addr(child);
+ break;
+ }
+
+ if (plat->phy_base == FDT_ADDR_T_NONE) {
+ debug("Can't get the usbphy register address\n");
+ return -ENXIO;
+ }
+
+ /* Vbus gpio */
+ ret = gpio_request_by_name(dev, "rockchip,vbus-gpio", 0,
+ &plat->vbus_gpio, GPIOD_IS_OUT);
+ if (ret)
+ debug("rockchip,vbus-gpio node missing!");
+
+ return 0;
+}
+
+/*
+ * rockchip_dwc3_phy_setup() - Configure USB PHY Interface of DWC3 Core
+ * @dwc: Pointer to our controller context structure
+ * @dev: Pointer to ulcass device
+ */
+static void rockchip_dwc3_phy_setup(struct dwc3 *dwc3_reg,
+ struct udevice *dev)
+{
+ u32 reg;
+ const void *blob = gd->fdt_blob;
+ u32 utmi_bits;
+
+ /* Set dwc3 usb2 phy config */
+ reg = readl(&dwc3_reg->g_usb2phycfg[0]);
+
+ if (fdtdec_get_bool(blob, dev->of_offset,
+ "snps,dis-enblslpm-quirk"))
+ reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
+
+ utmi_bits = fdtdec_get_int(blob, dev->of_offset,
+ "snps,phyif-utmi-bits", -1);
+ if (utmi_bits == 16) {
+ reg |= DWC3_GUSB2PHYCFG_PHYIF;
+ reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
+ reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
+ } else if (utmi_bits == 8) {
+ reg &= ~DWC3_GUSB2PHYCFG_PHYIF;
+ reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
+ reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT;
+ }
+
+ if (fdtdec_get_bool(blob, dev->of_offset,
+ "snps,dis-u2-freeclk-exists-quirk"))
+ reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
+
+ if (fdtdec_get_bool(blob, dev->of_offset,
+ "snps,dis-u2-susphy-quirk"))
+ reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
+
+ writel(reg, &dwc3_reg->g_usb2phycfg[0]);
+}
+
+static int rockchip_xhci_core_init(struct rockchip_xhci *rkxhci,
+ struct udevice *dev)
+{
+ int ret;
+
+ ret = dwc3_core_init(rkxhci->dwc3_reg);
+ if (ret) {
+ debug("failed to initialize core\n");
+ return ret;
+ }
+
+ rockchip_dwc3_phy_setup(rkxhci->dwc3_reg, dev);
+
+ /* We are hard-coding DWC3 core to Host Mode */
+ dwc3_set_mode(rkxhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
+
+ return 0;
+}
+
+static int rockchip_xhci_core_exit(struct rockchip_xhci *rkxhci)
+{
+ return 0;
+}
+
+static int xhci_usb_probe(struct udevice *dev)
+{
+ struct rockchip_xhci_platdata *plat = dev_get_platdata(dev);
+ struct rockchip_xhci *ctx = dev_get_priv(dev);
+ struct xhci_hcor *hcor;
+ int ret;
+
+ ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
+ ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
+ hcor = (struct xhci_hcor *)((uint64_t)ctx->hcd +
+ HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)));
+
+ /* setup the Vbus gpio here */
+ if (dm_gpio_is_valid(&plat->vbus_gpio))
+ dm_gpio_set_value(&plat->vbus_gpio, 1);
+
+ ret = rockchip_xhci_core_init(ctx, dev);
+ if (ret) {
+ debug("XHCI: failed to initialize controller\n");
+ return ret;
+ }
+
+ return xhci_register(dev, ctx->hcd, hcor);
+}
+
+static int xhci_usb_remove(struct udevice *dev)
+{
+ struct rockchip_xhci *ctx = dev_get_priv(dev);
+ int ret;
+
+ ret = xhci_deregister(dev);
+ if (ret)
+ return ret;
+ ret = rockchip_xhci_core_exit(ctx);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static const struct udevice_id xhci_usb_ids[] = {
+ { .compatible = "rockchip,rk3399-xhci" },
+ { }
+};
+
+U_BOOT_DRIVER(usb_xhci) = {
+ .name = "xhci_rockchip",
+ .id = UCLASS_USB,
+ .of_match = xhci_usb_ids,
+ .ofdata_to_platdata = xhci_usb_ofdata_to_platdata,
+ .probe = xhci_usb_probe,
+ .remove = xhci_usb_remove,
+ .ops = &xhci_usb_ops,
+ .bind = dm_scan_fdt_dev,
+ .platdata_auto_alloc_size = sizeof(struct rockchip_xhci_platdata),
+ .priv_auto_alloc_size = sizeof(struct rockchip_xhci),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+
+static const struct udevice_id usb_phy_ids[] = {
+ { .compatible = "rockchip,rk3399-usb3-phy" },
+ { }
+};
+
+U_BOOT_DRIVER(usb_phy) = {
+ .name = "usb_phy_rockchip",
+ .of_match = usb_phy_ids,
+};
diff --git a/drivers/usb/host/xhci-uniphier.c b/drivers/usb/host/xhci-uniphier.c
deleted file mode 100644
index 1b3f3d2..0000000
--- a/drivers/usb/host/xhci-uniphier.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <usb.h>
-#include <fdtdec.h>
-#include "xhci.h"
-
-static int get_uniphier_xhci_base(int index, struct xhci_hccr **base)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int node_list[2];
- fdt_addr_t addr;
- int count;
-
- count = fdtdec_find_aliases_for_id(gd->fdt_blob, "usb",
- COMPAT_SOCIONEXT_XHCI, node_list,
- ARRAY_SIZE(node_list));
-
- if (index >= count)
- return -ENODEV;
-
- addr = fdtdec_get_addr(gd->fdt_blob, node_list[index], "reg");
- if (addr == FDT_ADDR_T_NONE)
- return -ENODEV;
-
- *base = (struct xhci_hccr *)addr;
-
- return 0;
-}
-
-#define USB3_RST_CTRL 0x00100040
-#define IOMMU_RST_N (1 << 5)
-#define LINK_RST_N (1 << 4)
-
-static void uniphier_xhci_reset(void __iomem *base, int on)
-{
- u32 tmp;
-
- tmp = readl(base + USB3_RST_CTRL);
-
- if (on)
- tmp &= ~(IOMMU_RST_N | LINK_RST_N);
- else
- tmp |= IOMMU_RST_N | LINK_RST_N;
-
- writel(tmp, base + USB3_RST_CTRL);
-}
-
-int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
-{
- int ret;
- struct xhci_hccr *cr;
- struct xhci_hcor *or;
-
- ret = get_uniphier_xhci_base(index, &cr);
- if (ret < 0)
- return ret;
-
- uniphier_xhci_reset(cr, 0);
-
- or = (void *)cr + HC_LENGTH(xhci_readl(&cr->cr_capbase));
-
- *hccr = cr;
- *hcor = or;
-
- return 0;
-}
-
-void xhci_hcd_stop(int index)
-{
- int ret;
- struct xhci_hccr *cr;
-
- ret = get_uniphier_xhci_base(index, &cr);
- if (ret < 0)
- return;
-
- uniphier_xhci_reset(cr, 1);
-}
diff --git a/drivers/usb/host/xhci-zynqmp.c b/drivers/usb/host/xhci-zynqmp.c
index a735369..cec1bc4 100644
--- a/drivers/usb/host/xhci-zynqmp.c
+++ b/drivers/usb/host/xhci-zynqmp.c
@@ -12,7 +12,7 @@
#include <common.h>
#include <usb.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include <asm/arch-zynqmp/hardware.h>
#include <linux/compat.h>
#include <linux/usb/dwc3.h>
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index cb8a04b..3201177 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -28,7 +28,7 @@
#include <watchdog.h>
#include <asm/cache.h>
#include <asm/unaligned.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include "xhci.h"
#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c
index dd0443c..84cb21b 100644
--- a/drivers/usb/musb-new/musb_core.c
+++ b/drivers/usb/musb-new/musb_core.c
@@ -79,7 +79,7 @@
#else
#include <common.h>
#include <usb.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/musb.h>
diff --git a/drivers/usb/musb-new/musb_core.h b/drivers/usb/musb-new/musb_core.h
index 2fe4ed5..4ae0ae2 100644
--- a/drivers/usb/musb-new/musb_core.h
+++ b/drivers/usb/musb-new/musb_core.h
@@ -21,7 +21,7 @@
#include <linux/usb.h>
#include <linux/usb/otg.h>
#else
-#include <asm/errno.h>
+#include <linux/errno.h>
#endif
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
diff --git a/drivers/usb/musb-new/musb_gadget.h b/drivers/usb/musb-new/musb_gadget.h
index ddd567b..bd1d4f6 100644
--- a/drivers/usb/musb-new/musb_gadget.h
+++ b/drivers/usb/musb-new/musb_gadget.h
@@ -14,7 +14,7 @@
#include <linux/list.h>
#ifdef __UBOOT__
#include <asm/byteorder.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#endif
diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c
index 6ce528c..ea71f75 100644
--- a/drivers/usb/musb-new/musb_uboot.c
+++ b/drivers/usb/musb-new/musb_uboot.c
@@ -4,7 +4,7 @@
#ifdef CONFIG_ARCH_SUNXI
#include <asm/arch/usb_phy.h>
#endif
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index c016a0b..469377f 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -201,10 +201,11 @@
/* musb_core does not call enable / disable in a balanced manner <sigh> */
static bool enabled = false;
-static struct musb *sunxi_musb;
static int sunxi_musb_enable(struct musb *musb)
{
+ int ret;
+
pr_debug("%s():\n", __func__);
musb_ep_select(musb->mregs, 0);
@@ -217,26 +218,17 @@
musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
if (is_host_enabled(musb)) {
- int id = sunxi_usb_phy_id_detect(0);
-
- if (id == 1 && sunxi_usb_phy_power_is_on(0))
- sunxi_usb_phy_power_off(0);
-
- if (!sunxi_usb_phy_power_is_on(0)) {
- int vbus = sunxi_usb_phy_vbus_detect(0);
- if (vbus == 1) {
- printf("A charger is plugged into the OTG: ");
- return -ENODEV;
- }
+ ret = sunxi_usb_phy_vbus_detect(0);
+ if (ret == 1) {
+ printf("A charger is plugged into the OTG: ");
+ return -ENODEV;
}
-
- if (id == 1) {
+ ret = sunxi_usb_phy_id_detect(0);
+ if (ret == 1) {
printf("No host cable detected: ");
return -ENODEV;
}
-
- if (!sunxi_usb_phy_power_is_on(0))
- sunxi_usb_phy_power_on(0);
+ sunxi_usb_phy_power_on(0); /* port power on */
}
USBC_ForceVbusValidToHigh(musb->mregs);
@@ -252,6 +244,9 @@
if (!enabled)
return;
+ if (is_host_enabled(musb))
+ sunxi_usb_phy_power_off(0); /* port power off */
+
USBC_ForceVbusValidToLow(musb->mregs);
mdelay(200); /* Wait for the current session to timeout */
@@ -313,7 +308,9 @@
};
#ifdef CONFIG_USB_MUSB_HOST
-int musb_usb_probe(struct udevice *dev)
+static int musb_usb_remove(struct udevice *dev);
+
+static int musb_usb_probe(struct udevice *dev)
{
struct musb_host_data *host = dev_get_priv(dev);
struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
@@ -321,23 +318,21 @@
priv->desc_before_addr = true;
- if (!sunxi_musb) {
- sunxi_musb = musb_init_controller(&musb_plat, NULL,
- (void *)SUNXI_USB0_BASE);
- }
-
- host->host = sunxi_musb;
+ host->host = musb_init_controller(&musb_plat, NULL,
+ (void *)SUNXI_USB0_BASE);
if (!host->host)
return -EIO;
ret = musb_lowlevel_init(host);
if (ret == 0)
printf("MUSB OTG\n");
+ else
+ musb_usb_remove(dev);
return ret;
}
-int musb_usb_remove(struct udevice *dev)
+static int musb_usb_remove(struct udevice *dev)
{
struct musb_host_data *host = dev_get_priv(dev);
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
@@ -350,6 +345,9 @@
#endif
clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+ free(host->host);
+ host->host = NULL;
+
return 0;
}
diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c
index 1993da1..7c7fba2 100644
--- a/drivers/usb/phy/omap_usb_phy.c
+++ b/drivers/usb/phy/omap_usb_phy.c
@@ -11,7 +11,7 @@
#include <common.h>
#include <usb.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
#include <asm/omap_common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/sys_proto.h>
diff --git a/drivers/video/ati_radeon_fb.c b/drivers/video/ati_radeon_fb.c
index 5748951..07a29ea 100644
--- a/drivers/video/ati_radeon_fb.c
+++ b/drivers/video/ati_radeon_fb.c
@@ -22,7 +22,7 @@
#include <bios_emul.h>
#include <pci.h>
#include <asm/processor.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <malloc.h>
#include <video_fb.h>
diff --git a/drivers/video/bridge/ptn3460.c b/drivers/video/bridge/ptn3460.c
index 2e2ae7c..f9d3720 100644
--- a/drivers/video/bridge/ptn3460.c
+++ b/drivers/video/bridge/ptn3460.c
@@ -11,14 +11,9 @@
static int ptn3460_attach(struct udevice *dev)
{
- int ret;
-
debug("%s: %s\n", __func__, dev->name);
- ret = video_bridge_set_active(dev, true);
- if (ret)
- return ret;
- return 0;
+ return video_bridge_set_active(dev, true);
}
struct video_bridge_ops ptn3460_ops = {
diff --git a/drivers/video/broadwell_igd.c b/drivers/video/broadwell_igd.c
index ce4f296..4286fd0 100644
--- a/drivers/video/broadwell_igd.c
+++ b/drivers/video/broadwell_igd.c
@@ -323,10 +323,7 @@
static unsigned long gtt_read(struct broadwell_igd_priv *priv,
unsigned long reg)
{
- u32 val;
-
- val = readl(priv->regs + reg);
- return val;
+ return readl(priv->regs + reg);
}
static void gtt_write(struct broadwell_igd_priv *priv, unsigned long reg,
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 468f385d..bbd384d 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -19,7 +19,7 @@
#include <linux/list.h>
#include <linux/fb.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c
index f978473..aae78a8 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.c
+++ b/drivers/video/exynos/exynos_dp_lowlevel.c
@@ -881,11 +881,7 @@
unsigned int exynos_dp_get_lane_count(struct exynos_dp *dp_regs)
{
- unsigned int reg;
-
- reg = readl(&dp_regs->lane_count_set);
-
- return reg;
+ return readl(&dp_regs->lane_count_set);
}
unsigned char exynos_dp_get_lanex_pre_emphasis(struct exynos_dp *dp_regs,
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 97228cd..5483d66 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -27,7 +27,7 @@
#include <asm/arch/pinmux.h>
#include <asm/arch/system.h>
#include <asm/gpio.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c
index 5676a0f..f8d4488 100644
--- a/drivers/video/ipu_common.c
+++ b/drivers/video/ipu_common.c
@@ -16,7 +16,7 @@
#include <linux/types.h>
#include <linux/err.h>
#include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <div64.h>
diff --git a/drivers/video/ipu_disp.c b/drivers/video/ipu_disp.c
index cbac9f7..47d7417 100644
--- a/drivers/video/ipu_disp.c
+++ b/drivers/video/ipu_disp.c
@@ -15,7 +15,7 @@
#include <common.h>
#include <linux/types.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index 3f10d5c..51d06d6 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -12,7 +12,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include "videomodes.h"
diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c
index 265274b..0d0a0a9 100644
--- a/drivers/video/mxc_ipuv3_fb.c
+++ b/drivers/video/mxc_ipuv3_fb.c
@@ -12,7 +12,7 @@
*/
#include <common.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/global_data.h>
#include <linux/string.h>
#include <linux/list.h>
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index ddbb118..3cc03ca 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -12,7 +12,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/imx-common/dma.h>
diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index 521eb75..bea3e69 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -11,7 +11,7 @@
#include <malloc.h>
#include <video_fb.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/s3c24x0_cpu.h>
diff --git a/drivers/video/tegra124/display.c b/drivers/video/tegra124/display.c
index 2f1f0df..d8999c3 100644
--- a/drivers/video/tegra124/display.c
+++ b/drivers/video/tegra124/display.c
@@ -326,13 +326,7 @@
int *panel_bppp,
struct display_timing *timing)
{
- int ret;
-
- ret = display_read_timing(dp_dev, timing);
- if (ret)
- return ret;
-
- return 0;
+ return display_read_timing(dp_dev, timing);
}
static int display_init(struct udevice *dev, void *lcdbase,
diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
index c8cc05e..e9a90b1 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -190,7 +190,6 @@
{
struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
struct stdio_dev *sdev = &priv->sdev;
- int ret;
if (!priv->tab_width_frac)
priv->tab_width_frac = VID_TO_POS(priv->x_charsize) * 8;
@@ -206,11 +205,8 @@
sdev->putc = vidconsole_putc;
sdev->puts = vidconsole_puts;
sdev->priv = dev;
- ret = stdio_register(sdev);
- if (ret)
- return ret;
- return 0;
+ return stdio_register(sdev);
}
UCLASS_DRIVER(vidconsole) = {
diff --git a/examples/standalone/mem_to_mem_idma2intr.c b/examples/standalone/mem_to_mem_idma2intr.c
index 17da8db..ce6e6c4 100644
--- a/examples/standalone/mem_to_mem_idma2intr.c
+++ b/examples/standalone/mem_to_mem_idma2intr.c
@@ -186,13 +186,6 @@
}
return 0;
}
-void * memset(void * s,int c,size_t count)
-{
- char *xs = (char *) s;
- while (count--)
- *xs++ = c;
- return s;
-}
int memcmp(const void * cs,const void * ct,size_t count)
{
const unsigned char *su1, *su2;
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index eb49fce..e78185b 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -33,20 +33,156 @@
struct ext2_data *ext4fs_root;
struct ext2fs_node *ext4fs_file;
-uint32_t *ext4fs_indir1_block;
+__le32 *ext4fs_indir1_block;
int ext4fs_indir1_size;
int ext4fs_indir1_blkno = -1;
-uint32_t *ext4fs_indir2_block;
+__le32 *ext4fs_indir2_block;
int ext4fs_indir2_size;
int ext4fs_indir2_blkno = -1;
-uint32_t *ext4fs_indir3_block;
+__le32 *ext4fs_indir3_block;
int ext4fs_indir3_size;
int ext4fs_indir3_blkno = -1;
struct ext2_inode *g_parent_inode;
static int symlinknest;
#if defined(CONFIG_EXT4_WRITE)
+struct ext2_block_group *ext4fs_get_group_descriptor
+ (const struct ext_filesystem *fs, uint32_t bg_idx)
+{
+ return (struct ext2_block_group *)(fs->gdtable + (bg_idx * fs->gdsize));
+}
+
+static inline void ext4fs_sb_free_inodes_dec(struct ext2_sblock *sb)
+{
+ sb->free_inodes = cpu_to_le32(le32_to_cpu(sb->free_inodes) - 1);
+}
+
+static inline void ext4fs_sb_free_blocks_dec(struct ext2_sblock *sb)
+{
+ uint64_t free_blocks = le32_to_cpu(sb->free_blocks);
+ free_blocks += (uint64_t)le32_to_cpu(sb->free_blocks_high) << 32;
+ free_blocks--;
+
+ sb->free_blocks = cpu_to_le32(free_blocks & 0xffffffff);
+ sb->free_blocks_high = cpu_to_le16(free_blocks >> 32);
+}
+
+static inline void ext4fs_bg_free_inodes_dec
+ (struct ext2_block_group *bg, const struct ext_filesystem *fs)
+{
+ uint32_t free_inodes = le16_to_cpu(bg->free_inodes);
+ if (fs->gdsize == 64)
+ free_inodes += le16_to_cpu(bg->free_inodes_high) << 16;
+ free_inodes--;
+
+ bg->free_inodes = cpu_to_le16(free_inodes & 0xffff);
+ if (fs->gdsize == 64)
+ bg->free_inodes_high = cpu_to_le16(free_inodes >> 16);
+}
+
+static inline void ext4fs_bg_free_blocks_dec
+ (struct ext2_block_group *bg, const struct ext_filesystem *fs)
+{
+ uint32_t free_blocks = le16_to_cpu(bg->free_blocks);
+ if (fs->gdsize == 64)
+ free_blocks += le16_to_cpu(bg->free_blocks_high) << 16;
+ free_blocks--;
+
+ bg->free_blocks = cpu_to_le16(free_blocks & 0xffff);
+ if (fs->gdsize == 64)
+ bg->free_blocks_high = cpu_to_le16(free_blocks >> 16);
+}
+
+static inline void ext4fs_bg_itable_unused_dec
+ (struct ext2_block_group *bg, const struct ext_filesystem *fs)
+{
+ uint32_t free_inodes = le16_to_cpu(bg->bg_itable_unused);
+ if (fs->gdsize == 64)
+ free_inodes += le16_to_cpu(bg->bg_itable_unused_high) << 16;
+ free_inodes--;
+
+ bg->bg_itable_unused = cpu_to_le16(free_inodes & 0xffff);
+ if (fs->gdsize == 64)
+ bg->bg_itable_unused_high = cpu_to_le16(free_inodes >> 16);
+}
+
+uint64_t ext4fs_sb_get_free_blocks(const struct ext2_sblock *sb)
+{
+ uint64_t free_blocks = le32_to_cpu(sb->free_blocks);
+ free_blocks += (uint64_t)le32_to_cpu(sb->free_blocks_high) << 32;
+ return free_blocks;
+}
+
+void ext4fs_sb_set_free_blocks(struct ext2_sblock *sb, uint64_t free_blocks)
+{
+ sb->free_blocks = cpu_to_le32(free_blocks & 0xffffffff);
+ sb->free_blocks_high = cpu_to_le16(free_blocks >> 32);
+}
+
+uint32_t ext4fs_bg_get_free_blocks(const struct ext2_block_group *bg,
+ const struct ext_filesystem *fs)
+{
+ uint32_t free_blocks = le16_to_cpu(bg->free_blocks);
+ if (fs->gdsize == 64)
+ free_blocks += le16_to_cpu(bg->free_blocks_high) << 16;
+ return free_blocks;
+}
+
+static inline
+uint32_t ext4fs_bg_get_free_inodes(const struct ext2_block_group *bg,
+ const struct ext_filesystem *fs)
+{
+ uint32_t free_inodes = le16_to_cpu(bg->free_inodes);
+ if (fs->gdsize == 64)
+ free_inodes += le16_to_cpu(bg->free_inodes_high) << 16;
+ return free_inodes;
+}
+
+static inline uint16_t ext4fs_bg_get_flags(const struct ext2_block_group *bg)
+{
+ return le16_to_cpu(bg->bg_flags);
+}
+
+static inline void ext4fs_bg_set_flags(struct ext2_block_group *bg,
+ uint16_t flags)
+{
+ bg->bg_flags = cpu_to_le16(flags);
+}
+
+/* Block number of the block bitmap */
+uint64_t ext4fs_bg_get_block_id(const struct ext2_block_group *bg,
+ const struct ext_filesystem *fs)
+{
+ uint64_t block_nr = le32_to_cpu(bg->block_id);
+ if (fs->gdsize == 64)
+ block_nr += (uint64_t)le32_to_cpu(bg->block_id_high) << 32;
+ return block_nr;
+}
+
+/* Block number of the inode bitmap */
+uint64_t ext4fs_bg_get_inode_id(const struct ext2_block_group *bg,
+ const struct ext_filesystem *fs)
+{
+ uint64_t block_nr = le32_to_cpu(bg->inode_id);
+ if (fs->gdsize == 64)
+ block_nr += (uint64_t)le32_to_cpu(bg->inode_id_high) << 32;
+ return block_nr;
+}
+#endif
+
+/* Block number of the inode table */
+uint64_t ext4fs_bg_get_inode_table_id(const struct ext2_block_group *bg,
+ const struct ext_filesystem *fs)
+{
+ uint64_t block_nr = le32_to_cpu(bg->inode_table_id);
+ if (fs->gdsize == 64)
+ block_nr +=
+ (uint64_t)le32_to_cpu(bg->inode_table_id_high) << 32;
+ return block_nr;
+}
+
+#if defined(CONFIG_EXT4_WRITE)
uint32_t ext4fs_div_roundup(uint32_t size, uint32_t n)
{
uint32_t res = size / n;
@@ -112,7 +248,7 @@
while (*ptr == 255) {
ptr++;
count += 8;
- if (count > ext4fs_root->sblock.inodes_per_group)
+ if (count > le32_to_cpu(ext4fs_root->sblock.inodes_per_group))
return -1;
}
@@ -138,18 +274,12 @@
static int _get_new_blk_no(unsigned char *buffer)
{
- unsigned char input;
- int operand, status;
+ int operand;
int count = 0;
- int j = 0;
+ int i;
unsigned char *ptr = buffer;
struct ext_filesystem *fs = get_fs();
- if (fs->blksz != 1024)
- count = 0;
- else
- count = 1;
-
while (*ptr == 255) {
ptr++;
count += 8;
@@ -157,21 +287,17 @@
return -1;
}
- for (j = 0; j < fs->blksz; j++) {
- input = *ptr;
- int i = 0;
- while (i <= 7) {
- operand = 1 << i;
- status = input & operand;
- if (status) {
- i++;
- count++;
- } else {
- *ptr |= operand;
- return count;
- }
+ if (fs->blksz == 1024)
+ count += 1;
+
+ for (i = 0; i <= 7; i++) {
+ operand = 1 << i;
+ if (*ptr & operand) {
+ count++;
+ } else {
+ *ptr |= operand;
+ return count;
}
- ptr = ptr + 1;
}
return -1;
@@ -249,7 +375,7 @@
unsigned char *ptr = buffer;
unsigned char operand;
- inode_no -= (index * ext4fs_root->sblock.inodes_per_group);
+ inode_no -= (index * le32_to_cpu(ext4fs_root->sblock.inodes_per_group));
i = inode_no / 8;
remainder = inode_no % 8;
if (remainder == 0) {
@@ -274,7 +400,7 @@
unsigned char *ptr = buffer;
unsigned char operand;
- inode_no -= (index * ext4fs_root->sblock.inodes_per_group);
+ inode_no -= (index * le32_to_cpu(ext4fs_root->sblock.inodes_per_group));
i = inode_no / 8;
remainder = inode_no % 8;
if (remainder == 0) {
@@ -289,19 +415,20 @@
*ptr = *ptr & ~(operand);
}
-int ext4fs_checksum_update(unsigned int i)
+uint16_t ext4fs_checksum_update(uint32_t i)
{
struct ext2_block_group *desc;
struct ext_filesystem *fs = get_fs();
- __u16 crc = 0;
+ uint16_t crc = 0;
+ __le32 le32_i = cpu_to_le32(i);
- desc = (struct ext2_block_group *)&fs->bgd[i];
- if (fs->sb->feature_ro_compat & EXT4_FEATURE_RO_COMPAT_GDT_CSUM) {
+ desc = ext4fs_get_group_descriptor(fs, i);
+ if (le32_to_cpu(fs->sb->feature_ro_compat) & EXT4_FEATURE_RO_COMPAT_GDT_CSUM) {
int offset = offsetof(struct ext2_block_group, bg_checksum);
crc = ext2fs_crc16(~0, fs->sb->unique_id,
sizeof(fs->sb->unique_id));
- crc = ext2fs_crc16(crc, &i, sizeof(i));
+ crc = ext2fs_crc16(crc, &le32_i, sizeof(le32_i));
crc = ext2fs_crc16(crc, desc, offset);
offset += sizeof(desc->bg_checksum); /* skip checksum */
assert(offset == sizeof(*desc));
@@ -322,7 +449,7 @@
dentry_length = sizeof(struct ext2_dirent) +
dir->namelen + padding_factor;
- sizeof_void_space = dir->direntlen - dentry_length;
+ sizeof_void_space = le16_to_cpu(dir->direntlen) - dentry_length;
if (sizeof_void_space == 0)
return 0;
@@ -333,58 +460,57 @@
new_entry_byte_reqd = strlen(filename) +
sizeof(struct ext2_dirent) + padding_factor;
if (sizeof_void_space >= new_entry_byte_reqd) {
- dir->direntlen = dentry_length;
+ dir->direntlen = cpu_to_le16(dentry_length);
return sizeof_void_space;
}
return 0;
}
-void ext4fs_update_parent_dentry(char *filename, int *p_ino, int file_type)
+int ext4fs_update_parent_dentry(char *filename, int file_type)
{
unsigned int *zero_buffer = NULL;
char *root_first_block_buffer = NULL;
- int direct_blk_idx;
- long int root_blknr;
+ int blk_idx;
long int first_block_no_of_root = 0;
- long int previous_blknr = -1;
int totalbytes = 0;
- short int padding_factor = 0;
unsigned int new_entry_byte_reqd;
- unsigned int last_entry_dirlen;
int sizeof_void_space = 0;
int templength = 0;
- int inodeno;
+ int inodeno = -1;
int status;
struct ext_filesystem *fs = get_fs();
/* directory entry */
struct ext2_dirent *dir;
char *temp_dir = NULL;
+ uint32_t new_blk_no;
+ uint32_t new_size;
+ uint32_t new_blockcnt;
+ uint32_t directory_blocks;
zero_buffer = zalloc(fs->blksz);
if (!zero_buffer) {
printf("No Memory\n");
- return;
+ return -1;
}
root_first_block_buffer = zalloc(fs->blksz);
if (!root_first_block_buffer) {
free(zero_buffer);
printf("No Memory\n");
- return;
+ return -1;
}
+ new_entry_byte_reqd = ROUND(strlen(filename) +
+ sizeof(struct ext2_dirent), 4);
restart:
+ directory_blocks = le32_to_cpu(g_parent_inode->size) >>
+ LOG2_BLOCK_SIZE(ext4fs_root);
+ blk_idx = directory_blocks - 1;
+restart_read:
/* read the block no allocated to a file */
- for (direct_blk_idx = 0; direct_blk_idx < INDIRECT_BLOCKS;
- direct_blk_idx++) {
- root_blknr = read_allocated_block(g_parent_inode,
- direct_blk_idx);
- if (root_blknr == 0) {
- first_block_no_of_root = previous_blknr;
- break;
- }
- previous_blknr = root_blknr;
- }
+ first_block_no_of_root = read_allocated_block(g_parent_inode, blk_idx);
+ if (first_block_no_of_root <= 0)
+ goto fail;
status = ext4fs_devread((lbaint_t)first_block_no_of_root
* fs->sect_perblk,
@@ -396,66 +522,63 @@
goto fail;
dir = (struct ext2_dirent *)root_first_block_buffer;
totalbytes = 0;
- while (dir->direntlen > 0) {
- /*
- * blocksize-totalbytes because last directory length
- * i.e. dir->direntlen is free availble space in the
- * block that means it is a last entry of directory
- * entry
- */
- /* traversing the each directory entry */
- if (fs->blksz - totalbytes == dir->direntlen) {
- if (strlen(filename) % 4 != 0)
- padding_factor = 4 - (strlen(filename) % 4);
+ while (le16_to_cpu(dir->direntlen) > 0) {
+ unsigned short used_len = ROUND(dir->namelen +
+ sizeof(struct ext2_dirent), 4);
- new_entry_byte_reqd = strlen(filename) +
- sizeof(struct ext2_dirent) + padding_factor;
- padding_factor = 0;
- /*
- * update last directory entry length to its
- * length because we are creating new directory
- * entry
- */
- if (dir->namelen % 4 != 0)
- padding_factor = 4 - (dir->namelen % 4);
+ /* last entry of block */
+ if (fs->blksz - totalbytes == le16_to_cpu(dir->direntlen)) {
- last_entry_dirlen = dir->namelen +
- sizeof(struct ext2_dirent) + padding_factor;
- if ((fs->blksz - totalbytes - last_entry_dirlen) <
- new_entry_byte_reqd) {
- printf("1st Block Full:Allocate new block\n");
+ /* check if new entry fits */
+ if ((used_len + new_entry_byte_reqd) <=
+ le16_to_cpu(dir->direntlen)) {
+ dir->direntlen = cpu_to_le16(used_len);
+ break;
+ } else {
+ if (blk_idx > 0) {
+ printf("Block full, trying previous\n");
+ blk_idx--;
+ goto restart_read;
+ }
+ printf("All blocks full: Allocate new\n");
- if (direct_blk_idx == INDIRECT_BLOCKS - 1) {
+ if (le32_to_cpu(g_parent_inode->flags) &
+ EXT4_EXTENTS_FL) {
+ printf("Directory uses extents\n");
+ goto fail;
+ }
+ if (directory_blocks >= INDIRECT_BLOCKS) {
printf("Directory exceeds limit\n");
goto fail;
}
- g_parent_inode->b.blocks.dir_blocks
- [direct_blk_idx] = ext4fs_get_new_blk_no();
- if (g_parent_inode->b.blocks.dir_blocks
- [direct_blk_idx] == -1) {
+ new_blk_no = ext4fs_get_new_blk_no();
+ if (new_blk_no == -1) {
printf("no block left to assign\n");
goto fail;
}
- put_ext4(((uint64_t)
- ((uint64_t)g_parent_inode->b.
- blocks.dir_blocks[direct_blk_idx] *
- (uint64_t)fs->blksz)), zero_buffer, fs->blksz);
- g_parent_inode->size =
- g_parent_inode->size + fs->blksz;
- g_parent_inode->blockcnt =
- g_parent_inode->blockcnt + fs->sect_perblk;
+ put_ext4((uint64_t)new_blk_no * fs->blksz, zero_buffer, fs->blksz);
+ g_parent_inode->b.blocks.
+ dir_blocks[directory_blocks] =
+ cpu_to_le32(new_blk_no);
+
+ new_size = le32_to_cpu(g_parent_inode->size);
+ new_size += fs->blksz;
+ g_parent_inode->size = cpu_to_le32(new_size);
+
+ new_blockcnt = le32_to_cpu(g_parent_inode->blockcnt);
+ new_blockcnt += fs->sect_perblk;
+ g_parent_inode->blockcnt = cpu_to_le32(new_blockcnt);
+
if (ext4fs_put_metadata
(root_first_block_buffer,
first_block_no_of_root))
goto fail;
goto restart;
}
- dir->direntlen = last_entry_dirlen;
- break;
}
- templength = dir->direntlen;
+ templength = le16_to_cpu(dir->direntlen);
totalbytes = totalbytes + templength;
sizeof_void_space = check_void_in_dentry(dir, filename);
if (sizeof_void_space)
@@ -465,7 +588,7 @@
}
/* make a pointer ready for creating next directory entry */
- templength = dir->direntlen;
+ templength = le16_to_cpu(dir->direntlen);
totalbytes = totalbytes + templength;
dir = (struct ext2_dirent *)((char *)dir + templength);
@@ -475,11 +598,11 @@
printf("no inode left to assign\n");
goto fail;
}
- dir->inode = inodeno;
+ dir->inode = cpu_to_le32(inodeno);
if (sizeof_void_space)
- dir->direntlen = sizeof_void_space;
+ dir->direntlen = cpu_to_le16(sizeof_void_space);
else
- dir->direntlen = fs->blksz - totalbytes;
+ dir->direntlen = cpu_to_le16(fs->blksz - totalbytes);
dir->namelen = strlen(filename);
dir->filetype = FILETYPE_REG; /* regular file */
@@ -487,8 +610,6 @@
temp_dir = temp_dir + sizeof(struct ext2_dirent);
memcpy(temp_dir, filename, strlen(filename));
- *p_ino = inodeno;
-
/* update or write the 1st block of root inode */
if (ext4fs_put_metadata(root_first_block_buffer,
first_block_no_of_root))
@@ -497,82 +618,65 @@
fail:
free(zero_buffer);
free(root_first_block_buffer);
+
+ return inodeno;
}
static int search_dir(struct ext2_inode *parent_inode, char *dirname)
{
int status;
- int inodeno;
- int totalbytes;
- int templength;
- int direct_blk_idx;
+ int inodeno = 0;
+ int offset;
+ int blk_idx;
long int blknr;
- int found = 0;
- char *ptr = NULL;
- unsigned char *block_buffer = NULL;
+ char *block_buffer = NULL;
struct ext2_dirent *dir = NULL;
- struct ext2_dirent *previous_dir = NULL;
struct ext_filesystem *fs = get_fs();
+ uint32_t directory_blocks;
+ char *direntname;
- /* read the block no allocated to a file */
- for (direct_blk_idx = 0; direct_blk_idx < INDIRECT_BLOCKS;
- direct_blk_idx++) {
- blknr = read_allocated_block(parent_inode, direct_blk_idx);
- if (blknr == 0)
- goto fail;
+ directory_blocks = le32_to_cpu(parent_inode->size) >>
+ LOG2_BLOCK_SIZE(ext4fs_root);
- /* read the blocks of parenet inode */
- block_buffer = zalloc(fs->blksz);
- if (!block_buffer)
+ block_buffer = zalloc(fs->blksz);
+ if (!block_buffer)
+ goto fail;
+
+ /* get the block no allocated to a file */
+ for (blk_idx = 0; blk_idx < directory_blocks; blk_idx++) {
+ blknr = read_allocated_block(parent_inode, blk_idx);
+ if (blknr <= 0)
goto fail;
+ /* read the directory block */
status = ext4fs_devread((lbaint_t)blknr * fs->sect_perblk,
0, fs->blksz, (char *)block_buffer);
if (status == 0)
goto fail;
- dir = (struct ext2_dirent *)block_buffer;
- ptr = (char *)dir;
- totalbytes = 0;
- while (dir->direntlen >= 0) {
- /*
- * blocksize-totalbytes because last directory
- * length i.e.,*dir->direntlen is free availble
- * space in the block that means
- * it is a last entry of directory entry
- */
- if (strlen(dirname) == dir->namelen) {
- if (strncmp(dirname, ptr +
- sizeof(struct ext2_dirent),
- dir->namelen) == 0) {
- previous_dir->direntlen +=
- dir->direntlen;
- inodeno = dir->inode;
- dir->inode = 0;
- found = 1;
- break;
- }
- }
+ offset = 0;
+ do {
+ dir = (struct ext2_dirent *)(block_buffer + offset);
+ direntname = (char*)(dir) + sizeof(struct ext2_dirent);
- if (fs->blksz - totalbytes == dir->direntlen)
+ int direntlen = le16_to_cpu(dir->direntlen);
+ if (direntlen < sizeof(struct ext2_dirent))
break;
- /* traversing the each directory entry */
- templength = dir->direntlen;
- totalbytes = totalbytes + templength;
- previous_dir = dir;
- dir = (struct ext2_dirent *)((char *)dir + templength);
- ptr = (char *)dir;
- }
+ if (dir->inode && (strlen(dirname) == dir->namelen) &&
+ (strncmp(dirname, direntname, dir->namelen) == 0)) {
+ inodeno = le32_to_cpu(dir->inode);
+ break;
+ }
+
+ offset += direntlen;
- if (found == 1) {
+ } while (offset < fs->blksz);
+
+ if (inodeno > 0) {
free(block_buffer);
- block_buffer = NULL;
return inodeno;
}
-
- free(block_buffer);
- block_buffer = NULL;
}
fail:
@@ -720,7 +824,7 @@
if (matched_inode_no != -1) {
ext4fs_iget(matched_inode_no, &temp_inode);
- if (temp_inode.mode & S_IFDIR) {
+ if (le16_to_cpu(temp_inode.mode) & S_IFDIR) {
printf("It is a Directory\n");
result_inode_no = -1;
goto fail;
@@ -748,15 +852,13 @@
return result_inode_no;
}
-static int check_filename(char *filename, unsigned int blknr)
+static int unlink_filename(char *filename, unsigned int blknr)
{
- unsigned int first_block_no_of_root;
int totalbytes = 0;
int templength = 0;
int status, inodeno;
int found = 0;
char *root_first_block_buffer = NULL;
- char *root_first_block_addr = NULL;
struct ext2_dirent *dir = NULL;
struct ext2_dirent *previous_dir = NULL;
char *ptr = NULL;
@@ -764,46 +866,48 @@
int ret = -1;
/* get the first block of root */
- first_block_no_of_root = blknr;
root_first_block_buffer = zalloc(fs->blksz);
if (!root_first_block_buffer)
return -ENOMEM;
- root_first_block_addr = root_first_block_buffer;
- status = ext4fs_devread((lbaint_t)first_block_no_of_root *
- fs->sect_perblk, 0,
+ status = ext4fs_devread((lbaint_t)blknr * fs->sect_perblk, 0,
fs->blksz, root_first_block_buffer);
if (status == 0)
goto fail;
- if (ext4fs_log_journal(root_first_block_buffer, first_block_no_of_root))
+ if (ext4fs_log_journal(root_first_block_buffer, blknr))
goto fail;
dir = (struct ext2_dirent *)root_first_block_buffer;
ptr = (char *)dir;
totalbytes = 0;
- while (dir->direntlen >= 0) {
+ while (le16_to_cpu(dir->direntlen) >= 0) {
/*
* blocksize-totalbytes because last
* directory length i.e., *dir->direntlen
* is free availble space in the block that
* means it is a last entry of directory entry
*/
- if (strlen(filename) == dir->namelen) {
- if (strncmp(filename, ptr + sizeof(struct ext2_dirent),
- dir->namelen) == 0) {
- printf("file found deleting\n");
- previous_dir->direntlen += dir->direntlen;
- inodeno = dir->inode;
+ if (dir->inode && (strlen(filename) == dir->namelen) &&
+ (strncmp(ptr + sizeof(struct ext2_dirent),
+ filename, dir->namelen) == 0)) {
+ printf("file found, deleting\n");
+ inodeno = le32_to_cpu(dir->inode);
+ if (previous_dir) {
+ uint16_t new_len;
+ new_len = le16_to_cpu(previous_dir->direntlen);
+ new_len += le16_to_cpu(dir->direntlen);
+ previous_dir->direntlen = cpu_to_le16(new_len);
+ } else {
dir->inode = 0;
- found = 1;
- break;
}
+ found = 1;
+ break;
}
- if (fs->blksz - totalbytes == dir->direntlen)
+ if (fs->blksz - totalbytes == le16_to_cpu(dir->direntlen))
break;
/* traversing the each directory entry */
- templength = dir->direntlen;
+ templength = le16_to_cpu(dir->direntlen);
totalbytes = totalbytes + templength;
previous_dir = dir;
dir = (struct ext2_dirent *)((char *)dir + templength);
@@ -812,8 +916,7 @@
if (found == 1) {
- if (ext4fs_put_metadata(root_first_block_addr,
- first_block_no_of_root))
+ if (ext4fs_put_metadata(root_first_block_buffer, blknr))
goto fail;
ret = inodeno;
}
@@ -823,19 +926,22 @@
return ret;
}
-int ext4fs_filename_check(char *filename)
+int ext4fs_filename_unlink(char *filename)
{
- short direct_blk_idx = 0;
+ int blk_idx;
long int blknr = -1;
int inodeno = -1;
+ uint32_t directory_blocks;
+
+ directory_blocks = le32_to_cpu(g_parent_inode->size) >>
+ LOG2_BLOCK_SIZE(ext4fs_root);
/* read the block no allocated to a file */
- for (direct_blk_idx = 0; direct_blk_idx < INDIRECT_BLOCKS;
- direct_blk_idx++) {
- blknr = read_allocated_block(g_parent_inode, direct_blk_idx);
- if (blknr == 0)
+ for (blk_idx = 0; blk_idx < directory_blocks; blk_idx++) {
+ blknr = read_allocated_block(g_parent_inode, blk_idx);
+ if (blknr <= 0)
break;
- inodeno = check_filename(filename, blknr);
+ inodeno = unlink_filename(filename, blknr);
if (inodeno != -1)
return inodeno;
}
@@ -843,53 +949,54 @@
return -1;
}
-long int ext4fs_get_new_blk_no(void)
+uint32_t ext4fs_get_new_blk_no(void)
{
short i;
short status;
int remainder;
unsigned int bg_idx;
static int prev_bg_bitmap_index = -1;
- unsigned int blk_per_grp = ext4fs_root->sblock.blocks_per_group;
+ unsigned int blk_per_grp = le32_to_cpu(ext4fs_root->sblock.blocks_per_group);
struct ext_filesystem *fs = get_fs();
char *journal_buffer = zalloc(fs->blksz);
char *zero_buffer = zalloc(fs->blksz);
if (!journal_buffer || !zero_buffer)
goto fail;
- struct ext2_block_group *bgd = (struct ext2_block_group *)fs->gdtable;
if (fs->first_pass_bbmap == 0) {
for (i = 0; i < fs->no_blkgrp; i++) {
- if (bgd[i].free_blocks) {
- if (bgd[i].bg_flags & EXT4_BG_BLOCK_UNINIT) {
- put_ext4(((uint64_t) ((uint64_t)bgd[i].block_id *
- (uint64_t)fs->blksz)),
- zero_buffer, fs->blksz);
- bgd[i].bg_flags =
- bgd[i].
- bg_flags & ~EXT4_BG_BLOCK_UNINIT;
+ struct ext2_block_group *bgd = NULL;
+ bgd = ext4fs_get_group_descriptor(fs, i);
+ if (ext4fs_bg_get_free_blocks(bgd, fs)) {
+ uint16_t bg_flags = ext4fs_bg_get_flags(bgd);
+ uint64_t b_bitmap_blk =
+ ext4fs_bg_get_block_id(bgd, fs);
+ if (bg_flags & EXT4_BG_BLOCK_UNINIT) {
memcpy(fs->blk_bmaps[i], zero_buffer,
fs->blksz);
+ put_ext4(b_bitmap_blk * fs->blksz,
+ fs->blk_bmaps[i], fs->blksz);
+ bg_flags &= ~EXT4_BG_BLOCK_UNINIT;
+ ext4fs_bg_set_flags(bgd, bg_flags);
}
fs->curr_blkno =
_get_new_blk_no(fs->blk_bmaps[i]);
if (fs->curr_blkno == -1)
- /* if block bitmap is completely fill */
+ /* block bitmap is completely filled */
continue;
fs->curr_blkno = fs->curr_blkno +
(i * fs->blksz * 8);
fs->first_pass_bbmap++;
- bgd[i].free_blocks--;
- fs->sb->free_blocks--;
- status = ext4fs_devread((lbaint_t)
- bgd[i].block_id *
- fs->sect_perblk, 0,
- fs->blksz,
+ ext4fs_bg_free_blocks_dec(bgd, fs);
+ ext4fs_sb_free_blocks_dec(fs->sb);
+ status = ext4fs_devread(b_bitmap_blk *
+ fs->sect_perblk,
+ 0, fs->blksz,
journal_buffer);
if (status == 0)
goto fail;
if (ext4fs_log_journal(journal_buffer,
- bgd[i].block_id))
+ b_bitmap_blk))
goto fail;
goto success;
} else {
@@ -899,8 +1006,8 @@
goto fail;
} else {
-restart:
fs->curr_blkno++;
+restart:
/* get the blockbitmap index respective to blockno */
bg_idx = fs->curr_blkno / blk_per_grp;
if (fs->blksz == 1024) {
@@ -916,45 +1023,47 @@
if (bg_idx >= fs->no_blkgrp)
goto fail;
- if (bgd[bg_idx].free_blocks == 0) {
+ struct ext2_block_group *bgd = NULL;
+ bgd = ext4fs_get_group_descriptor(fs, bg_idx);
+ if (ext4fs_bg_get_free_blocks(bgd, fs) == 0) {
debug("block group %u is full. Skipping\n", bg_idx);
- fs->curr_blkno = fs->curr_blkno + blk_per_grp;
- fs->curr_blkno--;
+ fs->curr_blkno = (bg_idx + 1) * blk_per_grp;
+ if (fs->blksz == 1024)
+ fs->curr_blkno += 1;
goto restart;
}
- if (bgd[bg_idx].bg_flags & EXT4_BG_BLOCK_UNINIT) {
- memset(zero_buffer, '\0', fs->blksz);
- put_ext4(((uint64_t) ((uint64_t)bgd[bg_idx].block_id *
- (uint64_t)fs->blksz)), zero_buffer, fs->blksz);
+ uint16_t bg_flags = ext4fs_bg_get_flags(bgd);
+ uint64_t b_bitmap_blk = ext4fs_bg_get_block_id(bgd, fs);
+ if (bg_flags & EXT4_BG_BLOCK_UNINIT) {
memcpy(fs->blk_bmaps[bg_idx], zero_buffer, fs->blksz);
- bgd[bg_idx].bg_flags = bgd[bg_idx].bg_flags &
- ~EXT4_BG_BLOCK_UNINIT;
+ put_ext4(b_bitmap_blk * fs->blksz,
+ zero_buffer, fs->blksz);
+ bg_flags &= ~EXT4_BG_BLOCK_UNINIT;
+ ext4fs_bg_set_flags(bgd, bg_flags);
}
if (ext4fs_set_block_bmap(fs->curr_blkno, fs->blk_bmaps[bg_idx],
bg_idx) != 0) {
debug("going for restart for the block no %ld %u\n",
fs->curr_blkno, bg_idx);
+ fs->curr_blkno++;
goto restart;
}
/* journal backup */
if (prev_bg_bitmap_index != bg_idx) {
- memset(journal_buffer, '\0', fs->blksz);
- status = ext4fs_devread((lbaint_t)bgd[bg_idx].block_id
- * fs->sect_perblk,
+ status = ext4fs_devread(b_bitmap_blk * fs->sect_perblk,
0, fs->blksz, journal_buffer);
if (status == 0)
goto fail;
- if (ext4fs_log_journal(journal_buffer,
- bgd[bg_idx].block_id))
+ if (ext4fs_log_journal(journal_buffer, b_bitmap_blk))
goto fail;
prev_bg_bitmap_index = bg_idx;
}
- bgd[bg_idx].free_blocks--;
- fs->sb->free_blocks--;
+ ext4fs_bg_free_blocks_dec(bgd, fs);
+ ext4fs_sb_free_blocks_dec(fs->sb);
goto success;
}
success:
@@ -975,51 +1084,55 @@
short status;
unsigned int ibmap_idx;
static int prev_inode_bitmap_index = -1;
- unsigned int inodes_per_grp = ext4fs_root->sblock.inodes_per_group;
+ unsigned int inodes_per_grp = le32_to_cpu(ext4fs_root->sblock.inodes_per_group);
struct ext_filesystem *fs = get_fs();
char *journal_buffer = zalloc(fs->blksz);
char *zero_buffer = zalloc(fs->blksz);
if (!journal_buffer || !zero_buffer)
goto fail;
- struct ext2_block_group *bgd = (struct ext2_block_group *)fs->gdtable;
+ int has_gdt_chksum = le32_to_cpu(fs->sb->feature_ro_compat) &
+ EXT4_FEATURE_RO_COMPAT_GDT_CSUM ? 1 : 0;
if (fs->first_pass_ibmap == 0) {
for (i = 0; i < fs->no_blkgrp; i++) {
- if (bgd[i].free_inodes) {
- if (bgd[i].bg_itable_unused !=
- bgd[i].free_inodes)
- bgd[i].bg_itable_unused =
- bgd[i].free_inodes;
- if (bgd[i].bg_flags & EXT4_BG_INODE_UNINIT) {
- put_ext4(((uint64_t)
- ((uint64_t)bgd[i].inode_id *
- (uint64_t)fs->blksz)),
+ uint32_t free_inodes;
+ struct ext2_block_group *bgd = NULL;
+ bgd = ext4fs_get_group_descriptor(fs, i);
+ free_inodes = ext4fs_bg_get_free_inodes(bgd, fs);
+ if (free_inodes) {
+ uint16_t bg_flags = ext4fs_bg_get_flags(bgd);
+ uint64_t i_bitmap_blk =
+ ext4fs_bg_get_inode_id(bgd, fs);
+ if (has_gdt_chksum)
+ bgd->bg_itable_unused = free_inodes;
+ if (bg_flags & EXT4_BG_INODE_UNINIT) {
+ put_ext4(i_bitmap_blk * fs->blksz,
zero_buffer, fs->blksz);
- bgd[i].bg_flags = bgd[i].bg_flags &
- ~EXT4_BG_INODE_UNINIT;
+ bg_flags &= ~EXT4_BG_INODE_UNINIT;
+ ext4fs_bg_set_flags(bgd, bg_flags);
memcpy(fs->inode_bmaps[i],
zero_buffer, fs->blksz);
}
fs->curr_inode_no =
_get_new_inode_no(fs->inode_bmaps[i]);
if (fs->curr_inode_no == -1)
- /* if block bitmap is completely fill */
+ /* inode bitmap is completely filled */
continue;
fs->curr_inode_no = fs->curr_inode_no +
(i * inodes_per_grp);
fs->first_pass_ibmap++;
- bgd[i].free_inodes--;
- bgd[i].bg_itable_unused--;
- fs->sb->free_inodes--;
- status = ext4fs_devread((lbaint_t)
- bgd[i].inode_id *
- fs->sect_perblk, 0,
- fs->blksz,
+ ext4fs_bg_free_inodes_dec(bgd, fs);
+ if (has_gdt_chksum)
+ ext4fs_bg_itable_unused_dec(bgd, fs);
+ ext4fs_sb_free_inodes_dec(fs->sb);
+ status = ext4fs_devread(i_bitmap_blk *
+ fs->sect_perblk,
+ 0, fs->blksz,
journal_buffer);
if (status == 0)
goto fail;
if (ext4fs_log_journal(journal_buffer,
- bgd[i].inode_id))
+ i_bitmap_blk))
goto fail;
goto success;
} else
@@ -1031,13 +1144,16 @@
fs->curr_inode_no++;
/* get the blockbitmap index respective to blockno */
ibmap_idx = fs->curr_inode_no / inodes_per_grp;
- if (bgd[ibmap_idx].bg_flags & EXT4_BG_INODE_UNINIT) {
- memset(zero_buffer, '\0', fs->blksz);
- put_ext4(((uint64_t) ((uint64_t)bgd[ibmap_idx].inode_id *
- (uint64_t)fs->blksz)), zero_buffer,
- fs->blksz);
- bgd[ibmap_idx].bg_flags =
- bgd[ibmap_idx].bg_flags & ~EXT4_BG_INODE_UNINIT;
+ struct ext2_block_group *bgd =
+ ext4fs_get_group_descriptor(fs, ibmap_idx);
+ uint16_t bg_flags = ext4fs_bg_get_flags(bgd);
+ uint64_t i_bitmap_blk = ext4fs_bg_get_inode_id(bgd, fs);
+
+ if (bg_flags & EXT4_BG_INODE_UNINIT) {
+ put_ext4(i_bitmap_blk * fs->blksz,
+ zero_buffer, fs->blksz);
+ bg_flags &= ~EXT4_BG_INODE_UNINIT;
+ ext4fs_bg_set_flags(bgd, bg_flags);
memcpy(fs->inode_bmaps[ibmap_idx], zero_buffer,
fs->blksz);
}
@@ -1052,25 +1168,19 @@
/* journal backup */
if (prev_inode_bitmap_index != ibmap_idx) {
- memset(journal_buffer, '\0', fs->blksz);
- status = ext4fs_devread((lbaint_t)
- bgd[ibmap_idx].inode_id
- * fs->sect_perblk,
+ status = ext4fs_devread(i_bitmap_blk * fs->sect_perblk,
0, fs->blksz, journal_buffer);
if (status == 0)
goto fail;
if (ext4fs_log_journal(journal_buffer,
- bgd[ibmap_idx].inode_id))
+ le32_to_cpu(bgd->inode_id)))
goto fail;
prev_inode_bitmap_index = ibmap_idx;
}
- if (bgd[ibmap_idx].bg_itable_unused !=
- bgd[ibmap_idx].free_inodes)
- bgd[ibmap_idx].bg_itable_unused =
- bgd[ibmap_idx].free_inodes;
- bgd[ibmap_idx].free_inodes--;
- bgd[ibmap_idx].bg_itable_unused--;
- fs->sb->free_inodes--;
+ ext4fs_bg_free_inodes_dec(bgd, fs);
+ if (has_gdt_chksum)
+ bgd->bg_itable_unused = bgd->free_inodes;
+ ext4fs_sb_free_inodes_dec(fs->sb);
goto success;
}
@@ -1097,8 +1207,8 @@
long int actual_block_no;
long int si_blockno;
/* si :single indirect */
- unsigned int *si_buffer = NULL;
- unsigned int *si_start_addr = NULL;
+ __le32 *si_buffer = NULL;
+ __le32 *si_start_addr = NULL;
struct ext_filesystem *fs = get_fs();
if (*total_remaining_blocks != 0) {
@@ -1128,7 +1238,7 @@
printf("no block left to assign\n");
goto fail;
}
- *si_buffer = actual_block_no;
+ *si_buffer = cpu_to_le32(actual_block_no);
debug("SIAB %u: %u\n", *si_buffer,
*total_remaining_blocks);
@@ -1141,7 +1251,7 @@
/* write the block to disk */
put_ext4(((uint64_t) ((uint64_t)si_blockno * (uint64_t)fs->blksz)),
si_start_addr, fs->blksz);
- file_inode->b.blocks.indir_block = si_blockno;
+ file_inode->b.blocks.indir_block = cpu_to_le32(si_blockno);
}
fail:
free(si_start_addr);
@@ -1158,10 +1268,10 @@
/* di:double indirect */
long int di_blockno_parent;
long int di_blockno_child;
- unsigned int *di_parent_buffer = NULL;
- unsigned int *di_child_buff = NULL;
- unsigned int *di_block_start_addr = NULL;
- unsigned int *di_child_buff_start = NULL;
+ __le32 *di_parent_buffer = NULL;
+ __le32 *di_child_buff = NULL;
+ __le32 *di_block_start_addr = NULL;
+ __le32 *di_child_buff_start = NULL;
struct ext_filesystem *fs = get_fs();
if (*total_remaining_blocks != 0) {
@@ -1205,7 +1315,7 @@
goto fail;
di_child_buff_start = di_child_buff;
- *di_parent_buffer = di_blockno_child;
+ *di_parent_buffer = cpu_to_le32(di_blockno_child);
di_parent_buffer++;
(*no_blks_reqd)++;
debug("DICB %ld: %u\n", di_blockno_child,
@@ -1228,7 +1338,7 @@
printf("no block left to assign\n");
goto fail;
}
- *di_child_buff = actual_block_no;
+ *di_child_buff = cpu_to_le32(actual_block_no);
debug("DIAB %ld: %u\n", actual_block_no,
*total_remaining_blocks);
@@ -1248,7 +1358,7 @@
}
put_ext4(((uint64_t) ((uint64_t)di_blockno_parent * (uint64_t)fs->blksz)),
di_block_start_addr, fs->blksz);
- file_inode->b.blocks.double_indir_block = di_blockno_parent;
+ file_inode->b.blocks.double_indir_block = cpu_to_le32(di_blockno_parent);
}
fail:
free(di_block_start_addr);
@@ -1266,12 +1376,12 @@
long int ti_gp_blockno;
long int ti_parent_blockno;
long int ti_child_blockno;
- unsigned int *ti_gp_buff = NULL;
- unsigned int *ti_parent_buff = NULL;
- unsigned int *ti_child_buff = NULL;
- unsigned int *ti_gp_buff_start_addr = NULL;
- unsigned int *ti_pbuff_start_addr = NULL;
- unsigned int *ti_cbuff_start_addr = NULL;
+ __le32 *ti_gp_buff = NULL;
+ __le32 *ti_parent_buff = NULL;
+ __le32 *ti_child_buff = NULL;
+ __le32 *ti_gp_buff_start_addr = NULL;
+ __le32 *ti_pbuff_start_addr = NULL;
+ __le32 *ti_cbuff_start_addr = NULL;
struct ext_filesystem *fs = get_fs();
if (*total_remaining_blocks != 0) {
/* triple indirect grand parent block connecting to inode */
@@ -1301,7 +1411,7 @@
goto fail;
ti_pbuff_start_addr = ti_parent_buff;
- *ti_gp_buff = ti_parent_blockno;
+ *ti_gp_buff = cpu_to_le32(ti_parent_blockno);
ti_gp_buff++;
(*no_blks_reqd)++;
debug("TIPB %ld: %u\n", ti_parent_blockno,
@@ -1319,7 +1429,7 @@
goto fail1;
ti_cbuff_start_addr = ti_child_buff;
- *ti_parent_buff = ti_child_blockno;
+ *ti_parent_buff = cpu_to_le32(ti_child_blockno);
ti_parent_buff++;
(*no_blks_reqd)++;
debug("TICB %ld: %u\n", ti_parent_blockno,
@@ -1335,7 +1445,7 @@
free(ti_cbuff_start_addr);
goto fail1;
}
- *ti_child_buff = actual_block_no;
+ *ti_child_buff = cpu_to_le32(actual_block_no);
debug("TIAB %ld: %u\n", actual_block_no,
*total_remaining_blocks);
@@ -1364,7 +1474,7 @@
/* write the grand parent block */
put_ext4(((uint64_t) ((uint64_t)ti_gp_blockno * (uint64_t)fs->blksz)),
ti_gp_buff_start_addr, fs->blksz);
- file_inode->b.blocks.triple_indir_block = ti_gp_blockno;
+ file_inode->b.blocks.triple_indir_block = cpu_to_le32(ti_gp_blockno);
free(ti_gp_buff_start_addr);
return;
}
@@ -1389,7 +1499,7 @@
printf("no block left to assign\n");
return;
}
- file_inode->b.blocks.dir_blocks[i] = direct_blockno;
+ file_inode->b.blocks.dir_blocks[i] = cpu_to_le32(direct_blockno);
debug("DB %ld: %u\n", direct_blockno, total_remaining_blocks);
total_remaining_blocks--;
@@ -1420,7 +1530,7 @@
index = (struct ext4_extent_idx *)(ext_block + 1);
if (le16_to_cpu(ext_block->eh_magic) != EXT4_EXT_MAGIC)
- return 0;
+ return NULL;
if (ext_block->eh_depth == 0)
return ext_block;
@@ -1432,7 +1542,7 @@
} while (fileblock >= le32_to_cpu(index[i].ei_block));
if (--i < 0)
- return 0;
+ return NULL;
block = le16_to_cpu(index[i].ei_leaf_hi);
block = (block << 32) + le32_to_cpu(index[i].ei_leaf_lo);
@@ -1441,7 +1551,7 @@
buf))
ext_block = (struct ext4_extent_header *)buf;
else
- return 0;
+ return NULL;
}
}
@@ -1451,20 +1561,20 @@
long int blkno;
unsigned int blkoff, desc_per_blk;
int log2blksz = get_fs()->dev_desc->log2blksz;
+ int desc_size = get_fs()->gdsize;
- desc_per_blk = EXT2_BLOCK_SIZE(data) / sizeof(struct ext2_block_group);
+ desc_per_blk = EXT2_BLOCK_SIZE(data) / desc_size;
- blkno = __le32_to_cpu(data->sblock.first_data_block) + 1 +
+ blkno = le32_to_cpu(data->sblock.first_data_block) + 1 +
group / desc_per_blk;
- blkoff = (group % desc_per_blk) * sizeof(struct ext2_block_group);
+ blkoff = (group % desc_per_blk) * desc_size;
debug("ext4fs read %d group descriptor (blkno %ld blkoff %u)\n",
group, blkno, blkoff);
return ext4fs_devread((lbaint_t)blkno <<
(LOG2_BLOCK_SIZE(data) - log2blksz),
- blkoff, sizeof(struct ext2_block_group),
- (char *)blkgrp);
+ blkoff, desc_size, (char *)blkgrp);
}
int ext4fs_read_inode(struct ext2_data *data, int ino, struct ext2_inode *inode)
@@ -1479,14 +1589,14 @@
/* It is easier to calculate if the first inode is 0. */
ino--;
- status = ext4fs_blockgroup(data, ino / __le32_to_cpu
+ status = ext4fs_blockgroup(data, ino / le32_to_cpu
(sblock->inodes_per_group), &blkgrp);
if (status == 0)
return 0;
inodes_per_block = EXT2_BLOCK_SIZE(data) / fs->inodesz;
- blkno = __le32_to_cpu(blkgrp.inode_table_id) +
- (ino % __le32_to_cpu(sblock->inodes_per_group)) / inodes_per_block;
+ blkno = ext4fs_bg_get_inode_table_id(&blkgrp, fs) +
+ (ino % le32_to_cpu(sblock->inodes_per_group)) / inodes_per_block;
blkoff = (ino % inodes_per_block) * fs->inodesz;
/* Read the inode. */
status = ext4fs_devread((lbaint_t)blkno << (LOG2_BLOCK_SIZE(data) -
@@ -1559,7 +1669,7 @@
/* Direct blocks. */
if (fileblock < INDIRECT_BLOCKS)
- blknr = __le32_to_cpu(inode->b.blocks.dir_blocks[fileblock]);
+ blknr = le32_to_cpu(inode->b.blocks.dir_blocks[fileblock]);
/* Indirect. */
else if (fileblock < (INDIRECT_BLOCKS + (blksz / 4))) {
@@ -1586,23 +1696,23 @@
}
ext4fs_indir1_size = blksz;
}
- if ((__le32_to_cpu(inode->b.blocks.indir_block) <<
+ if ((le32_to_cpu(inode->b.blocks.indir_block) <<
log2_blksz) != ext4fs_indir1_blkno) {
status =
- ext4fs_devread((lbaint_t)__le32_to_cpu
+ ext4fs_devread((lbaint_t)le32_to_cpu
(inode->b.blocks.
indir_block) << log2_blksz, 0,
blksz, (char *)ext4fs_indir1_block);
if (status == 0) {
printf("** SI ext2fs read block (indir 1)"
"failed. **\n");
- return 0;
+ return -1;
}
ext4fs_indir1_blkno =
- __le32_to_cpu(inode->b.blocks.
+ le32_to_cpu(inode->b.blocks.
indir_block) << log2_blksz;
}
- blknr = __le32_to_cpu(ext4fs_indir1_block
+ blknr = le32_to_cpu(ext4fs_indir1_block
[fileblock - INDIRECT_BLOCKS]);
}
/* Double indirect. */
@@ -1635,10 +1745,10 @@
}
ext4fs_indir1_size = blksz;
}
- if ((__le32_to_cpu(inode->b.blocks.double_indir_block) <<
+ if ((le32_to_cpu(inode->b.blocks.double_indir_block) <<
log2_blksz) != ext4fs_indir1_blkno) {
status =
- ext4fs_devread((lbaint_t)__le32_to_cpu
+ ext4fs_devread((lbaint_t)le32_to_cpu
(inode->b.blocks.
double_indir_block) << log2_blksz,
0, blksz,
@@ -1649,7 +1759,7 @@
return -1;
}
ext4fs_indir1_blkno =
- __le32_to_cpu(inode->b.blocks.double_indir_block) <<
+ le32_to_cpu(inode->b.blocks.double_indir_block) <<
log2_blksz;
}
@@ -1676,9 +1786,9 @@
}
ext4fs_indir2_size = blksz;
}
- if ((__le32_to_cpu(ext4fs_indir1_block[rblock / perblock]) <<
+ if ((le32_to_cpu(ext4fs_indir1_block[rblock / perblock]) <<
log2_blksz) != ext4fs_indir2_blkno) {
- status = ext4fs_devread((lbaint_t)__le32_to_cpu
+ status = ext4fs_devread((lbaint_t)le32_to_cpu
(ext4fs_indir1_block
[rblock /
perblock]) << log2_blksz, 0,
@@ -1690,12 +1800,12 @@
return -1;
}
ext4fs_indir2_blkno =
- __le32_to_cpu(ext4fs_indir1_block[rblock
+ le32_to_cpu(ext4fs_indir1_block[rblock
/
perblock]) <<
log2_blksz;
}
- blknr = __le32_to_cpu(ext4fs_indir2_block[rblock % perblock]);
+ blknr = le32_to_cpu(ext4fs_indir2_block[rblock % perblock]);
}
/* Tripple indirect. */
else {
@@ -1727,11 +1837,11 @@
}
ext4fs_indir1_size = blksz;
}
- if ((__le32_to_cpu(inode->b.blocks.triple_indir_block) <<
+ if ((le32_to_cpu(inode->b.blocks.triple_indir_block) <<
log2_blksz) != ext4fs_indir1_blkno) {
status = ext4fs_devread
((lbaint_t)
- __le32_to_cpu(inode->b.blocks.triple_indir_block)
+ le32_to_cpu(inode->b.blocks.triple_indir_block)
<< log2_blksz, 0, blksz,
(char *)ext4fs_indir1_block);
if (status == 0) {
@@ -1740,7 +1850,7 @@
return -1;
}
ext4fs_indir1_blkno =
- __le32_to_cpu(inode->b.blocks.triple_indir_block) <<
+ le32_to_cpu(inode->b.blocks.triple_indir_block) <<
log2_blksz;
}
@@ -1767,11 +1877,11 @@
}
ext4fs_indir2_size = blksz;
}
- if ((__le32_to_cpu(ext4fs_indir1_block[rblock /
+ if ((le32_to_cpu(ext4fs_indir1_block[rblock /
perblock_parent]) <<
log2_blksz)
!= ext4fs_indir2_blkno) {
- status = ext4fs_devread((lbaint_t)__le32_to_cpu
+ status = ext4fs_devread((lbaint_t)le32_to_cpu
(ext4fs_indir1_block
[rblock /
perblock_parent]) <<
@@ -1783,7 +1893,7 @@
return -1;
}
ext4fs_indir2_blkno =
- __le32_to_cpu(ext4fs_indir1_block[rblock /
+ le32_to_cpu(ext4fs_indir1_block[rblock /
perblock_parent])
<< log2_blksz;
}
@@ -1811,12 +1921,12 @@
}
ext4fs_indir3_size = blksz;
}
- if ((__le32_to_cpu(ext4fs_indir2_block[rblock
+ if ((le32_to_cpu(ext4fs_indir2_block[rblock
/
perblock_child]) <<
log2_blksz) != ext4fs_indir3_blkno) {
status =
- ext4fs_devread((lbaint_t)__le32_to_cpu
+ ext4fs_devread((lbaint_t)le32_to_cpu
(ext4fs_indir2_block
[(rblock / perblock_child)
% (blksz / 4)]) << log2_blksz, 0,
@@ -1827,14 +1937,14 @@
return -1;
}
ext4fs_indir3_blkno =
- __le32_to_cpu(ext4fs_indir2_block[(rblock /
+ le32_to_cpu(ext4fs_indir2_block[(rblock /
perblock_child) %
(blksz /
4)]) <<
log2_blksz;
}
- blknr = __le32_to_cpu(ext4fs_indir3_block
+ blknr = le32_to_cpu(ext4fs_indir3_block
[rblock % perblock_child]);
}
debug("read_allocated_block %ld\n", blknr);
@@ -1907,7 +2017,7 @@
return 0;
}
/* Search the file. */
- while (fpos < __le32_to_cpu(diro->inode.size)) {
+ while (fpos < le32_to_cpu(diro->inode.size)) {
struct ext2_dirent dirent;
status = ext4fs_read_file(diro, fpos,
@@ -1939,7 +2049,7 @@
return 0;
fdiro->data = diro->data;
- fdiro->ino = __le32_to_cpu(dirent.inode);
+ fdiro->ino = le32_to_cpu(dirent.inode);
filename[dirent.namelen] = '\0';
@@ -1954,7 +2064,7 @@
type = FILETYPE_REG;
} else {
status = ext4fs_read_inode(diro->data,
- __le32_to_cpu
+ le32_to_cpu
(dirent.inode),
&fdiro->inode);
if (status == 0) {
@@ -1963,15 +2073,15 @@
}
fdiro->inode_read = 1;
- if ((__le16_to_cpu(fdiro->inode.mode) &
+ if ((le16_to_cpu(fdiro->inode.mode) &
FILETYPE_INO_MASK) ==
FILETYPE_INO_DIRECTORY) {
type = FILETYPE_DIRECTORY;
- } else if ((__le16_to_cpu(fdiro->inode.mode)
+ } else if ((le16_to_cpu(fdiro->inode.mode)
& FILETYPE_INO_MASK) ==
FILETYPE_INO_SYMLINK) {
type = FILETYPE_SYMLINK;
- } else if ((__le16_to_cpu(fdiro->inode.mode)
+ } else if ((le16_to_cpu(fdiro->inode.mode)
& FILETYPE_INO_MASK) ==
FILETYPE_INO_REG) {
type = FILETYPE_REG;
@@ -1990,7 +2100,7 @@
} else {
if (fdiro->inode_read == 0) {
status = ext4fs_read_inode(diro->data,
- __le32_to_cpu(
+ le32_to_cpu(
dirent.inode),
&fdiro->inode);
if (status == 0) {
@@ -2014,12 +2124,12 @@
break;
}
printf("%10u %s\n",
- __le32_to_cpu(fdiro->inode.size),
+ le32_to_cpu(fdiro->inode.size),
filename);
}
free(fdiro);
}
- fpos += __le16_to_cpu(dirent.direntlen);
+ fpos += le16_to_cpu(dirent.direntlen);
}
return 0;
}
@@ -2034,25 +2144,25 @@
if (!diro->inode_read) {
status = ext4fs_read_inode(diro->data, diro->ino, &diro->inode);
if (status == 0)
- return 0;
+ return NULL;
}
- symlink = zalloc(__le32_to_cpu(diro->inode.size) + 1);
+ symlink = zalloc(le32_to_cpu(diro->inode.size) + 1);
if (!symlink)
- return 0;
+ return NULL;
- if (__le32_to_cpu(diro->inode.size) < sizeof(diro->inode.b.symlink)) {
+ if (le32_to_cpu(diro->inode.size) < sizeof(diro->inode.b.symlink)) {
strncpy(symlink, diro->inode.b.symlink,
- __le32_to_cpu(diro->inode.size));
+ le32_to_cpu(diro->inode.size));
} else {
status = ext4fs_read_file(diro, 0,
- __le32_to_cpu(diro->inode.size),
+ le32_to_cpu(diro->inode.size),
symlink, &actread);
if ((status < 0) || (actread == 0)) {
free(symlink);
- return 0;
+ return NULL;
}
}
- symlink[__le32_to_cpu(diro->inode.size)] = '\0';
+ symlink[le32_to_cpu(diro->inode.size)] = '\0';
return symlink;
}
@@ -2200,7 +2310,7 @@
if (status == 0)
goto fail;
}
- *len = __le32_to_cpu(fdiro->inode.size);
+ *len = le32_to_cpu(fdiro->inode.size);
ext4fs_file = fdiro;
return 0;
@@ -2226,26 +2336,27 @@
goto fail;
/* Make sure this is an ext2 filesystem. */
- if (__le16_to_cpu(data->sblock.magic) != EXT2_MAGIC)
+ if (le16_to_cpu(data->sblock.magic) != EXT2_MAGIC)
goto fail;
- /*
- * The 64bit feature was enabled when metadata_csum was enabled
- * and we do not support metadata_csum (and cannot reliably find
- * files when it is set. Refuse to mount.
- */
- if (data->sblock.feature_incompat & EXT4_FEATURE_INCOMPAT_64BIT) {
- printf("Unsupported feature found (64bit, possibly metadata_csum), not mounting\n");
- goto fail;
- }
- if (__le32_to_cpu(data->sblock.revision_level == 0))
+ if (le32_to_cpu(data->sblock.revision_level) == 0) {
fs->inodesz = 128;
- else
- fs->inodesz = __le16_to_cpu(data->sblock.inode_size);
+ } else {
+ debug("EXT4 features COMPAT: %08x INCOMPAT: %08x RO_COMPAT: %08x\n",
+ __le32_to_cpu(data->sblock.feature_compatibility),
+ __le32_to_cpu(data->sblock.feature_incompat),
+ __le32_to_cpu(data->sblock.feature_ro_compat));
+
+ fs->inodesz = le16_to_cpu(data->sblock.inode_size);
+ fs->gdsize = le32_to_cpu(data->sblock.feature_incompat) &
+ EXT4_FEATURE_INCOMPAT_64BIT ?
+ le16_to_cpu(data->sblock.descriptor_size) : 32;
+ }
- debug("EXT2 rev %d, inode_size %d\n",
- __le32_to_cpu(data->sblock.revision_level), fs->inodesz);
+ debug("EXT2 rev %d, inode_size %d, descriptor size %d\n",
+ le32_to_cpu(data->sblock.revision_level),
+ fs->inodesz, fs->gdsize);
data->diropen.data = data;
data->diropen.ino = 2;
diff --git a/fs/ext4/ext4_common.h b/fs/ext4/ext4_common.h
index 48fd2ac..04d5602 100644
--- a/fs/ext4/ext4_common.h
+++ b/fs/ext4/ext4_common.h
@@ -24,7 +24,7 @@
#include <ext_common.h>
#include <ext4fs.h>
#include <malloc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#if defined(CONFIG_EXT4_WRITE)
#include "ext4_journal.h"
#include "crc16.h"
@@ -59,10 +59,10 @@
#if defined(CONFIG_EXT4_WRITE)
uint32_t ext4fs_div_roundup(uint32_t size, uint32_t n);
-int ext4fs_checksum_update(unsigned int i);
+uint16_t ext4fs_checksum_update(unsigned int i);
int ext4fs_get_parent_inode_num(const char *dirname, char *dname, int flags);
-void ext4fs_update_parent_dentry(char *filename, int *p_ino, int file_type);
-long int ext4fs_get_new_blk_no(void);
+int ext4fs_update_parent_dentry(char *filename, int file_type);
+uint32_t ext4fs_get_new_blk_no(void);
int ext4fs_get_new_inode_no(void);
void ext4fs_reset_block_bmap(long int blockno, unsigned char *buffer,
int index);
@@ -74,5 +74,17 @@
unsigned int total_remaining_blocks,
unsigned int *total_no_of_block);
void put_ext4(uint64_t off, void *buf, uint32_t size);
+struct ext2_block_group *ext4fs_get_group_descriptor
+ (const struct ext_filesystem *fs, uint32_t bg_idx);
+uint64_t ext4fs_bg_get_block_id(const struct ext2_block_group *bg,
+ const struct ext_filesystem *fs);
+uint64_t ext4fs_bg_get_inode_id(const struct ext2_block_group *bg,
+ const struct ext_filesystem *fs);
+uint64_t ext4fs_bg_get_inode_table_id(const struct ext2_block_group *bg,
+ const struct ext_filesystem *fs);
+uint64_t ext4fs_sb_get_free_blocks(const struct ext2_sblock *sb);
+void ext4fs_sb_set_free_blocks(struct ext2_sblock *sb, uint64_t free_blocks);
+uint32_t ext4fs_bg_get_free_blocks(const struct ext2_block_group *bg,
+ const struct ext_filesystem *fs);
#endif
#endif
diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c
index 3f61335..5a25be4 100644
--- a/fs/ext4/ext4_journal.c
+++ b/fs/ext4/ext4_journal.c
@@ -151,7 +151,7 @@
* journal_buffer -- Buffer containing meta data
* blknr -- Block number on disk of the meta data buffer
*/
-int ext4fs_log_journal(char *journal_buffer, long int blknr)
+int ext4fs_log_journal(char *journal_buffer, uint32_t blknr)
{
struct ext_filesystem *fs = get_fs();
short i;
@@ -183,14 +183,18 @@
* metadata_buffer -- Buffer containing meta data
* blknr -- Block number on disk of the meta data buffer
*/
-int ext4fs_put_metadata(char *metadata_buffer, long int blknr)
+int ext4fs_put_metadata(char *metadata_buffer, uint32_t blknr)
{
struct ext_filesystem *fs = get_fs();
if (!metadata_buffer) {
printf("Invalid input arguments %s\n", __func__);
return -EINVAL;
}
- dirty_block_ptr[gd_index]->buf = zalloc(fs->blksz);
+ if (dirty_block_ptr[gd_index]->buf)
+ assert(dirty_block_ptr[gd_index]->blknr == blknr);
+ else
+ dirty_block_ptr[gd_index]->buf = zalloc(fs->blksz);
+
if (!dirty_block_ptr[gd_index]->buf)
return -ENOMEM;
memcpy(dirty_block_ptr[gd_index]->buf, metadata_buffer, fs->blksz);
@@ -215,7 +219,7 @@
printf("total bytes %d\n", max);
while (offset < max) {
- blocknr = be32_to_cpu(*((long int *)(revk_blk + offset)));
+ blocknr = be32_to_cpu(*((__be32 *)(revk_blk + offset)));
printf("revoke blknr is %ld\n", blocknr);
offset += 4;
}
@@ -302,7 +306,7 @@
max = be32_to_cpu(header->r_count);
while (offset < max) {
- blocknr = be32_to_cpu(*((long int *)
+ blocknr = be32_to_cpu(*((__be32 *)
(revk_blk + offset)));
if (blocknr == blknr)
goto found;
@@ -420,7 +424,7 @@
temp_buff);
jsb = (struct journal_superblock_t *) temp_buff;
- if (fs->sb->feature_incompat & EXT3_FEATURE_INCOMPAT_RECOVER) {
+ if (le32_to_cpu(fs->sb->feature_incompat) & EXT3_FEATURE_INCOMPAT_RECOVER) {
if (recovery_flag == RECOVER)
printf("Recovery required\n");
} else {
@@ -517,11 +521,14 @@
end:
if (recovery_flag == RECOVER) {
+ uint32_t new_feature_incompat;
jsb->s_start = cpu_to_be32(1);
jsb->s_sequence = cpu_to_be32(be32_to_cpu(jsb->s_sequence) + 1);
/* get the superblock */
ext4_read_superblock((char *)fs->sb);
- fs->sb->feature_incompat |= EXT3_FEATURE_INCOMPAT_RECOVER;
+ new_feature_incompat = le32_to_cpu(fs->sb->feature_incompat);
+ new_feature_incompat |= EXT3_FEATURE_INCOMPAT_RECOVER;
+ fs->sb->feature_incompat = cpu_to_le32(new_feature_incompat);
/* Update the super block */
put_ext4((uint64_t) (SUPERBLOCK_SIZE),
diff --git a/fs/ext4/ext4_journal.h b/fs/ext4/ext4_journal.h
index d926094..3d05ad5 100644
--- a/fs/ext4/ext4_journal.h
+++ b/fs/ext4/ext4_journal.h
@@ -49,9 +49,9 @@
/* Standard header for all descriptor blocks: */
struct journal_header_t {
- __u32 h_magic;
- __u32 h_blocktype;
- __u32 h_sequence;
+ __be32 h_magic;
+ __be32 h_blocktype;
+ __be32 h_sequence;
};
/* The journal superblock. All fields are in big-endian byte order. */
@@ -60,35 +60,35 @@
struct journal_header_t s_header;
/* Static information describing the journal */
- __u32 s_blocksize; /* journal device blocksize */
- __u32 s_maxlen; /* total blocks in journal file */
- __u32 s_first; /* first block of log information */
+ __be32 s_blocksize; /* journal device blocksize */
+ __be32 s_maxlen; /* total blocks in journal file */
+ __be32 s_first; /* first block of log information */
/* Dynamic information describing the current state of the log */
- __u32 s_sequence; /* first commit ID expected in log */
- __u32 s_start; /* blocknr of start of log */
+ __be32 s_sequence; /* first commit ID expected in log */
+ __be32 s_start; /* blocknr of start of log */
/* Error value, as set by journal_abort(). */
- __s32 s_errno;
+ __be32 s_errno;
/* Remaining fields are only valid in a version-2 superblock */
- __u32 s_feature_compat; /* compatible feature set */
- __u32 s_feature_incompat; /* incompatible feature set */
- __u32 s_feature_ro_compat; /* readonly-compatible feature set */
+ __be32 s_feature_compat; /* compatible feature set */
+ __be32 s_feature_incompat; /* incompatible feature set */
+ __be32 s_feature_ro_compat; /* readonly-compatible feature set */
/* 0x0030 */
__u8 s_uuid[16]; /* 128-bit uuid for journal */
/* 0x0040 */
- __u32 s_nr_users; /* Nr of filesystems sharing log */
+ __be32 s_nr_users; /* Nr of filesystems sharing log */
- __u32 s_dynsuper; /* Blocknr of dynamic superblock copy */
+ __be32 s_dynsuper; /* Blocknr of dynamic superblock copy */
/* 0x0048 */
- __u32 s_max_transaction; /* Limit of journal blocks per trans. */
- __u32 s_max_trans_data; /* Limit of data blocks per trans. */
+ __be32 s_max_transaction; /* Limit of journal blocks per trans. */
+ __be32 s_max_trans_data; /* Limit of data blocks per trans. */
/* 0x0050 */
- __u32 s_padding[44];
+ __be32 s_padding[44];
/* 0x0100 */
__u8 s_users[16 * 48]; /* ids of all fs'es sharing the log */
@@ -96,13 +96,13 @@
} ;
struct ext3_journal_block_tag {
- uint32_t block;
- uint32_t flags;
+ __be32 block;
+ __be32 flags;
};
struct journal_revoke_header_t {
struct journal_header_t r_header;
- int r_count; /* Count of bytes used in the block */
+ __be32 r_count; /* Count of bytes used in the block */
};
struct revoke_blk_list {
@@ -115,8 +115,8 @@
int ext4fs_init_journal(void);
int ext4fs_log_gdt(char *gd_table);
int ext4fs_check_journal_state(int recovery_flag);
-int ext4fs_log_journal(char *journal_buffer, long int blknr);
-int ext4fs_put_metadata(char *metadata_buffer, long int blknr);
+int ext4fs_log_journal(char *journal_buffer, uint32_t blknr);
+int ext4fs_put_metadata(char *metadata_buffer, uint32_t blknr);
void ext4fs_update_journal(void);
void ext4fs_dump_metadata(void);
void ext4fs_push_revoke_blk(char *buffer);
diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index e027916..d710a86 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -28,26 +28,67 @@
#include <div64.h>
#include "ext4_common.h"
+static inline void ext4fs_sb_free_inodes_inc(struct ext2_sblock *sb)
+{
+ sb->free_inodes = cpu_to_le32(le32_to_cpu(sb->free_inodes) + 1);
+}
+
+static inline void ext4fs_sb_free_blocks_inc(struct ext2_sblock *sb)
+{
+ sb->free_blocks = cpu_to_le32(le32_to_cpu(sb->free_blocks) + 1);
+}
+
+static inline void ext4fs_bg_free_inodes_inc
+ (struct ext2_block_group *bg, const struct ext_filesystem *fs)
+{
+ uint32_t free_inodes = le16_to_cpu(bg->free_inodes);
+ if (fs->gdsize == 64)
+ free_inodes += le16_to_cpu(bg->free_inodes_high) << 16;
+ free_inodes++;
+
+ bg->free_inodes = cpu_to_le16(free_inodes & 0xffff);
+ if (fs->gdsize == 64)
+ bg->free_inodes_high = cpu_to_le16(free_inodes >> 16);
+}
+
+static inline void ext4fs_bg_free_blocks_inc
+ (struct ext2_block_group *bg, const struct ext_filesystem *fs)
+{
+ uint32_t free_blocks = le16_to_cpu(bg->free_blocks);
+ if (fs->gdsize == 64)
+ free_blocks += le16_to_cpu(bg->free_blocks_high) << 16;
+ free_blocks++;
+
+ bg->free_blocks = cpu_to_le16(free_blocks & 0xffff);
+ if (fs->gdsize == 64)
+ bg->free_blocks_high = cpu_to_le16(free_blocks >> 16);
+}
+
static void ext4fs_update(void)
{
short i;
ext4fs_update_journal();
struct ext_filesystem *fs = get_fs();
+ struct ext2_block_group *bgd = NULL;
/* update super block */
put_ext4((uint64_t)(SUPERBLOCK_SIZE),
(struct ext2_sblock *)fs->sb, (uint32_t)SUPERBLOCK_SIZE);
- /* update block groups */
+ /* update block bitmaps */
for (i = 0; i < fs->no_blkgrp; i++) {
- fs->bgd[i].bg_checksum = ext4fs_checksum_update(i);
- put_ext4((uint64_t)((uint64_t)fs->bgd[i].block_id * (uint64_t)fs->blksz),
+ bgd = ext4fs_get_group_descriptor(fs, i);
+ bgd->bg_checksum = cpu_to_le16(ext4fs_checksum_update(i));
+ uint64_t b_bitmap_blk = ext4fs_bg_get_block_id(bgd, fs);
+ put_ext4(b_bitmap_blk * fs->blksz,
fs->blk_bmaps[i], fs->blksz);
}
- /* update inode table groups */
+ /* update inode bitmaps */
for (i = 0; i < fs->no_blkgrp; i++) {
- put_ext4((uint64_t) ((uint64_t)fs->bgd[i].inode_id * (uint64_t)fs->blksz),
+ bgd = ext4fs_get_group_descriptor(fs, i);
+ uint64_t i_bitmap_blk = ext4fs_bg_get_inode_id(bgd, fs);
+ put_ext4(i_bitmap_blk * fs->blksz,
fs->inode_bmaps[i], fs->blksz);
}
@@ -65,15 +106,12 @@
int ext4fs_get_bgdtable(void)
{
int status;
- int grp_desc_size;
struct ext_filesystem *fs = get_fs();
- grp_desc_size = sizeof(struct ext2_block_group);
- fs->no_blk_pergdt = (fs->no_blkgrp * grp_desc_size) / fs->blksz;
- if ((fs->no_blkgrp * grp_desc_size) % fs->blksz)
- fs->no_blk_pergdt++;
+ int gdsize_total = ROUND(fs->no_blkgrp * fs->gdsize, fs->blksz);
+ fs->no_blk_pergdt = gdsize_total / fs->blksz;
/* allocate memory for gdtable */
- fs->gdtable = zalloc(fs->blksz * fs->no_blk_pergdt);
+ fs->gdtable = zalloc(gdsize_total);
if (!fs->gdtable)
return -ENOMEM;
/* read the group descriptor table */
@@ -99,24 +137,22 @@
{
struct ext2_block_group *bgd = NULL;
static int prev_bg_bmap_idx = -1;
- long int blknr;
+ uint32_t blknr;
int remainder;
int bg_idx;
int status;
- unsigned int blk_per_grp = ext4fs_root->sblock.blocks_per_group;
+ uint32_t blk_per_grp = le32_to_cpu(ext4fs_root->sblock.blocks_per_group);
struct ext_filesystem *fs = get_fs();
char *journal_buffer = zalloc(fs->blksz);
if (!journal_buffer) {
printf("No memory\n");
return;
}
- /* get block group descriptor table */
- bgd = (struct ext2_block_group *)fs->gdtable;
/* deleting the single indirect block associated with inode */
if (inode->b.blocks.indir_block != 0) {
- debug("SIPB releasing %u\n", inode->b.blocks.indir_block);
- blknr = inode->b.blocks.indir_block;
+ blknr = le32_to_cpu(inode->b.blocks.indir_block);
+ debug("SIPB releasing %u\n", blknr);
bg_idx = blknr / blk_per_grp;
if (fs->blksz == 1024) {
remainder = blknr % blk_per_grp;
@@ -124,18 +160,19 @@
bg_idx--;
}
ext4fs_reset_block_bmap(blknr, fs->blk_bmaps[bg_idx], bg_idx);
- bgd[bg_idx].free_blocks++;
- fs->sb->free_blocks++;
+ /* get block group descriptor table */
+ bgd = ext4fs_get_group_descriptor(fs, bg_idx);
+ ext4fs_bg_free_blocks_inc(bgd, fs);
+ ext4fs_sb_free_blocks_inc(fs->sb);
/* journal backup */
if (prev_bg_bmap_idx != bg_idx) {
- status =
- ext4fs_devread((lbaint_t)bgd[bg_idx].block_id *
- fs->sect_perblk, 0, fs->blksz,
- journal_buffer);
+ uint64_t b_bitmap_blk = ext4fs_bg_get_block_id(bgd, fs);
+ status = ext4fs_devread(
+ b_bitmap_blk * fs->sect_perblk,
+ 0, fs->blksz, journal_buffer);
if (status == 0)
goto fail;
- if (ext4fs_log_journal
- (journal_buffer, bgd[bg_idx].block_id))
+ if (ext4fs_log_journal(journal_buffer, b_bitmap_blk))
goto fail;
prev_bg_bmap_idx = bg_idx;
}
@@ -149,12 +186,12 @@
int i;
short status;
static int prev_bg_bmap_idx = -1;
- long int blknr;
+ uint32_t blknr;
int remainder;
int bg_idx;
- unsigned int blk_per_grp = ext4fs_root->sblock.blocks_per_group;
- unsigned int *di_buffer = NULL;
- unsigned int *DIB_start_addr = NULL;
+ uint32_t blk_per_grp = le32_to_cpu(ext4fs_root->sblock.blocks_per_group);
+ __le32 *di_buffer = NULL;
+ void *dib_start_addr = NULL;
struct ext2_block_group *bgd = NULL;
struct ext_filesystem *fs = get_fs();
char *journal_buffer = zalloc(fs->blksz);
@@ -162,8 +199,6 @@
printf("No memory\n");
return;
}
- /* get the block group descriptor table */
- bgd = (struct ext2_block_group *)fs->gdtable;
if (inode->b.blocks.double_indir_block != 0) {
di_buffer = zalloc(fs->blksz);
@@ -171,8 +206,8 @@
printf("No memory\n");
return;
}
- DIB_start_addr = (unsigned int *)di_buffer;
- blknr = inode->b.blocks.double_indir_block;
+ dib_start_addr = di_buffer;
+ blknr = le32_to_cpu(inode->b.blocks.double_indir_block);
status = ext4fs_devread((lbaint_t)blknr * fs->sect_perblk, 0,
fs->blksz, (char *)di_buffer);
for (i = 0; i < fs->blksz / sizeof(int); i++) {
@@ -180,21 +215,24 @@
break;
debug("DICB releasing %u\n", *di_buffer);
- bg_idx = *di_buffer / blk_per_grp;
+ bg_idx = le32_to_cpu(*di_buffer) / blk_per_grp;
if (fs->blksz == 1024) {
- remainder = *di_buffer % blk_per_grp;
+ remainder = le32_to_cpu(*di_buffer) % blk_per_grp;
if (!remainder)
bg_idx--;
}
- ext4fs_reset_block_bmap(*di_buffer,
+ /* get block group descriptor table */
+ bgd = ext4fs_get_group_descriptor(fs, bg_idx);
+ ext4fs_reset_block_bmap(le32_to_cpu(*di_buffer),
fs->blk_bmaps[bg_idx], bg_idx);
di_buffer++;
- bgd[bg_idx].free_blocks++;
- fs->sb->free_blocks++;
+ ext4fs_bg_free_blocks_inc(bgd, fs);
+ ext4fs_sb_free_blocks_inc(fs->sb);
/* journal backup */
if (prev_bg_bmap_idx != bg_idx) {
- status = ext4fs_devread((lbaint_t)
- bgd[bg_idx].block_id
+ uint64_t b_bitmap_blk =
+ ext4fs_bg_get_block_id(bgd, fs);
+ status = ext4fs_devread(b_bitmap_blk
* fs->sect_perblk, 0,
fs->blksz,
journal_buffer);
@@ -202,41 +240,41 @@
goto fail;
if (ext4fs_log_journal(journal_buffer,
- bgd[bg_idx].block_id))
+ b_bitmap_blk))
goto fail;
prev_bg_bmap_idx = bg_idx;
}
}
/* removing the parent double indirect block */
- blknr = inode->b.blocks.double_indir_block;
+ blknr = le32_to_cpu(inode->b.blocks.double_indir_block);
bg_idx = blknr / blk_per_grp;
if (fs->blksz == 1024) {
remainder = blknr % blk_per_grp;
if (!remainder)
bg_idx--;
}
+ /* get block group descriptor table */
+ bgd = ext4fs_get_group_descriptor(fs, bg_idx);
ext4fs_reset_block_bmap(blknr, fs->blk_bmaps[bg_idx], bg_idx);
- bgd[bg_idx].free_blocks++;
- fs->sb->free_blocks++;
+ ext4fs_bg_free_blocks_inc(bgd, fs);
+ ext4fs_sb_free_blocks_inc(fs->sb);
/* journal backup */
if (prev_bg_bmap_idx != bg_idx) {
- memset(journal_buffer, '\0', fs->blksz);
- status = ext4fs_devread((lbaint_t)bgd[bg_idx].block_id *
- fs->sect_perblk, 0, fs->blksz,
- journal_buffer);
+ uint64_t b_bitmap_blk = ext4fs_bg_get_block_id(bgd, fs);
+ status = ext4fs_devread(b_bitmap_blk * fs->sect_perblk,
+ 0, fs->blksz, journal_buffer);
if (status == 0)
goto fail;
- if (ext4fs_log_journal(journal_buffer,
- bgd[bg_idx].block_id))
+ if (ext4fs_log_journal(journal_buffer, b_bitmap_blk))
goto fail;
prev_bg_bmap_idx = bg_idx;
}
- debug("DIPB releasing %ld\n", blknr);
+ debug("DIPB releasing %d\n", blknr);
}
fail:
- free(DIB_start_addr);
+ free(dib_start_addr);
free(journal_buffer);
}
@@ -245,14 +283,14 @@
int i, j;
short status;
static int prev_bg_bmap_idx = -1;
- long int blknr;
+ uint32_t blknr;
int remainder;
int bg_idx;
- unsigned int blk_per_grp = ext4fs_root->sblock.blocks_per_group;
- unsigned int *tigp_buffer = NULL;
- unsigned int *tib_start_addr = NULL;
- unsigned int *tip_buffer = NULL;
- unsigned int *tipb_start_addr = NULL;
+ uint32_t blk_per_grp = le32_to_cpu(ext4fs_root->sblock.blocks_per_group);
+ __le32 *tigp_buffer = NULL;
+ void *tib_start_addr = NULL;
+ __le32 *tip_buffer = NULL;
+ void *tipb_start_addr = NULL;
struct ext2_block_group *bgd = NULL;
struct ext_filesystem *fs = get_fs();
char *journal_buffer = zalloc(fs->blksz);
@@ -260,8 +298,6 @@
printf("No memory\n");
return;
}
- /* get block group descriptor table */
- bgd = (struct ext2_block_group *)fs->gdtable;
if (inode->b.blocks.triple_indir_block != 0) {
tigp_buffer = zalloc(fs->blksz);
@@ -269,8 +305,8 @@
printf("No memory\n");
return;
}
- tib_start_addr = (unsigned int *)tigp_buffer;
- blknr = inode->b.blocks.triple_indir_block;
+ tib_start_addr = tigp_buffer;
+ blknr = le32_to_cpu(inode->b.blocks.triple_indir_block);
status = ext4fs_devread((lbaint_t)blknr * fs->sect_perblk, 0,
fs->blksz, (char *)tigp_buffer);
for (i = 0; i < fs->blksz / sizeof(int); i++) {
@@ -281,33 +317,36 @@
tip_buffer = zalloc(fs->blksz);
if (!tip_buffer)
goto fail;
- tipb_start_addr = (unsigned int *)tip_buffer;
- status = ext4fs_devread((lbaint_t)(*tigp_buffer) *
+ tipb_start_addr = tip_buffer;
+ status = ext4fs_devread((lbaint_t)le32_to_cpu(*tigp_buffer) *
fs->sect_perblk, 0, fs->blksz,
(char *)tip_buffer);
for (j = 0; j < fs->blksz / sizeof(int); j++) {
- if (*tip_buffer == 0)
+ if (le32_to_cpu(*tip_buffer) == 0)
break;
- bg_idx = *tip_buffer / blk_per_grp;
+ bg_idx = le32_to_cpu(*tip_buffer) / blk_per_grp;
if (fs->blksz == 1024) {
- remainder = *tip_buffer % blk_per_grp;
+ remainder = le32_to_cpu(*tip_buffer) % blk_per_grp;
if (!remainder)
bg_idx--;
}
- ext4fs_reset_block_bmap(*tip_buffer,
+ ext4fs_reset_block_bmap(le32_to_cpu(*tip_buffer),
fs->blk_bmaps[bg_idx],
bg_idx);
tip_buffer++;
- bgd[bg_idx].free_blocks++;
- fs->sb->free_blocks++;
+ /* get block group descriptor table */
+ bgd = ext4fs_get_group_descriptor(fs, bg_idx);
+ ext4fs_bg_free_blocks_inc(bgd, fs);
+ ext4fs_sb_free_blocks_inc(fs->sb);
/* journal backup */
if (prev_bg_bmap_idx != bg_idx) {
+ uint64_t b_bitmap_blk =
+ ext4fs_bg_get_block_id(bgd, fs);
status =
ext4fs_devread(
- (lbaint_t)
- bgd[bg_idx].block_id *
+ b_bitmap_blk *
fs->sect_perblk, 0,
fs->blksz,
journal_buffer);
@@ -315,8 +354,7 @@
goto fail;
if (ext4fs_log_journal(journal_buffer,
- bgd[bg_idx].
- block_id))
+ b_bitmap_blk))
goto fail;
prev_bg_bmap_idx = bg_idx;
}
@@ -328,38 +366,41 @@
* removing the grand parent blocks
* which is connected to inode
*/
- bg_idx = *tigp_buffer / blk_per_grp;
+ bg_idx = le32_to_cpu(*tigp_buffer) / blk_per_grp;
if (fs->blksz == 1024) {
- remainder = *tigp_buffer % blk_per_grp;
+ remainder = le32_to_cpu(*tigp_buffer) % blk_per_grp;
if (!remainder)
bg_idx--;
}
- ext4fs_reset_block_bmap(*tigp_buffer,
+ ext4fs_reset_block_bmap(le32_to_cpu(*tigp_buffer),
fs->blk_bmaps[bg_idx], bg_idx);
tigp_buffer++;
- bgd[bg_idx].free_blocks++;
- fs->sb->free_blocks++;
+ /* get block group descriptor table */
+ bgd = ext4fs_get_group_descriptor(fs, bg_idx);
+ ext4fs_bg_free_blocks_inc(bgd, fs);
+ ext4fs_sb_free_blocks_inc(fs->sb);
/* journal backup */
if (prev_bg_bmap_idx != bg_idx) {
+ uint64_t b_bitmap_blk =
+ ext4fs_bg_get_block_id(bgd, fs);
memset(journal_buffer, '\0', fs->blksz);
- status =
- ext4fs_devread((lbaint_t)
- bgd[bg_idx].block_id *
- fs->sect_perblk, 0,
- fs->blksz, journal_buffer);
+ status = ext4fs_devread(b_bitmap_blk *
+ fs->sect_perblk, 0,
+ fs->blksz,
+ journal_buffer);
if (status == 0)
goto fail;
if (ext4fs_log_journal(journal_buffer,
- bgd[bg_idx].block_id))
+ b_bitmap_blk))
goto fail;
prev_bg_bmap_idx = bg_idx;
}
}
/* removing the grand parent triple indirect block */
- blknr = inode->b.blocks.triple_indir_block;
+ blknr = le32_to_cpu(inode->b.blocks.triple_indir_block);
bg_idx = blknr / blk_per_grp;
if (fs->blksz == 1024) {
remainder = blknr % blk_per_grp;
@@ -367,23 +408,23 @@
bg_idx--;
}
ext4fs_reset_block_bmap(blknr, fs->blk_bmaps[bg_idx], bg_idx);
- bgd[bg_idx].free_blocks++;
- fs->sb->free_blocks++;
+ /* get block group descriptor table */
+ bgd = ext4fs_get_group_descriptor(fs, bg_idx);
+ ext4fs_bg_free_blocks_inc(bgd, fs);
+ ext4fs_sb_free_blocks_inc(fs->sb);
/* journal backup */
if (prev_bg_bmap_idx != bg_idx) {
- memset(journal_buffer, '\0', fs->blksz);
- status = ext4fs_devread((lbaint_t)bgd[bg_idx].block_id *
- fs->sect_perblk, 0, fs->blksz,
- journal_buffer);
+ uint64_t b_bitmap_blk = ext4fs_bg_get_block_id(bgd, fs);
+ status = ext4fs_devread(b_bitmap_blk * fs->sect_perblk,
+ 0, fs->blksz, journal_buffer);
if (status == 0)
goto fail;
- if (ext4fs_log_journal(journal_buffer,
- bgd[bg_idx].block_id))
+ if (ext4fs_log_journal(journal_buffer, b_bitmap_blk))
goto fail;
prev_bg_bmap_idx = bg_idx;
}
- debug("tigp buffer itself releasing %ld\n", blknr);
+ debug("tigp buffer itself releasing %d\n", blknr);
}
fail:
free(tib_start_addr);
@@ -402,126 +443,87 @@
int ibmap_idx;
char *read_buffer = NULL;
char *start_block_address = NULL;
- unsigned int no_blocks;
+ uint32_t no_blocks;
static int prev_bg_bmap_idx = -1;
unsigned int inodes_per_block;
- long int blkno;
+ uint32_t blkno;
unsigned int blkoff;
- unsigned int blk_per_grp = ext4fs_root->sblock.blocks_per_group;
- unsigned int inode_per_grp = ext4fs_root->sblock.inodes_per_group;
+ uint32_t blk_per_grp = le32_to_cpu(ext4fs_root->sblock.blocks_per_group);
+ uint32_t inode_per_grp = le32_to_cpu(ext4fs_root->sblock.inodes_per_group);
struct ext2_inode *inode_buffer = NULL;
struct ext2_block_group *bgd = NULL;
struct ext_filesystem *fs = get_fs();
char *journal_buffer = zalloc(fs->blksz);
if (!journal_buffer)
return -ENOMEM;
- /* get the block group descriptor table */
- bgd = (struct ext2_block_group *)fs->gdtable;
status = ext4fs_read_inode(ext4fs_root, inodeno, &inode);
if (status == 0)
goto fail;
/* read the block no allocated to a file */
- no_blocks = inode.size / fs->blksz;
- if (inode.size % fs->blksz)
+ no_blocks = le32_to_cpu(inode.size) / fs->blksz;
+ if (le32_to_cpu(inode.size) % fs->blksz)
no_blocks++;
if (le32_to_cpu(inode.flags) & EXT4_EXTENTS_FL) {
- struct ext2fs_node *node_inode =
- zalloc(sizeof(struct ext2fs_node));
- if (!node_inode)
- goto fail;
- node_inode->data = ext4fs_root;
- node_inode->ino = inodeno;
- node_inode->inode_read = 0;
- memcpy(&(node_inode->inode), &inode, sizeof(struct ext2_inode));
-
- for (i = 0; i < no_blocks; i++) {
- blknr = read_allocated_block(&(node_inode->inode), i);
- bg_idx = blknr / blk_per_grp;
- if (fs->blksz == 1024) {
- remainder = blknr % blk_per_grp;
- if (!remainder)
- bg_idx--;
- }
- ext4fs_reset_block_bmap(blknr, fs->blk_bmaps[bg_idx],
- bg_idx);
- debug("EXT4_EXTENTS Block releasing %ld: %d\n",
- blknr, bg_idx);
-
- bgd[bg_idx].free_blocks++;
- fs->sb->free_blocks++;
-
- /* journal backup */
- if (prev_bg_bmap_idx != bg_idx) {
- status =
- ext4fs_devread((lbaint_t)
- bgd[bg_idx].block_id *
- fs->sect_perblk, 0,
- fs->blksz, journal_buffer);
- if (status == 0)
- goto fail;
- if (ext4fs_log_journal(journal_buffer,
- bgd[bg_idx].block_id))
- goto fail;
- prev_bg_bmap_idx = bg_idx;
- }
- }
- if (node_inode) {
- free(node_inode);
- node_inode = NULL;
- }
+ /* FIXME delete extent index blocks, i.e. eh_depth >= 1 */
+ struct ext4_extent_header *eh =
+ (struct ext4_extent_header *)
+ inode.b.blocks.dir_blocks;
+ debug("del: dep=%d entries=%d\n", eh->eh_depth, eh->eh_entries);
} else {
-
delete_single_indirect_block(&inode);
delete_double_indirect_block(&inode);
delete_triple_indirect_block(&inode);
+ }
- /* read the block no allocated to a file */
- no_blocks = inode.size / fs->blksz;
- if (inode.size % fs->blksz)
- no_blocks++;
- for (i = 0; i < no_blocks; i++) {
- blknr = read_allocated_block(&inode, i);
- bg_idx = blknr / blk_per_grp;
- if (fs->blksz == 1024) {
- remainder = blknr % blk_per_grp;
- if (!remainder)
- bg_idx--;
- }
- ext4fs_reset_block_bmap(blknr, fs->blk_bmaps[bg_idx],
- bg_idx);
- debug("ActualB releasing %ld: %d\n", blknr, bg_idx);
+ /* release data blocks */
+ for (i = 0; i < no_blocks; i++) {
+ blknr = read_allocated_block(&inode, i);
+ if (blknr == 0)
+ continue;
+ if (blknr < 0)
+ goto fail;
+ bg_idx = blknr / blk_per_grp;
+ if (fs->blksz == 1024) {
+ remainder = blknr % blk_per_grp;
+ if (!remainder)
+ bg_idx--;
+ }
+ ext4fs_reset_block_bmap(blknr, fs->blk_bmaps[bg_idx],
+ bg_idx);
+ debug("EXT4 Block releasing %ld: %d\n", blknr, bg_idx);
- bgd[bg_idx].free_blocks++;
- fs->sb->free_blocks++;
- /* journal backup */
- if (prev_bg_bmap_idx != bg_idx) {
- memset(journal_buffer, '\0', fs->blksz);
- status = ext4fs_devread((lbaint_t)
- bgd[bg_idx].block_id
- * fs->sect_perblk,
- 0, fs->blksz,
- journal_buffer);
- if (status == 0)
- goto fail;
- if (ext4fs_log_journal(journal_buffer,
- bgd[bg_idx].block_id))
- goto fail;
- prev_bg_bmap_idx = bg_idx;
- }
+ /* get block group descriptor table */
+ bgd = ext4fs_get_group_descriptor(fs, bg_idx);
+ ext4fs_bg_free_blocks_inc(bgd, fs);
+ ext4fs_sb_free_blocks_inc(fs->sb);
+ /* journal backup */
+ if (prev_bg_bmap_idx != bg_idx) {
+ uint64_t b_bitmap_blk = ext4fs_bg_get_block_id(bgd, fs);
+ status = ext4fs_devread(b_bitmap_blk * fs->sect_perblk,
+ 0, fs->blksz,
+ journal_buffer);
+ if (status == 0)
+ goto fail;
+ if (ext4fs_log_journal(journal_buffer, b_bitmap_blk))
+ goto fail;
+ prev_bg_bmap_idx = bg_idx;
}
}
+ /* release inode */
/* from the inode no to blockno */
inodes_per_block = fs->blksz / fs->inodesz;
ibmap_idx = inodeno / inode_per_grp;
/* get the block no */
inodeno--;
- blkno = __le32_to_cpu(bgd[ibmap_idx].inode_table_id) +
- (inodeno % __le32_to_cpu(inode_per_grp)) / inodes_per_block;
+ /* get block group descriptor table */
+ bgd = ext4fs_get_group_descriptor(fs, ibmap_idx);
+ blkno = ext4fs_bg_get_inode_table_id(bgd, fs) +
+ (inodeno % inode_per_grp) / inodes_per_block;
/* get the offset of the inode */
blkoff = ((inodeno) % inodes_per_block) * fs->inodesz;
@@ -541,7 +543,7 @@
read_buffer = read_buffer + blkoff;
inode_buffer = (struct ext2_inode *)read_buffer;
- memset(inode_buffer, '\0', sizeof(struct ext2_inode));
+ memset(inode_buffer, '\0', fs->inodesz);
/* write the inode to original position in inode table */
if (ext4fs_put_metadata(start_block_address, blkno))
@@ -550,15 +552,15 @@
/* update the respective inode bitmaps */
inodeno++;
ext4fs_reset_inode_bmap(inodeno, fs->inode_bmaps[ibmap_idx], ibmap_idx);
- bgd[ibmap_idx].free_inodes++;
- fs->sb->free_inodes++;
+ ext4fs_bg_free_inodes_inc(bgd, fs);
+ ext4fs_sb_free_inodes_inc(fs->sb);
/* journal backup */
memset(journal_buffer, '\0', fs->blksz);
- status = ext4fs_devread((lbaint_t)bgd[ibmap_idx].inode_id *
+ status = ext4fs_devread(ext4fs_bg_get_inode_id(bgd, fs) *
fs->sect_perblk, 0, fs->blksz, journal_buffer);
if (status == 0)
goto fail;
- if (ext4fs_log_journal(journal_buffer, bgd[ibmap_idx].inode_id))
+ if (ext4fs_log_journal(journal_buffer, ext4fs_bg_get_inode_id(bgd, fs)))
goto fail;
ext4fs_update();
@@ -585,12 +587,11 @@
{
short status;
int i;
- unsigned int real_free_blocks = 0;
+ uint32_t real_free_blocks = 0;
struct ext_filesystem *fs = get_fs();
/* populate fs */
fs->blksz = EXT2_BLOCK_SIZE(ext4fs_root);
- fs->inodesz = INODE_SIZE_FILESYSTEM(ext4fs_root);
fs->sect_perblk = fs->blksz >> fs->dev_desc->log2blksz;
/* get the superblock */
@@ -606,9 +607,9 @@
/* get total no of blockgroups */
fs->no_blkgrp = (uint32_t)ext4fs_div_roundup(
- (ext4fs_root->sblock.total_blocks -
- ext4fs_root->sblock.first_data_block),
- ext4fs_root->sblock.blocks_per_group);
+ le32_to_cpu(ext4fs_root->sblock.total_blocks)
+ - le32_to_cpu(ext4fs_root->sblock.first_data_block),
+ le32_to_cpu(ext4fs_root->sblock.blocks_per_group));
/* get the block group descriptor table */
fs->gdtable_blkno = ((EXT2_MIN_BLOCK_SIZE == fs->blksz) + 1);
@@ -616,7 +617,6 @@
printf("Error in getting the block group descriptor table\n");
goto fail;
}
- fs->bgd = (struct ext2_block_group *)fs->gdtable;
/* load all the available bitmap block of the partition */
fs->blk_bmaps = zalloc(fs->no_blkgrp * sizeof(char *));
@@ -629,8 +629,9 @@
}
for (i = 0; i < fs->no_blkgrp; i++) {
- status =
- ext4fs_devread((lbaint_t)fs->bgd[i].block_id *
+ struct ext2_block_group *bgd =
+ ext4fs_get_group_descriptor(fs, i);
+ status = ext4fs_devread(ext4fs_bg_get_block_id(bgd, fs) *
fs->sect_perblk, 0,
fs->blksz, (char *)fs->blk_bmaps[i]);
if (status == 0)
@@ -648,7 +649,9 @@
}
for (i = 0; i < fs->no_blkgrp; i++) {
- status = ext4fs_devread((lbaint_t)fs->bgd[i].inode_id *
+ struct ext2_block_group *bgd =
+ ext4fs_get_group_descriptor(fs, i);
+ status = ext4fs_devread(ext4fs_bg_get_inode_id(bgd, fs) *
fs->sect_perblk,
0, fs->blksz,
(char *)fs->inode_bmaps[i]);
@@ -662,10 +665,14 @@
* with the blockgroups freeblocks when improper
* reboot of a linux kernel
*/
- for (i = 0; i < fs->no_blkgrp; i++)
- real_free_blocks = real_free_blocks + fs->bgd[i].free_blocks;
- if (real_free_blocks != fs->sb->free_blocks)
- fs->sb->free_blocks = real_free_blocks;
+ for (i = 0; i < fs->no_blkgrp; i++) {
+ struct ext2_block_group *bgd =
+ ext4fs_get_group_descriptor(fs, i);
+ real_free_blocks = real_free_blocks +
+ ext4fs_bg_get_free_blocks(bgd, fs);
+ }
+ if (real_free_blocks != ext4fs_sb_get_free_blocks(fs->sb))
+ ext4fs_sb_set_free_blocks(fs->sb, real_free_blocks);
return 0;
fail:
@@ -679,8 +686,9 @@
int i;
struct ext2_inode inode_journal;
struct journal_superblock_t *jsb;
- long int blknr;
+ uint32_t blknr;
struct ext_filesystem *fs = get_fs();
+ uint32_t new_feature_incompat;
/* free journal */
char *temp_buff = zalloc(fs->blksz);
@@ -692,7 +700,7 @@
ext4fs_devread((lbaint_t)blknr * fs->sect_perblk, 0, fs->blksz,
temp_buff);
jsb = (struct journal_superblock_t *)temp_buff;
- jsb->s_start = cpu_to_be32(0);
+ jsb->s_start = 0;
put_ext4((uint64_t) ((uint64_t)blknr * (uint64_t)fs->blksz),
(struct journal_superblock_t *)temp_buff, fs->blksz);
free(temp_buff);
@@ -701,7 +709,9 @@
/* get the superblock */
ext4_read_superblock((char *)fs->sb);
- fs->sb->feature_incompat &= ~EXT3_FEATURE_INCOMPAT_RECOVER;
+ new_feature_incompat = le32_to_cpu(fs->sb->feature_incompat);
+ new_feature_incompat &= ~EXT3_FEATURE_INCOMPAT_RECOVER;
+ fs->sb->feature_incompat = cpu_to_le32(new_feature_incompat);
put_ext4((uint64_t)(SUPERBLOCK_SIZE),
(struct ext2_sblock *)fs->sb, (uint32_t)SUPERBLOCK_SIZE);
free(fs->sb);
@@ -728,7 +738,6 @@
free(fs->gdtable);
fs->gdtable = NULL;
- fs->bgd = NULL;
/*
* reinitiliazed the global inode and
* block bitmap first execution check variables
@@ -739,12 +748,16 @@
fs->curr_blkno = 0;
}
+/*
+ * Write data to filesystem blocks. Uses same optimization for
+ * contigous sectors as ext4fs_read_file
+ */
static int ext4fs_write_file(struct ext2_inode *file_inode,
int pos, unsigned int len, char *buf)
{
int i;
int blockcnt;
- unsigned int filesize = __le32_to_cpu(file_inode->size);
+ uint32_t filesize = le32_to_cpu(file_inode->size);
struct ext_filesystem *fs = get_fs();
int log2blksz = fs->dev_desc->log2blksz;
int log2_fs_blocksize = LOG2_BLOCK_SIZE(ext4fs_root) - log2blksz;
@@ -765,7 +778,7 @@
int blockend = fs->blksz;
int skipfirst = 0;
blknr = read_allocated_block(file_inode, i);
- if (blknr < 0)
+ if (blknr <= 0)
return -1;
blknr = blknr << log2_fs_blocksize;
@@ -839,11 +852,12 @@
struct ext2_sblock *sblock = &(ext4fs_root->sblock);
unsigned int inodes_per_block;
unsigned int ibmap_idx;
+ struct ext2_block_group *bgd = NULL;
struct ext_filesystem *fs = get_fs();
ALLOC_CACHE_ALIGN_BUFFER(char, filename, 256);
memset(filename, 0x00, 256);
- g_parent_inode = zalloc(sizeof(struct ext2_inode));
+ g_parent_inode = zalloc(fs->inodesz);
if (!g_parent_inode)
goto fail;
@@ -857,8 +871,13 @@
goto fail;
if (ext4fs_iget(parent_inodeno, g_parent_inode))
goto fail;
+ /* do not mess up a directory using hash trees */
+ if (le32_to_cpu(g_parent_inode->flags) & EXT4_INDEX_FL) {
+ printf("hash tree directory\n");
+ goto fail;
+ }
/* check if the filename is already present in root */
- existing_file_inodeno = ext4fs_filename_check(filename);
+ existing_file_inodeno = ext4fs_filename_unlink(filename);
if (existing_file_inodeno != -1) {
ret = ext4fs_delete_file(existing_file_inodeno);
fs->first_pass_bbmap = 0;
@@ -878,39 +897,42 @@
}
blocks_remaining = blks_reqd_for_file;
/* test for available space in partition */
- if (fs->sb->free_blocks < blks_reqd_for_file) {
+ if (le32_to_cpu(fs->sb->free_blocks) < blks_reqd_for_file) {
printf("Not enough space on partition !!!\n");
goto fail;
}
- ext4fs_update_parent_dentry(filename, &inodeno, FILETYPE_REG);
+ inodeno = ext4fs_update_parent_dentry(filename, FILETYPE_REG);
+ if (inodeno == -1)
+ goto fail;
/* prepare file inode */
inode_buffer = zalloc(fs->inodesz);
if (!inode_buffer)
goto fail;
file_inode = (struct ext2_inode *)inode_buffer;
- file_inode->mode = S_IFREG | S_IRWXU |
- S_IRGRP | S_IROTH | S_IXGRP | S_IXOTH;
+ file_inode->mode = cpu_to_le16(S_IFREG | S_IRWXU |
+ S_IRGRP | S_IROTH | S_IXGRP | S_IXOTH);
/* ToDo: Update correct time */
- file_inode->mtime = timestamp;
- file_inode->atime = timestamp;
- file_inode->ctime = timestamp;
- file_inode->nlinks = 1;
- file_inode->size = sizebytes;
+ file_inode->mtime = cpu_to_le32(timestamp);
+ file_inode->atime = cpu_to_le32(timestamp);
+ file_inode->ctime = cpu_to_le32(timestamp);
+ file_inode->nlinks = cpu_to_le16(1);
+ file_inode->size = cpu_to_le32(sizebytes);
/* Allocate data blocks */
ext4fs_allocate_blocks(file_inode, blocks_remaining,
&blks_reqd_for_file);
- file_inode->blockcnt = (blks_reqd_for_file * fs->blksz) >>
- fs->dev_desc->log2blksz;
+ file_inode->blockcnt = cpu_to_le32((blks_reqd_for_file * fs->blksz) >>
+ fs->dev_desc->log2blksz);
temp_ptr = zalloc(fs->blksz);
if (!temp_ptr)
goto fail;
- ibmap_idx = inodeno / ext4fs_root->sblock.inodes_per_group;
+ ibmap_idx = inodeno / le32_to_cpu(ext4fs_root->sblock.inodes_per_group);
inodeno--;
- itable_blkno = __le32_to_cpu(fs->bgd[ibmap_idx].inode_table_id) +
- (inodeno % __le32_to_cpu(sblock->inodes_per_group)) /
+ bgd = ext4fs_get_group_descriptor(fs, ibmap_idx);
+ itable_blkno = ext4fs_bg_get_inode_table_id(bgd, fs) +
+ (inodeno % le32_to_cpu(sblock->inodes_per_group)) /
inodes_per_block;
blkoff = (inodeno % inodes_per_block) * fs->inodesz;
ext4fs_devread((lbaint_t)itable_blkno * fs->sect_perblk, 0, fs->blksz,
@@ -924,13 +946,15 @@
/* copy the file content into data blocks */
if (ext4fs_write_file(file_inode, 0, sizebytes, (char *)buffer) == -1) {
printf("Error in copying content\n");
+ /* FIXME: Deallocate data blocks */
goto fail;
}
- ibmap_idx = parent_inodeno / ext4fs_root->sblock.inodes_per_group;
+ ibmap_idx = parent_inodeno / le32_to_cpu(ext4fs_root->sblock.inodes_per_group);
parent_inodeno--;
- parent_itable_blkno = __le32_to_cpu(fs->bgd[ibmap_idx].inode_table_id) +
+ bgd = ext4fs_get_group_descriptor(fs, ibmap_idx);
+ parent_itable_blkno = ext4fs_bg_get_inode_table_id(bgd, fs) +
(parent_inodeno %
- __le32_to_cpu(sblock->inodes_per_group)) / inodes_per_block;
+ le32_to_cpu(sblock->inodes_per_group)) / inodes_per_block;
blkoff = (parent_inodeno % inodes_per_block) * fs->inodesz;
if (parent_itable_blkno != itable_blkno) {
memset(temp_ptr, '\0', fs->blksz);
@@ -939,22 +963,18 @@
if (ext4fs_log_journal(temp_ptr, parent_itable_blkno))
goto fail;
- memcpy(temp_ptr + blkoff, g_parent_inode,
- sizeof(struct ext2_inode));
+ memcpy(temp_ptr + blkoff, g_parent_inode, fs->inodesz);
if (ext4fs_put_metadata(temp_ptr, parent_itable_blkno))
goto fail;
- free(temp_ptr);
} else {
/*
* If parent and child fall in same inode table block
* both should be kept in 1 buffer
*/
- memcpy(temp_ptr + blkoff, g_parent_inode,
- sizeof(struct ext2_inode));
+ memcpy(temp_ptr + blkoff, g_parent_inode, fs->inodesz);
gd_index--;
if (ext4fs_put_metadata(temp_ptr, itable_blkno))
goto fail;
- free(temp_ptr);
}
ext4fs_update();
ext4fs_deinit();
@@ -965,6 +985,7 @@
fs->curr_inode_no = 0;
free(inode_buffer);
free(g_parent_inode);
+ free(temp_ptr);
g_parent_inode = NULL;
return 0;
@@ -972,6 +993,7 @@
ext4fs_deinit();
free(inode_buffer);
free(g_parent_inode);
+ free(temp_ptr);
g_parent_inode = NULL;
return -1;
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 43c8897..3078737 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -55,7 +55,7 @@
int log2blksz = fs->dev_desc->log2blksz;
int log2_fs_blocksize = LOG2_BLOCK_SIZE(node->data) - log2blksz;
int blocksize = (1 << (log2_fs_blocksize + log2blksz));
- unsigned int filesize = __le32_to_cpu(node->inode.size);
+ unsigned int filesize = le32_to_cpu(node->inode.size);
lbaint_t previous_block_number = -1;
lbaint_t delayed_start = 0;
lbaint_t delayed_extent = 0;
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 826bd85..df9f2b5 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -876,6 +876,7 @@
}
mydata->fatbufnum = -1;
+ mydata->fat_dirty = 0;
mydata->fatbuf = memalign(ARCH_DMA_MINALIGN, FATBUFSIZE);
if (mydata->fatbuf == NULL) {
debug("Error: allocating memory\n");
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index eb3a916..0583af3 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -104,13 +104,19 @@
/*
* Write fat buffer into block device
*/
-static int flush_fat_buffer(fsdata *mydata)
+static int flush_dirty_fat_buffer(fsdata *mydata)
{
int getsize = FATBUFBLOCKS;
__u32 fatlength = mydata->fatlength;
__u8 *bufptr = mydata->fatbuf;
__u32 startblock = mydata->fatbufnum * FATBUFBLOCKS;
+ debug("debug: evicting %d, dirty: %d\n", mydata->fatbufnum,
+ (int)mydata->fat_dirty);
+
+ if ((!mydata->fat_dirty) || (mydata->fatbufnum == -1))
+ return 0;
+
startblock += mydata->fat_sect;
if (getsize > fatlength)
@@ -130,6 +136,7 @@
return -1;
}
}
+ mydata->fat_dirty = 0;
return 0;
}
@@ -183,14 +190,11 @@
if (getsize > fatlength)
getsize = fatlength;
- fatlength *= mydata->sect_size; /* We want it in bytes now */
startblock += mydata->fat_sect; /* Offset from start of disk */
/* Write back the fatbuf to the disk */
- if (mydata->fatbufnum != -1) {
- if (flush_fat_buffer(mydata) < 0)
- return -1;
- }
+ if (flush_dirty_fat_buffer(mydata) < 0)
+ return -1;
if (disk_read(startblock, getsize, bufptr) < 0) {
debug("Error reading FAT blocks\n");
@@ -326,10 +330,8 @@
dir_slot *slotptr = (dir_slot *)get_contents_vfatname_block;
__u8 counter = 0, checksum;
int idx = 0, ret;
- char s_name[16];
- /* Get short file name and checksum value */
- strncpy(s_name, (*dentptr)->name, 16);
+ /* Get short file name checksum value */
checksum = mkcksum((*dentptr)->name, (*dentptr)->ext);
do {
@@ -497,10 +499,8 @@
if (getsize > fatlength)
getsize = fatlength;
- if (mydata->fatbufnum != -1) {
- if (flush_fat_buffer(mydata) < 0)
- return -1;
- }
+ if (flush_dirty_fat_buffer(mydata) < 0)
+ return -1;
if (disk_read(startblock, getsize, bufptr) < 0) {
debug("Error reading FAT blocks\n");
@@ -509,6 +509,9 @@
mydata->fatbufnum = bufnum;
}
+ /* Mark as dirty */
+ mydata->fat_dirty = 1;
+
/* Set the actual entry */
switch (mydata->fatsize) {
case 32:
@@ -525,7 +528,8 @@
}
/*
- * Determine the entry value at index 'entry' in a FAT (16/32) table
+ * Determine the next free cluster after 'entry' in a FAT (16/32) table
+ * and link it to 'entry'. EOC marker is not set on returned entry.
*/
static __u32 determine_fatent(fsdata *mydata, __u32 entry)
{
@@ -534,6 +538,7 @@
while (1) {
next_fat = get_fatent_value(mydata, next_entry);
if (next_fat == 0) {
+ /* found free entry, link to entry */
set_fatent_value(mydata, entry, next_entry);
break;
}
@@ -648,7 +653,7 @@
dir_curclust = dir_newclust;
- if (flush_fat_buffer(mydata) < 0)
+ if (flush_dirty_fat_buffer(mydata) < 0)
return;
memset(get_dentfromdir_block, 0x00,
@@ -678,7 +683,7 @@
}
/* Flush fat buffer */
- if (flush_fat_buffer(mydata) < 0)
+ if (flush_dirty_fat_buffer(mydata) < 0)
return -1;
return 0;
@@ -1014,6 +1019,7 @@
}
mydata->fatbufnum = -1;
+ mydata->fat_dirty = 0;
mydata->fatbuf = memalign(ARCH_DMA_MINALIGN, FATBUFSIZE);
if (mydata->fatbuf == NULL) {
debug("Error: allocating memory\n");
@@ -1114,7 +1120,7 @@
debug("attempt to write 0x%llx bytes\n", *actwrite);
/* Flush fat buffer */
- ret = flush_fat_buffer(mydata);
+ ret = flush_dirty_fat_buffer(mydata);
if (ret) {
printf("Error: flush fat buffer\n");
goto exit;
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index f771e94..ed60c5b 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -122,7 +122,7 @@
#include <jffs2/jffs2.h>
#include <jffs2/jffs2_1pass.h>
#include <linux/compat.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "jffs2_private.h"
diff --git a/fs/yaffs2/yaffs_mtdif.c b/fs/yaffs2/yaffs_mtdif.c
index 6fcba04..636c777 100644
--- a/fs/yaffs2/yaffs_mtdif.c
+++ b/fs/yaffs2/yaffs_mtdif.c
@@ -19,10 +19,10 @@
#include "yaffs_mtdif.h"
-#include "linux/mtd/mtd.h"
-#include "linux/types.h"
-#include "linux/time.h"
-#include "linux/mtd/nand.h"
+#include <linux/mtd/mtd.h>
+#include <linux/types.h>
+#include <linux/time.h>
+#include <linux/mtd/nand.h>
static inline void translate_spare2oob(const struct yaffs_spare *spare, u8 *oob)
diff --git a/fs/yaffs2/yaffs_mtdif2.c b/fs/yaffs2/yaffs_mtdif2.c
index 234cb70..0d9d5cc 100644
--- a/fs/yaffs2/yaffs_mtdif2.c
+++ b/fs/yaffs2/yaffs_mtdif2.c
@@ -15,16 +15,16 @@
/* XXX U-BOOT XXX */
#include <common.h>
-#include "asm/errno.h"
+#include <linux/errno.h>
#include "yportenv.h"
#include "yaffs_trace.h"
#include "yaffs_mtdif2.h"
-#include "linux/mtd/mtd.h"
-#include "linux/types.h"
-#include "linux/time.h"
+#include <linux/mtd/mtd.h>
+#include <linux/types.h>
+#include <linux/time.h>
#include "yaffs_trace.h"
#include "yaffs_packedtags2.h"
diff --git a/fs/yaffs2/ydirectenv.h b/fs/yaffs2/ydirectenv.h
index 2b3e84f..d274f22 100644
--- a/fs/yaffs2/ydirectenv.h
+++ b/fs/yaffs2/ydirectenv.h
@@ -75,7 +75,7 @@
#define YAFFS_ROOT_MODE 0666
#define YAFFS_LOSTNFOUND_MODE 0666
-#include "linux/list.h"
+#include <linux/list.h>
#include "yaffsfs.h"
diff --git a/include/clk.h b/include/clk.h
index dc18b03..fe1f892 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -9,6 +9,7 @@
#ifndef _CLK_H_
#define _CLK_H_
+#include <linux/errno.h>
#include <linux/types.h>
/**
@@ -59,7 +60,7 @@
unsigned long id;
};
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK)
struct phandle_2_cell;
int clk_get_by_index_platdata(struct udevice *dev, int index,
struct phandle_2_cell *cells, struct clk *clk);
@@ -97,19 +98,6 @@
* @return 0 if OK, or a negative error code.
*/
int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk);
-#else
-static inline int clk_get_by_index(struct udevice *dev, int index,
- struct clk *clk)
-{
- return -ENOSYS;
-}
-
-static inline int clk_get_by_name(struct udevice *dev, const char *name,
- struct clk *clk)
-{
- return -ENOSYS;
-}
-#endif
/**
* clk_request - Request a clock by provider-specific ID.
@@ -174,5 +162,17 @@
int clk_disable(struct clk *clk);
int soc_clk_dump(void);
+#else
+static inline int clk_get_by_index(struct udevice *dev, int index,
+ struct clk *clk)
+{
+ return -ENOSYS;
+}
+static inline int clk_get_by_name(struct udevice *dev, const char *name,
+ struct clk *clk)
+{
+ return -ENOSYS;
+}
+#endif
#endif
diff --git a/include/common.h b/include/common.h
index e9f0dea..a8d833b 100644
--- a/include/common.h
+++ b/include/common.h
@@ -866,17 +866,20 @@
int tstc(void);
/* stdout */
-#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_SERIAL_SUPPORT)
-#define putc(...) do { } while (0)
-#define puts(...) do { } while (0)
-#define printf(...) do { } while (0)
-#define vprintf(...) do { } while (0)
-#else
+#if !defined(CONFIG_SPL_BUILD) || \
+ (defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_SERIAL_SUPPORT)) || \
+ (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && \
+ defined(CONFIG_SPL_SERIAL_SUPPORT))
void putc(const char c);
void puts(const char *s);
int printf(const char *fmt, ...)
__attribute__ ((format (__printf__, 1, 2)));
int vprintf(const char *fmt, va_list args);
+#else
+#define putc(...) do { } while (0)
+#define puts(...) do { } while (0)
+#define printf(...) do { } while (0)
+#define vprintf(...) do { } while (0)
#endif
/* stderr */
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index b5fd6c6..0c4f645 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -48,7 +48,6 @@
#define CONFIG_SCSI /* SCSI Support */
#define CONFIG_CMD_SDRAM /* SDRAM DIMM SPD info printout */
#define CONFIG_CMD_TERMINAL /* built-in Serial Terminal */
-#define CONFIG_CMD_UBI /* UBI Support */
#define CONFIG_CMD_UBIFS /* UBIFS Support */
#define CONFIG_CMD_UNIVERSE /* Tundra Universe Support */
#define CONFIG_CMD_UNZIP /* unzip from memory to memory */
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 2a8aeee..8710307 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -21,15 +21,8 @@
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#else
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x00201000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
@@ -37,7 +30,6 @@
#define CONFIG_SPL_MAX_SIZE 0x28000
#define RESET_VECTOR_OFFSET 0x27FFC
#define BOOT_PAGE_OFFSET 0x27000
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index a0ca0db..92c69e5 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -28,8 +28,6 @@
#ifdef CONFIG_NAND
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index eb6ddae..4276f65 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -44,8 +44,6 @@
#ifdef CONFIG_NAND
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index f75919d..a61e25c 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -27,15 +27,8 @@
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_NAND_INIT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_TPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SPL_MAX_SIZE (128 << 10)
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
@@ -46,8 +39,6 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10)
#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TEXT_BASE 0xff800000
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index 63b0a1e..9754bbd 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -40,7 +40,6 @@
/* Command line configuration */
#undef CONFIG_CMD_DATE
#undef CONFIG_CMD_JFFS2
-#undef CONFIG_CMD_UBI
#undef CONFIG_CMD_NAND
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 5da0005..bf75209 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -17,7 +17,6 @@
* (easy to change)
***********************************************************/
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
-#define CONFIG_MIP405 1 /* ...on a MIP405 board */
#define CONFIG_SYS_TEXT_BASE 0xFFF80000
@@ -57,9 +56,6 @@
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_BSP
-#if !defined(CONFIG_MIP405T)
-#endif
-
/**************************************************************
* I2C Stuff:
* the MIP405 is equiped with an Atmel 24C128/256 EEPROM at address
@@ -312,7 +308,7 @@
/************************************************************
* IDE/ATA stuff
************************************************************/
-#if defined(CONFIG_MIP405T)
+#if defined(CONFIG_TARGET_MIP405T)
#define CONFIG_SYS_IDE_MAXBUS 1 /* MIP405T has only one IDE bus */
#else
#define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */
@@ -358,7 +354,7 @@
/************************************************************
* USB support EXPERIMENTAL
************************************************************/
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
#define CONFIG_USB_UHCI
#define CONFIG_USB_KEYBOARD
@@ -377,21 +373,4 @@
************************************************************/
#define CONFIG_BZIP2 1
-/************************************************************
- * Ident
- ************************************************************/
-
-#define VERSION_TAG "released"
-#if !defined(CONFIG_MIP405T)
-#define CONFIG_ISO_STRING "MEV-10072-001"
-#else
-#define CONFIG_ISO_STRING "MEV-10082-001"
-#endif
-
-#if !defined(CONFIG_BOOT_PCI)
-#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
-#else
-#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, PCI_BOOT Version"
-#endif
-
#endif /* __CONFIG_H */
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 1c4e082..90b1429 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -22,8 +22,6 @@
#ifdef CONFIG_NAND
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 0c84622..ab8993b 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -19,17 +19,9 @@
#define CONFIG_NAND_FSL_IFC
#ifdef CONFIG_SDCARD
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xD0001000
@@ -53,18 +45,9 @@
#define CONFIG_SYS_TEXT_BASE 0x11000000
#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc
#else
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_FLASH_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xD0001000
@@ -86,8 +69,6 @@
#ifdef CONFIG_NAND
#ifdef CONFIG_SECURE_BOOT
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
@@ -106,15 +87,7 @@
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_NAND_INIT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SPL_MAX_SIZE (128 << 10)
#define CONFIG_SPL_TEXT_BASE 0xD0001000
@@ -125,8 +98,6 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10)
#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TEXT_BASE 0xff800000
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 9fbc128..41e3ee8 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -14,16 +14,9 @@
#define CONFIG_DISPLAY_BOARDINFO
#ifdef CONFIG_SDCARD
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
@@ -42,17 +35,9 @@
#endif
#ifdef CONFIG_SPIFLASH
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_FLASH_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
@@ -78,14 +63,7 @@
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_NAND_INIT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SPL_MAX_SIZE (128 << 10)
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
@@ -96,8 +74,6 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10)
#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TEXT_BASE 0xff800000
#define CONFIG_SPL_MAX_SIZE 4096
diff --git a/include/configs/PATI.h b/include/configs/PATI.h
index e96fbc5..ebabdff 100644
--- a/include/configs/PATI.h
+++ b/include/configs/PATI.h
@@ -252,9 +252,4 @@
*/
#define CONFIG_SYS_DER 0x00000000
-#define VERSION_TAG "released"
-#define CONFIG_ISO_STRING "MEV-10084-001"
-
-#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
-
#endif /* __CONFIG_H */
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index ecb126b..7d08f0c 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -333,11 +333,4 @@
************************************************************/
#define CONFIG_BZIP2 1
-/************************************************************
- * Ident
- ************************************************************/
-#define VERSION_TAG "released"
-#define CONFIG_ISO_STRING "MEV-10066-001"
-#define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
-
#endif /* __CONFIG_H */
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index 391a697..53e51e5 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -374,7 +374,6 @@
/*
* UBI
*/
-#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 2218907..f7f0acb 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -43,15 +43,8 @@
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_rcw.cfg
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x00201000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
@@ -67,7 +60,6 @@
#endif
#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
@@ -78,8 +70,6 @@
#ifdef CONFIG_SPIFLASH
#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_FLASH_MINIMAL
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000)
@@ -94,7 +84,6 @@
#ifdef CONFIG_SDCARD
#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000)
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index d5fd3e9..e61c80d 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -50,15 +50,8 @@
#elif defined(CONFIG_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_rcw.cfg
#endif
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x30001000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
@@ -74,7 +67,6 @@
#endif
#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
@@ -85,8 +77,6 @@
#ifdef CONFIG_SPIFLASH
#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_FLASH_MINIMAL
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000)
@@ -101,7 +91,6 @@
#ifdef CONFIG_SDCARD
#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000)
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 07c511f..02633b6 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -43,15 +43,8 @@
$(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
#endif
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x30001000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
@@ -67,7 +60,6 @@
#define BOOT_PAGE_OFFSET 0x27000
#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SUPPORT
#ifdef CONFIG_SECURE_BOOT
#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
/*
@@ -88,8 +80,6 @@
#ifdef CONFIG_SPIFLASH
#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_FLASH_MINIMAL
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000)
@@ -104,7 +94,6 @@
#ifdef CONFIG_SDCARD
#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000)
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 065ffcd..1c7b59c 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -53,15 +53,8 @@
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_rcw.cfg
#endif
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x00201000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
@@ -77,7 +70,6 @@
#endif
#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
@@ -88,8 +80,6 @@
#ifdef CONFIG_SPIFLASH
#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_FLASH_MINIMAL
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000)
@@ -104,7 +94,6 @@
#ifdef CONFIG_SDCARD
#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000)
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 1a8c62e..7879eb3 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -42,15 +42,8 @@
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_rcw.cfg
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x00201000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
@@ -66,7 +59,6 @@
#endif
#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
@@ -77,8 +69,6 @@
#ifdef CONFIG_SPIFLASH
#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_FLASH_MINIMAL
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000)
@@ -93,7 +83,6 @@
#ifdef CONFIG_SDCARD
#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000)
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index 06f03aa..aac2e10 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -25,15 +25,8 @@
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#else
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x00201000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
@@ -43,7 +36,6 @@
#define BOOT_PAGE_OFFSET 0x27000
#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
@@ -54,7 +46,6 @@
#ifdef CONFIG_SDCARD
#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST 0x00200000
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 38ad503..92b401d 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -25,15 +25,8 @@
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#else
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x00201000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
@@ -44,7 +37,6 @@
#ifdef CONFIG_SDCARD
#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST 0x00200000
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index c5a7d68..913b099 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -151,12 +151,6 @@
#define CONFIG_LZO
#define CONFIG_LZMA
-/* Ident */
-/*#define VERSION_TAG "released"*/
-#define VERSION_TAG "unstable"
-#define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \
- "MEV-10080-001 " VERSION_TAG
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
@@ -198,7 +192,6 @@
#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
/* File system */
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_JFFS2
#define CONFIG_YAFFS2
diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h
index ab2477c..cc211c5 100644
--- a/include/configs/a3m071.h
+++ b/include/configs/a3m071.h
@@ -75,7 +75,6 @@
#define CONFIG_LZO /* needed for UBI */
#define CONFIG_RBTREE /* needed for UBI */
#define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
/*
@@ -397,18 +396,13 @@
*/
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_NOR_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0xfc000000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT /* image.c */
-#define CONFIG_SPL_LIBGENERIC_SUPPORT /* string.c */
-#define CONFIG_SPL_SERIAL_SUPPORT
/* Place BSS for SPL near end of SDRAM */
#define CONFIG_SPL_BSS_START_ADDR ((128 - 1) << 20)
#define CONFIG_SPL_BSS_MAX_SIZE (64 << 10)
#define CONFIG_SPL_OS_BOOT
-#define CONFIG_SPL_ENV_SUPPORT
/* Place patched DT blob (fdt) at this address */
#define CONFIG_SYS_SPL_ARGS_ADDR 0x01800000
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index f12ee04..6b5ed48 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -206,16 +206,12 @@
/* SPL */
#ifndef CONFIG_NOR_BOOT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
-
/* Bootcount using the RTC block */
#define CONFIG_BOOTCOUNT_LIMIT
#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
/* USB gadget RNDIS */
-#define CONFIG_SPL_MUSB_NEW_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#endif
@@ -326,19 +322,12 @@
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
/* Remove other SPL modes. */
-#undef CONFIG_SPL_YMODEM_SUPPORT
-#undef CONFIG_SPL_NAND_SUPPORT
-#undef CONFIG_SPL_MMC_SUPPORT
#define CONFIG_ENV_IS_NOWHERE
#undef CONFIG_ENV_IS_IN_NAND
/* disable host part of MUSB in SPL */
/* disable EFI partitions and partition UUID support */
#undef CONFIG_PARTITION_UUIDS
#undef CONFIG_EFI_PARTITION
-/* General network SPL */
-#define CONFIG_SPL_NET_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
#endif
/* USB Device Firmware Update support */
@@ -398,8 +387,6 @@
#if defined(CONFIG_SPI_BOOT)
/* SPL related */
#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
@@ -416,7 +403,6 @@
"-(rootfs)"
#elif defined(CONFIG_EMMC_BOOT)
#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SYS_MMC_ENV_DEV 1
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET 0x0
diff --git a/include/configs/am335x_igep0033.h b/include/configs/am335x_igep0033.h
index a14310a..18db58a 100644
--- a/include/configs/am335x_igep0033.h
+++ b/include/configs/am335x_igep0033.h
@@ -124,7 +124,6 @@
/* SPL */
#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
-#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h
index 9327c3d..db518a5 100644
--- a/include/configs/am335x_shc.h
+++ b/include/configs/am335x_shc.h
@@ -279,8 +279,6 @@
#define CONFIG_POWER_TPS65217
/* SPL */
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
@@ -326,11 +324,6 @@
#if defined CONFIG_SHC_NETBOOT
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_NET_SUPPORT
-#define CONFIG_SPL_ETH_SUPPORT
-#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_ENV_IS_NOWHERE
#undef CONFIG_ENV_IS_IN_MMC
#endif
diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h
index 8454872..833c5c4 100644
--- a/include/configs/am335x_sl50.h
+++ b/include/configs/am335x_sl50.h
@@ -80,8 +80,6 @@
#define CONFIG_POWER_TPS65910
/* SPL */
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
/* Bootcount using the RTC block */
#define CONFIG_BOOTCOUNT_LIMIT
@@ -98,9 +96,6 @@
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
/* Remove other SPL modes. */
-#undef CONFIG_SPL_YMODEM_SUPPORT
-#undef CONFIG_SPL_NAND_SUPPORT
-#undef CONFIG_SPL_MMC_SUPPORT
#define CONFIG_ENV_IS_NOWHERE
#undef CONFIG_ENV_IS_IN_NAND
/* disable host part of MUSB in SPL */
@@ -108,16 +103,11 @@
/* disable EFI partitions and partition UUID support */
#undef CONFIG_PARTITION_UUIDS
#undef CONFIG_EFI_PARTITION
-/* General network SPL */
-#define CONFIG_SPL_NET_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
#endif
#if defined(CONFIG_EMMC_BOOT)
#undef CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SYS_MMC_ENV_DEV 1
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET 0x0
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 0055803..698c924 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -287,18 +287,9 @@
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
/* NAND boot config */
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 98c29b0..e18e39a 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -140,7 +140,6 @@
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_GPMC_PREFETCH
#define CONFIG_BCH
-#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
@@ -344,19 +343,9 @@
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_MTD_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#endif /* __CONFIG_H */
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 495dd8a..19ccbcb 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -39,8 +39,6 @@
#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
/* Enabling L2 Cache */
#define CONFIG_SYS_L2_PL310
@@ -87,9 +85,6 @@
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
/* SPL USB Support */
-#ifdef CONFIG_SPL_USB_HOST_SUPPORT
-#define CONFIG_SPL_USB_SUPPORT
-#endif
#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
@@ -318,13 +313,9 @@
#define CONFIG_PHYLIB
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_NET_VCI_STRING "AM43xx U-Boot SPL"
-
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ETH_SUPPORT)
#undef CONFIG_ENV_IS_IN_FAT
#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_SPL_NET_SUPPORT
#endif
#define CONFIG_SYS_RX_ETH_BUFFER 64
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index 3479de4..d865f41 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -104,11 +104,8 @@
#endif
/* SPI SPL */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_DMA_SUPPORT
#define CONFIG_TI_EDMA3
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
/* SPI */
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index 5667680..fcb82e2 100644
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -1,7 +1,7 @@
/*
* Sysam AMCORE board configuration
*
- * (C) Copyright 2015 Angelo Dureghello <angelo@sysam.it>
+ * (C) Copyright 2016 Angelo Dureghello <angelo@sysam.it>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -19,6 +19,17 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_BOOTCOMMAND "bootm ffc20000"
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "upgrade_uboot=loady; " \
+ "protect off 0xffc00000 0xffc1ffff; " \
+ "erase 0xffc00000 0xffc1ffff; " \
+ "cp.b 0x20000 0xffc00000 ${filesize}\0" \
+ "upgrade_kernel=loady; " \
+ "erase 0xffc20000 0xffefffff; " \
+ "cp.b 0x20000 0xffc20000 ${filesize}\0" \
+ "upgrade_jffs2=loady; " \
+ "erase 0xfff00000 0xffffffff; " \
+ "cp.b 0x20000 0xfff00000 ${filesize}\0"
#undef CONFIG_CMD_AES
#define CONFIG_CMD_DIAG
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index e84cfb5..79366be 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -11,7 +11,6 @@
#define __CONFIG_H
#define CONFIG_ENV_VERSION 10
-#define CONFIG_IDENT_STRING " apf27 patch 3.10"
#define CONFIG_BOARD_NAME apf27
/*
@@ -38,10 +37,8 @@
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
#define CONFIG_SPL_TEXT_BASE 0xA0000000
-#define CONFIG_SPL_SERIAL_SUPPORT
/* NAND boot config */
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
@@ -72,7 +69,6 @@
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_NAND_LOCK_UNLOCK
#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
/*
diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h
index 92fea87..80049f7 100644
--- a/include/configs/apx4devkit.h
+++ b/include/configs/apx4devkit.h
@@ -57,7 +57,6 @@
/* UBI and NAND partitioning */
#ifdef CONFIG_CMD_NAND
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_MTDPARTS
#define CONFIG_RBTREE
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index 6dc419e..d6d9838 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -223,12 +223,8 @@
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define CONFIG_RBTREE
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
-#define CONFIG_MTD_UBI_FASTMAP
-#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
-
#define CONFIG_HW_WATCHDOG
#define CONFIG_IMX_WATCHDOG
diff --git a/include/configs/arndale.h b/include/configs/arndale.h
index b08f341..74fd9c4 100644
--- a/include/configs/arndale.h
+++ b/include/configs/arndale.h
@@ -27,8 +27,6 @@
/* Miscellaneous configurable options */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
-#define CONFIG_IDENT_STRING " for ARNDALE"
-
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE)
diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h
index c468484..0cc72ca 100644
--- a/include/configs/aspenite.h
+++ b/include/configs/aspenite.h
@@ -11,11 +11,6 @@
#define __CONFIG_ASPENITE_H
/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING "\nMarvell-Aspenite DB"
-
-/*
* High Level Configuration Options
*/
#define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 37fa3ec..9968b14 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -186,11 +186,6 @@
#define CONFIG_SPL_MAX_SIZE 0x010000
#define CONFIG_SPL_STACK 0x310000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-
#define CONFIG_SYS_MONITOR_LEN 0x80000
#ifdef CONFIG_SYS_USE_MMC
@@ -201,16 +196,12 @@
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#elif CONFIG_SYS_USE_NANDFLASH
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_ECC
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index 5fdda1a..c3d07a1 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -230,11 +230,6 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
@@ -245,16 +240,12 @@
#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#elif CONFIG_SYS_USE_NANDFLASH
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
@@ -267,8 +258,6 @@
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
#elif CONFIG_SYS_USE_SPIFLASH
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 637c403..edad1dd 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -109,7 +109,6 @@
#define CONFIG_MTD_PARTITIONS
#define CONFIG_RBTREE
#define CONFIG_LZO
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#endif
@@ -230,11 +229,6 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
@@ -245,16 +239,12 @@
#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#elif CONFIG_SYS_USE_NANDFLASH
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
@@ -267,8 +257,6 @@
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
#elif CONFIG_SYS_USE_SPIFLASH
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index fc56c82..58df571 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -48,7 +48,6 @@
#define CONFIG_MTD_DEVICE
#define CONFIG_RBTREE
#define CONFIG_LZO
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
/* I2C configuration */
@@ -217,19 +216,13 @@
/* SPL */
#ifndef CONFIG_NOR_BOOT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
-
/* Bootcount using the RTC block */
#define CONFIG_BOOTCOUNT_LIMIT
#define CONFIG_BOOTCOUNT_AM33XX
/* USB gadget RNDIS */
-/*#define CONFIG_SPL_MUSB_NEW_SUPPORT*/
/* General network SPL, both CPSW and USB gadget RNDIS */
-/*#define CONFIG_SPL_NET_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"*/
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
@@ -291,7 +284,6 @@
/*
* Disable CPSW SPL support so we fit within the 101KiB limit.
*/
-#undef CONFIG_SPL_ETH_SUPPORT
#endif
/* Network. */
diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h
index d8a8c0c..82d82f4 100644
--- a/include/configs/bav335x.h
+++ b/include/configs/bav335x.h
@@ -350,16 +350,12 @@
/* SPL */
#ifndef CONFIG_NOR_BOOT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
-
/* Bootcount using the RTC block */
#define CONFIG_BOOTCOUNT_LIMIT
#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
/* USB gadget RNDIS */
-#define CONFIG_SPL_MUSB_NEW_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#endif
@@ -465,10 +461,6 @@
/* disable EFI partitions and partition UUID support */
#undef CONFIG_PARTITION_UUIDS
#undef CONFIG_EFI_PARTITION
-/* General network SPL */
-#define CONFIG_SPL_NET_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_NET_VCI_STRING "BAV335x U-Boot SPL"
#endif
/* USB Device Firmware Update support */
@@ -528,8 +520,6 @@
#if defined(CONFIG_SPI_BOOT)
/* SPL related */
#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
@@ -547,7 +537,6 @@
#elif defined(CONFIG_EMMC_BOOT)
#undef CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SYS_MMC_ENV_DEV 1
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET 0x0
diff --git a/include/configs/boston.h b/include/configs/boston.h
new file mode 100644
index 0000000..e958054
--- /dev/null
+++ b/include/configs/boston.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __CONFIGS_BOSTON_H__
+#define __CONFIGS_BOSTON_H__
+
+/*
+ * General board configuration
+ */
+#define CONFIG_DISPLAY_BOARDINFO
+
+/*
+ * CPU
+ */
+#define CONFIG_SYS_MIPS_TIMER_FREQ 30000000
+
+/*
+ * PCI
+ */
+#define CONFIG_PCI
+#define CONFIG_PCI_PNP
+#define CONFIG_CMD_PCI
+
+/*
+ * Memory map
+ */
+#ifdef CONFIG_64BIT
+# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
+#else
+# define CONFIG_SYS_SDRAM_BASE 0x80000000
+#endif
+
+#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
+
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100000)
+
+#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0)
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x10000000)
+
+#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
+
+/*
+ * Console
+ */
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_BAUDRATE 115200
+
+/*
+ * Flash
+ */
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
+#define CONFIG_SYS_MAX_FLASH_SECT 1024
+
+/*
+ * Environment
+ */
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE 0x20000
+#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
+#ifdef CONFIG_64BIT
+# define CONFIG_ENV_ADDR \
+ (0xffffffffb8000000 + (128 << 20) - CONFIG_ENV_SIZE)
+#else
+# define CONFIG_ENV_ADDR \
+ (0xb8000000 + (128 << 20) - CONFIG_ENV_SIZE)
+#endif
+
+#endif /* __CONFIGS_BOSTON_H__ */
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
index 6a239b5..e01d535 100644
--- a/include/configs/brppt1.h
+++ b/include/configs/brppt1.h
@@ -24,9 +24,7 @@
#define CONFIG_HW_WATCHDOG
#define CONFIG_OMAP_WATCHDOG
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
/* Bootcount using the RTC block */
#define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000
#define CONFIG_BOOTCOUNT_LIMIT
@@ -58,7 +56,6 @@
/* RAW SD card / eMMC locations. */
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /*addr. 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
- #define CONFIG_SPL_MMC_SUPPORT
#endif /* CONFIG_EMMC_BOOT */
/*
@@ -90,7 +87,6 @@
#ifdef CONFIG_NAND
#define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
@@ -257,8 +253,6 @@
#define CONFIG_OMAP3_SPI
#define CONFIG_SF_DEFAULT_SPEED 24000000
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#undef CONFIG_ENV_IS_NOWHERE
diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h
index 11f56bf..1e8426f 100644
--- a/include/configs/brxre1.h
+++ b/include/configs/brxre1.h
@@ -42,7 +42,6 @@
#define CONFIG_SYS_OMAP24_I2C_SPEED_PSOC 20000
/* GPIO */
-#define CONFIG_SPL_GPIO_SUPPORT
/* MMC/SD IP block */
#define CONFIG_MMC
@@ -52,7 +51,6 @@
/* RAW SD card / eMMC locations. */
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /*addr. 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SPL_MMC_SUPPORT
/* Always 64 KiB env size */
#define CONFIG_ENV_SIZE (64 << 10)
diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h
index 1de5edc..e425cb9 100644
--- a/include/configs/bur_am335x_common.h
+++ b/include/configs/bur_am335x_common.h
@@ -21,7 +21,6 @@
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC /* enable 32kHz OSC at bootime */
-#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_POWER_TPS65217
#define CONFIG_SYS_NO_FLASH /* have no NOR-flash */
@@ -113,12 +112,7 @@
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
/* General parts of the framework, required. */
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#endif /* ! __BUR_AM335X_COMMON_H__ */
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index 9a0469d..36a29f1 100644
--- a/include/configs/cgtqmx6eval.h
+++ b/include/configs/cgtqmx6eval.h
@@ -18,10 +18,6 @@
#define CONFIG_MACH_TYPE 4122
#ifdef CONFIG_SPL
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#define CONFIG_SPL_SPI_LOAD
#include "imx6_spl.h"
diff --git a/include/configs/chromebook_jerry.h b/include/configs/chromebook_jerry.h
index d1f5b46..180527a 100644
--- a/include/configs/chromebook_jerry.h
+++ b/include/configs/chromebook_jerry.h
@@ -15,20 +15,13 @@
#include <configs/rk3288_common.h>
#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPI_FLASH_GIGADEVICE
#define CONFIG_CMD_SF_TEST
-#undef CONFIG_SPL_GPIO_SUPPORT
-
#define CONFIG_KEYBOARD
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CONSOLE_SCROLL_LINES 10
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index 6cbdee2..3990900 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -123,15 +123,8 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
/* SPL related SPI defines */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
@@ -139,8 +132,6 @@
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
/* SPL related MMC defines */
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR ((CONFIG_SYS_U_BOOT_OFFS / 512)\
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index c839b03..46584fd 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -247,11 +247,8 @@
/* SPL */
#include "imx6_spl.h"
-#define CONFIG_SPL_MMC_SUPPORT
+#undef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
-#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#define CONFIG_SPL_SPI_LOAD
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 562ba56..e4c9358 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -306,19 +306,9 @@
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_OMAP3_ID_NAND
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h
index 45fa37a..92ff251 100644
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -91,8 +91,6 @@
#include <configs/ti_armv7_omap.h>
#undef CONFIG_SPL_OS_BOOT
-#undef CONFIG_SPL_GPIO_SUPPORT
-#undef CONFIG_SPL_NAND_SUPPORT
#undef CONFIG_SYS_MONITOR_LEN
#undef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
@@ -153,15 +151,10 @@
/* SPL defines. */
#define CONFIG_SPL_TEXT_BASE 0x40300350
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20))
-#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x480
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
/* EEPROM */
#define CONFIG_CMD_EEPROM
diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h
index 6b51b43..ddb1e97 100644
--- a/include/configs/cm_t54.h
+++ b/include/configs/cm_t54.h
@@ -56,7 +56,6 @@
#define CONFIG_SUPPORT_EMMC_BOOT
/* SATA Boot related defines */
-#define CONFIG_SPL_SATA_SUPPORT
#define CONFIG_SPL_SATA_BOOT_DEVICE 0
#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 2ec392e..ba1adea 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -188,8 +188,6 @@
/* UBI stuff */
#define CONFIG_RBTREE
#define CONFIG_LZO
-#define CONFIG_CMD_UBI
-#define CONFIG_MTD_UBI_FASTMAP
#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */
/* Dynamic MTD partition support */
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
index d9954c1..b299e15 100644
--- a/include/configs/colibri_t20.h
+++ b/include/configs/colibri_t20.h
@@ -74,10 +74,8 @@
#define CONFIG_ENV_SIZE (SZ_64K)
/* UBI */
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */
#define CONFIG_LZO
-#define CONFIG_MTD_UBI_FASTMAP
#define CONFIG_RBTREE
/* Debug commands */
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index d3e4523..0ee08e6 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -70,8 +70,6 @@
#define CONFIG_RBTREE
#define CONFIG_LZO
-#define CONFIG_CMD_UBI
-#define CONFIG_MTD_UBI_FASTMAP
#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */
#define CONFIG_FEC_MXC
diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index 29189a4..fbe9c82 100644
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -45,12 +45,6 @@
#define CONFIG_ENABLE_36BIT_PHYS
#define CONFIG_FSL_LAW /* Use common FSL init code */
-#ifdef CONFIG_TRAILBLAZER
-#define CONFIG_IDENT_STRING " controlcenterd trailblazer 0.01"
-#else
-#define CONFIG_IDENT_STRING " controlcenterd 0.01"
-#endif
-
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_ADDR_MAP
#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index db90f92..6521dde 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -160,13 +160,7 @@
#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
#define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_ECC
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index ef0fd59..2403ca3 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -147,8 +147,6 @@
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#ifdef CONFIG_USE_SPIFLASH
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
@@ -205,7 +203,6 @@
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 10
#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
@@ -301,7 +298,6 @@
#define CONFIG_MTD_PARTITIONS
#define CONFIG_LZO
#define CONFIG_RBTREE
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#endif
@@ -340,12 +336,7 @@
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"
#define CONFIG_SPL_STACK 0x8001ff00
#define CONFIG_SPL_TEXT_BASE 0x80000000
@@ -355,10 +346,7 @@
/* Load U-Boot Image From MMC */
#ifdef CONFIG_SPL_MMC_LOAD
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x75
-#undef CONFIG_SPL_SPI_SUPPORT
#undef CONFIG_SPL_SPI_LOAD
#endif
diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h
index 4e00812..a134889 100644
--- a/include/configs/db-88f6720.h
+++ b/include/configs/db-88f6720.h
@@ -91,14 +91,7 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
/* SPL related SPI defines */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h
new file mode 100644
index 0000000..a6d0221
--- /dev/null
+++ b/include/configs/db-88f6820-amc.h
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2014 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _CONFIG_DB_88F6820_AMC_H
+#define _CONFIG_DB_88F6820_AMC_H
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+
+#define CONFIG_DISPLAY_BOARDINFO_LATE
+
+/*
+ * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
+ * for DDR ECC byte filling in the SPL before loading the main
+ * U-Boot into it.
+ */
+#define CONFIG_SYS_TEXT_BASE 0x00800000
+#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
+
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_PCI
+
+/* I2C */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
+#define CONFIG_SYS_I2C_SLAVE 0x0
+#define CONFIG_SYS_I2C_SPEED 100000
+
+/* SPI NOR flash default params, used by sf commands */
+#define CONFIG_SF_DEFAULT_BUS 1
+#define CONFIG_SF_DEFAULT_SPEED 1000000
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
+
+/* Partition support */
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+
+/* Additional FS support/configuration */
+#define CONFIG_SUPPORT_VFAT
+
+/* USB/EHCI configuration */
+#define CONFIG_EHCI_IS_TDI
+
+/* Environment in SPI NOR flash */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_BUS 1
+#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
+#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
+#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
+
+#define CONFIG_PHY_MARVELL /* there is a marvell phy */
+#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
+
+/* PCIe support */
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_PCI
+#define CONFIG_PCI_MVEBU
+#define CONFIG_PCI_PNP
+#define CONFIG_PCI_SCAN_SHOW
+#endif
+
+/* NAND */
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+
+#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
+#define CONFIG_SYS_ALT_MEMTEST
+
+/* Keep device tree and initrd in lower memory so the kernel can access them */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "fdt_high=0x10000000\0" \
+ "initrd_high=0x10000000\0"
+
+/* SPL */
+/*
+ * Select the boot device here
+ *
+ * Currently supported are:
+ * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
+ *
+ * MMC is not populated on this board.
+ * NAND support may be added in the future.
+ */
+#define SPL_BOOT_SPI_NOR_FLASH 1
+#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
+
+/* Defines for SPL */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_SIZE (140 << 10)
+#define CONFIG_SPL_TEXT_BASE 0x40000030
+#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
+
+#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
+#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MALLOC_SIMPLE
+#endif
+
+#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
+#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
+
+#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
+/* SPL related SPI defines */
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
+#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#endif
+
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+#undef CONFIG_SYS_MAXARGS
+#define CONFIG_SYS_MAXARGS 96
+
+#endif /* _CONFIG_DB_88F6820_AMC_H */
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index 88614b3..48b4b2e 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -124,15 +124,8 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
/* SPL related SPI defines */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
@@ -140,8 +133,6 @@
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
/* SPL related MMC defines */
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index 5cdfd1c..c43dece 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -116,14 +116,7 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
/* SPL related SPI defines */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index abf1394..4ad118e 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -193,16 +193,12 @@
/* Use the framework and generic lib */
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
/* SPL will use serial */
-#define CONFIG_SPL_SERIAL_SUPPORT
/* SPL loads an image from NAND */
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_RAW_ONLY
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 5112ef3..d17cdbb 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -199,7 +199,6 @@
#define CONFIG_SYS_SRAM_SIZE 0x10000
/* Defines for SPL */
-#undef CONFIG_SPL_MTD_SUPPORT
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 521604e..a5384a2 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -17,7 +17,6 @@
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_HOSTNAME dlvsion-10g
-#define CONFIG_IDENT_STRING " dlvision-10g 0.06"
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F
diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h
index 4dda319..57640da 100644
--- a/include/configs/dlvision.h
+++ b/include/configs/dlvision.h
@@ -17,7 +17,6 @@
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_HOSTNAME dlvision
-#define CONFIG_IDENT_STRING " dlvision 0.02"
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */
diff --git a/include/configs/dns325.h b/include/configs/dns325.h
index 7ee274e..23c173e 100644
--- a/include/configs/dns325.h
+++ b/include/configs/dns325.h
@@ -18,7 +18,6 @@
*/
#define MACH_TYPE_DNS325 3800
#define CONFIG_MACH_TYPE MACH_TYPE_DNS325
-#define CONFIG_IDENT_STRING "\nD-Link DNS-325"
/*
* High Level Configuration Options (easy to change)
diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h
index cd05857..781a8b5 100644
--- a/include/configs/dockstar.h
+++ b/include/configs/dockstar.h
@@ -13,11 +13,6 @@
#define _CONFIG_DOCKSTAR_H
/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING "\nSeagate FreeAgent DockStar"
-
-/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
@@ -87,7 +82,6 @@
* File system
*/
#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 8d5dbc0..194804c 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -182,11 +182,6 @@
#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
#if defined(CONFIG_QSPI_BOOT)
-/* In SPL, use the environment and discard MMC support for space. */
-#ifdef CONFIG_SPL_BUILD
-#undef CONFIG_SPL_MMC_SUPPORT
-#endif
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
@@ -197,11 +192,8 @@
#endif
/* SPI SPL */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_DMA_SUPPORT
#define CONFIG_TI_EDMA3
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
#define CONFIG_SUPPORT_EMMC_BOOT
diff --git a/include/configs/draco.h b/include/configs/draco.h
index 889178c..04240c7 100644
--- a/include/configs/draco.h
+++ b/include/configs/draco.h
@@ -48,10 +48,6 @@
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300
-#undef CONFIG_SPL_NET_SUPPORT
-#undef CONFIG_SPL_NET_VCI_STRING
-#undef CONFIG_SPL_ETH_SUPPORT
-
#undef CONFIG_MII
#undef CONFIG_PHY_GIGE
#define CONFIG_PHY_SMSC
diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h
index cc7ab83..1b440ea 100644
--- a/include/configs/dragonboard410c.h
+++ b/include/configs/dragonboard410c.h
@@ -12,8 +12,6 @@
#include <linux/sizes.h>
#include <asm/arch/sysmap-apq8016.h>
-#define CONFIG_IDENT_STRING "\nQualcomm-DragonBoard 410C"
-
#define CONFIG_MISC_INIT_R /* To stop autoboot */
/* Physical Memory Map */
diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h
index c78c949..252e5f5 100644
--- a/include/configs/dreamplug.h
+++ b/include/configs/dreamplug.h
@@ -26,11 +26,6 @@
#endif
/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING "\nMarvell-DreamPlug"
-
-/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index 11c1ec4..4309c56 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -122,14 +122,7 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
/* SPL related SPI defines */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index 910bcd4..f49284c 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -160,7 +160,6 @@
#define CONFIG_MTD_PARTITIONS
#define CONFIG_LZO
#define CONFIG_RBTREE
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_NAND_DAVINCI
diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index c30b63b..982d526 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -17,10 +17,6 @@
*/
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NOR_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0xffff0000
#define CONFIG_SPL_MAX_SIZE 0x0000fff0
#define CONFIG_SPL_STACK 0x00020000
@@ -35,12 +31,6 @@
#define CONFIG_SYS_TEXT_BASE 0x00800000
/*
- * Version number information
- */
-
-#define CONFIG_IDENT_STRING " EDMiniV2"
-
-/*
* High Level Configuration Options (easy to change)
*/
diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h
index 55ef612..81b79b2 100644
--- a/include/configs/el6x_common.h
+++ b/include/configs/el6x_common.h
@@ -25,10 +25,6 @@
#define CONFIG_MXC_UART
#ifdef CONFIG_SPL
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#define CONFIG_SPL_SPI_LOAD
#include "imx6_spl.h"
diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h
index c6a756d..0a50154 100644
--- a/include/configs/espresso7420.h
+++ b/include/configs/espresso7420.h
@@ -24,7 +24,6 @@
/* select serial console configuration */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
-#define CONFIG_IDENT_STRING " for ESPRESSO7420"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
/* DRAM Memory Banks */
diff --git a/include/configs/etamin.h b/include/configs/etamin.h
index 4919cfe..fda18b2 100644
--- a/include/configs/etamin.h
+++ b/include/configs/etamin.h
@@ -106,10 +106,6 @@
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300
-#undef CONFIG_SPL_NET_SUPPORT
-#undef CONFIG_SPL_NET_VCI_STRING
-#undef CONFIG_SPL_ETH_SUPPORT
-
#undef CONFIG_MII
#undef CONFIG_PHY_GIGE
#define CONFIG_PHY_SMSC
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index ce254b3..0895497 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -96,7 +96,6 @@
#define CONFIG_CMD_DATE
#define CONFIG_CMD_REISER
#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_UNZIP
#endif
diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index 342557f..390c243 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -10,8 +10,6 @@
#define ROCKCHIP_DEVICE_SETTINGS
#include <configs/rk3288_common.h>
-#define CONFIG_SPL_MMC_SUPPORT
-
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
/* SPL @ 32k for ~36k
diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index 421002d..51a0d19 100644
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -57,10 +57,6 @@
#define COPY_BL2_FNPTR_ADDR 0x02020030
#define CONFIG_SUPPORT_EMMC_BOOT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-
/* specific .lds file */
#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index 342557f..390c243 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -10,8 +10,6 @@
#define ROCKCHIP_DEVICE_SETTINGS
#include <configs/rk3288_common.h>
-#define CONFIG_SPL_MMC_SUPPORT
-
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
/* SPL @ 32k for ~36k
diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h
index a29f557..ee924c3 100644
--- a/include/configs/firefly-rk3288.h
+++ b/include/configs/firefly-rk3288.h
@@ -14,8 +14,6 @@
#include <configs/rk3288_common.h>
-#define CONFIG_SPL_MMC_SUPPORT
-
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
/* SPL @ 32k for ~36k
diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h
index ffbe660..ae6539c 100644
--- a/include/configs/goflexhome.h
+++ b/include/configs/goflexhome.h
@@ -16,11 +16,6 @@
#define _CONFIG_GOFLEXHOME_H
/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING "\nSeagate GoFlex Home"
-
-/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h
index 82b1830..c1b43fd 100644
--- a/include/configs/gplugd.h
+++ b/include/configs/gplugd.h
@@ -26,11 +26,6 @@
#endif
/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING "\nMarvell-gplugD"
-
-/*
* High Level Configuration Options
*/
#define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */
diff --git a/include/configs/gr_cpci_ax2000.h b/include/configs/gr_cpci_ax2000.h
index 8b57354..842ed16 100644
--- a/include/configs/gr_cpci_ax2000.h
+++ b/include/configs/gr_cpci_ax2000.h
@@ -340,9 +340,6 @@
/* no DDR2 Controller */
#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
-/* Identification string */
-#define CONFIG_IDENT_STRING " Gaisler LEON3 GR-CPCI-AX2000"
-
/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h
index 265f03c..fa10676 100644
--- a/include/configs/gr_ep2s60.h
+++ b/include/configs/gr_ep2s60.h
@@ -306,9 +306,6 @@
/* no DDR2 Controller */
#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
-/* Identification string */
-#define CONFIG_IDENT_STRING " Gaisler LEON3 EP2S60"
-
/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
diff --git a/include/configs/gr_xc3s_1500.h b/include/configs/gr_xc3s_1500.h
index 36acf01..9e00ff9 100644
--- a/include/configs/gr_xc3s_1500.h
+++ b/include/configs/gr_xc3s_1500.h
@@ -272,9 +272,6 @@
/* no DDR2 Controller */
#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
-/* Identification string */
-#define CONFIG_IDENT_STRING " Gaisler LEON3 GR-XC3S-1500"
-
/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
diff --git a/include/configs/grsim.h b/include/configs/grsim.h
index c2656fb..5736540 100644
--- a/include/configs/grsim.h
+++ b/include/configs/grsim.h
@@ -292,8 +292,6 @@
/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
-#define CONFIG_IDENT_STRING " Gaisler GRSIM"
-
/* TSIM command:
* $ ./tsim-leon3 -mmu -cas
*
diff --git a/include/configs/grsim_leon2.h b/include/configs/grsim_leon2.h
index 59adbdc..0f3204e 100644
--- a/include/configs/grsim_leon2.h
+++ b/include/configs/grsim_leon2.h
@@ -287,6 +287,4 @@
/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
-#define CONFIG_IDENT_STRING " Gaisler GRSIM LEON2"
-
#endif /* __CONFIG_H */
diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h
index 5907e98..5ac29db 100644
--- a/include/configs/guruplug.h
+++ b/include/configs/guruplug.h
@@ -11,11 +11,6 @@
#define _CONFIG_GURUPLUG_H
/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING "\nMarvell-GuruPlug"
-
-/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 92d64a9..f01a74a 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -9,9 +9,6 @@
/* SPL */
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
/* Location in NAND to read U-Boot from */
#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
@@ -32,7 +29,6 @@
#include "imx6_spl.h" /* common IMX6 SPL configuration */
#include "mx6_common.h"
-#undef CONFIG_SPL_EXT_SUPPORT
#undef CONFIG_DISPLAY_BOARDINFO
#define CONFIG_DISPLAY_BOARDINFO_LATE
@@ -152,7 +148,6 @@
#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
#define CONFIG_CMD_GSC
#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
-#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
/* Ethernet support */
diff --git a/include/configs/hikey.h b/include/configs/hikey.h
index 5e5aa19..39faf80 100644
--- a/include/configs/hikey.h
+++ b/include/configs/hikey.h
@@ -21,8 +21,6 @@
#define CONFIG_SUPPORT_RAW_INITRD
-#define CONFIG_IDENT_STRING "hikey"
-
#define CONFIG_BOARD_EARLY_INIT_F
/* Physical Memory Map */
diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index c5e6828..99dcb75 100644
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -20,12 +20,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFE000000
-#ifdef CONFIG_HRCON_DH
-#define CONFIG_IDENT_STRING " hrcon dh 0.01"
-#else
-#define CONFIG_IDENT_STRING " hrcon 0.01"
-#endif
-
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_LAST_STAGE_INIT
diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h
index ab23607..f686c7f 100644
--- a/include/configs/ib62x0.h
+++ b/include/configs/ib62x0.h
@@ -10,11 +10,6 @@
#define _CONFIG_IB62x0_H
/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING " RaidSonic ICY BOX IB-NAS62x0"
-
-/*
* High level configuration options
*/
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h
index f0d4250..633941b 100644
--- a/include/configs/iconnect.h
+++ b/include/configs/iconnect.h
@@ -10,11 +10,6 @@
#define _CONFIG_ICONNECT_H
/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING " Iomega iConnect"
-
-/*
* High level configuration options
*/
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
@@ -95,7 +90,6 @@
* File system
*/
#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_MTD_DEVICE
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index c9d3b93..112e885 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -533,7 +533,6 @@
/* UBI Support */
#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO
diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h
new file mode 100644
index 0000000..0a7fe60
--- /dev/null
+++ b/include/configs/imgtec_xilfpga.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2016, Imagination Technologies Ltd.
+ *
+ * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * Imagination Technologies Ltd. MIPSfpga
+ */
+
+#ifndef __XILFPGA_CONFIG_H
+#define __XILFPGA_CONFIG_H
+
+/* BootROM + MIG is pretty smart. DDR and Cache initialized */
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/*--------------------------------------------
+ * CPU configuration
+ */
+/* CPU Timer rate */
+#define CONFIG_SYS_MIPS_TIMER_FREQ 50000000
+
+/* Cache Configuration */
+#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
+
+/*----------------------------------------------------------------------
+ * Memory Layout
+ */
+
+/* SDRAM Configuration (for final code, data, stack, heap) */
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
+#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000)
+
+#define CONFIG_SYS_MALLOC_LEN (256 << 10)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_LOAD_ADDR 0x80500000 /* default load address */
+
+/*----------------------------------------------------------------------
+ * Commands
+ */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+
+/*-------------------------------------------------
+ * FLASH configuration
+ */
+#define CONFIG_SYS_NO_FLASH
+
+/*------------------------------------------------------------
+ * Console Configuration
+ */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
+#define CONFIG_BAUDRATE 115200
+
+/* -------------------------------------------------
+ * Environment
+ */
+#define CONFIG_ENV_IS_NOWHERE 1
+#define CONFIG_ENV_SIZE 0x4000
+
+/* ---------------------------------------------------------------------
+ * Board boot configuration
+ */
+#define CONFIG_TIMESTAMP /* Print image info with timestamp */
+
+#endif /* __XILFPGA_CONFIG_H */
diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h
index 9bd9f6e..76d1ca0 100644
--- a/include/configs/imx6_spl.h
+++ b/include/configs/imx6_spl.h
@@ -29,17 +29,10 @@
#define CONFIG_SPL_TEXT_BASE 0x00908000
#define CONFIG_SPL_MAX_SIZE 0x10000
#define CONFIG_SPL_STACK 0x0091FFB8
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
/* NAND support */
#if defined(CONFIG_SPL_NAND_SUPPORT)
#define CONFIG_SPL_NAND_MXS
-#define CONFIG_SPL_DMA_SUPPORT
#endif
/* MMC support */
@@ -49,7 +42,6 @@
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS/2*1024)
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
-#define CONFIG_SPL_EXT_SUPPORT
#endif
/* SATA support */
@@ -57,13 +49,11 @@
#define CONFIG_SPL_SATA_BOOT_DEVICE 0
#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
-#define CONFIG_SPL_EXT_SUPPORT
#endif
/* Define the payload for FAT/EXT support */
#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_LIBDISK_SUPPORT
#endif
#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6SL)
diff --git a/include/configs/intip.h b/include/configs/intip.h
index c5af365..5aa8fae 100644
--- a/include/configs/intip.h
+++ b/include/configs/intip.h
@@ -24,10 +24,8 @@
#define CONFIG_460EX 1 /* Specific PPC460EX */
#ifdef CONFIG_DEVCONCENTER
#define CONFIG_HOSTNAME devconcenter
-#define CONFIG_IDENT_STRING " devconcenter 0.06"
#else
#define CONFIG_HOSTNAME intip
-#define CONFIG_IDENT_STRING " intip 0.06"
#endif
#define CONFIG_440 1
diff --git a/include/configs/io.h b/include/configs/io.h
index 544d044..8c9ee0e 100644
--- a/include/configs/io.h
+++ b/include/configs/io.h
@@ -17,7 +17,6 @@
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_HOSTNAME io
-#define CONFIG_IDENT_STRING " io 0.06"
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F
diff --git a/include/configs/io64.h b/include/configs/io64.h
index 14ffb33..894da84 100644
--- a/include/configs/io64.h
+++ b/include/configs/io64.h
@@ -36,7 +36,6 @@
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_HOSTNAME io64
-#define CONFIG_IDENT_STRING " io64 0.02"
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F
diff --git a/include/configs/iocon.h b/include/configs/iocon.h
index d85a76c..87f56f1 100644
--- a/include/configs/iocon.h
+++ b/include/configs/iocon.h
@@ -17,7 +17,6 @@
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_HOSTNAME iocon
-#define CONFIG_IDENT_STRING " iocon 0.06"
#include "amcc-common.h"
/* Reclaim some space. */
diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h
index 37a5fa4..5f07629 100644
--- a/include/configs/ipam390.h
+++ b/include/configs/ipam390.h
@@ -178,7 +178,6 @@
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 10
#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
@@ -266,7 +265,6 @@
#define CONFIG_MTD_PARTITIONS
#define CONFIG_LZO
#define CONFIG_RBTREE
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define MTDIDS_NAME_STR "davinci_nand.0"
@@ -285,9 +283,6 @@
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-ipam390.lds"
#define CONFIG_SPL_STACK 0x8001ff00
#define CONFIG_SPL_TEXT_BASE 0x80000000
@@ -309,7 +304,6 @@
#define CONFIG_CMD_SPL_WRITE_SIZE 0x400
/* GPIO support */
-#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_DA8XX_GPIO
#define CONFIG_IPAM390_GPIO_BOOTMODE ((16 * 7) + 14)
diff --git a/include/configs/kc1.h b/include/configs/kc1.h
index c1a9e64..32be528 100644
--- a/include/configs/kc1.h
+++ b/include/configs/kc1.h
@@ -129,15 +129,6 @@
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 2
/*
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index 8e1de7c..4ab96bf 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -65,7 +65,6 @@
#define CONFIG_BOOTP_HOSTNAME
/* UBI Support for all Keymile boards */
-#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index b377c41..0d78cfa 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -23,14 +23,12 @@
/* KM_KIRKWOOD */
#if defined(CONFIG_KM_KIRKWOOD)
-#define CONFIG_IDENT_STRING "\nKeymile Kirkwood"
#define CONFIG_HOSTNAME km_kirkwood
#define CONFIG_KM_DISABLE_PCIE
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
/* KM_KIRKWOOD_PCI */
#elif defined(CONFIG_KM_KIRKWOOD_PCI)
-#define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI"
#define CONFIG_HOSTNAME km_kirkwood_pci
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#define CONFIG_KM_FPGA_CONFIG
@@ -39,7 +37,6 @@
/* KM_KIRKWOOD_128M16 */
#elif defined(CONFIG_KM_KIRKWOOD_128M16)
-#define CONFIG_IDENT_STRING "\nKeymile Kirkwood 128M16"
#define CONFIG_HOSTNAME km_kirkwood_128m16
#undef CONFIG_SYS_KWD_CONFIG
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
@@ -51,10 +48,8 @@
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
# if defined(CONFIG_KM_NUSA)
-#define CONFIG_IDENT_STRING "\nKeymile NUSA"
#define CONFIG_HOSTNAME kmnusa
# elif defined(CONFIG_KM_SUGP1)
-#define CONFIG_IDENT_STRING "\nKeymile SUGP1"
#define CONFIG_HOSTNAME kmsugp1
#define KM_PCIE_RESET_MPP7
#endif
@@ -69,7 +64,6 @@
/* KM_MGCOGE3UN */
#elif defined(CONFIG_KM_MGCOGE3UN)
-#define CONFIG_IDENT_STRING "\nKeymile COGE3UN"
#define CONFIG_HOSTNAME mgcoge3un
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#undef CONFIG_SYS_KWD_CONFIG
@@ -81,7 +75,6 @@
/* KMCOGE5UN */
#elif defined(CONFIG_KM_COGE5UN)
-#define CONFIG_IDENT_STRING "\nKeymile COGE5UN"
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#undef CONFIG_SYS_KWD_CONFIG
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
@@ -93,7 +86,6 @@
/* KM_PORTL2 */
#elif defined(CONFIG_KM_PORTL2)
-#define CONFIG_IDENT_STRING "\nKeymile Port-L2"
#define CONFIG_HOSTNAME portl2
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#define CONFIG_KM_PIGGY4_88E6061
@@ -101,7 +93,6 @@
/* KM_SUV31 */
#elif defined(CONFIG_KM_SUV31)
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
-#define CONFIG_IDENT_STRING "\nKeymile SUV31"
#define CONFIG_HOSTNAME kmsuv31
#undef CONFIG_SYS_KWD_CONFIG
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
index 9b2c575..bd6c83e 100644
--- a/include/configs/lacie_kw.h
+++ b/include/configs/lacie_kw.h
@@ -12,27 +12,20 @@
*/
#if defined(CONFIG_INETSPACE_V2)
#define CONFIG_MACH_TYPE MACH_TYPE_INETSPACE_V2
-#define CONFIG_IDENT_STRING " IS v2"
#elif defined(CONFIG_NETSPACE_V2)
#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_V2
-#define CONFIG_IDENT_STRING " NS v2"
#elif defined(CONFIG_NETSPACE_LITE_V2)
#define MACH_TYPE_NETSPACE_LITE_V2 2983 /* missing in mach-types.h */
#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_LITE_V2
-#define CONFIG_IDENT_STRING " NS v2 Lite"
#elif defined(CONFIG_NETSPACE_MINI_V2)
#define MACH_TYPE_NETSPACE_MINI_V2 2831 /* missing in mach-types.h */
#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MINI_V2
-#define CONFIG_IDENT_STRING " NS v2 Mini"
#elif defined(CONFIG_NETSPACE_MAX_V2)
#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MAX_V2
-#define CONFIG_IDENT_STRING " NS Max v2"
#elif defined(CONFIG_D2NET_V2)
#define CONFIG_MACH_TYPE MACH_TYPE_D2NET_V2
-#define CONFIG_IDENT_STRING " D2 v2"
#elif defined(CONFIG_NET2BIG_V2)
#define CONFIG_MACH_TYPE MACH_TYPE_NET2BIG_V2
-#define CONFIG_IDENT_STRING " 2Big v2"
#else
#error "Unknown board"
#endif
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 7a256da..0d72e69 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -67,15 +67,6 @@
#endif
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x600
@@ -105,15 +96,6 @@
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0x10000000
#define CONFIG_SPL_MAX_SIZE 0x1a000
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 90ae770..e5ac50e 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -112,14 +112,6 @@
#endif
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8
#ifdef CONFIG_SECURE_BOOT
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index e55fcb2..ed0e434 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -60,15 +60,6 @@
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xf0
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x500
@@ -91,15 +82,6 @@
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0x10000000
#define CONFIG_SPL_MAX_SIZE 0x1a000
#define CONFIG_SPL_STACK 0x1001d000
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 903f6dd..42d0298 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -259,17 +259,9 @@
#define CONFIG_SPL_BSS_START_ADDR 0x80100000
#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_MAX_SIZE 0x16000
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0x1800a000
diff --git a/include/configs/ls2080a_emu.h b/include/configs/ls2080a_emu.h
index 16e37bf..cec12ad 100644
--- a/include/configs/ls2080a_emu.h
+++ b/include/configs/ls2080a_emu.h
@@ -9,8 +9,6 @@
#include "ls2080a_common.h"
-#define CONFIG_IDENT_STRING " LS2080A-EMU"
-
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 133333333
diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h
index 7f245b5..1851d41 100644
--- a/include/configs/ls2080a_simu.h
+++ b/include/configs/ls2080a_simu.h
@@ -9,8 +9,6 @@
#include "ls2080a_common.h"
-#define CONFIG_IDENT_STRING " LS2080A-SIMU"
-
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 133333333
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index e878cbe..baa35db 100644
--- a/include/configs/lsxl.h
+++ b/include/configs/lsxl.h
@@ -12,12 +12,10 @@
* Version number information
*/
#if defined(CONFIG_LSCHLV2)
-#define CONFIG_IDENT_STRING " LS-CHLv2"
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
#define CONFIG_MACH_TYPE 3006
#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
#elif defined(CONFIG_LSXHL)
-#define CONFIG_IDENT_STRING " LS-XHL"
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
#define CONFIG_MACH_TYPE 2663
/* CONFIG_SYS_TCLK is 200000000 by default */
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index da63842..7b88ad5 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -12,11 +12,6 @@
#define __CONFIG_H
/*
- * Liebherr extra version info
- */
-#define CONFIG_IDENT_STRING " - v2.0"
-
-/*
* High Level Configuration Options
*/
#define CONFIG_LWMON5 1 /* Board is lwmon5 */
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index cdd24cd..4b95af3 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -46,7 +46,6 @@
#define CONFIG_ENV_OFFSET_REDUND \
(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_MTDPARTS
#define CONFIG_RBTREE
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index fd47a72..5af55d8 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -115,7 +115,6 @@
#define CONFIG_ENV_OFFSET_REDUND \
(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_MTDPARTS
#define CONFIG_RBTREE
@@ -239,11 +238,6 @@
#define CONFIG_SPL_TEXT_BASE 0x70008000
#define CONFIG_SPL_PAD_TO 0x8000
#define CONFIG_SPL_STACK 0x70004000
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index a696c1a..b156e42 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -216,16 +216,9 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index 47d2948..29ed284 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -84,14 +84,7 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
/* SPL related SPI defines */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index 22a54c7..b6a710f 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -109,7 +109,6 @@
#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND /* NAND support */
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO
@@ -320,15 +319,6 @@
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index e5bf700..a07bcc6 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -177,7 +177,6 @@
#if defined(FLASH)
# define CONFIG_CMD_JFFS2
-# define CONFIG_CMD_UBI
# undef CONFIG_CMD_UBIFS
# if !defined(RAMENV)
@@ -192,7 +191,6 @@
# endif
#else
# undef CONFIG_CMD_JFFS2
-# undef CONFIG_CMD_UBI
# undef CONFIG_CMD_UBIFS
#endif
#endif
@@ -202,7 +200,6 @@
#endif
#if defined(CONFIG_CMD_UBIFS)
-# define CONFIG_CMD_UBI
# define CONFIG_LZO
#endif
@@ -285,16 +282,12 @@
/* SPL part */
#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
#define CONFIG_SPL_RAM_DEVICE
#ifdef CONFIG_SYS_FLASH_BASE
-# define CONFIG_SPL_NOR_SUPPORT
# define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
#endif
diff --git a/include/configs/miniarm_rk3288.h b/include/configs/miniarm_rk3288.h
index 342557f..390c243 100644
--- a/include/configs/miniarm_rk3288.h
+++ b/include/configs/miniarm_rk3288.h
@@ -10,8 +10,6 @@
#define ROCKCHIP_DEVICE_SETTINGS
#include <configs/rk3288_common.h>
-#define CONFIG_SPL_MMC_SUPPORT
-
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
/* SPL @ 32k for ~36k
diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h
index dd223be..ed271c2 100644
--- a/include/configs/mv-common.h
+++ b/include/configs/mv-common.h
@@ -137,7 +137,6 @@
*/
#ifdef CONFIG_SYS_MVFS
#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index b2bf599..808736b 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -69,7 +69,6 @@
/* UBI and NAND partitioning */
#ifdef CONFIG_CMD_NAND
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_MTDPARTS
#define CONFIG_RBTREE
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index a81dd78..a37646e 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -31,9 +31,6 @@
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0x87dc0000
#define CONFIG_SYS_TEXT_BASE 0x87e00000
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 366b5b9..237ef04 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -11,8 +11,6 @@
#include <config_distro_defaults.h>
#include "mx6_common.h"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h"
#define CONFIG_IMX_THERMAL
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index d3b10e0..5c2734d 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -10,8 +10,6 @@
#define __MX6QSABRESD_CONFIG_H
#ifdef CONFIG_SPL
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h"
#endif
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 13589df..501d7de 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -12,8 +12,6 @@
#include "mx6_common.h"
#ifdef CONFIG_SPL
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h"
#endif
diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h
index 274cb36..c30e3dd 100644
--- a/include/configs/mx6sxsabreauto.h
+++ b/include/configs/mx6sxsabreauto.h
@@ -173,7 +173,6 @@
#define CONFIG_IMX_THERMAL
-#define CONFIG_FSL_QSPI
#ifdef CONFIG_FSL_QSPI
#define CONFIG_SYS_FSL_QSPI_AHB
#define CONFIG_SF_DEFAULT_BUS 0
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 86987df..4c61999 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -12,8 +12,6 @@
#include "mx6_common.h"
#ifdef CONFIG_SPL
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h"
#endif
diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index 614de5f..925a418 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -16,8 +16,6 @@
#define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
/* SPL options */
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h"
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
@@ -188,15 +186,11 @@
#ifndef CONFIG_SYS_DCACHE_OFF
#endif
-#define CONFIG_FSL_QSPI
#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_BAR
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_CS 0
#define CONFIG_SF_DEFAULT_SPEED 40000000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
-#define CONFIG_SPI_FLASH_STMICRO
#define FSL_QSPI_FLASH_NUM 1
#define FSL_QSPI_FLASH_SIZE SZ_32M
#endif
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index d80dc5e..d15dd5f 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -49,10 +49,6 @@
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
/* Memory sizes */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
diff --git a/include/configs/nas220.h b/include/configs/nas220.h
index cca2324..7cfdacd 100644
--- a/include/configs/nas220.h
+++ b/include/configs/nas220.h
@@ -17,7 +17,6 @@
*/
#define MACH_TYPE_NAS220 MACH_TYPE_RD88F6192_NAS
#define CONFIG_MACH_TYPE MACH_TYPE_NAS220
-#define CONFIG_IDENT_STRING "\nNAS 220"
/*
* High Level Configuration Options (easy to change)
@@ -111,7 +110,6 @@
#define CONFIG_CMD_JFFS2
#define CONFIG_JFFS2_NAND
#define CONFIG_JFFS2_LZO
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
diff --git a/include/configs/neo.h b/include/configs/neo.h
index 4f244a9..8b6ee92 100644
--- a/include/configs/neo.h
+++ b/include/configs/neo.h
@@ -17,7 +17,6 @@
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_HOSTNAME neo
-#define CONFIG_IDENT_STRING " neo 0.02"
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index cdae544..41ebd6d 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -135,7 +135,6 @@
#define CONFIG_CMD_MTDPARTS /* mtd parts support */
#ifdef UBIFS_SUPPORT
-#define CONFIG_CMD_UBI /* UBI Support */
#define CONFIG_CMD_UBIFS /* UBIFS Support */
#endif
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 13a7074..8cb0282 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -72,8 +72,6 @@
#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
/* SPL */
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h" /* common IMX6 SPL configuration */
/* Ethernet Configuration */
diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h
index bf5df9c..1d5b3d5 100644
--- a/include/configs/odroid-c2.h
+++ b/include/configs/odroid-c2.h
@@ -8,8 +8,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_IDENT_STRING " odroid-c2"
-
/* Serial setup */
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h
index 5196d58..0b57949 100644
--- a/include/configs/odroid_xu3.h
+++ b/include/configs/odroid_xu3.h
@@ -12,7 +12,6 @@
#include <configs/exynos5-common.h>
#undef CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_IDENT_STRING " for ODROID-XU3"
#define CONFIG_BOARD_COMMON
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index b134ac9..740b588 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -56,8 +56,6 @@
#define CONFIG_OMAP_HSMMC
/* SPL */
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
@@ -78,7 +76,6 @@
/* NAND SPL */
#define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
@@ -349,12 +346,6 @@
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_OMAP3_ID_NAND
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 3389bf3..9ca648d 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -75,7 +75,6 @@
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_ONENAND
-#define CONFIG_CMD_UBI
#ifndef CONFIG_SPL_BUILD
@@ -116,13 +115,11 @@
#define CONFIG_SYS_MTDPARTS_RUNTIME
/* OneNAND config */
-#define CONFIG_SPL_ONENAND_SUPPORT
#define CONFIG_USE_ONENAND_BOARD_INIT
#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
#define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
/* NAND config */
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_OMAP3_ID_NAND
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
@@ -167,6 +164,4 @@
#define CONFIG_UBIFS_SILENCE_MSG 1
#define CONFIG_ENV_SIZE (32*1024)
-#undef CONFIG_SPL_EXT_SUPPORT
-
#endif /* __IGEP00X0_H */
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 496da17..6a60ec3 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -93,7 +93,6 @@
#ifdef CONFIG_NAND
#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 8dffa89..0036c5c 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -59,7 +59,6 @@
/* commands to include */
#ifdef CONFIG_NAND
-#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index b664319..fce50f5 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -69,7 +69,6 @@
#define CONFIG_SYS_NAND_OOBSIZE 64
#ifdef CONFIG_NAND
-#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index 43afecd..854fc47 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -97,8 +97,6 @@
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#ifdef CONFIG_USE_SPIFLASH
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000
@@ -225,7 +223,6 @@
#define CONFIG_MTD_PARTITIONS
#define CONFIG_LZO
#define CONFIG_RBTREE
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#endif
@@ -268,9 +265,6 @@
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"
#define CONFIG_SPL_STACK 0x8001ff00
#define CONFIG_SPL_TEXT_BASE 0x80000000
diff --git a/include/configs/openrd.h b/include/configs/openrd.h
index 4defa7e..908a1af 100644
--- a/include/configs/openrd.h
+++ b/include/configs/openrd.h
@@ -15,23 +15,6 @@
#define _CONFIG_OPENRD_H
/*
- * Version number information
- */
-#ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE
-# define CONFIG_IDENT_STRING "\nOpenRD-Ultimate"
-#else
-# ifdef CONFIG_BOARD_IS_OPENRD_CLIENT
-# define CONFIG_IDENT_STRING "\nOpenRD-Client"
-# else
-# ifdef CONFIG_BOARD_IS_OPENRD_BASE
-# define CONFIG_IDENT_STRING "\nOpenRD-Base"
-# else
-# error Unknown OpenRD board specified
-# endif
-# endif
-#endif
-
-/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */
diff --git a/include/configs/origen.h b/include/configs/origen.h
index 1fa2f4d..0f76d32 100644
--- a/include/configs/origen.h
+++ b/include/configs/origen.h
@@ -87,8 +87,6 @@
"fi;" \
"load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
-#define CONFIG_IDENT_STRING " for ORIGEN"
-
#define CONFIG_CLK_1000_400_200
/* MIU (Memory Interleaving Unit) */
diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h
index 9be9d8b..f4b3e06 100644
--- a/include/configs/ot1200.h
+++ b/include/configs/ot1200.h
@@ -80,9 +80,6 @@
/* SPL */
#ifdef CONFIG_SPL
#include "imx6_spl.h"
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#define CONFIG_SPL_SPI_LOAD
#endif
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index ae0f6a5..721f9d5 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -181,16 +181,9 @@
#endif
#ifdef CONFIG_SDCARD
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
@@ -209,17 +202,9 @@
#endif
#ifdef CONFIG_SPIFLASH
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_FLASH_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
@@ -241,14 +226,7 @@
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_NAND_INIT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SPL_MAX_SIZE (128 << 10)
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
@@ -259,8 +237,6 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10)
#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0xff800000
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index e24dcb9..ef081b2 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -120,16 +120,9 @@
/* CPU */
#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_SPL_YMODEM_SUPPORT
-#define CONFIG_SPL_NET_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_NET_VCI_STRING "pcm051 U-Boot SPL"
-#define CONFIG_SPL_ETH_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#ifdef CONFIG_SPI_BOOT
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 57a7630..a70c988 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -44,7 +44,6 @@
#define CONFIG_JFFS2_NAND
/* UBI */
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO
diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h
index 97cbeba..c36245b 100644
--- a/include/configs/pcm058.h
+++ b/include/configs/pcm058.h
@@ -11,12 +11,6 @@
#include <config_distro_defaults.h>
#ifdef CONFIG_SPL
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_DMA_SUPPORT
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#include "imx6_spl.h"
@@ -98,7 +92,6 @@
#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
#define CONFIG_CMD_GSC
#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
-#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
/* Physical Memory Map */
diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h
index 6c42aaa..b01fe4c 100644
--- a/include/configs/peach-pi.h
+++ b/include/configs/peach-pi.h
@@ -29,8 +29,6 @@
#define CONFIG_SERIAL3 /* use SERIAL 3 */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
-#define CONFIG_IDENT_STRING " for Peach-Pi"
-
/* Display */
#define CONFIG_LCD
#ifdef CONFIG_LCD
diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h
index 6c68dd2..c4ae0e2 100644
--- a/include/configs/peach-pit.h
+++ b/include/configs/peach-pit.h
@@ -29,8 +29,6 @@
#define CONFIG_SERIAL3 /* use SERIAL 3 */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
-#define CONFIG_IDENT_STRING " for Peach-Pit"
-
/* DRAM Memory Banks */
#define CONFIG_NR_DRAM_BANKS 4
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h
index 909ed9d..4130f53 100644
--- a/include/configs/pengwyn.h
+++ b/include/configs/pengwyn.h
@@ -114,13 +114,6 @@
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* SPL */
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
-
-/* General network SPL */
-#define CONFIG_SPL_NET_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
/* NAND support */
#define CONFIG_CMD_NAND
@@ -201,7 +194,6 @@
#if defined(CONFIG_SPL_BUILD)
/* disable host part of MUSB in SPL */
/* Disable CPSW SPL support so we fit within the 101KiB limit. */
-#undef CONFIG_SPL_ETH_SUPPORT
#endif
/* CPSW ethernet */
@@ -214,7 +206,6 @@
#define CONFIG_PHY_REALTEK
/* CPSW support */
-#define CONFIG_SPL_ETH_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
diff --git a/include/configs/picosam9g45.h b/include/configs/picosam9g45.h
index c2e2c43..206bfa7 100644
--- a/include/configs/picosam9g45.h
+++ b/include/configs/picosam9g45.h
@@ -163,12 +163,6 @@
#define CONFIG_SPL_MAX_SIZE 0x010000
#define CONFIG_SPL_STACK 0x310000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-
#define CONFIG_SYS_MONITOR_LEN 0x80000
#ifdef CONFIG_SYS_USE_MMC
@@ -179,13 +173,10 @@
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_ATMEL_SIZE
#define CONFIG_SYS_MASTER_CLOCK 132096000
diff --git a/include/configs/platinum.h b/include/configs/platinum.h
index 34ce086..f3ac458 100644
--- a/include/configs/platinum.h
+++ b/include/configs/platinum.h
@@ -8,8 +8,6 @@
#define __PLATINUM_CONFIG_H__
/* SPL */
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
/* Location in NAND to read U-Boot from */
#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * 1024 * 1024)
@@ -25,7 +23,6 @@
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
/*
diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h
index 6393ff3..fb1339c 100644
--- a/include/configs/pogo_e02.h
+++ b/include/configs/pogo_e02.h
@@ -18,7 +18,6 @@
*/
#define MACH_TYPE_POGO_E02 3542
#define CONFIG_MACH_TYPE MACH_TYPE_POGO_E02
-#define CONFIG_IDENT_STRING "\nPogo E02"
/*
* High Level Configuration Options (easy to change)
@@ -82,7 +81,6 @@
* File system
*/
#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
diff --git a/include/configs/popmetal_rk3288.h b/include/configs/popmetal_rk3288.h
index 342557f..390c243 100644
--- a/include/configs/popmetal_rk3288.h
+++ b/include/configs/popmetal_rk3288.h
@@ -10,8 +10,6 @@
#define ROCKCHIP_DEVICE_SETTINGS
#include <configs/rk3288_common.h>
-#define CONFIG_SPL_MMC_SUPPORT
-
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
/* SPL @ 32k for ~36k
diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h
index 990fd84..99a201c 100644
--- a/include/configs/pxm2.h
+++ b/include/configs/pxm2.h
@@ -42,10 +42,6 @@
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300
-#undef CONFIG_SPL_NET_SUPPORT
-#undef CONFIG_SPL_NET_VCI_STRING
-#undef CONFIG_SPL_ETH_SUPPORT
-
#define CONFIG_PHY_ATHEROS
#define CONFIG_FACTORYSET
diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h
index 55be46b..f8ed22a 100644
--- a/include/configs/rastaban.h
+++ b/include/configs/rastaban.h
@@ -51,10 +51,6 @@
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300
-#undef CONFIG_SPL_NET_SUPPORT
-#undef CONFIG_SPL_NET_VCI_STRING
-#undef CONFIG_SPL_ETH_SUPPORT
-
#undef CONFIG_MII
#undef CONFIG_PHY_GIGE
#define CONFIG_PHY_SMSC
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 101a3ed..4b26662 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -24,8 +24,6 @@
#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_MEM32
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 601186c..e8bf987 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -9,6 +9,7 @@
#include <asm/arch/hardware.h>
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#define CONFIG_SYS_NO_FLASH
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_ENV_SIZE 0x2000
@@ -24,10 +25,6 @@
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SPL_BOARD_INIT
@@ -66,10 +63,6 @@
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_PINCTRL_SUPPORT
-#define CONFIG_SPL_RAM_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-
#define CONFIG_SYS_SDRAM_BASE 0
#define CONFIG_NR_DRAM_BANKS 1
#define SDRAM_BANK_SIZE (2UL << 30)
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index e9626a5..b026122 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -83,4 +83,16 @@
#endif
+/* enable usb config for usb ether */
+#define CONFIG_USB_HOST_ETHER
+
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_ASIX88179
+#define CONFIG_USB_ETHER_MCS7830
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_RTL8152
+
+/* rockchip xhci host driver */
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
+
#endif
diff --git a/include/configs/rock2.h b/include/configs/rock2.h
index a29f557..ee924c3 100644
--- a/include/configs/rock2.h
+++ b/include/configs/rock2.h
@@ -14,8 +14,6 @@
#include <configs/rk3288_common.h>
-#define CONFIG_SPL_MMC_SUPPORT
-
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
/* SPL @ 32k for ~36k
diff --git a/include/configs/rut.h b/include/configs/rut.h
index aea8e21..5f62358 100644
--- a/include/configs/rut.h
+++ b/include/configs/rut.h
@@ -37,10 +37,6 @@
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200
-#undef CONFIG_SPL_NET_SUPPORT
-#undef CONFIG_SPL_NET_VCI_STRING
-#undef CONFIG_SPL_ETH_SUPPORT
-
#define CONFIG_PHY_NATSEMI
#define CONFIG_FACTORYSET
diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h
index c1c01bd..7a049d4 100644
--- a/include/configs/sama5d2_ptc.h
+++ b/include/configs/sama5d2_ptc.h
@@ -121,22 +121,14 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_SERIALFLASH
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
#elif CONFIG_SYS_USE_NANDFLASH
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_PMECC_CAP 8
diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h
index 563c045..e684d2a 100644
--- a/include/configs/sama5d2_xplained.h
+++ b/include/configs/sama5d2_xplained.h
@@ -125,27 +125,17 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#elif CONFIG_SYS_USE_SERIALFLASH
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index fef925f..5e661741 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -67,7 +67,6 @@
#define CONFIG_MTD_PARTITIONS
#define CONFIG_RBTREE
#define CONFIG_LZO
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#endif
@@ -124,26 +123,17 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#elif CONFIG_SYS_USE_NANDFLASH
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 248de8d..8b73a1b 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -164,26 +164,17 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#elif CONFIG_SYS_USE_NANDFLASH
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
@@ -196,8 +187,6 @@
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
#elif CONFIG_SYS_USE_SERIALFLASH
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h
index d874ab5..c90e1e6 100644
--- a/include/configs/sama5d4_xplained.h
+++ b/include/configs/sama5d4_xplained.h
@@ -124,26 +124,17 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#elif CONFIG_SYS_USE_NANDFLASH
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_PMECC_CAP 8
@@ -158,8 +149,6 @@
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
#elif CONFIG_SYS_USE_SERIALFLASH
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h
index 61c3f85..b9927e9 100644
--- a/include/configs/sama5d4ek.h
+++ b/include/configs/sama5d4ek.h
@@ -122,26 +122,17 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
#elif CONFIG_SYS_USE_NANDFLASH
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_PMECC_CAP 8
@@ -156,8 +147,6 @@
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
#elif CONFIG_SYS_USE_SERIALFLASH
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/sandbox_spl.h b/include/configs/sandbox_spl.h
index ffc3098..2aaa3ab 100644
--- a/include/configs/sandbox_spl.h
+++ b/include/configs/sandbox_spl.h
@@ -10,11 +10,6 @@
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#endif
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index fa76a25..748a2ea 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@ -11,11 +11,6 @@
#define _CONFIG_SHEEVAPLUG_H
/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING "\nMarvell-Sheevaplug"
-
-/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index 3eca93b..d81e1a5 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -133,22 +133,8 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_FS_FAT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
-
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
@@ -156,7 +142,6 @@
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_AM33XX_BCH
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
@@ -285,10 +270,7 @@
#define CONFIG_MTD_DEVICE
#define CONFIG_RBTREE
#define CONFIG_LZO
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
-#define CONFIG_MTD_UBI_FASTMAP
-#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
#endif
/* Commen environment */
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 8ad8f24..1ea41a2 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -239,13 +239,8 @@
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_USE_NANDFLASH 1
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index c8148bb..f83a9c8 100644
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -166,7 +166,6 @@
/*
* File system
*/
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index 92a0833..5c60887 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -20,7 +20,6 @@
#define CONFIG_BOARD_COMMON
-#define CONFIG_IDENT_STRING " for SMDK5250"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
#endif /* __CONFIG_SMDK_H */
diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h
index a46ca74..d8d095f 100644
--- a/include/configs/smdk5420.h
+++ b/include/configs/smdk5420.h
@@ -31,7 +31,6 @@
#define CONFIG_SERIAL3 /* use SERIAL 3 */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
-#define CONFIG_IDENT_STRING " for SMDK5420"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
/* USB */
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index 9d52689..0ad1a27 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -167,7 +167,6 @@
#define CONFIG_SYS_NO_FLASH 1
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */
-#define CONFIG_IDENT_STRING " for SMDKC100"
#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000)
#define CONFIG_ENABLE_MMU
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
index efb18ff..ccb8921 100644
--- a/include/configs/smdkv310.h
+++ b/include/configs/smdkv310.h
@@ -67,7 +67,6 @@
#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
/* FLASH and environment organization */
-#define CONFIG_IDENT_STRING " for SMDKC210/V310"
#define CONFIG_CLK_1000_400_200
diff --git a/include/configs/sniper.h b/include/configs/sniper.h
index 5062cd0..3bc9819 100644
--- a/include/configs/sniper.h
+++ b/include/configs/sniper.h
@@ -137,16 +137,6 @@
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 2
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
diff --git a/include/configs/snow.h b/include/configs/snow.h
index 1d8d8da..01d9db8 100644
--- a/include/configs/snow.h
+++ b/include/configs/snow.h
@@ -15,7 +15,6 @@
#define CONFIG_BOARD_COMMON
-#define CONFIG_IDENT_STRING " for snow"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
#endif /* __CONFIG_SNOW_H */
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index b3fb245..084874d 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -300,7 +300,6 @@
/* UBI and UBIFS support */
#if defined(CONFIG_CMD_SF) || defined(CONFIG_CMD_NAND)
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO
@@ -322,36 +321,19 @@
#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
#define CONFIG_SPL_MAX_SIZE (64 * 1024)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#ifdef CONFIG_DM_MMC
-#define CONFIG_SPL_MMC_SUPPORT
-#endif
-#ifdef CONFIG_DM_SPI
-#define CONFIG_SPL_SPI_SUPPORT
-#endif
-#ifdef CONFIG_SPL_NAND_DENALI
-#define CONFIG_SPL_NAND_SUPPORT
-#endif
-
/* SPL SDMMC boot support */
#ifdef CONFIG_SPL_MMC_SUPPORT
#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
-#define CONFIG_SPL_LIBDISK_SUPPORT
#else
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 /* offset 512 sect (256k) */
-#define CONFIG_SPL_LIBDISK_SUPPORT
#endif
#endif
/* SPL QSPI boot support */
#ifdef CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
#endif
diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h
index 1c7d45e..8d90c91 100644
--- a/include/configs/socfpga_vining_fpga.h
+++ b/include/configs/socfpga_vining_fpga.h
@@ -192,9 +192,7 @@
"else echo \"Unsupported boot mode: \"${bootmode} ; " \
"fi\0" \
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
-#define CONFIG_MTD_UBI_FASTMAP
#define CONFIG_RBTREE
#define CONFIG_LZO
#define MTDPARTS_DEFAULT \
diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index 7f6cb93..a6973c5 100644
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -182,7 +182,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00800000
#define CONFIG_SYS_MEMTEST_END 0x04000000
#define CONFIG_SYS_MALLOC_LEN (1024*1024)
-#define CONFIG_IDENT_STRING "-SPEAr"
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_CBSIZE 256
diff --git a/include/configs/spear3xx_evb.h b/include/configs/spear3xx_evb.h
index 8090bc8..dd73a4d 100644
--- a/include/configs/spear3xx_evb.h
+++ b/include/configs/spear3xx_evb.h
@@ -12,22 +12,19 @@
* High Level Configuration Options
* (easy to change)
*/
-#if defined(CONFIG_spear300)
+#if defined(CONFIG_SPEAR300)
#define CONFIG_SPEAR3XX
-#define CONFIG_SPEAR300
-#elif defined(CONFIG_spear310)
+#elif defined(CONFIG_SPEAR310)
#define CONFIG_SPEAR3XX
-#define CONFIG_SPEAR310
-#elif defined(CONFIG_spear320)
+#elif defined(CONFIG_SPEAR320)
#define CONFIG_SPEAR3XX
-#define CONFIG_SPEAR320
#endif
-#if defined(CONFIG_usbtty)
+#if defined(CONFIG_USBTTY)
#define CONFIG_SPEAR_USBTTY
#endif
-#if defined(CONFIG_nand)
+#if defined(CONFIG_NAND)
#define CONFIG_ENV_IS_IN_NAND
#else
#define CONFIG_ENV_IS_IN_FLASH
diff --git a/include/configs/spear6xx_evb.h b/include/configs/spear6xx_evb.h
index 28dddcc..7745247 100644
--- a/include/configs/spear6xx_evb.h
+++ b/include/configs/spear6xx_evb.h
@@ -12,13 +12,11 @@
* High Level Configuration Options
* (easy to change)
*/
-#define CONFIG_SPEAR600
-
-#if defined(CONFIG_usbtty)
+#if defined(CONFIG_USBTTY)
#define CONFIG_SPEAR_USBTTY
#endif
-#if defined(CONFIG_nand)
+#if defined(CONFIG_NAND)
#define CONFIG_ENV_IS_IN_NAND
#else
#define CONFIG_ENV_IS_IN_FLASH
diff --git a/include/configs/spring.h b/include/configs/spring.h
index 8940123..d8c9b4a 100644
--- a/include/configs/spring.h
+++ b/include/configs/spring.h
@@ -13,7 +13,6 @@
#define CONFIG_BOARD_COMMON
-#define CONFIG_IDENT_STRING " for spring"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
#endif /* __CONFIG_SPRING_H */
diff --git a/include/configs/strider.h b/include/configs/strider.h
index 5fabbad..5cd37d7 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -20,16 +20,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFE000000
-#ifdef CONFIG_STRIDER_CPU_DP
-#define CONFIG_IDENT_STRING " strider cpu dp 0.01"
-#elif defined(CONFIG_STRIDER_CPU)
-#define CONFIG_IDENT_STRING " strider cpu 0.01"
-#elif defined(CONFIG_STRIDER_CON_DP)
-#define CONFIG_IDENT_STRING " strider con dp 0.01"
-#else
-#define CONFIG_IDENT_STRING " strider con 0.01"
-#endif
-
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_LAST_STAGE_INIT
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 708ab17..deb2e8d 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -134,13 +134,11 @@
#ifdef CONFIG_NAND_SUNXI
#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
-#define CONFIG_SPL_NAND_SUPPORT 1
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 8
#endif
#ifdef CONFIG_SPL_SPI_SUNXI
-#define CONFIG_SPL_SPI_FLASH_SUPPORT 1
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
#endif
@@ -180,7 +178,6 @@
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
-#define CONFIG_IDENT_STRING " Allwinner Technology"
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
@@ -189,9 +186,6 @@
#define CONFIG_FAT_WRITE /* enable write access */
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_BOARD_LOAD_IMAGE
@@ -206,12 +200,6 @@
#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */
#endif
-#define CONFIG_SPL_LIBDISK_SUPPORT
-
-#ifdef CONFIG_MMC
-#define CONFIG_SPL_MMC_SUPPORT
-#endif
-
#ifndef CONFIG_ARM64
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
#endif
@@ -232,7 +220,6 @@
/* I2C */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
defined CONFIG_SY8106A_POWER
-#define CONFIG_SPL_I2C_SUPPORT
#endif
#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
@@ -266,7 +253,6 @@
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
defined CONFIG_SY8106A_POWER
-#define CONFIG_SPL_POWER_SUPPORT
#endif
#ifndef CONFIG_CONS_INDEX
@@ -293,7 +279,6 @@
/* GPIO */
#define CONFIG_SUNXI_GPIO
-#define CONFIG_SPL_GPIO_SUPPORT
#ifdef CONFIG_VIDEO
/*
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index a63db65..61c563e 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -201,16 +201,6 @@
#define CONFIG_SPL_NAND_SOFTECC
#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
@@ -260,7 +250,6 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 696ca32..176f544 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -288,19 +288,9 @@
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_OMAP3_ID_NAND
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 2c41dd8..af0b841 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -143,8 +143,6 @@
#if defined(CONFIG_SPL_BUILD)
/* SPL related */
#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
@@ -258,14 +256,8 @@
#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_USE_NANDFLASH 1
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 7b0940a..29614e0 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -122,11 +122,6 @@
CONFIG_SPL_TEXT_BASE)
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 8bbf879..d27ab9c 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -149,14 +149,7 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
/* SPL related SPI defines */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1a000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
diff --git a/include/configs/thuban.h b/include/configs/thuban.h
index 25ac2cb..8d7b280 100644
--- a/include/configs/thuban.h
+++ b/include/configs/thuban.h
@@ -44,10 +44,6 @@
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300
-#undef CONFIG_SPL_NET_SUPPORT
-#undef CONFIG_SPL_NET_VCI_STRING
-#undef CONFIG_SPL_ETH_SUPPORT
-
#undef CONFIG_MII
#undef CONFIG_PHY_GIGE
#define CONFIG_PHY_SMSC
diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h
index 5c3b3da..4387082 100644
--- a/include/configs/thunderx_88xx.h
+++ b/include/configs/thunderx_88xx.h
@@ -15,9 +15,6 @@
#define CONFIG_SYS_NO_FLASH
-#define CONFIG_IDENT_STRING \
- " for Cavium Thunder CN88XX ARM v8 Multi-Core"
-
#define MEM_BASE 0x00500000
#define CONFIG_SYS_LOWMEM_BASE MEM_BASE
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index 82ab479..22a8e4f 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -166,15 +166,7 @@
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index e3cd647..b3215a2 100644
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -132,15 +132,7 @@
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
index 9a671de..6b63fd2 100644
--- a/include/configs/ti_am335x_common.h
+++ b/include/configs/ti_am335x_common.h
@@ -62,7 +62,6 @@
(128 << 20))
/* Enable the watchdog inside of SPL */
-#define CONFIG_SPL_WATCHDOG_SUPPORT
/*
* Since SPL did pll and ddr initialization for us,
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index 32cb202..d8a8c4a 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -260,30 +260,15 @@
#define CONFIG_CMD_SPL
#endif
-#ifdef CONFIG_MMC
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_EXT_SUPPORT
-#endif
-
#define CONFIG_SYS_THUMB_BUILD
/* General parts of the framework, required. */
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_BOARD_INIT
#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_MTD_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#endif
#endif /* !CONFIG_NOR_BOOT */
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index c8df48a..9c0614e 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -54,8 +54,6 @@
CONFIG_SYS_SPL_MALLOC_SIZE + \
SPL_MALLOC_F_SIZE + \
CONFIG_SPL_STACK_SIZE - 4)
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
-#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
@@ -206,7 +204,6 @@
/* U-Boot command configuration */
#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_EEPROM
@@ -307,15 +304,10 @@
#undef CONFIG_SPL_OS_BOOT
/* We do not have MMC support.. yet.. */
-#undef CONFIG_SPL_LIBDISK_SUPPORT
-#undef CONFIG_SPL_MMC_SUPPORT
-#undef CONFIG_SPL_FAT_SUPPORT
-#undef CONFIG_SPL_EXT_SUPPORT
#undef CONFIG_MMC
#undef CONFIG_GENERIC_MMC
/* And no support for GPIO, yet.. */
-#undef CONFIG_SPL_GPIO_SUPPORT
/* we may include files below only after all above definitions */
#include <asm/arch/hardware.h>
diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index 33426c8..d607f40 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -69,7 +69,6 @@
/* SPL */
#define CONFIG_SPL_TEXT_BASE 0x40200800
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
-#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(64 << 20))
diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index 8c88ebf..4115c78 100644
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -164,7 +164,6 @@
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
#undef CONFIG_SYS_I2C
#undef CONFIG_SYS_I2C_OMAP24XX
-#undef CONFIG_SPL_I2C_SUPPORT
#endif
#endif /* __CONFIG_TI_OMAP4_COMMON_H */
diff --git a/include/configs/titanium.h b/include/configs/titanium.h
index f550aab..bbdaf04 100644
--- a/include/configs/titanium.h
+++ b/include/configs/titanium.h
@@ -197,7 +197,6 @@
#define CONFIG_MTD_PARTITIONS
#define CONFIG_RBTREE
#define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#endif /* __CONFIG_H */
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 3173dc0..029eddd 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -12,11 +12,6 @@
#include <linux/kconfig.h>
/* SPL */
/* #if defined(CONFIG_SPL_BUILD) */
-
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-
/* common IMX6 SPL configuration */
#include "imx6_spl.h"
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index e5d321a..c1c9495 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -146,7 +146,6 @@
#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
-#define CONFIG_CMD_UBI /* UBI commands */
#define CONFIG_CMD_UBIFS /* UBIFS commands */
#define CONFIG_LZO /* LZO is needed for UBIFS */
@@ -319,19 +318,9 @@
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
diff --git a/include/configs/udoo.h b/include/configs/udoo.h
index fba78d0..0a7767c 100644
--- a/include/configs/udoo.h
+++ b/include/configs/udoo.h
@@ -11,8 +11,6 @@
#include "mx6_common.h"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h"
#define MACH_TYPE_UDOO 4800
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index b3ca46b..29be00a 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -31,9 +31,6 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_MISC_INIT_F
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
@@ -277,18 +274,10 @@
#define CONFIG_PANIC_HANG
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_NOR_SUPPORT
#ifdef CONFIG_ARM64
#define CONFIG_SPL_BOARD_LOAD_IMAGE
-#else
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#endif
-#define CONFIG_SPL_LIBCOMMON_SUPPORT /* for mem_malloc_init */
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000
diff --git a/include/configs/vct.h b/include/configs/vct.h
index 168902c..f2e0e5c 100644
--- a/include/configs/vct.h
+++ b/include/configs/vct.h
@@ -246,7 +246,6 @@
#if defined(CONFIG_VCT_ONENAND)
#define CONFIG_SYS_USE_UBI
#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
#define CONFIG_MTD_PARTITIONS
diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
index 71c4a1f..48834c2 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -19,8 +19,6 @@
#define CONFIG_SUPPORT_RAW_INITRD
-#define CONFIG_IDENT_STRING " vexpress_aemv8a"
-
/* Link Definitions */
#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index 33f966a..03586f0 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -49,7 +49,6 @@
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
/* UBI */
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 295f834..69d0fd5 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -12,8 +12,6 @@
#include <config_distro_defaults.h>
#include "mx6_common.h"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h"
#define MACH_TYPE_WANDBOARD 4412
diff --git a/include/configs/woodburn_sd.h b/include/configs/woodburn_sd.h
index 25bfeef..5a04b99 100644
--- a/include/configs/woodburn_sd.h
+++ b/include/configs/woodburn_sd.h
@@ -22,15 +22,9 @@
*/
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm1136/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x100 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 /* 512 KB */
-#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0x10002300
#define CONFIG_SPL_MAX_SIZE (64 * 1024) /* 8 KB for stack */
diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index b2103b4..ff39c31 100644
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -188,12 +188,8 @@
#define CONFIG_SPL_BOARD_INIT
/* Use the framework and generic lib */
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
/* SPL will use serial */
-#define CONFIG_SPL_SERIAL_SUPPORT
/* SPL will load U-Boot from NAND offset 0x40000 */
-#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_BOOT
diff --git a/include/configs/x600.h b/include/configs/x600.h
index 4af6b67..f15b1f9 100644
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -115,7 +115,6 @@
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_NAND
#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_LZO
@@ -148,7 +147,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00800000
#define CONFIG_SYS_MEMTEST_END 0x04000000
#define CONFIG_SYS_MALLOC_LEN (8 << 20)
-#define CONFIG_IDENT_STRING "-SPEAr"
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
@@ -267,10 +265,6 @@
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NOR_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT /* image.c */
-#define CONFIG_SPL_LIBGENERIC_SUPPORT /* string.c */
/*
* Please select/define only one of the following
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 02f0e4c..5ed8beb 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -34,10 +34,6 @@
/* Have release address at the end of 256MB for now */
#define CPU_RELEASE_ADDR 0xFFFFFF0
-#if !defined(CONFIG_IDENT_STRING)
-# define CONFIG_IDENT_STRING " Xilinx ZynqMP"
-#endif
-
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
@@ -79,7 +75,9 @@
/* Diff from config_distro_defaults.h */
#define CONFIG_SUPPORT_RAW_INITRD
+#if !defined(CONFIG_SPL_BUILD)
#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#endif
#define CONFIG_AUTO_COMPLETE
/* PXE */
@@ -112,7 +110,7 @@
#define CONFIG_SYS_LOAD_ADDR 0x8000000
#if defined(CONFIG_ZYNQMP_USB)
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_XHCI_ZYNQMP
@@ -140,7 +138,6 @@
# define DFU_ALT_INFO
#endif
-
#define CONFIG_BOARD_LATE_INIT
/* Do not preserve environment */
@@ -189,7 +186,6 @@
#endif
#ifdef CONFIG_SATA_CEVA
-#define CONFIG_AHCI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
@@ -251,18 +247,26 @@
DFU_ALT_INFO
#endif
+/* SPL can't handle all huge variables - define just DFU */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT)
+#undef CONFIG_EXTRA_ENV_SETTINGS
+# define CONFIG_EXTRA_ENV_SETTINGS \
+ "dfu_alt_info_ram=uboot.bin ram 0x8000000 0x1000000;" \
+ "atf-uboot.ub ram 0x10000000 0x1000000;" \
+ "Image ram 0x80000 0x3f80000;" \
+ "system.dtb ram 0x4000000 0x100000\0" \
+ "dfu_bufsiz=0x1000\0"
+#endif
+
#define CONFIG_SPL_TEXT_BASE 0xfffc0000
#define CONFIG_SPL_STACK 0xfffffffc
-#define CONFIG_SPL_MAX_SIZE 0x20000
+#define CONFIG_SPL_MAX_SIZE 0x40000
/* Just random location in OCM */
-#define CONFIG_SPL_BSS_START_ADDR 0x1000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x2000000
+#define CONFIG_SPL_BSS_START_ADDR 0x0
+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_RAM_DEVICE
@@ -272,21 +276,32 @@
#define CONFIG_SYS_SPL_ARGS_ADDR 0x8000000
/* ATF is my kernel image */
-#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "atf.ub"
+#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "atf-uboot.ub"
/* FIT load address for RAM boot */
#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
/* MMC support */
#ifdef CONFIG_ZYNQ_SDHCI
-# define CONFIG_SPL_MMC_SUPPORT
# define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */
# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */
# define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* unused */
-# define CONFIG_SPL_LIBDISK_SUPPORT
-# define CONFIG_SPL_FAT_SUPPORT
# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#endif
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT)
+# undef CONFIG_CMD_BOOTD
+# define CONFIG_SPL_ENV_SUPPORT
+# define CONFIG_SPL_HASH_SUPPORT
+# define CONFIG_ENV_MAX_ENTRIES 10
+
+# define CONFIG_SYS_SPL_MALLOC_START 0x20000000
+# define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000000
+
+#ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE
+# error "Disable CONFIG_SPL_SYS_MALLOC_SIMPLE. Full malloc needs to be used"
+#endif
+#endif
+
#endif /* __XILINX_ZYNQMP_H */
diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h
index 44434aa..8e4b960 100644
--- a/include/configs/xilinx_zynqmp_ep.h
+++ b/include/configs/xilinx_zynqmp_ep.h
@@ -16,7 +16,6 @@
#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9)
#define CONFIG_ZYNQ_EEPROM
-#define CONFIG_AHCI
#define CONFIG_SATA_CEVA
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
ZYNQMP_USB1_XHCI_BASEADDR}
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
index c9f4432..b19a552 100644
--- a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
+++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
@@ -15,8 +15,6 @@
#define CONFIG_AHCI
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
-#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm015 dc1"
-
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h
index 526d0bb..0714d72 100644
--- a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h
+++ b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h
@@ -12,8 +12,6 @@
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB1_XHCI_BASEADDR}
-#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm016 dc2"
-
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h b/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h
deleted file mode 100644
index 65277a6..0000000
--- a/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Configuration for Xilinx ZynqMP zc1751 XM018 DC4
- *
- * (C) Copyright 2015 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H
-#define __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H
-
-#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm018 dc4"
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
index 76350d9..6a0e397 100644
--- a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
+++ b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
@@ -13,8 +13,6 @@
#define CONFIG_ZYNQ_SDHCI0
-#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm019 dc5"
-
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */
diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h
index 7ceab32..adf2321 100644
--- a/include/configs/xilinx_zynqmp_zcu102.h
+++ b/include/configs/xilinx_zynqmp_zcu102.h
@@ -45,8 +45,6 @@
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
-#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZCU102"
-
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_CMD_EEPROM
#define CONFIG_ZYNQ_EEPROM_BUS 5
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
index 26be337..dd28e6a 100644
--- a/include/configs/xpress.h
+++ b/include/configs/xpress.h
@@ -12,8 +12,6 @@
#include <asm/imx-common/gpio.h>
/* SPL options */
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h"
#define CONFIG_DISPLAY_CPUINFO
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 5f7fefd..260df2f 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -293,9 +293,6 @@
/* SPL part */
#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_RAM_DEVICE
@@ -303,12 +300,9 @@
/* MMC support */
#ifdef CONFIG_ZYNQ_SDHCI
-#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#endif
@@ -331,9 +325,7 @@
/* qspi mode is working fine */
#ifdef CONFIG_ZYNQ_QSPI
-#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
diff --git a/include/dt-bindings/clock/boston-clock.h b/include/dt-bindings/clock/boston-clock.h
new file mode 100644
index 0000000..25f9cd2
--- /dev/null
+++ b/include/dt-bindings/clock/boston-clock.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__
+#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__
+
+#define BOSTON_CLK_SYS 0
+#define BOSTON_CLK_CPU 1
+
+#endif /* __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__ */
diff --git a/include/dt-bindings/interrupt-controller/mips-gic.h b/include/dt-bindings/interrupt-controller/mips-gic.h
new file mode 100644
index 0000000..cf35a57
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/mips-gic.h
@@ -0,0 +1,9 @@
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+#define GIC_SHARED 0
+#define GIC_LOCAL 1
+
+#endif
diff --git a/include/errno.h b/include/errno.h
index 15ece2f..e0c670a 100644
--- a/include/errno.h
+++ b/include/errno.h
@@ -7,7 +7,7 @@
#ifndef _ERRNO_H
#define _ERRNO_H
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
extern int errno;
diff --git a/include/ext4fs.h b/include/ext4fs.h
index 13d2c56..965cd9e 100644
--- a/include/ext4fs.h
+++ b/include/ext4fs.h
@@ -28,6 +28,7 @@
#define __EXT4__
#include <ext_common.h>
+#define EXT4_INDEX_FL 0x00001000 /* Inode uses hash tree index */
#define EXT4_EXTENTS_FL 0x00080000 /* Inode uses extents */
#define EXT4_EXT_MAGIC 0xf30a
#define EXT4_FEATURE_RO_COMPAT_GDT_CSUM 0x0010
@@ -86,6 +87,8 @@
uint32_t inodesz;
/* Sectors per Block */
uint32_t sect_perblk;
+ /* Group Descriptor size */
+ uint16_t gdsize;
/* Group Descriptor Block Number */
uint32_t gdtable_blkno;
/* Total block groups of partition */
@@ -95,7 +98,6 @@
/* Superblock */
struct ext2_sblock *sb;
/* Block group descritpor table */
- struct ext2_block_group *bgd;
char *gdtable;
/* Block Bitmap Related */
@@ -124,7 +126,7 @@
int ext4fs_init(void);
void ext4fs_deinit(void);
-int ext4fs_filename_check(char *filename);
+int ext4fs_filename_unlink(char *filename);
int ext4fs_write(const char *fname, unsigned char *buffer,
unsigned long sizebytes);
int ext4_write_file(const char *filename, void *buf, loff_t offset, loff_t len,
diff --git a/include/ext_common.h b/include/ext_common.h
index 6cddf16..07b61fa 100644
--- a/include/ext_common.h
+++ b/include/ext_common.h
@@ -49,11 +49,9 @@
#define EXT2_BLOCK_SIZE(data) (1 << LOG2_BLOCK_SIZE(data))
/* Log2 size of ext2 block in bytes. */
-#define LOG2_BLOCK_SIZE(data) (__le32_to_cpu \
+#define LOG2_BLOCK_SIZE(data) (le32_to_cpu \
(data->sblock.log2_block_size) \
+ EXT2_MIN_BLOCK_LOG_SIZE)
-#define INODE_SIZE_FILESYSTEM(data) (__le32_to_cpu \
- (data->sblock.inode_size))
#define EXT2_FT_DIR 2
#define SUCCESS 1
@@ -66,92 +64,134 @@
/* The ext2 superblock. */
struct ext2_sblock {
- uint32_t total_inodes;
- uint32_t total_blocks;
- uint32_t reserved_blocks;
- uint32_t free_blocks;
- uint32_t free_inodes;
- uint32_t first_data_block;
- uint32_t log2_block_size;
- uint32_t log2_fragment_size;
- uint32_t blocks_per_group;
- uint32_t fragments_per_group;
- uint32_t inodes_per_group;
- uint32_t mtime;
- uint32_t utime;
- uint16_t mnt_count;
- uint16_t max_mnt_count;
- uint16_t magic;
- uint16_t fs_state;
- uint16_t error_handling;
- uint16_t minor_revision_level;
- uint32_t lastcheck;
- uint32_t checkinterval;
- uint32_t creator_os;
- uint32_t revision_level;
- uint16_t uid_reserved;
- uint16_t gid_reserved;
- uint32_t first_inode;
- uint16_t inode_size;
- uint16_t block_group_number;
- uint32_t feature_compatibility;
- uint32_t feature_incompat;
- uint32_t feature_ro_compat;
- uint32_t unique_id[4];
+ __le32 total_inodes;
+ __le32 total_blocks;
+ __le32 reserved_blocks;
+ __le32 free_blocks;
+ __le32 free_inodes;
+ __le32 first_data_block;
+ __le32 log2_block_size;
+ __le32 log2_fragment_size;
+ __le32 blocks_per_group;
+ __le32 fragments_per_group;
+ __le32 inodes_per_group;
+ __le32 mtime;
+ __le32 utime;
+ __le16 mnt_count;
+ __le16 max_mnt_count;
+ __le16 magic;
+ __le16 fs_state;
+ __le16 error_handling;
+ __le16 minor_revision_level;
+ __le32 lastcheck;
+ __le32 checkinterval;
+ __le32 creator_os;
+ __le32 revision_level;
+ __le16 uid_reserved;
+ __le16 gid_reserved;
+ __le32 first_inode;
+ __le16 inode_size;
+ __le16 block_group_number;
+ __le32 feature_compatibility;
+ __le32 feature_incompat;
+ __le32 feature_ro_compat;
+ __le32 unique_id[4];
char volume_name[16];
char last_mounted_on[64];
- uint32_t compression_info;
+ __le32 compression_info;
+ uint8_t prealloc_blocks;
+ uint8_t prealloc_dir_blocks;
+ __le16 reserved_gdt_blocks;
+ uint8_t journal_uuid[16];
+ __le32 journal_inode;
+ __le32 journal_dev;
+ __le32 last_orphan;
+ __le32 hash_seed[4];
+ uint8_t default_hash_version;
+ uint8_t journal_backup_type;
+ __le16 descriptor_size;
+ __le32 default_mount_options;
+ __le32 first_meta_block_group;
+ __le32 mkfs_time;
+ __le32 journal_blocks[17];
+ __le32 total_blocks_high;
+ __le32 reserved_blocks_high;
+ __le32 free_blocks_high;
+ __le16 min_extra_inode_size;
+ __le16 want_extra_inode_size;
+ __le32 flags;
+ __le16 raid_stride;
+ __le16 mmp_interval;
+ __le64 mmp_block;
+ __le32 raid_stripe_width;
+ uint8_t log2_groups_per_flex;
+ uint8_t checksum_type;
};
struct ext2_block_group {
- __u32 block_id; /* Blocks bitmap block */
- __u32 inode_id; /* Inodes bitmap block */
- __u32 inode_table_id; /* Inodes table block */
- __u16 free_blocks; /* Free blocks count */
- __u16 free_inodes; /* Free inodes count */
- __u16 used_dir_cnt; /* Directories count */
- __u16 bg_flags;
- __u32 bg_reserved[2];
- __u16 bg_itable_unused; /* Unused inodes count */
- __u16 bg_checksum; /* crc16(s_uuid+grouo_num+group_desc)*/
+ __le32 block_id; /* Blocks bitmap block */
+ __le32 inode_id; /* Inodes bitmap block */
+ __le32 inode_table_id; /* Inodes table block */
+ __le16 free_blocks; /* Free blocks count */
+ __le16 free_inodes; /* Free inodes count */
+ __le16 used_dir_cnt; /* Directories count */
+ __le16 bg_flags;
+ __le32 bg_exclude_bitmap;
+ __le16 bg_block_id_csum;
+ __le16 bg_inode_id_csum;
+ __le16 bg_itable_unused; /* Unused inodes count */
+ __le16 bg_checksum; /* crc16(s_uuid+group_num+group_desc)*/
+ /* following fields only exist if descriptor size is 64 */
+ __le32 block_id_high;
+ __le32 inode_id_high;
+ __le32 inode_table_id_high;
+ __le16 free_blocks_high;
+ __le16 free_inodes_high;
+ __le16 used_dir_cnt_high;
+ __le16 bg_itable_unused_high;
+ __le32 bg_exclude_bitmap_high;
+ __le16 bg_block_id_csum_high;
+ __le16 bg_inode_id_csum_high;
+ __le32 bg_reserved;
};
/* The ext2 inode. */
struct ext2_inode {
- uint16_t mode;
- uint16_t uid;
- uint32_t size;
- uint32_t atime;
- uint32_t ctime;
- uint32_t mtime;
- uint32_t dtime;
- uint16_t gid;
- uint16_t nlinks;
- uint32_t blockcnt; /* Blocks of 512 bytes!! */
- uint32_t flags;
- uint32_t osd1;
+ __le16 mode;
+ __le16 uid;
+ __le32 size;
+ __le32 atime;
+ __le32 ctime;
+ __le32 mtime;
+ __le32 dtime;
+ __le16 gid;
+ __le16 nlinks;
+ __le32 blockcnt; /* Blocks of either 512 or block_size bytes */
+ __le32 flags;
+ __le32 osd1;
union {
struct datablocks {
- uint32_t dir_blocks[INDIRECT_BLOCKS];
- uint32_t indir_block;
- uint32_t double_indir_block;
- uint32_t triple_indir_block;
+ __le32 dir_blocks[INDIRECT_BLOCKS];
+ __le32 indir_block;
+ __le32 double_indir_block;
+ __le32 triple_indir_block;
} blocks;
char symlink[60];
+ char inline_data[60];
} b;
- uint32_t version;
- uint32_t acl;
- uint32_t dir_acl;
- uint32_t fragment_addr;
- uint32_t osd2[3];
+ __le32 version;
+ __le32 acl;
+ __le32 size_high; /* previously dir_acl, but never used */
+ __le32 fragment_addr;
+ __le32 osd2[3];
};
/* The header of an ext2 directory entry. */
struct ext2_dirent {
- uint32_t inode;
- uint16_t direntlen;
- uint8_t namelen;
- uint8_t filetype;
+ __le32 inode;
+ __le16 direntlen;
+ __u8 namelen;
+ __u8 filetype;
};
struct ext2fs_node {
diff --git a/include/fat.h b/include/fat.h
index 9d053e6..8ec91cd 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -169,6 +169,7 @@
int fatsize; /* Size of FAT in bits */
__u32 fatlength; /* Length of FAT in sectors */
__u16 fat_sect; /* Starting sector of the FAT */
+ __u8 fat_dirty; /* Set if fatbuf has been modified */
__u32 rootdir_sect; /* Start sector of root directory */
__u16 sect_size; /* Size of sectors in bytes */
__u16 clust_size; /* Size of clusters in sectors */
diff --git a/include/fdtdec.h b/include/fdtdec.h
index aeb6bab..27887c8 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -148,7 +148,6 @@
COMPAT_INTEL_MICROCODE, /* Intel microcode update */
COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */
COMPAT_INTEL_QRK_MRC, /* Intel Quark MRC */
- COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */
COMPAT_ALTERA_SOCFPGA_DWMAC, /* SoCFPGA Ethernet controller */
COMPAT_ALTERA_SOCFPGA_DWMMC, /* SoCFPGA DWMMC controller */
COMPAT_ALTERA_SOCFPGA_DWC2USB, /* SoCFPGA DWC2 USB controller */
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index c6f4666..e15d3ae 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -10,7 +10,7 @@
#ifndef __FSL_ESDHC_H__
#define __FSL_ESDHC_H__
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/byteorder.h>
/* needed for the mmc_cfg definition */
diff --git a/include/hwconfig.h b/include/hwconfig.h
index def7ad0..d30421d 100644
--- a/include/hwconfig.h
+++ b/include/hwconfig.h
@@ -13,7 +13,7 @@
#define _HWCONFIG_H
#include <linux/types.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#ifdef CONFIG_HWCONFIG
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 7236b8d..c7fd649 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -151,8 +151,6 @@
typedef unsigned long blkcnt_t;
#endif
-#define ENOTSUPP 524 /* Operation is not supported */
-
/* module */
#define THIS_MODULE 0
#define try_module_get(...) 1
diff --git a/include/linux/err.h b/include/linux/err.h
index 5b3c8bc..e4d22d5 100644
--- a/include/linux/err.h
+++ b/include/linux/err.h
@@ -4,7 +4,7 @@
#include <linux/compiler.h>
#include <linux/compat.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
/*
diff --git a/include/asm-generic/errno.h b/include/linux/errno.h
similarity index 73%
rename from include/asm-generic/errno.h
rename to include/linux/errno.h
index 464cfb7..3d94207 100644
--- a/include/asm-generic/errno.h
+++ b/include/linux/errno.h
@@ -1,23 +1,15 @@
-/*
- * U-Boot - errno.h Error number defines
- *
- * Copyright (c) 2005-2007 Analog Devices Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef _LINUX_ERRNO_H
+#define _LINUX_ERRNO_H
-#ifndef _GENERIC_ERRNO_H
-#define _GENERIC_ERRNO_H
-
-#define EPERM 1 /* Operation not permitted */
-#define ENOENT 2 /* No such file or directory */
-#define ESRCH 3 /* No such process */
-#define EINTR 4 /* Interrupted system call */
-#define EIO 5 /* I/O error */
-#define ENXIO 6 /* No such device or address */
-#define E2BIG 7 /* Argument list too long */
-#define ENOEXEC 8 /* Exec format error */
-#define EBADF 9 /* Bad file number */
+#define EPERM 1 /* Operation not permitted */
+#define ENOENT 2 /* No such file or directory */
+#define ESRCH 3 /* No such process */
+#define EINTR 4 /* Interrupted system call */
+#define EIO 5 /* I/O error */
+#define ENXIO 6 /* No such device or address */
+#define E2BIG 7 /* Argument list too long */
+#define ENOEXEC 8 /* Exec format error */
+#define EBADF 9 /* Bad file number */
#define ECHILD 10 /* No child processes */
#define EAGAIN 11 /* Try again */
#define ENOMEM 12 /* Out of memory */
@@ -43,10 +35,13 @@
#define EPIPE 32 /* Broken pipe */
#define EDOM 33 /* Math argument out of domain of func */
#define ERANGE 34 /* Math result not representable */
+
#define EDEADLK 35 /* Resource deadlock would occur */
#define ENAMETOOLONG 36 /* File name too long */
#define ENOLCK 37 /* No record locks available */
-#define ENOSYS 38 /* Function not implemented */
+
+#define ENOSYS 38 /* Invalid system call number */
+
#define ENOTEMPTY 39 /* Directory not empty */
#define ELOOP 40 /* Too many symbolic links encountered */
#define EWOULDBLOCK EAGAIN /* Operation would block */
@@ -126,14 +121,48 @@
#define EHOSTUNREACH 113 /* No route to host */
#define EALREADY 114 /* Operation already in progress */
#define EINPROGRESS 115 /* Operation now in progress */
-#define ESTALE 116 /* Stale NFS file handle */
+#define ESTALE 116 /* Stale file handle */
#define EUCLEAN 117 /* Structure needs cleaning */
#define ENOTNAM 118 /* Not a XENIX named type file */
#define ENAVAIL 119 /* No XENIX semaphores available */
#define EISNAM 120 /* Is a named type file */
#define EREMOTEIO 121 /* Remote I/O error */
#define EDQUOT 122 /* Quota exceeded */
+
#define ENOMEDIUM 123 /* No medium found */
#define EMEDIUMTYPE 124 /* Wrong medium type */
+#define ECANCELED 125 /* Operation Canceled */
+#define ENOKEY 126 /* Required key not available */
+#define EKEYEXPIRED 127 /* Key has expired */
+#define EKEYREVOKED 128 /* Key has been revoked */
+#define EKEYREJECTED 129 /* Key was rejected by service */
+
+/* for robust mutexes */
+#define EOWNERDEAD 130 /* Owner died */
+#define ENOTRECOVERABLE 131 /* State not recoverable */
+
+#define ERFKILL 132 /* Operation not possible due to RF-kill */
+
+#define EHWPOISON 133 /* Memory page has hardware error */
+
+#define ERESTARTSYS 512
+#define ERESTARTNOINTR 513
+#define ERESTARTNOHAND 514 /* restart if no handler.. */
+#define ENOIOCTLCMD 515 /* No ioctl command */
+#define ERESTART_RESTARTBLOCK 516 /* restart by calling sys_restart_syscall */
+#define EPROBE_DEFER 517 /* Driver requests probe retry */
+#define EOPENSTALE 518 /* open found a stale dentry */
+
+/* Defined for the NFSv3 protocol */
+#define EBADHANDLE 521 /* Illegal NFS file handle */
+#define ENOTSYNC 522 /* Update synchronization mismatch */
+#define EBADCOOKIE 523 /* Cookie is stale */
+#define ENOTSUPP 524 /* Operation is not supported */
+#define ETOOSMALL 525 /* Buffer or request is too small */
+#define ESERVERFAULT 526 /* An untranslatable error occurred */
+#define EBADTYPE 527 /* Type not supported by server */
+#define EJUKEBOX 528 /* Request initiated, but will not complete before timeout */
+#define EIOCBQUEUED 529 /* iocb queued, will get completion event */
+#define ERECALLCONFLICT 530 /* conflict with recalled state */
#endif
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 779eea0..1fd17c3 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -20,7 +20,7 @@
#else
#include <linux/compat.h>
#include <mtd/mtd-abi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <div64.h>
#define MAX_MTD_DEVICES 32
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 87d72db..d55807b 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -16,12 +16,12 @@
#ifndef __LINUX_MTD_NAND_H
#define __LINUX_MTD_NAND_H
-#include "config.h"
+#include <config.h>
-#include "linux/compat.h"
-#include "linux/mtd/mtd.h"
-#include "linux/mtd/flashchip.h"
-#include "linux/mtd/bbm.h"
+#include <linux/compat.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/flashchip.h>
+#include <linux/mtd/bbm.h>
struct mtd_info;
struct nand_flash_dev;
diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h
index 6d1e365..a027446 100644
--- a/include/linux/usb/dwc3.h
+++ b/include/linux/usb/dwc3.h
@@ -180,7 +180,21 @@
/* Global USB2 PHY Configuration Register */
#define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30)
+#define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8)
#define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6)
+#define DWC3_GUSB2PHYCFG_PHYIF (1 << 3)
+
+/* Global USB2 PHY Configuration Mask */
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK (0xf << 10)
+
+/* Global USB2 PHY Configuration Offset */
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET 10
+
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
+ DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
+ DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET)
/* Global USB3 PIPE Control Register */
#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
diff --git a/include/mmc.h b/include/mmc.h
index aa6d5d1..e815eb3 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -11,6 +11,7 @@
#define _MMC_H_
#include <linux/list.h>
+#include <linux/sizes.h>
#include <linux/compiler.h>
#include <part.h>
@@ -102,6 +103,7 @@
#define SD_CMD_SWITCH_UHS18V 11
#define SD_CMD_APP_SET_BUS_WIDTH 6
+#define SD_CMD_APP_SD_STATUS 13
#define SD_CMD_ERASE_WR_BLK_START 32
#define SD_CMD_ERASE_WR_BLK_END 33
#define SD_CMD_APP_SEND_OP_COND 41
@@ -392,6 +394,12 @@
unsigned char part_type;
};
+struct sd_ssr {
+ unsigned int au; /* In sectors */
+ unsigned int erase_timeout; /* In milliseconds */
+ unsigned int erase_offset; /* In milliseconds */
+};
+
/*
* With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
* with mmc_get_mmc_dev().
@@ -426,6 +434,7 @@
uint write_bl_len;
uint erase_grp_size; /* in 512-byte sectors */
uint hc_wp_grp_size; /* in 512-byte sectors */
+ struct sd_ssr ssr; /* SD status register */
u64 capacity;
u64 capacity_user;
u64 capacity_boot;
diff --git a/include/reset.h b/include/reset.h
index dc0900f..f45fcf8 100644
--- a/include/reset.h
+++ b/include/reset.h
@@ -7,6 +7,8 @@
#ifndef _RESET_H
#define _RESET_H
+#include <linux/errno.h>
+
/**
* A reset is a hardware signal indicating that a HW module (or IP block, or
* sometimes an entire off-CPU chip) reset all of its internal state to some
@@ -58,6 +60,7 @@
unsigned long id;
};
+#ifdef CONFIG_DM_RESET
/**
* reset_get_by_index - Get/request a reset signal by integer index.
*
@@ -132,4 +135,33 @@
*/
int reset_deassert(struct reset_ctl *reset_ctl);
+#else
+static inline int reset_get_by_index(struct udevice *dev, int index,
+ struct reset_ctl *reset_ctl)
+{
+ return -ENOTSUPP;
+}
+
+static inline int reset_get_by_name(struct udevice *dev, const char *name,
+ struct reset_ctl *reset_ctl)
+{
+ return -ENOTSUPP;
+}
+
+static inline int reset_free(struct reset_ctl *reset_ctl)
+{
+ return 0;
+}
+
+static inline int reset_assert(struct reset_ctl *reset_ctl)
+{
+ return 0;
+}
+
+static inline int reset_deassert(struct reset_ctl *reset_ctl)
+{
+ return 0;
+}
+#endif
+
#endif
diff --git a/include/sdhci.h b/include/sdhci.h
index 6844c73..144570f 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -97,6 +97,7 @@
#define SDHCI_DIV_MASK 0xFF
#define SDHCI_DIV_MASK_LEN 8
#define SDHCI_DIV_HI_MASK 0x300
+#define SDHCI_PROG_CLOCK_MODE 0x0020
#define SDHCI_CLOCK_CARD_EN 0x0004
#define SDHCI_CLOCK_INT_STABLE 0x0002
#define SDHCI_CLOCK_INT_EN 0x0001
@@ -242,6 +243,7 @@
unsigned int quirks;
unsigned int host_caps;
unsigned int version;
+ unsigned int clk_mul; /* Clock Multiplier value */
unsigned int clock;
struct mmc *mmc;
const struct sdhci_ops *ops;
diff --git a/include/spi.h b/include/spi.h
index ca96fa4..4c17983 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -26,12 +26,9 @@
#define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */
#define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */
#define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */
-
-/* SPI mode_rx flags */
-#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */
-#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */
-#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */
-#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */
+#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */
+#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */
+#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */
#define SPI_CONN_DUAL_SHARED (1 << 0)
@@ -61,13 +58,11 @@
* @cs: Chip select number (0..n-1)
* @max_hz: Maximum bus speed that this slave can tolerate
* @mode: SPI mode to use for this device (see SPI mode flags)
- * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags)
*/
struct dm_spi_slave_platdata {
unsigned int cs;
uint max_hz;
uint mode;
- u8 mode_rx;
};
#endif /* CONFIG_DM_SPI */
@@ -94,7 +89,6 @@
* bus (bus->seq) so does not need to be stored
* @cs: ID of the chip select connected to the slave.
* @mode: SPI mode to use for this slave (see SPI mode flags)
- * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags)
* @wordlen: Size of SPI word in number of bits
* @max_write_size: If non-zero, the maximum number of bytes which can
* be written at once, excluding command bytes.
@@ -112,7 +106,6 @@
unsigned int cs;
#endif
uint mode;
- u8 mode_rx;
unsigned int wordlen;
unsigned int max_write_size;
void *memory_map;
diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h
index 324fe72..80acbcb 100644
--- a/include/ubi_uboot.h
+++ b/include/ubi_uboot.h
@@ -32,12 +32,9 @@
#include <onenand_uboot.h>
#endif
-#include <asm/errno.h>
+#include <linux/errno.h>
/* configurable */
-#if !defined(CONFIG_MTD_UBI_WL_THRESHOLD)
-#define CONFIG_MTD_UBI_WL_THRESHOLD 4096
-#endif
#define CONFIG_MTD_UBI_BEB_RESERVE 1
/* debug options (Linux: drivers/mtd/ubi/Kconfig.debug) */
@@ -59,10 +56,6 @@
*/
#define CONFIG_MTD_UBI_MODULE
-#if !defined(CONFIG_MTD_UBI_BEB_LIMIT)
-#define CONFIG_MTD_UBI_BEB_LIMIT 20
-#endif
-
/* build.c */
#define get_device(...)
#define put_device(...)
diff --git a/include/usb/lin_gadget_compat.h b/include/usb/lin_gadget_compat.h
index 29fb166..4a01585 100644
--- a/include/usb/lin_gadget_compat.h
+++ b/include/usb/lin_gadget_compat.h
@@ -13,8 +13,6 @@
#include <linux/compat.h>
/* common */
-#define ENOTSUPP 524 /* Operation is not supported */
-
#define BITS_PER_BYTE 8
#define BITS_TO_LONGS(nr) \
DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
diff --git a/include/version.h b/include/version.h
index 777e9f6..0494309 100644
--- a/include/version.h
+++ b/include/version.h
@@ -14,10 +14,6 @@
#include "generated/version_autogenerated.h"
#endif
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING ""
-#endif
-
#define U_BOOT_VERSION_STRING U_BOOT_VERSION " (" U_BOOT_DATE " - " \
U_BOOT_TIME " " U_BOOT_TZ ")" CONFIG_IDENT_STRING
diff --git a/include/wait_bit.h b/include/wait_bit.h
index 061a2db..066e30c 100644
--- a/include/wait_bit.h
+++ b/include/wait_bit.h
@@ -11,7 +11,7 @@
#include <common.h>
#include <console.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/io.h>
/**
diff --git a/include/xilinx.h b/include/xilinx.h
index aebcb3b..d2a2ea7 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -21,6 +21,7 @@
master_selectmap, /* master SelectMap (virtex2) */
slave_selectmap, /* slave SelectMap (virtex2) */
devcfg, /* devcfg interface (zynq) */
+ csu_dma, /* csu_dma interface (zynqmp) */
max_xilinx_iface_type /* insert all new types before this */
} xilinx_iface; /* end, typedef xilinx_iface */
@@ -31,6 +32,7 @@
xilinx_virtex2, /* Virtex2 Family */
xilinx_spartan3, /* Spartan-III Family */
xilinx_zynq, /* Zynq Family */
+ xilinx_zynqmp, /* ZynqMP Family */
max_xilinx_type /* insert all new types before this */
} xilinx_family; /* end, typedef xilinx_family */
diff --git a/include/zynqmppl.h b/include/zynqmppl.h
new file mode 100644
index 0000000..542ace9
--- /dev/null
+++ b/include/zynqmppl.h
@@ -0,0 +1,24 @@
+/*
+ * (C) Copyright 2015 Xilinx, Inc,
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _ZYNQMPPL_H_
+#define _ZYNQMPPL_H_
+
+#include <xilinx.h>
+
+#define ZYNQMP_SIP_SVC_CSU_DMA_CHIPID 0xC2000018
+#define ZYNQMP_SIP_SVC_PM_FPGA_LOAD 0xC2000016
+#define ZYNQMP_FPGA_OP_INIT (1 << 0)
+#define ZYNQMP_FPGA_OP_LOAD (1 << 1)
+#define ZYNQMP_FPGA_OP_DONE (1 << 2)
+
+extern struct xilinx_fpga_op zynqmp_op;
+
+#define XILINX_ZYNQMP_DESC \
+{ xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op }
+
+#endif /* _ZYNQMPPL_H_ */
diff --git a/lib/Makefile b/lib/Makefile
index f6a8ba1..c81bfeb 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -78,11 +78,16 @@
obj-$(CONFIG_LIB_RAND) += rand.o
ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_TPL_BUILD
+SERIAL_SUPPORT := $(CONFIG_TPL_SERIAL_SUPPORT)
+else
+SERIAL_SUPPORT := $(CONFIG_SPL_SERIAL_SUPPORT)
+endif
# SPL U-Boot may use full-printf, tiny-printf or none at all
ifdef CONFIG_USE_TINY_PRINTF
-obj-$(CONFIG_SPL_SERIAL_SUPPORT) += tiny-printf.o panic.o strto.o
+obj-$(SERIAL_SUPPORT) += tiny-printf.o panic.o strto.o
else
-obj-$(CONFIG_SPL_SERIAL_SUPPORT) += vsprintf.o panic.o strto.o strmhz.o
+obj-$(SERIAL_SUPPORT) += vsprintf.o panic.o strto.o strmhz.o
endif
else
# Main U-Boot always uses the full printf support
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index e638ca5..4defb90 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -59,7 +59,6 @@
COMPAT(INTEL_MICROCODE, "intel,microcode"),
COMPAT(AMS_AS3722, "ams,as3722"),
COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
- COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
diff --git a/lib/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index e7321cc..47447b2 100644
--- a/lib/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
@@ -148,17 +148,13 @@
int fdt_del_mem_rsv(void *fdt, int n)
{
struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n);
- int err;
FDT_RW_CHECK_HEADER(fdt);
if (n >= fdt_num_mem_rsv(fdt))
return -FDT_ERR_NOTFOUND;
- err = _fdt_splice_mem_rsv(fdt, re, 1, 0);
- if (err)
- return err;
- return 0;
+ return _fdt_splice_mem_rsv(fdt, re, 1, 0);
}
static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name,
diff --git a/lib/libfdt/libfdt.swig b/lib/libfdt/libfdt.swig
index 14f583d..b24c72b 100644
--- a/lib/libfdt/libfdt.swig
+++ b/lib/libfdt/libfdt.swig
@@ -75,6 +75,14 @@
}
%}
+%typemap(in) (const void *) {
+ if (!PyByteArray_Check($input)) {
+ SWIG_exception_fail(SWIG_TypeError, "in method '" "$symname" "', argument "
+ "$argnum"" of type '" "$type""'");
+ }
+ $1 = (void *) PyByteArray_AsString($input);
+}
+
const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
int fdt_path_offset(const void *fdt, const char *path);
int fdt_first_property_offset(const void *fdt, int nodeoffset);
@@ -87,3 +95,19 @@
const char *fdt_string(const void *fdt, int stroffset);
int fdt_first_subnode(const void *fdt, int offset);
int fdt_next_subnode(const void *fdt, int offset);
+
+%typemap(in) (void *) {
+ if (!PyByteArray_Check($input)) {
+ SWIG_exception_fail(SWIG_TypeError, "in method '" "$symname" "', argument "
+ "$argnum"" of type '" "$type""'");
+ }
+ $1 = PyByteArray_AsString($input);
+}
+
+int fdt_delprop(void *fdt, int nodeoffset, const char *name);
+
+const char *fdt_strerror(int errval);
+int fdt_pack(void *fdt);
+
+int fdt_totalsize(const void *fdt);
+int fdt_off_dt_struct(const void *fdt);
diff --git a/lib/rsa/rsa-checksum.c b/lib/rsa/rsa-checksum.c
index 68d9d65..db183ff 100644
--- a/lib/rsa/rsa-checksum.c
+++ b/lib/rsa/rsa-checksum.c
@@ -8,7 +8,7 @@
#include <common.h>
#include <fdtdec.h>
#include <asm/byteorder.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/unaligned.h>
#include <hash.h>
#else
diff --git a/lib/rsa/rsa-mod-exp.c b/lib/rsa/rsa-mod-exp.c
index 4a6de2b..9d78aa1 100644
--- a/lib/rsa/rsa-mod-exp.c
+++ b/lib/rsa/rsa-mod-exp.c
@@ -9,7 +9,7 @@
#include <fdtdec.h>
#include <asm/types.h>
#include <asm/byteorder.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/types.h>
#include <asm/unaligned.h>
#else
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 60126d2..442b769 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -9,7 +9,7 @@
#include <fdtdec.h>
#include <asm/types.h>
#include <asm/byteorder.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/types.h>
#include <asm/unaligned.h>
#include <dm.h>
diff --git a/net/Kconfig b/net/Kconfig
index c393269..414c549 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -45,7 +45,4 @@
default "U-Boot.arm" if ARM
default "U-Boot"
-config SPL_NET_VCI_STRING
- string
-
endif # if NET
diff --git a/net/eth_legacy.c b/net/eth_legacy.c
index bdcd6ea..d6d7cee 100644
--- a/net/eth_legacy.c
+++ b/net/eth_legacy.c
@@ -11,7 +11,7 @@
#include <environment.h>
#include <net.h>
#include <phy.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include "eth_internal.h"
DECLARE_GLOBAL_DATA_PTR;
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 3ba9742..5a7f79c 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -54,12 +54,20 @@
libs-$(CONFIG_SPL_FRAMEWORK) += common/spl/
libs-y += common/init/
+
+# Special handling for a few options which support SPL/TPL
+ifeq ($(CONFIG_TPL_BUILD),y)
+libs-$(CONFIG_TPL_LIBCOMMON_SUPPORT) += common/ cmd/
+libs-$(CONFIG_TPL_LIBGENERIC_SUPPORT) += lib/
+else
libs-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += common/ cmd/
+libs-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/
+endif
+
libs-$(CONFIG_SPL_LIBDISK_SUPPORT) += disk/
libs-y += drivers/
libs-y += dts/
libs-y += fs/
-libs-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/
libs-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/
libs-$(CONFIG_SPL_NET_SUPPORT) += net/
@@ -208,8 +216,19 @@
cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \
-DDO_DEPS_ONLY -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $<
+# If .u-boot.cfg.d is still present, then either:
+# a) The previous build used a Makefile that used if_changed rather than
+# if_changed_dep when building u-boot.cfg, and hence any later builds will
+# be unaware of the dependencies for u-boot.cfg. In this case, we must
+# delete u-boot.cfg to force it and .u-boot.cfg.cmd to be rebuilt the
+# correct way.
+# b) The previous build failed or was interrupted while building u-boot.cfg,
+# so deleting u-boot.cfg isn't going to cause any additional work.
+ifneq ($(wildcard $(obj)/.$(SPL_BIN).d),)
+ unused := $(shell rm -f $(obj)/$(SPL_BIN).cfg)
+endif
$(obj)/$(SPL_BIN).cfg: include/config.h FORCE
- $(call if_changed,cpp_cfg)
+ $(call if_changed_dep,cpp_cfg)
pythonpath = PYTHONPATH=tools
diff --git a/scripts/build-whitelist.sh b/scripts/build-whitelist.sh
new file mode 100755
index 0000000..7cf7a66
--- /dev/null
+++ b/scripts/build-whitelist.sh
@@ -0,0 +1,51 @@
+#!/bin/sh
+# Copyright (c) 2016 Google, Inc
+# Written by Simon Glass <sjg@chromium.org>
+#
+
+# This script creates the configuration whitelist file. This file contains
+# all the config options which are allowed to be used outside Kconfig.
+# Please do not add things to the whitelist. Instead, add your new option
+# to Kconfig.
+#
+export LC_ALL=C LC_COLLATE=C
+
+# There are two independent greps. The first pulls out the component parts
+# of CONFIG_SYS_EXTRA_OPTIONS. An example is:
+#
+# SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8)
+#
+# We want this to produce:
+# CONFIG_SUNXI_GMAC
+# CONFIG_AHCI
+# CONFIG_SATAPWR
+#
+# The second looks for the rest of the CONFIG options, but excludes those in
+# Kconfig and defconfig files.
+#
+(
+git grep CONFIG_SYS_EXTRA_OPTIONS |sed -n \
+ 's/.*CONFIG_SYS_EXTRA_OPTIONS="\(.*\)"/\1/ p' \
+ | tr , '\n' \
+ | sed 's/ *\([A-Za-z0-9_]*\).*/CONFIG_\1/'
+
+git grep CONFIG_ | \
+ egrep -vi "(Kconfig:|defconfig:|README|\.py|\.pl:)" \
+ | tr ' \t' '\n\n' \
+ | sed -n 's/^\(CONFIG_[A-Za-z0-9_]*\).*/\1/p'
+) \
+ |sort |uniq >scripts/config_whitelist.txt.tmp1;
+
+# Finally, we need a list of the valid Kconfig options to exclude these from
+# the whitelist.
+cat `find . -name "Kconfig*"` |sed -n \
+ -e 's/^config *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \
+ -e 's/^menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \
+ |sort |uniq >scripts/config_whitelist.txt.tmp2
+
+# Use only the options that are present in the first file but not the second.
+comm -23 scripts/config_whitelist.txt.tmp1 scripts/config_whitelist.txt.tmp2 \
+ |sort |uniq >scripts/config_whitelist.txt
+rm scripts/config_whitelist.txt.tmp1 scripts/config_whitelist.txt.tmp2
+
+unset LC_ALL LC_COLLATE
diff --git a/scripts/check-config.sh b/scripts/check-config.sh
new file mode 100755
index 0000000..28c8fe9
--- /dev/null
+++ b/scripts/check-config.sh
@@ -0,0 +1,55 @@
+#!/bin/sh
+# Copyright (c) 2016 Google, Inc
+# Written by Simon Glass <sjg@chromium.org>
+#
+# Check that the u-boot.cfg file provided does not introduce any new
+# ad-hoc CONFIG options
+#
+# You can generate the list of current ad-hoc CONFIG options (those which are
+# not in Kconfig) with this command:
+#
+# export LC_ALL=C LC_COLLATE=C
+# git grep CONFIG_ |tr ' \t' '\n\n' |sed -n 's/^\(CONFIG_[A-Z0-9_]*\).*/\1/p' \
+# |sort |uniq >scripts/config_whitelist.txt;
+# unset LC_ALL LC_COLLATE
+
+# Usage
+# check-config.sh <path to u-boot.cfg> <path to whitelist file> <source dir>
+#
+# For example:
+# scripts/check-config.sh b/chromebook_link/u-boot.cfg kconfig_whitelist.txt .
+
+path="$1"
+whitelist="$2"
+srctree="$3"
+
+# Temporary files
+configs="${path}.configs"
+suspects="${path}.suspects"
+ok="${path}.ok"
+new_adhoc="${path}.adhoc"
+
+export LC_ALL=C
+export LC_COLLATE=C
+
+cat ${path} |sed -n 's/^#define \(CONFIG_[A-Za-z0-9_]*\).*/\1/p' |sort |uniq \
+ >${configs}
+
+comm -23 ${configs} ${whitelist} > ${suspects}
+
+cat `find ${srctree} -name "Kconfig*"` |sed -n \
+ -e 's/^config *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \
+ -e 's/^menuconfig \([A-Za-z0-9_]*\).*$/CONFIG_\1/p' |sort |uniq > ${ok}
+comm -23 ${suspects} ${ok} >${new_adhoc}
+if [ -s ${new_adhoc} ]; then
+ echo "Error: You must add new CONFIG options using Kconfig"
+ echo "The following new ad-hoc CONFIG options were detected:"
+ cat ${new_adhoc}
+ echo
+ echo "Please add these via Kconfig instead. Find a suitable Kconfig"
+ echo "file and add a 'config' or 'menuconfig' option."
+ # Don't delete the temporary files in case they are useful
+ exit 1
+else
+ rm ${suspects} ${ok} ${new_adhoc}
+fi
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
new file mode 100644
index 0000000..efa95f0
--- /dev/null
+++ b/scripts/config_whitelist.txt
@@ -0,0 +1,8411 @@
+CONFIG_
+CONFIG_16BIT
+CONFIG_33
+CONFIG_400MHZ_MODE
+CONFIG_405
+CONFIG_405EP
+CONFIG_405EX
+CONFIG_405EX_CHIP21_ECID3_REV_D
+CONFIG_405EX_CHIP21_PVR_REV_C
+CONFIG_405EX_CHIP21_PVR_REV_D
+CONFIG_405EZ
+CONFIG_405GP
+CONFIG_440
+CONFIG_440EP
+CONFIG_440EPX
+CONFIG_440GP
+CONFIG_440GR
+CONFIG_440GRX
+CONFIG_440GX
+CONFIG_440SP
+CONFIG_440SPE
+CONFIG_440SPE_REVA
+CONFIG_440_GX
+CONFIG_4430SDP
+CONFIG_460EX
+CONFIG_460GT
+CONFIG_460SX
+CONFIG_4xx_CONFIG_BLOCKSIZE
+CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR
+CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET
+CONFIG_4xx_DCACHE
+CONFIG_521X
+CONFIG_533MHZ_MODE
+CONFIG_5xx_CONS_SCI1
+CONFIG_5xx_CONS_SCI2
+CONFIG_5xx_GCLK_FREQ
+CONFIG_64BIT_PHYS_ADDR
+CONFIG_66
+CONFIG_8260_CLKIN
+CONFIG_8349_CLKIN
+CONFIG_83XX
+CONFIG_83XX_CLKIN
+CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
+CONFIG_83XX_PCICLK
+CONFIG_83XX_PCI_STREAMING
+CONFIG_88F5182
+CONFIG_8xx_CONS_NONE
+CONFIG_8xx_CONS_SCCx
+CONFIG_8xx_CONS_SMC1
+CONFIG_8xx_CONS_SMC2
+CONFIG_8xx_CONS_SMCx
+CONFIG_8xx_CPUCLK_DEFAULT
+CONFIG_8xx_GCLK_FREQ
+CONFIG_8xx_OSCLK
+CONFIG_A003399_NOR_WORKAROUND
+CONFIG_A008044_WORKAROUND
+CONFIG_A3M071
+CONFIG_A4M072
+CONFIG_A4M2K
+CONFIG_AC14XX
+CONFIG_ACADIA
+CONFIG_ACX517AKN
+CONFIG_ACX544AKN
+CONFIG_ADCIOP
+CONFIG_ADDMISC
+CONFIG_ADDRESS
+CONFIG_ADDR_AUTO_INCR_BIT
+CONFIG_ADDR_MAP
+CONFIG_ADDR_STREAMING
+CONFIG_ADI_GPIO1
+CONFIG_ADI_GPIO2
+CONFIG_ADNPESC1
+CONFIG_ADP_AG101P
+CONFIG_AEABI
+CONFIG_AEMIF_CNTRL_BASE
+CONFIG_AES
+CONFIG_ALTERA_SDRAM
+CONFIG_ALTERA_SPI_IDLE_VAL
+CONFIG_ALTIVEC
+CONFIG_ALT_LB_ADDR
+CONFIG_ALT_LH_ADDR
+CONFIG_ALU
+CONFIG_AM335X_LCD
+CONFIG_AM335X_USB0
+CONFIG_AM335X_USB0_MODE
+CONFIG_AM335X_USB1
+CONFIG_AM335X_USB1_MODE
+CONFIG_AM33XX
+CONFIG_AM437X_USB2PHY2_HOST
+CONFIG_AM57XX
+CONFIG_AMBAPP_IOAREA
+CONFIG_AMCC_DEF_ENV
+CONFIG_AMCC_DEF_ENV_NOR_UPD
+CONFIG_AMCC_DEF_ENV_POWERPC
+CONFIG_AMCC_DEF_ENV_PPC
+CONFIG_AMCC_DEF_ENV_PPC_OLD
+CONFIG_AMCC_DEF_ENV_ROOTPATH
+CONFIG_AMCORE
+CONFIG_AMIGA_PARTITION
+CONFIG_ANDES_PCU
+CONFIG_ANDES_PCU_BASE
+CONFIG_AP325RXA
+CONFIG_APBH_DMA
+CONFIG_APBH_DMA_BURST
+CONFIG_APBH_DMA_BURST8
+CONFIG_APER_0_BASE
+CONFIG_APER_1_BASE
+CONFIG_APER_SIZE
+CONFIG_API
+CONFIG_APUS_FAST_EXCEPT
+CONFIG_AP_SH4A_4A
+CONFIG_ARCH_AAED2000
+CONFIG_ARCH_ADI_COYOTE
+CONFIG_ARCH_ADPAG101P
+CONFIG_ARCH_AT91RM9200DK
+CONFIG_ARCH_AUTCPU12
+CONFIG_ARCH_BAST
+CONFIG_ARCH_CATS
+CONFIG_ARCH_CDB89712
+CONFIG_ARCH_CEIVA
+CONFIG_ARCH_CLEP7212
+CONFIG_ARCH_CPU_INIT
+CONFIG_ARCH_CSB226
+CONFIG_ARCH_DMA_PIO_WORDS
+CONFIG_ARCH_EARLY_INIT_R
+CONFIG_ARCH_EBSA110
+CONFIG_ARCH_EBSA285
+CONFIG_ARCH_EDB7211
+CONFIG_ARCH_ENP2611
+CONFIG_ARCH_FORTUNET
+CONFIG_ARCH_GUMSTIX
+CONFIG_ARCH_H1940
+CONFIG_ARCH_H5400
+CONFIG_ARCH_H7201
+CONFIG_ARCH_H7202
+CONFIG_ARCH_HAS_ILOG2_U32
+CONFIG_ARCH_HAS_ILOG2_U64
+CONFIG_ARCH_INNOKOM
+CONFIG_ARCH_IQ31244
+CONFIG_ARCH_IQ80321
+CONFIG_ARCH_IQ80331
+CONFIG_ARCH_IXCDP1100
+CONFIG_ARCH_IXDP2400
+CONFIG_ARCH_IXDP2401
+CONFIG_ARCH_IXDP2800
+CONFIG_ARCH_IXDP2801
+CONFIG_ARCH_IXDP425
+CONFIG_ARCH_KIRKWOOD
+CONFIG_ARCH_KS8695
+CONFIG_ARCH_L7200
+CONFIG_ARCH_LUBBOCK
+CONFIG_ARCH_MAP_SYSMEM
+CONFIG_ARCH_MISC_INIT
+CONFIG_ARCH_MX1ADS
+CONFIG_ARCH_NETWINDER
+CONFIG_ARCH_OMAP2
+CONFIG_ARCH_OMAP4
+CONFIG_ARCH_ORION5X
+CONFIG_ARCH_P720T
+CONFIG_ARCH_PERSONAL_SERVER
+CONFIG_ARCH_PLEB
+CONFIG_ARCH_PXA_CERF
+CONFIG_ARCH_PXA_IDP
+CONFIG_ARCH_RMOBILE_BOARD_STRING
+CONFIG_ARCH_RMOBILE_EXTRAM_BOOT
+CONFIG_ARCH_RPC
+CONFIG_ARCH_S3C2440
+CONFIG_ARCH_SHARK
+CONFIG_ARCH_SMDK2410
+CONFIG_ARCH_TEGRA
+CONFIG_ARCH_USE_BUILTIN_BSWAP
+CONFIG_ARCH_VERSATILE_PB
+CONFIG_ARCH_VIPER
+CONFIG_ARC_MMU_VER
+CONFIG_ARC_SERIAL
+CONFIG_ARC_UART_BASE
+CONFIG_ARIA
+CONFIG_ARIA_FPGA
+CONFIG_ARM926EJS
+CONFIG_ARMADA100
+CONFIG_ARMADA100_FEC
+CONFIG_ARMADA100_SPI
+CONFIG_ARMADA168
+CONFIG_ARMADA_39X
+CONFIG_ARMCORTEXA9
+CONFIG_ARMV7_PSCI_1_0
+CONFIG_ARMV7_SECURE_BASE
+CONFIG_ARMV7_SECURE_MAX_SIZE
+CONFIG_ARMV7_SECURE_RESERVE_SIZE
+CONFIG_ARMV8_PSCI
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+CONFIG_ARMV8_SWITCH_TO_EL1
+CONFIG_ARM_ARCH_CP15_ERRATA
+CONFIG_ARM_ASM_UNIFIED
+CONFIG_ARM_DCC
+CONFIG_ARM_ERRATA_430973
+CONFIG_ARM_ERRATA_454179
+CONFIG_ARM_ERRATA_621766
+CONFIG_ARM_ERRATA_716044
+CONFIG_ARM_ERRATA_742230
+CONFIG_ARM_ERRATA_743622
+CONFIG_ARM_ERRATA_751472
+CONFIG_ARM_ERRATA_761320
+CONFIG_ARM_ERRATA_773022
+CONFIG_ARM_ERRATA_774769
+CONFIG_ARM_ERRATA_794072
+CONFIG_ARM_ERRATA_798870
+CONFIG_ARM_ERRATA_801819
+CONFIG_ARM_ERRATA_826974
+CONFIG_ARM_ERRATA_828024
+CONFIG_ARM_ERRATA_829520
+CONFIG_ARM_ERRATA_833069
+CONFIG_ARM_ERRATA_833471
+CONFIG_ARM_FREQ
+CONFIG_ARM_GIC_BASE_ADDRESS
+CONFIG_ARM_PL180_MMCI
+CONFIG_ARM_PL180_MMCI_BASE
+CONFIG_ARM_PL180_MMCI_CLOCK_FREQ
+CONFIG_ARM_THUMB
+CONFIG_ARP_TIMEOUT
+CONFIG_AS3722_POWER
+CONFIG_ASTRO5373L
+CONFIG_ASTRO_COFDMDUOS2
+CONFIG_ASTRO_TWIN7S2
+CONFIG_ASTRO_V512
+CONFIG_ASTRO_V532
+CONFIG_ASTRO_V912
+CONFIG_AT32AP
+CONFIG_AT32AP7000
+CONFIG_AT32UC3A0xxx
+CONFIG_AT91C_PQFP_UHPBUG
+CONFIG_AT91FAMILY
+CONFIG_AT91RESET_EXTRST
+CONFIG_AT91RM9200
+CONFIG_AT91RM9200EK
+CONFIG_AT91SAM9260
+CONFIG_AT91SAM9260EK
+CONFIG_AT91SAM9261
+CONFIG_AT91SAM9261EK
+CONFIG_AT91SAM9263
+CONFIG_AT91SAM9263EK
+CONFIG_AT91SAM9G10
+CONFIG_AT91SAM9G10EK
+CONFIG_AT91SAM9G20
+CONFIG_AT91SAM9G20EK
+CONFIG_AT91SAM9G20EK_2MMC
+CONFIG_AT91SAM9G45
+CONFIG_AT91SAM9G45EKES
+CONFIG_AT91SAM9G45_LCD_BASE
+CONFIG_AT91SAM9M10G45
+CONFIG_AT91SAM9M10G45EK
+CONFIG_AT91SAM9N12
+CONFIG_AT91SAM9RL
+CONFIG_AT91SAM9RLEK
+CONFIG_AT91SAM9X5
+CONFIG_AT91SAM9X5EK
+CONFIG_AT91SAM9XE
+CONFIG_AT91SAM9_WATCHDOG
+CONFIG_AT91_CAN
+CONFIG_AT91_EFLASH
+CONFIG_AT91_GPIO
+CONFIG_AT91_GPIO_PULLUP
+CONFIG_AT91_HW_WDT_TIMEOUT
+CONFIG_AT91_LED
+CONFIG_AT91_WANTS_COMMON_PHY
+CONFIG_ATAPI
+CONFIG_ATA_ACPI
+CONFIG_ATI
+CONFIG_ATI_RADEON_FB
+CONFIG_ATM
+CONFIG_ATMEL_DATAFLASH_SPI
+CONFIG_ATMEL_HLCD
+CONFIG_ATMEL_LCD
+CONFIG_ATMEL_LCD_BGR555
+CONFIG_ATMEL_LCD_RGB565
+CONFIG_ATMEL_LEGACY
+CONFIG_ATMEL_MCI_8BIT
+CONFIG_ATMEL_NAND_HWECC
+CONFIG_ATMEL_NAND_HW_PMECC
+CONFIG_ATMEL_SDHCI0
+CONFIG_ATMEL_SDHCI1
+CONFIG_ATMEL_SPI
+CONFIG_ATMEL_SPI0
+CONFIG_ATMEL_USART
+CONFIG_ATNGW100
+CONFIG_ATNGW100MKII
+CONFIG_ATSTK1000
+CONFIG_ATSTK1000_16MB_SDRAM
+CONFIG_ATSTK1002
+CONFIG_AT_TRANS
+CONFIG_AUTOCALIB
+CONFIG_AUTONEG_TIMEOUT
+CONFIG_AUTO_COMPLETE
+CONFIG_AUTO_ZRELADDR
+CONFIG_B4860QDS
+CONFIG_BACKSIDE_L2_CACHE
+CONFIG_BAMBOO
+CONFIG_BAMBOO_NAND
+CONFIG_BARIX_IPAM390
+CONFIG_BAT_CMD
+CONFIG_BAT_PAIR
+CONFIG_BAT_RW
+CONFIG_BAUDRATE
+CONFIG_BCH
+CONFIG_BCH_CONST_M
+CONFIG_BCH_CONST_PARAMS
+CONFIG_BCH_CONST_T
+CONFIG_BCM2835_GPIO
+CONFIG_BCM2835_SDHCI
+CONFIG_BCM283X_MU_SERIAL
+CONFIG_BCM_SF2_ETH
+CONFIG_BCM_SF2_ETH_DEFAULT_PORT
+CONFIG_BCM_SF2_ETH_GMAC
+CONFIG_BD_NUM_CPUS
+CONFIG_BF506_UART0_PORTF
+CONFIG_BF506_UART1_PORTG
+CONFIG_BF50x
+CONFIG_BF51x
+CONFIG_BF527_EZKIT_REV_2_1
+CONFIG_BF52x
+CONFIG_BF548_ATAPI_ALTERNATIVE_PORT
+CONFIG_BF54x
+CONFIG_BF60x
+CONFIG_BFIN_ATAPI_BASE_ADDR
+CONFIG_BFIN_ATA_MODE
+CONFIG_BFIN_BOARD_VERSION_1_0
+CONFIG_BFIN_BOOTROM_USES_EVT1
+CONFIG_BFIN_BOOT_MODE
+CONFIG_BFIN_CF_IDE
+CONFIG_BFIN_CPU
+CONFIG_BFIN_GET_DCLK_M
+CONFIG_BFIN_GPIO_TRACK
+CONFIG_BFIN_HDD_IDE
+CONFIG_BFIN_IDE
+CONFIG_BFIN_INS_LOWOVERHEAD
+CONFIG_BFIN_LINKPORT
+CONFIG_BFIN_MAC
+CONFIG_BFIN_MAC_PINS
+CONFIG_BFIN_NFC
+CONFIG_BFIN_NFC_BOOTROM_ECC
+CONFIG_BFIN_NFC_CTL_VAL
+CONFIG_BFIN_NFC_NO_HW_ECC
+CONFIG_BFIN_SCRATCH_REG
+CONFIG_BFIN_SDH
+CONFIG_BFIN_SERIAL
+CONFIG_BFIN_SOFT_SWITCH
+CONFIG_BFIN_SPI
+CONFIG_BFIN_SPI6XX
+CONFIG_BFIN_SPI_GPIO_CS
+CONFIG_BFIN_SPI_IDLE_VAL
+CONFIG_BFIN_SPI_IMG_SIZE
+CONFIG_BFIN_TRUE_IDE
+CONFIG_BFIN_WATCHDOG
+CONFIG_BIOSEMU
+CONFIG_BITBANGMII
+CONFIG_BITBANGMII_MULTI
+CONFIG_BKUP_FLASH
+CONFIG_BL1_OFFSET
+CONFIG_BL1_SIZE
+CONFIG_BL2_OFFSET
+CONFIG_BL2_SIZE
+CONFIG_BMP_16BPP
+CONFIG_BMP_24BMP
+CONFIG_BMP_24BPP
+CONFIG_BMP_32BPP
+CONFIG_BOARDDIR
+CONFIG_BOARDINFO
+CONFIG_BOARDNAME
+CONFIG_BOARDNAME_LOCAL
+CONFIG_BOARD_AXM
+CONFIG_BOARD_BOOTCMD
+CONFIG_BOARD_COMMON
+CONFIG_BOARD_EARLY_INIT_F
+CONFIG_BOARD_EARLY_INIT_R
+CONFIG_BOARD_ECC_SUPPORT
+CONFIG_BOARD_EMAC_COUNT
+CONFIG_BOARD_H2200
+CONFIG_BOARD_IS_OPENRD_BASE
+CONFIG_BOARD_IS_OPENRD_CLIENT
+CONFIG_BOARD_IS_OPENRD_ULTIMATE
+CONFIG_BOARD_LATE_INIT
+CONFIG_BOARD_MEM_LIMIT
+CONFIG_BOARD_NAME
+CONFIG_BOARD_POSTCLK_INIT
+CONFIG_BOARD_RESET
+CONFIG_BOARD_REVISION_TAG
+CONFIG_BOARD_SIZE_LIMIT
+CONFIG_BOARD_SPECIFIC_LED
+CONFIG_BOARD_TAURUS
+CONFIG_BOARD_TYPES
+CONFIG_BOOGER
+CONFIG_BOOKE
+CONFIG_BOOM
+CONFIG_BOOTARGS
+CONFIG_BOOTARGS_AXM
+CONFIG_BOOTARGS_ROOT
+CONFIG_BOOTARGS_TAURUS
+CONFIG_BOOTARGS_VIDEO
+CONFIG_BOOTBLOCK
+CONFIG_BOOTCOMMAND
+CONFIG_BOOTCOUNT_ALEN
+CONFIG_BOOTCOUNT_AM33XX
+CONFIG_BOOTCOUNT_ENV
+CONFIG_BOOTCOUNT_I2C
+CONFIG_BOOTCOUNT_LIMIT
+CONFIG_BOOTCOUNT_RAM
+CONFIG_BOOTFILE
+CONFIG_BOOTMAPSZ
+CONFIG_BOOTMODE
+CONFIG_BOOTM_LINUX
+CONFIG_BOOTM_NETBSD
+CONFIG_BOOTM_OPENRTOS
+CONFIG_BOOTM_OSE
+CONFIG_BOOTM_PLAN9
+CONFIG_BOOTM_RTEMS
+CONFIG_BOOTM_VXWORKS
+CONFIG_BOOTP_
+CONFIG_BOOTP_BOOTFILE
+CONFIG_BOOTP_BOOTFILESIZE
+CONFIG_BOOTP_BOOTPATH
+CONFIG_BOOTP_DEFAULT
+CONFIG_BOOTP_DHCP_REQUEST_DELAY
+CONFIG_BOOTP_DNS
+CONFIG_BOOTP_DNS2
+CONFIG_BOOTP_GATEWAY
+CONFIG_BOOTP_HOSTNAME
+CONFIG_BOOTP_ID_CACHE_SIZE
+CONFIG_BOOTP_MAY_FAIL
+CONFIG_BOOTP_NISDOMAIN
+CONFIG_BOOTP_NTPSERVER
+CONFIG_BOOTP_PXE
+CONFIG_BOOTP_RANDOM_DELAY
+CONFIG_BOOTP_SEND_HOSTNAME
+CONFIG_BOOTP_SERVERIP
+CONFIG_BOOTP_SUBNETMASK
+CONFIG_BOOTP_TIMEOFFSET
+CONFIG_BOOTP_VENDOREX
+CONFIG_BOOTROM_ERR_REG
+CONFIG_BOOTSCRIPT_ADDR
+CONFIG_BOOTSCRIPT_COPY_RAM
+CONFIG_BOOTSCRIPT_HDR_ADDR
+CONFIG_BOOTSCRIPT_KEY_HASH
+CONFIG_BOOT_DIR
+CONFIG_BOOT_FROM_XMD
+CONFIG_BOOT_MODE_BIT
+CONFIG_BOOT_NAND
+CONFIG_BOOT_ONENAND
+CONFIG_BOOT_OS_NET
+CONFIG_BOOT_PARAMS_ADDR
+CONFIG_BOOT_PCI
+CONFIG_BOOT_RETRY_MIN
+CONFIG_BOOT_RETRY_TIME
+CONFIG_BOUNCE_BUFFER
+CONFIG_BPTR_VIRT_ADDR
+CONFIG_BSC9131
+CONFIG_BSC9131RDB
+CONFIG_BSC9132
+CONFIG_BSC9132QDS
+CONFIG_BSEIP
+CONFIG_BS_ADDR_DEVICE
+CONFIG_BS_ADDR_RAM
+CONFIG_BS_COPY_CMD
+CONFIG_BS_COPY_ENV
+CONFIG_BS_HDR_ADDR_DEVICE
+CONFIG_BS_HDR_ADDR_RAM
+CONFIG_BS_HDR_SIZE
+CONFIG_BS_SIZE
+CONFIG_BTB
+CONFIG_BUBINGA
+CONFIG_BUFNO_AUTO_INCR_BIT
+CONFIG_BUILD_ENVCRC
+CONFIG_BUILD_TARGET
+CONFIG_BUS_WIDTH
+CONFIG_BZIP2
+CONFIG_C29XPCIE
+CONFIG_CACHELINE_ALIGNED_L1
+CONFIG_CADDY2
+CONFIG_CALXEDA_XGMAC
+CONFIG_CAM5200
+CONFIG_CAM5200_NIOSFLASH
+CONFIG_CANMB
+CONFIG_CAN_DRIVER
+CONFIG_CCLK_ACT_DIV
+CONFIG_CCLK_DIV
+CONFIG_CCLK_DIV_not_defined_properly
+CONFIG_CCLK_HZ
+CONFIG_CDP_APPLIANCE_VLAN_TYPE
+CONFIG_CDP_CAPABILITIES
+CONFIG_CDP_DEVICE_ID
+CONFIG_CDP_DEVICE_ID_PREFIX
+CONFIG_CDP_PLATFORM
+CONFIG_CDP_PORT_ID
+CONFIG_CDP_POWER_CONSUMPTION
+CONFIG_CDP_TRIGGER
+CONFIG_CDP_VERSION
+CONFIG_CFB_CONSOLE
+CONFIG_CFB_CONSOLE_ANSI
+CONFIG_CFG_DATA_SECTOR
+CONFIG_CFG_FAT
+CONFIG_CFG_USB
+CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
+CONFIG_CF_ATASEL_DIS
+CONFIG_CF_ATASEL_ENA
+CONFIG_CF_DSPI
+CONFIG_CF_QSPI
+CONFIG_CF_SBF
+CONFIG_CF_SPI
+CONFIG_CF_V2
+CONFIG_CF_V3
+CONFIG_CF_V4
+CONFIG_CF_V4E
+CONFIG_CGU_CTL_VAL
+CONFIG_CGU_DIV_VAL
+CONFIG_CHAIN_BOOT_CMD
+CONFIG_CHAIN_OF_TRUST
+CONFIG_CHARON
+CONFIG_CHIP_SELECTS_PER_CTRL
+CONFIG_CHIP_SELECT_QUAD_CAPABLE
+CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
+CONFIG_CIS8201_PHY
+CONFIG_CI_UDC_HAS_HOSTPC
+CONFIG_CLK0_DIV
+CONFIG_CLK0_EN
+CONFIG_CLKIN_HALF
+CONFIG_CLKIN_HZ
+CONFIG_CLK_1000_200_200
+CONFIG_CLK_1000_330_165
+CONFIG_CLK_1000_400_200
+CONFIG_CLK_800_330_165
+CONFIG_CLK_DEBUG
+CONFIG_CLOCKS
+CONFIG_CLOCKS_IN_MHZ
+CONFIG_CLOCK_SYNTHESIZER
+CONFIG_CM5200
+CONFIG_CM922T_XA10
+CONFIG_CMDLINE_EDITING
+CONFIG_CMDLINE_PS_SUPPORT
+CONFIG_CMDLINE_TAG
+CONFIG_CMD_AES
+CONFIG_CMD_ASKEN
+CONFIG_CMD_BAT
+CONFIG_CMD_BEDBUG
+CONFIG_CMD_BLOB
+CONFIG_CMD_BMODE
+CONFIG_CMD_BMP
+CONFIG_CMD_BOOTLDR
+CONFIG_CMD_BOOTMENU
+CONFIG_CMD_BSP
+CONFIG_CMD_CBFS
+CONFIG_CMD_CHIP_CONFIG
+CONFIG_CMD_CLEAR
+CONFIG_CMD_CLK
+CONFIG_CMD_CPLBINFO
+CONFIG_CMD_CRAMFS
+CONFIG_CMD_DATE
+CONFIG_CMD_DEFAULTENV_VARS
+CONFIG_CMD_DEKBLOB
+CONFIG_CMD_DFL
+CONFIG_CMD_DIAG
+CONFIG_CMD_DISPLAY
+CONFIG_CMD_DOC
+CONFIG_CMD_DS4510
+CONFIG_CMD_DS4510_INFO
+CONFIG_CMD_DS4510_MEM
+CONFIG_CMD_DS4510_RST
+CONFIG_CMD_DTT
+CONFIG_CMD_ECCTEST
+CONFIG_CMD_EECONFIG
+CONFIG_CMD_EEPROM
+CONFIG_CMD_EEPROM_LAYOUT
+CONFIG_CMD_ENTERRCM
+CONFIG_CMD_ENV
+CONFIG_CMD_ENV_CALLBACK
+CONFIG_CMD_ENV_FLAGS
+CONFIG_CMD_ERRATA
+CONFIG_CMD_ESBC_VALIDATE
+CONFIG_CMD_ETHSW
+CONFIG_CMD_FDC
+CONFIG_CMD_FDT_MAX_DUMP
+CONFIG_CMD_FPGAD
+CONFIG_CMD_FPGA_LOADBP
+CONFIG_CMD_FPGA_LOADFS
+CONFIG_CMD_FPGA_LOADMK
+CONFIG_CMD_FPGA_LOADP
+CONFIG_CMD_FUSE
+CONFIG_CMD_GETTIME
+CONFIG_CMD_GPT
+CONFIG_CMD_GSC
+CONFIG_CMD_HASH
+CONFIG_CMD_HD44760
+CONFIG_CMD_HD44780
+CONFIG_CMD_HDMIDETECT
+CONFIG_CMD_IDE
+CONFIG_CMD_IMMAP
+CONFIG_CMD_IMXOTP
+CONFIG_CMD_IMX_FUSE
+CONFIG_CMD_IO
+CONFIG_CMD_IOLOOP
+CONFIG_CMD_IOTRACE
+CONFIG_CMD_IRQ
+CONFIG_CMD_JFFS2
+CONFIG_CMD_KGDB
+CONFIG_CMD_LDRINFO
+CONFIG_CMD_LED
+CONFIG_CMD_LOADY
+CONFIG_CMD_LZMADEC
+CONFIG_CMD_MAX6957
+CONFIG_CMD_MD5SUM
+CONFIG_CMD_MEM
+CONFIG_CMD_MFSL
+CONFIG_CMD_MMC_SPI
+CONFIG_CMD_MTDPARTS
+CONFIG_CMD_MTDPARTS_SPREAD
+CONFIG_CMD_NAND_LOCK_UNLOCK
+CONFIG_CMD_NAND_TORTURE
+CONFIG_CMD_NAND_TRIMFFS
+CONFIG_CMD_ONENAND
+CONFIG_CMD_OTP
+CONFIG_CMD_PART
+CONFIG_CMD_PCA953X
+CONFIG_CMD_PCA953X_INFO
+CONFIG_CMD_PCI
+CONFIG_CMD_PCI_ENUM
+CONFIG_CMD_PCMCIA
+CONFIG_CMD_PORTIO
+CONFIG_CMD_PXE
+CONFIG_CMD_READ
+CONFIG_CMD_REGINFO
+CONFIG_CMD_REISER
+CONFIG_CMD_SANDBOX
+CONFIG_CMD_SATA
+CONFIG_CMD_SAVES
+CONFIG_CMD_SCSI
+CONFIG_CMD_SDRAM
+CONFIG_CMD_SF_TEST
+CONFIG_CMD_SH_ZIMAGEBOOT
+CONFIG_CMD_SOFTSWITCH
+CONFIG_CMD_SPIBOOTLDR
+CONFIG_CMD_SPL
+CONFIG_CMD_SPL_NAND_OFS
+CONFIG_CMD_SPL_WRITE_SIZE
+CONFIG_CMD_STRINGS
+CONFIG_CMD_SX151X
+CONFIG_CMD_TCA642X
+CONFIG_CMD_TERMINAL
+CONFIG_CMD_TFTP
+CONFIG_CMD_THOR_DOWNLOAD
+CONFIG_CMD_TRACE
+CONFIG_CMD_TSI148
+CONFIG_CMD_UBIFS
+CONFIG_CMD_UNIVERSE
+CONFIG_CMD_UNZIP
+CONFIG_CMD_USB_STORAGE
+CONFIG_CMD_UUID
+CONFIG_CMD_ZBOOT
+CONFIG_CMD_ZFS
+CONFIG_CM_INIT
+CONFIG_CM_MULTIPLE_SSRAM
+CONFIG_CM_REMAP
+CONFIG_CM_SPD_DETECT
+CONFIG_CM_T335
+CONFIG_CM_T3517
+CONFIG_CM_T3X
+CONFIG_CM_T43
+CONFIG_CM_T54
+CONFIG_CM_TCRAM
+CONFIG_CNTL
+CONFIG_COLDFIRE
+CONFIG_COMMANDS
+CONFIG_COMMAND_HISTORY
+CONFIG_COMMON_BOOT
+CONFIG_COMMON_ENV_MISC
+CONFIG_COMMON_ENV_SETTINGS
+CONFIG_COMMON_ENV_UBI
+CONFIG_COMPACT_FLASH
+CONFIG_COMPAT
+CONFIG_CONSOLE
+CONFIG_CONSOLE_DEV
+CONFIG_CONSOLE_EXTRA_INFO
+CONFIG_CONSOLE_INFO_QUIET
+CONFIG_CONSOLE_MUX
+CONFIG_CONSOLE_SCROLL_LINES
+CONFIG_CONS_EXTC_PINSEL
+CONFIG_CONS_EXTC_RATE
+CONFIG_CONS_NONE
+CONFIG_CONS_ON_SCC
+CONFIG_CONS_ON_SMC
+CONFIG_CONS_SCIF0
+CONFIG_CONS_SCIF1
+CONFIG_CONS_SCIF2
+CONFIG_CONS_SCIF3
+CONFIG_CONS_SCIF4
+CONFIG_CONS_SCIF5
+CONFIG_CONS_SCIF7
+CONFIG_CONTROL
+CONFIG_CONTROLCENTERD
+CONFIG_CON_ROT
+CONFIG_CORE1_RUN
+CONFIG_CORE_COUNT
+CONFIG_CORTINA_FW_ADDR
+CONFIG_CORTINA_FW_LENGTH
+CONFIG_CPCI405
+CONFIG_CPCI405_6U
+CONFIG_CPCI405_VER2
+CONFIG_CPCI_AX2000
+CONFIG_CPLD_BR_PRELIM
+CONFIG_CPLD_OR_PRELIM
+CONFIG_CPM2
+CONFIG_CPUAT91
+CONFIG_CPU_ARCHS34
+CONFIG_CPU_ARMV8
+CONFIG_CPU_CAVIUM_OCTEON
+CONFIG_CPU_FREQ_HZ
+CONFIG_CPU_HAS_LLSC
+CONFIG_CPU_HAS_PREFETCH
+CONFIG_CPU_HAS_SMARTMIPS
+CONFIG_CPU_HAS_SR_RB
+CONFIG_CPU_HAS_WB
+CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
+CONFIG_CPU_LITTLE_ENDIAN
+CONFIG_CPU_MICROMIPS
+CONFIG_CPU_MIPSR2
+CONFIG_CPU_MONAHANS
+CONFIG_CPU_PXA25X
+CONFIG_CPU_PXA26X
+CONFIG_CPU_PXA27X
+CONFIG_CPU_PXA300
+CONFIG_CPU_R8000
+CONFIG_CPU_SH7203
+CONFIG_CPU_SH7264
+CONFIG_CPU_SH7269
+CONFIG_CPU_SH7706
+CONFIG_CPU_SH7720
+CONFIG_CPU_SH7722
+CONFIG_CPU_SH7723
+CONFIG_CPU_SH7724
+CONFIG_CPU_SH7734
+CONFIG_CPU_SH7750
+CONFIG_CPU_SH7751
+CONFIG_CPU_SH7752
+CONFIG_CPU_SH7753
+CONFIG_CPU_SH7757
+CONFIG_CPU_SH7763
+CONFIG_CPU_SH7780
+CONFIG_CPU_SH7785
+CONFIG_CPU_SH_TYPE_R
+CONFIG_CPU_TYPE_R
+CONFIG_CPU_VR41XX
+CONFIG_CP_CLK_FREQ
+CONFIG_CQSPI_DECODER
+CONFIG_CQSPI_REF_CLK
+CONFIG_CRC32
+CONFIG_CRC32_VERIFY
+CONFIG_CS8900
+CONFIG_CS8900_BASE
+CONFIG_CS8900_BUS16
+CONFIG_CS8900_BUS32
+CONFIG_CSF_SIZE
+CONFIG_CTL_JTAG
+CONFIG_CTL_TBE
+CONFIG_CTRD1_PROBE_T1
+CONFIG_CTRD1_PROBE_T2
+CONFIG_CUSTOMER_BOARD_SUPPORT
+CONFIG_CYRUS
+CONFIG_D2NET_V2
+CONFIG_DA850_AM18X_EVM
+CONFIG_DA850_EVM_MAX_CPU_CLK
+CONFIG_DA850_LOWLEVEL
+CONFIG_DA8XX_GPIO
+CONFIG_DASA_SIM
+CONFIG_DATA
+CONFIG_DAVINCI_MMC
+CONFIG_DAVINCI_MMC_SD1
+CONFIG_DAVINCI_SPI
+CONFIG_DBAU1000
+CONFIG_DBAU1X00
+CONFIG_DBGU
+CONFIG_DBG_MONITOR
+CONFIG_DB_784MP_GP
+CONFIG_DCACHE
+CONFIG_DCACHE_OFF
+CONFIG_DCACHE_WB
+CONFIG_DCFG_ADDR
+CONFIG_DCLK_DIV
+CONFIG_DDR_
+CONFIG_DDR_2HCLK
+CONFIG_DDR_2T_TIMING
+CONFIG_DDR_32BIT
+CONFIG_DDR_64BIT
+CONFIG_DDR_CLK_FREQ
+CONFIG_DDR_DATA_EYE
+CONFIG_DDR_DEFAULT_CL
+CONFIG_DDR_ECC
+CONFIG_DDR_ECC_CMD
+CONFIG_DDR_ECC_ENABLE
+CONFIG_DDR_ECC_INIT_VIA_DMA
+CONFIG_DDR_FIXED_SIZE
+CONFIG_DDR_FREQ
+CONFIG_DDR_HCLK
+CONFIG_DDR_HYB25D512160BF
+CONFIG_DDR_II
+CONFIG_DDR_K4H511638C
+CONFIG_DDR_LOG_LEVEL
+CONFIG_DDR_MB
+CONFIG_DDR_MT46V16M16
+CONFIG_DDR_MT46V32M16
+CONFIG_DDR_MT47H128M8
+CONFIG_DDR_MT47H32M16
+CONFIG_DDR_MT47H64M16
+CONFIG_DDR_PLL2
+CONFIG_DDR_RFDC_FIXED
+CONFIG_DDR_RQDC_FIXED
+CONFIG_DDR_SPD
+CONFIG_DEBUG
+CONFIG_DEBUG_DUMP
+CONFIG_DEBUG_DUMP_SYMS
+CONFIG_DEBUG_EARLY_SERIAL
+CONFIG_DEBUG_FS
+CONFIG_DEBUG_LED
+CONFIG_DEBUG_LOCK_ALLOC
+CONFIG_DEBUG_NULL_PTR
+CONFIG_DEBUG_SECTION_MISMATCH
+CONFIG_DEBUG_SEMIHOSTING
+CONFIG_DEBUG_SERIAL
+CONFIG_DEBUG_UART_LINFLEXUART
+CONFIG_DEBUG_WRITECOUNT
+CONFIG_DEB_DMA_URGENT
+CONFIG_DEEP_SLEEP
+CONFIG_DEFAULT
+CONFIG_DEFAULT_CONSOLE
+CONFIG_DEFAULT_FDT_FILE
+CONFIG_DEFAULT_IMMR
+CONFIG_DEFAULT_KERNEL_COMMAND_LINE
+CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC
+CONFIG_DEFAULT_SPI_BUS
+CONFIG_DEFAULT_SPI_CS
+CONFIG_DEFAULT_SPI_MODE
+CONFIG_DEF_HWCONFIG
+CONFIG_DELAY_ENVIRONMENT
+CONFIG_DENX_M28_V10
+CONFIG_DESIGNWARE_ETH
+CONFIG_DESIGNWARE_WATCHDOG
+CONFIG_DEVCONCENTER
+CONFIG_DEVELOP
+CONFIG_DEVICE_TREE_LIST
+CONFIG_DEV_USB_PHY_BASE
+CONFIG_DFU_ALT
+CONFIG_DFU_ALT_BOOT_EMMC
+CONFIG_DFU_ALT_BOOT_SD
+CONFIG_DFU_ALT_SYSTEM
+CONFIG_DFU_ENV_SETTINGS
+CONFIG_DFU_MMC
+CONFIG_DFU_MTD
+CONFIG_DFU_NAND
+CONFIG_DFU_RAM
+CONFIG_DFU_SF
+CONFIG_DHCP_MIN_EXT_LEN
+CONFIG_DIALOG_POWER
+CONFIG_DIGSY_MTC
+CONFIG_DIGSY_REV5
+CONFIG_DIMM_SLOTS_PER_CTLR
+CONFIG_DIRECT_NOR_BOOT
+CONFIG_DISABLE_CONSOLE
+CONFIG_DISABLE_IMAGE_LEGACY
+CONFIG_DISABLE_PISE_TEST
+CONFIG_DISCONTIGMEM
+CONFIG_DISCOVER_PHY
+CONFIG_DISPLAY_AER_xxxx
+CONFIG_DISPLAY_BOARDINFO_LATE
+CONFIG_DISPLAY_CPUINFO
+CONFIG_DLVISION
+CONFIG_DLVISION_10G
+CONFIG_DM9000_BASE
+CONFIG_DM9000_BYTE_SWAPPED
+CONFIG_DM9000_DEBUG
+CONFIG_DM9000_NO_SROM
+CONFIG_DM9000_USE_16BIT
+CONFIG_DMA_COHERENT
+CONFIG_DMA_COHERENT_SIZE
+CONFIG_DMA_LPC32XX
+CONFIG_DMA_NONCOHERENT
+CONFIG_DMA_REQ_BIT
+CONFIG_DMC_DDRCFG
+CONFIG_DMC_DDRCTL
+CONFIG_DMC_DDREMR1
+CONFIG_DMC_DDRMR
+CONFIG_DMC_DDRTR0
+CONFIG_DMC_DDRTR1
+CONFIG_DMC_DDRTR2
+CONFIG_DNET_AUTONEG_TIMEOUT
+CONFIG_DNP5370_EXT_WD_DISABLE
+CONFIG_DOS_PARTITION
+CONFIG_DPLL_SSC_RATE_1PER
+CONFIG_DP_DDR_CTRL
+CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
+CONFIG_DP_DDR_NUM_CTRLS
+CONFIG_DRA7XX
+CONFIG_DRAM_2G
+CONFIG_DRAM_TIMINGS_
+CONFIG_DRIVER_AT91EMAC
+CONFIG_DRIVER_AT91EMAC_PHYADDR
+CONFIG_DRIVER_AT91EMAC_QUIET
+CONFIG_DRIVER_AX88180
+CONFIG_DRIVER_AX88796L
+CONFIG_DRIVER_DM9000
+CONFIG_DRIVER_EP93XX_MAC
+CONFIG_DRIVER_ETHER
+CONFIG_DRIVER_NAND_BFIN
+CONFIG_DRIVER_NE2000
+CONFIG_DRIVER_NE2000_BASE
+CONFIG_DRIVER_NE2000_CCR
+CONFIG_DRIVER_NE2000_VAL
+CONFIG_DRIVER_SMC911X_BASE
+CONFIG_DRIVER_TI_CPSW
+CONFIG_DRIVER_TI_EMAC
+CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE
+CONFIG_DRIVER_TI_EMAC_USE_RMII
+CONFIG_DRIVER_TI_KEYSTONE_NET
+CONFIG_DRIVE_MMC
+CONFIG_DRIVE_SATA
+CONFIG_DRIVE_TYPES
+CONFIG_DRIVE_USB
+CONFIG_DS4510
+CONFIG_DSP_CLUSTER_START
+CONFIG_DTT
+CONFIG_DTT_AD7414
+CONFIG_DTT_ADM1021
+CONFIG_DTT_DS1621
+CONFIG_DTT_DS1775
+CONFIG_DTT_DS620
+CONFIG_DTT_HYSTERESIS
+CONFIG_DTT_LM63
+CONFIG_DTT_LM75
+CONFIG_DTT_LM81
+CONFIG_DTT_MAX_TEMP
+CONFIG_DTT_MIN_TEMP
+CONFIG_DTT_PWM_LOOKUPTABLE
+CONFIG_DTT_SENSORS
+CONFIG_DTT_TACH_LIMIT
+CONFIG_DUOVERO
+CONFIG_DV_USBPHY_CTL
+CONFIG_DWC2_DFLT_SPEED_FULL
+CONFIG_DWC2_DMA_BURST_SIZE
+CONFIG_DWC2_DMA_ENABLE
+CONFIG_DWC2_ENABLE_DYNAMIC_FIFO
+CONFIG_DWC2_HOST_NPERIO_TX_FIFO_SIZE
+CONFIG_DWC2_HOST_PERIO_TX_FIFO_SIZE
+CONFIG_DWC2_HOST_RX_FIFO_SIZE
+CONFIG_DWC2_I2C_ENABLE
+CONFIG_DWC2_IC_USB_CAP
+CONFIG_DWC2_MAX_CHANNELS
+CONFIG_DWC2_MAX_PACKET_COUNT
+CONFIG_DWC2_MAX_TRANSFER_SIZE
+CONFIG_DWC2_PHY_TYPE
+CONFIG_DWC2_PHY_ULPI_DDR
+CONFIG_DWC2_PHY_ULPI_EXT_VBUS
+CONFIG_DWC2_THR_CTL
+CONFIG_DWC2_TS_DLINE
+CONFIG_DWC2_TX_THR_LENGTH
+CONFIG_DWC2_ULPI_FS_LS
+CONFIG_DWC2_UTMI_WIDTH
+CONFIG_DWCDDR21MCTL
+CONFIG_DWCDDR21MCTL_BASE
+CONFIG_DWC_AHSATA
+CONFIG_DWC_AHSATA_BASE_ADDR
+CONFIG_DWC_AHSATA_PORT_ID
+CONFIG_DWMMC
+CONFIG_DW_ALTDESCRIPTOR
+CONFIG_DW_AXI_BURST_LEN
+CONFIG_DW_GMAC_DEFAULT_DMA_PBL
+CONFIG_DW_MAC_FORCE_THRESHOLD_MODE
+CONFIG_DW_PORTS
+CONFIG_DW_SERIAL
+CONFIG_DW_UDC
+CONFIG_DW_WDT_BASE
+CONFIG_DW_WDT_CLOCK_KHZ
+CONFIG_DYNAMIC_MMC_DEVNO
+CONFIG_E1000_NO_NVM
+CONFIG_E300
+CONFIG_E500
+CONFIG_E500MC
+CONFIG_E5500
+CONFIG_E6500
+CONFIG_EBCAW_VAL
+CONFIG_EBC_PPC4xx_IBM_VER1
+CONFIG_EBIU_AMBCTL0_VAL
+CONFIG_EBIU_AMBCTL1_VAL
+CONFIG_EBIU_AMGCTL_VAL
+CONFIG_EBIU_DDRCTL0_VAL
+CONFIG_EBIU_DDRCTL1_VAL
+CONFIG_EBIU_DDRCTL2_VAL
+CONFIG_EBIU_DDRCTL3_VAL
+CONFIG_EBIU_DDRQUE_VAL
+CONFIG_EBIU_FCTL_VAL
+CONFIG_EBIU_MBSCTL_VAL
+CONFIG_EBIU_MODE_VAL
+CONFIG_EBIU_RSTCTL_VAL
+CONFIG_EBIU_SDBCTL_VAL
+CONFIG_EBIU_SDGCTL_VAL
+CONFIG_EBIU_SDRRC_VAL
+CONFIG_EBSZ_VAL
+CONFIG_ECC
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER
+CONFIG_ECC_MODE_MASK
+CONFIG_ECC_MODE_SHIFT
+CONFIG_ECC_SRAM_ADDR_MASK
+CONFIG_ECC_SRAM_ADDR_SHIFT
+CONFIG_ECC_SRAM_REQ_BIT
+CONFIG_ECOVEC
+CONFIG_ECOVEC_ROMIMAGE_ADDR
+CONFIG_EDB9301
+CONFIG_EDB9302
+CONFIG_EDB9302A
+CONFIG_EDB9307
+CONFIG_EDB9307A
+CONFIG_EDB9312
+CONFIG_EDB9315
+CONFIG_EDB9315A
+CONFIG_EDB93XX_INDUSTRIAL
+CONFIG_EDB93XX_SDCS0
+CONFIG_EDB93XX_SDCS1
+CONFIG_EDB93XX_SDCS2
+CONFIG_EDB93XX_SDCS3
+CONFIG_EEPRO100
+CONFIG_EEPRO100_SROM_WRITE
+CONFIG_EEPROM_BUS_ADDRESS
+CONFIG_EEPROM_CHIP_ADDRESS
+CONFIG_EEPROM_LAYOUT_HELP_STRING
+CONFIG_EFI_PARTITION
+CONFIG_EFLASH_PROTSECTORS
+CONFIG_EHCI_DESC_BIG_ENDIAN
+CONFIG_EHCI_HCD_INIT_AFTER_RESET
+CONFIG_EHCI_IS_TDI
+CONFIG_EHCI_MMIO_BIG_ENDIAN
+CONFIG_EHCI_MXS_PORT0
+CONFIG_EHCI_MXS_PORT1
+CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE
+CONFIG_EMAC_MDIO_PHY_NUM
+CONFIG_EMAC_NR_START
+CONFIG_EMAC_PHY_MODE
+CONFIG_EMIF4
+CONFIG_EMMC_BOOT
+CONFIG_EMU
+CONFIG_ENABLE_36BIT_PHYS
+CONFIG_ENABLE_MMU
+CONFIG_ENABLE_MUST_CHECK
+CONFIG_ENABLE_VBOOT
+CONFIG_ENABLE_WARN_DEPRECATED
+CONFIG_ENC_SILENTLINK
+CONFIG_ENV_ACCESS_IGNORE_FORCE
+CONFIG_ENV_ADDR
+CONFIG_ENV_ADDR_FLEX
+CONFIG_ENV_ADDR_REDUND
+CONFIG_ENV_AES
+CONFIG_ENV_BASE
+CONFIG_ENV_CALLBACK_LIST_DEFAULT
+CONFIG_ENV_CALLBACK_LIST_STATIC
+CONFIG_ENV_COMMON_BOOT
+CONFIG_ENV_EEPROM_IS_ON_I2C
+CONFIG_ENV_FIT_UCBOOT
+CONFIG_ENV_FLAGS_LIST_DEFAULT
+CONFIG_ENV_FLAGS_LIST_STATIC
+CONFIG_ENV_FLASHBOOT
+CONFIG_ENV_IS_EMBEDDED
+CONFIG_ENV_IS_EMBEDDED_IN_LDR
+CONFIG_ENV_IS_IN_
+CONFIG_ENV_IS_IN_DATAFLASH
+CONFIG_ENV_IS_IN_EEPROM
+CONFIG_ENV_IS_IN_FAT
+CONFIG_ENV_IS_IN_FLASH
+CONFIG_ENV_IS_IN_MMC
+CONFIG_ENV_IS_IN_MRAM
+CONFIG_ENV_IS_IN_NAND
+CONFIG_ENV_IS_IN_NVRAM
+CONFIG_ENV_IS_IN_ONENAND
+CONFIG_ENV_IS_IN_REMOTE
+CONFIG_ENV_IS_IN_SPI_FLASH
+CONFIG_ENV_IS_IN_UBI
+CONFIG_ENV_IS_NOWHERE
+CONFIG_ENV_MAX_ENTRIES
+CONFIG_ENV_MIN_ENTRIES
+CONFIG_ENV_OFFSET
+CONFIG_ENV_OFFSET_OOB
+CONFIG_ENV_OFFSET_REDUND
+CONFIG_ENV_OVERWRITE
+CONFIG_ENV_RANGE
+CONFIG_ENV_RDADDR
+CONFIG_ENV_REFLASH
+CONFIG_ENV_SECT_SIZE
+CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS
+CONFIG_ENV_SETTINGS_NAND_V1
+CONFIG_ENV_SETTINGS_NAND_V2
+CONFIG_ENV_SETTINGS_V1
+CONFIG_ENV_SETTINGS_V2
+CONFIG_ENV_SIZE
+CONFIG_ENV_SIZE_FLEX
+CONFIG_ENV_SIZE_REDUND
+CONFIG_ENV_SPI_BASE
+CONFIG_ENV_SPI_BUS
+CONFIG_ENV_SPI_CS
+CONFIG_ENV_SPI_MAX_HZ
+CONFIG_ENV_SPI_MODE
+CONFIG_ENV_SROM_BANK
+CONFIG_ENV_TOTAL_SIZE
+CONFIG_ENV_UBIFS_OPTION
+CONFIG_ENV_UBI_MTD
+CONFIG_ENV_UBI_PART
+CONFIG_ENV_UBI_VOLUME
+CONFIG_ENV_UBI_VOLUME_REDUND
+CONFIG_ENV_VARS_UBOOT_CONFIG
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+CONFIG_ENV_VERSION
+CONFIG_ENV_xxx
+CONFIG_EP9301
+CONFIG_EP9302
+CONFIG_EP9307
+CONFIG_EP9312
+CONFIG_EP9315
+CONFIG_EP93XX
+CONFIG_EP93XX_NO_FLASH_CFG
+CONFIG_EP93XX_SPI
+CONFIG_EP93XX_SPI_MMC
+CONFIG_EPH_POWER_EN
+CONFIG_EPOLL
+CONFIG_ESBC_ADDR_64BIT
+CONFIG_ESBC_HDR_LS
+CONFIG_ESDHC_DETECT_8_BIT_QUIRK
+CONFIG_ESDHC_DETECT_QUIRK
+CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1
+CONFIG_ESDHC_HC_BLK_ADDR
+CONFIG_ESPRESSO7420
+CONFIG_ESPT
+CONFIG_ET1100_BASE
+CONFIG_ETH1ADDR
+CONFIG_ETH2ADDR
+CONFIG_ETHADDR
+CONFIG_ETHBASE
+CONFIG_ETHER_INDEX
+CONFIG_ETHER_LOOPBACK_TEST
+CONFIG_ETHER_NONE
+CONFIG_ETHER_ON_FCC
+CONFIG_ETHER_ON_FCC1
+CONFIG_ETHER_ON_FCC2
+CONFIG_ETHER_ON_FCC3
+CONFIG_ETHER_ON_FEC1
+CONFIG_ETHER_ON_FEC2
+CONFIG_ETHER_ON_SCC
+CONFIG_ETHPRIME
+CONFIG_ETH_BUFSIZE
+CONFIG_ETH_RXSIZE
+CONFIG_EXCEPTION_DEFER
+CONFIG_EXT4_WRITE
+CONFIG_EXTRA_BOOTARGS
+CONFIG_EXTRA_CLOCK
+CONFIG_EXTRA_ENV
+CONFIG_EXTRA_ENV_BOARD_SETTINGS
+CONFIG_EXTRA_ENV_ITB
+CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS
+CONFIG_EXTRA_ENV_SETTINGS
+CONFIG_EXTRA_ENV_SETTINGS_BASE
+CONFIG_EXTRA_ENV_SETTINGS_COMMON
+CONFIG_EXTRA_ENV_SETTINGS_DEVEL
+CONFIG_EXTRA_ENV_SETTINGS_SELECT
+CONFIG_EXTRA_ENV_UNLOCK
+CONFIG_EXTRA_ENV_USBTTY
+CONFIG_EXT_AHB2AHB_BASE
+CONFIG_EXT_AHBAPBBRG_BASE
+CONFIG_EXT_AHBPCIBRG_BASE
+CONFIG_EXT_AHBSLAVE01_BASE
+CONFIG_EXT_AHBSLAVE02_BASE
+CONFIG_EXT_PHY
+CONFIG_EXT_USB_HOST_BASE
+CONFIG_EXYNOS4
+CONFIG_EXYNOS4210
+CONFIG_EXYNOS5
+CONFIG_EXYNOS5250
+CONFIG_EXYNOS5420
+CONFIG_EXYNOS5800
+CONFIG_EXYNOS5_DT
+CONFIG_EXYNOS7420
+CONFIG_EXYNOS_ACE_SHA
+CONFIG_EXYNOS_DP
+CONFIG_EXYNOS_DWMMC
+CONFIG_EXYNOS_FB
+CONFIG_EXYNOS_MIPI_DSIM
+CONFIG_EXYNOS_RELOCATE_CODE_BASE
+CONFIG_EXYNOS_SPL
+CONFIG_EXYNOS_TMU
+CONFIG_FACTORYSET
+CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE
+CONFIG_FASTBOOT_FLASH_NAND_DEV
+CONFIG_FASTBOOT_FLASH_NAND_TRIMFFS
+CONFIG_FASTBOOT_GPT_NAME
+CONFIG_FAST_FLASH_BIT
+CONFIG_FAT_WRITE
+CONFIG_FB_ADDR
+CONFIG_FB_BACKLIGHT
+CONFIG_FB_DEFERRED_IO
+CONFIG_FDT1_ENV_ADDR
+CONFIG_FDT2_ENV_ADDR
+CONFIG_FDTADDR
+CONFIG_FDTFILE
+CONFIG_FDT_ENV_ADDR
+CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
+CONFIG_FDT_FIXUP_PARTITIONS
+CONFIG_FDT_FIXUP_PCI_IRQ
+CONFIG_FEATURE_CLEAN_UP
+CONFIG_FEATURE_COMMAND_EDITING
+CONFIG_FEATURE_SH_APPLETS_ALWAYS_WIN
+CONFIG_FEATURE_SH_EXTRA_QUIET
+CONFIG_FEATURE_SH_FANCY_PROMPT
+CONFIG_FEATURE_SH_STANDALONE_SHELL
+CONFIG_FEC1_PHY
+CONFIG_FEC2_PHY
+CONFIG_FEC_10MBIT
+CONFIG_FEC_AN_TIMEOUT
+CONFIG_FEC_ENET
+CONFIG_FEC_ENET_DEV
+CONFIG_FEC_FIXED_SPEED
+CONFIG_FEC_MXC
+CONFIG_FEC_MXC_25M_REF_CLK
+CONFIG_FEC_MXC_PHYADDR
+CONFIG_FEC_MXC_SWAP_PACKET
+CONFIG_FEC_XCV_TYPE
+CONFIG_FEROCEON
+CONFIG_FEROCEON_88FR131
+CONFIG_FFUART
+CONFIG_FILE
+CONFIG_FIRMWARE_OFFSET
+CONFIG_FIRMWARE_SIZE
+CONFIG_FIT_DISABLE_SHA256
+CONFIG_FIXED_PHY
+CONFIG_FIXED_PHY_ADDR
+CONFIG_FIXED_SDHCI_ALIGNED_BUFFER
+CONFIG_FLASHBOOTCOMMAND
+CONFIG_FLASHCARD
+CONFIG_FLASH_16BIT
+CONFIG_FLASH_8BIT
+CONFIG_FLASH_BASE
+CONFIG_FLASH_BR_PRELIM
+CONFIG_FLASH_CFI_DRIVER
+CONFIG_FLASH_CFI_LEGACY
+CONFIG_FLASH_CFI_MTD
+CONFIG_FLASH_END
+CONFIG_FLASH_NOT_MEM_MAPPED
+CONFIG_FLASH_OR_PRELIM
+CONFIG_FLASH_PNOR
+CONFIG_FLASH_SECTOR_SIZE
+CONFIG_FLASH_SHOW_PROGRESS
+CONFIG_FLASH_SPANSION_S29WS_N
+CONFIG_FLASH_VERIFY
+CONFIG_FMAN_ENET
+CONFIG_FM_PLAT_CLK_DIV
+CONFIG_FO300
+CONFIG_FOO
+CONFIG_FORCE_DDR_DATA_BUS_WIDTH_32
+CONFIG_FORMIKE
+CONFIG_FPGA
+CONFIG_FPGA_ALTERA
+CONFIG_FPGA_COUNT
+CONFIG_FPGA_CYCLON2
+CONFIG_FPGA_DELAY
+CONFIG_FPGA_SOCFPGA
+CONFIG_FPGA_SPARTAN2
+CONFIG_FPGA_SPARTAN3
+CONFIG_FPGA_STRATIX_V
+CONFIG_FPGA_XILINX
+CONFIG_FPGA_ZYNQPL
+CONFIG_FSLDMAFEC
+CONFIG_FSL_CADMUS
+CONFIG_FSL_CORENET
+CONFIG_FSL_CPLD
+CONFIG_FSL_DCU_FB
+CONFIG_FSL_DCU_SII9022A
+CONFIG_FSL_DDR_BIST
+CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+CONFIG_FSL_DDR_INTERACTIVE
+CONFIG_FSL_DDR_SYNC_REFRESH
+CONFIG_FSL_DEBUG_SERVER
+CONFIG_FSL_DEEP_SLEEP
+CONFIG_FSL_DEVICE_DISABLE
+CONFIG_FSL_DIU_CH7301
+CONFIG_FSL_DIU_FB
+CONFIG_FSL_DMA
+CONFIG_FSL_DSPI1
+CONFIG_FSL_ELBC
+CONFIG_FSL_ESDHC
+CONFIG_FSL_ESDHC_ADAPTER_IDENT
+CONFIG_FSL_ESDHC_PIN_MUX
+CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
+CONFIG_FSL_FIXED_MMC_LOCATION
+CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
+CONFIG_FSL_I2C_CUSTOM_DFSR
+CONFIG_FSL_I2C_CUSTOM_FDR
+CONFIG_FSL_IFC
+CONFIG_FSL_IIM
+CONFIG_FSL_ISBC_KEY_EXT
+CONFIG_FSL_LAW
+CONFIG_FSL_LAYERSCAPE
+CONFIG_FSL_LBC
+CONFIG_FSL_LINFLEXUART
+CONFIG_FSL_LSCH2
+CONFIG_FSL_LSCH3
+CONFIG_FSL_LS_PPA
+CONFIG_FSL_MC9SDZ60
+CONFIG_FSL_MC_ENET
+CONFIG_FSL_MEMAC
+CONFIG_FSL_NFC_CHIPS
+CONFIG_FSL_NFC_SPARE_SIZE
+CONFIG_FSL_NFC_WIDTH
+CONFIG_FSL_NFC_WRITE_SIZE
+CONFIG_FSL_NGPIXIS
+CONFIG_FSL_PCIE_DISABLE_ASPM
+CONFIG_FSL_PCIE_RESET
+CONFIG_FSL_PCI_INIT
+CONFIG_FSL_PIXIS
+CONFIG_FSL_PMIC_BITLEN
+CONFIG_FSL_PMIC_BUS
+CONFIG_FSL_PMIC_CLK
+CONFIG_FSL_PMIC_CS
+CONFIG_FSL_PMIC_MODE
+CONFIG_FSL_QIXIS
+CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
+CONFIG_FSL_QIXIS_V2
+CONFIG_FSL_SATA
+CONFIG_FSL_SATA_ERRATUM_A001
+CONFIG_FSL_SATA_V2
+CONFIG_FSL_SDHC_V2_3
+CONFIG_FSL_SDRAM_TYPE
+CONFIG_FSL_SERDES
+CONFIG_FSL_SERDES1
+CONFIG_FSL_SERDES2
+CONFIG_FSL_SGMII_RISER
+CONFIG_FSL_SPI_INTERFACE
+CONFIG_FSL_TBCLK_EXTRA_DIV
+CONFIG_FSL_TRUST_ARCH_v1
+CONFIG_FSL_TZASC_400
+CONFIG_FSL_TZPC_BP147
+CONFIG_FSL_USDHC
+CONFIG_FSL_VIA
+CONFIG_FSMC_NAND_BASE
+CONFIG_FSMTDBLK
+CONFIG_FSNOTIFY
+CONFIG_FS_EXT4
+CONFIG_FS_FAT
+CONFIG_FS_FAT_MAX_CLUSTSIZE
+CONFIG_FS_POSIX_ACL
+CONFIG_FTAHBC020S
+CONFIG_FTAHBC020S_BASE
+CONFIG_FTAPBBRG020S_01_BASE
+CONFIG_FTCFC010_BASE
+CONFIG_FTDMAC020_BASE
+CONFIG_FTGMAC100_BASE
+CONFIG_FTGMAC100_EGIGA
+CONFIG_FTGPIO010_BASE
+CONFIG_FTI2C010_BASE1
+CONFIG_FTI2C010_BASE2
+CONFIG_FTI2C010_BASE3
+CONFIG_FTI2C010_CLOCK
+CONFIG_FTI2C010_TIMEOUT
+CONFIG_FTIDE020S_BASE
+CONFIG_FTIIC010_BASE
+CONFIG_FTINTC010_BASE
+CONFIG_FTLCDC100_BASE
+CONFIG_FTMAC100
+CONFIG_FTMAC100_BASE
+CONFIG_FTMAC110_BASE
+CONFIG_FTPCI100_BASE
+CONFIG_FTPCI100_IO_SIZE
+CONFIG_FTPCI100_MEM_BASE
+CONFIG_FTPCI100_MEM_SIZE
+CONFIG_FTPMU010
+CONFIG_FTPMU010_BASE
+CONFIG_FTPMU010_POWER
+CONFIG_FTPWM010_BASE
+CONFIG_FTRACE_MCOUNT_RECORD
+CONFIG_FTRTC010_BASE
+CONFIG_FTRTC010_EXTCLK
+CONFIG_FTRTC010_PCLK
+CONFIG_FTSDC010
+CONFIG_FTSDC010_BASE
+CONFIG_FTSDC010_BASE_LIST
+CONFIG_FTSDC010_NUMBER
+CONFIG_FTSDC010_SDIO
+CONFIG_FTSDC021_CLOCK
+CONFIG_FTSDMC021
+CONFIG_FTSDMC021_BASE
+CONFIG_FTSMC020
+CONFIG_FTSMC020_BASE
+CONFIG_FTSSP010_01_BASE
+CONFIG_FTSSP010_02_BASE
+CONFIG_FTTMR010_BASE
+CONFIG_FTTMR010_EXT_CLK
+CONFIG_FTUART010_01_BASE
+CONFIG_FTUART010_02_BASE
+CONFIG_FTUART010_03_BASE
+CONFIG_FTWDT010_BASE
+CONFIG_FTWDT010_WATCHDOG
+CONFIG_FUNC_ISRAM_ADDR
+CONFIG_FWUPDATE_DEBUG
+CONFIG_FZOTG266HD0A_BASE
+CONFIG_GATEWAYIP
+CONFIG_GCOV_KERNEL
+CONFIG_GCOV_PROFILE_ALL
+CONFIG_GENERIC_ATMEL_MCI
+CONFIG_GENERIC_MMC
+CONFIG_GICV2
+CONFIG_GICV3
+CONFIG_GLOBAL_DATA_NOT_REG10
+CONFIG_GLOBAL_TIMER
+CONFIG_GMII
+CONFIG_GOOD_SESH4
+CONFIG_GPCNTRL
+CONFIG_GPCS_PHY1_ADDR
+CONFIG_GPCS_PHY2_ADDR
+CONFIG_GPCS_PHY3_ADDR
+CONFIG_GPCS_PHY_ADDR
+CONFIG_GPIO
+CONFIG_GPIO_ENABLE_SPI_FLASH
+CONFIG_GPIO_LED
+CONFIG_GPIO_LED_INVERTED_TABLE
+CONFIG_GPIO_LED_STUBS
+CONFIG_GREEN_LED
+CONFIG_GRETH
+CONFIG_GRETH_10MBIT
+CONFIG_GRSIM
+CONFIG_GRXC3S1500
+CONFIG_GR_EP2S60
+CONFIG_GURNARD_FPGA
+CONFIG_GURNARD_SPLASH
+CONFIG_GZIP
+CONFIG_GZIP_COMPRESSED
+CONFIG_GZIP_COMPRESS_DEF_SZ
+CONFIG_G_DNL_THOR_PRODUCT_NUM
+CONFIG_G_DNL_THOR_VENDOR_NUM
+CONFIG_G_DNL_UMS_PRODUCT_NUM
+CONFIG_G_DNL_UMS_VENDOR_NUM
+CONFIG_H264_FREQ
+CONFIG_H8300
+CONFIG_HALEAKALA
+CONFIG_HARD_I2C
+CONFIG_HARD_SPI
+CONFIG_HASH_VERIFY
+CONFIG_HAS_DATAFLASH
+CONFIG_HAS_ETH0
+CONFIG_HAS_ETH1
+CONFIG_HAS_ETH2
+CONFIG_HAS_ETH3
+CONFIG_HAS_ETH4
+CONFIG_HAS_ETH5
+CONFIG_HAS_ETH7
+CONFIG_HAS_FEC
+CONFIG_HAS_FSL_DR_USB
+CONFIG_HAS_FSL_MPH_USB
+CONFIG_HAS_FSL_XHCI_USB
+CONFIG_HAS_POST
+CONFIG_HAS_VR
+CONFIG_HAVE_ACPI_RESUME
+CONFIG_HAVE_OWN_RESET
+CONFIG_HCLK_FREQ
+CONFIG_HDBOOT
+CONFIG_HDMI_ENCODER_I2C_ADDR
+CONFIG_HETROGENOUS_CLUSTERS
+CONFIG_HIDE_LOGO_VERSION
+CONFIG_HIGH_BATS
+CONFIG_HIKEY_DWMMC
+CONFIG_HIKEY_GPIO
+CONFIG_HIS_DRIVER
+CONFIG_HITACHI_SP19X001_Z1A
+CONFIG_HITACHI_SX14
+CONFIG_HLD1045
+CONFIG_HOSTNAME
+CONFIG_HOST_MAX_DEVICES
+CONFIG_HOTPLUG
+CONFIG_HPS_ALTERAGRP_DBGATCLK
+CONFIG_HPS_ALTERAGRP_MAINCLK
+CONFIG_HPS_ALTERAGRP_MPUCLK
+CONFIG_HPS_CLK_CAN0_HZ
+CONFIG_HPS_CLK_CAN1_HZ
+CONFIG_HPS_CLK_EMAC0_HZ
+CONFIG_HPS_CLK_EMAC1_HZ
+CONFIG_HPS_CLK_F2S_PER_REF_HZ
+CONFIG_HPS_CLK_F2S_SDR_REF_HZ
+CONFIG_HPS_CLK_GPIODB_HZ
+CONFIG_HPS_CLK_L4_MP_HZ
+CONFIG_HPS_CLK_L4_SP_HZ
+CONFIG_HPS_CLK_MAINVCO_HZ
+CONFIG_HPS_CLK_NAND_HZ
+CONFIG_HPS_CLK_OSC1_HZ
+CONFIG_HPS_CLK_OSC2_HZ
+CONFIG_HPS_CLK_PERVCO_HZ
+CONFIG_HPS_CLK_QSPI_HZ
+CONFIG_HPS_CLK_SDMMC_HZ
+CONFIG_HPS_CLK_SDRVCO_HZ
+CONFIG_HPS_CLK_SPIM_HZ
+CONFIG_HPS_CLK_USBCLK_HZ
+CONFIG_HPS_DBCTRL_STAYOSC1
+CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH
+CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH
+CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH
+CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT
+CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT
+CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK
+CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK
+CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP
+CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP
+CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT
+CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK
+CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK
+CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK
+CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK
+CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT
+CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT
+CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT
+CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK
+CONFIG_HPS_MAINPLLGRP_VCO_DENOM
+CONFIG_HPS_MAINPLLGRP_VCO_NUMER
+CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK
+CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK
+CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK
+CONFIG_HPS_PERPLLGRP_DIV_USBCLK
+CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT
+CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT
+CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK
+CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT
+CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT
+CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT
+CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT
+CONFIG_HPS_PERPLLGRP_SRC_NAND
+CONFIG_HPS_PERPLLGRP_SRC_QSPI
+CONFIG_HPS_PERPLLGRP_SRC_SDMMC
+CONFIG_HPS_PERPLLGRP_VCO_DENOM
+CONFIG_HPS_PERPLLGRP_VCO_NUMER
+CONFIG_HPS_PERPLLGRP_VCO_PSRC
+CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT
+CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE
+CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT
+CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE
+CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT
+CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE
+CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT
+CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE
+CONFIG_HPS_SDRPLLGRP_VCO_DENOM
+CONFIG_HPS_SDRPLLGRP_VCO_NUMER
+CONFIG_HPS_SDRPLLGRP_VCO_SSRC
+CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR
+CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP
+CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH
+CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP
+CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER
+CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN
+CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN
+CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN
+CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL
+CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE
+CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS
+CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN
+CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT
+CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH
+CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS
+CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS
+CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS
+CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS
+CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH
+CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH
+CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN
+CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ
+CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT
+CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT
+CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC
+CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE
+CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST
+CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED
+CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED
+CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED
+CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK
+CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES
+CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES
+CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0
+CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32
+CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0
+CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4
+CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36
+CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY
+CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0
+CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32
+CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64
+CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0
+CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32
+CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0
+CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14
+CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46
+CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0
+CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN
+CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP
+CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL
+CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA
+CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP
+CONFIG_HP_CLK_FREQ
+CONFIG_HRCON
+CONFIG_HRCON_DH
+CONFIG_HRCON_FANS
+CONFIG_HSMMC2_8BIT
+CONFIG_HUSH_INIT_VAR
+CONFIG_HVBOOT
+CONFIG_HWCONFIG
+CONFIG_HW_ENV_SETTINGS
+CONFIG_HW_WATCHDOG
+CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE
+CONFIG_HW_WATCHDOG_TIMEOUT_MS
+CONFIG_I2C
+CONFIG_I2CFAST
+CONFIG_I2C_CHIPADDRESS
+CONFIG_I2C_CMD_TREE
+CONFIG_I2C_ENV_EEPROM_BUS
+CONFIG_I2C_FPGA
+CONFIG_I2C_GSC
+CONFIG_I2C_MAC_OFFSET
+CONFIG_I2C_MBB_TIMEOUT
+CONFIG_I2C_MULTI_BUS
+CONFIG_I2C_MV
+CONFIG_I2C_MVTWSI
+CONFIG_I2C_MVTWSI_BASE
+CONFIG_I2C_MVTWSI_BASE0
+CONFIG_I2C_MVTWSI_BASE1
+CONFIG_I2C_MVTWSI_BASE2
+CONFIG_I2C_MVTWSI_BASE3
+CONFIG_I2C_MVTWSI_BASE4
+CONFIG_I2C_MVTWSI_BASE5
+CONFIG_I2C_MXC
+CONFIG_I2C_PMIC
+CONFIG_I2C_REPEATED_START
+CONFIG_I2C_RTC_ADDR
+CONFIG_I2C_TIMEOUT
+CONFIG_IBM_EMAC4_V4
+CONFIG_ICACHE
+CONFIG_ICACHE_OFF
+CONFIG_ICON
+CONFIG_ICS307_REFCLK_HZ
+CONFIG_IDENT_STRING
+CONFIG_IDE_8xx_DIRECT
+CONFIG_IDE_8xx_PCCARD
+CONFIG_IDE_INIT_POSTRESET
+CONFIG_IDE_LED
+CONFIG_IDE_PCMCIA
+CONFIG_IDE_PREINIT
+CONFIG_IDE_REG_CS
+CONFIG_IDE_RESET
+CONFIG_IDE_RESET_ROUTINE
+CONFIG_IDE_SIL680
+CONFIG_IDE_SWAP_IO
+CONFIG_IDS8313
+CONFIG_IDT8T49N222A
+CONFIG_ID_EEPROM
+CONFIG_IFM_DEFAULT_ENV_NEW
+CONFIG_IFM_DEFAULT_ENV_OLD
+CONFIG_IFM_DEFAULT_ENV_SETTINGS
+CONFIG_IFM_SENSOR_TYPE
+CONFIG_IMA
+CONFIG_IMAGE_FORMAT_LEGACY
+CONFIG_IMX
+CONFIG_IMX31_PHYCORE_EET
+CONFIG_IMX6_PWM_PER_CLK
+CONFIG_IMX_HDMI
+CONFIG_IMX_NAND
+CONFIG_IMX_OTP
+CONFIG_IMX_THERMAL
+CONFIG_IMX_VIDEO_SKIP
+CONFIG_IMX_WATCHDOG
+CONFIG_INETSPACE_V2
+CONFIG_INITRD_TAG
+CONFIG_INIT_CRITICAL
+CONFIG_INIT_IGNORE_ERROR
+CONFIG_INIT_TLB
+CONFIG_INI_ALLOW_MULTILINE
+CONFIG_INI_CASE_INSENSITIVE
+CONFIG_INI_MAX_LINE
+CONFIG_INI_MAX_NAME
+CONFIG_INI_MAX_SECTION
+CONFIG_INKA4X0
+CONFIG_INTEGRITY
+CONFIG_INTEL_ICH6_GPIO
+CONFIG_INTERRUPTS
+CONFIG_INTIB
+CONFIG_IO
+CONFIG_IO64
+CONFIG_IOCON
+CONFIG_IODELAY_RECALIBRATION
+CONFIG_IOMUX_LPSR
+CONFIG_IOMUX_SHARE_CONF_REG
+CONFIG_IOS
+CONFIG_IO_TRACE
+CONFIG_IP86x
+CONFIG_IPADDR
+CONFIG_IPADDR1
+CONFIG_IPADDR2
+CONFIG_IPAM390_GPIO_BOOTMODE
+CONFIG_IPAM390_GPIO_LED_GREEN
+CONFIG_IPAM390_GPIO_LED_RED
+CONFIG_IPEK01
+CONFIG_IPIPE
+CONFIG_IPROC
+CONFIG_IPUV3_CLK
+CONFIG_IP_DEFRAG
+CONFIG_IRAM_BASE
+CONFIG_IRAM_END
+CONFIG_IRAM_SIZE
+CONFIG_IRAM_STACK
+CONFIG_IRAM_TOP
+CONFIG_IRDA_BASE
+CONFIG_ISO_PARTITION
+CONFIG_ISP1362_USB
+CONFIG_IS_
+CONFIG_IS_BUILTIN
+CONFIG_IS_ENABLED
+CONFIG_IS_INVALID
+CONFIG_IS_MODULE
+CONFIG_IS_VALID
+CONFIG_IVMS8
+CONFIG_JFFS2_CMDLINE
+CONFIG_JFFS2_DEV
+CONFIG_JFFS2_LZO
+CONFIG_JFFS2_NAND
+CONFIG_JFFS2_PART_OFFSET
+CONFIG_JFFS2_PART_SIZE
+CONFIG_JFFS2_SUMMARY
+CONFIG_JRSTARTR_JR0
+CONFIG_JTAG_CONSOLE
+CONFIG_JTAG_CONSOLE_TIMEOUT
+CONFIG_JUPITER
+CONFIG_K2E_EVM
+CONFIG_K2G_EVM
+CONFIG_K2HK_EVM
+CONFIG_K2L_EVM
+CONFIG_KALLSYMS
+CONFIG_KASAN
+CONFIG_KATMAI
+CONFIG_KCLK_DIS
+CONFIG_KEEP_SERVERADDR
+CONFIG_KERNEL_OFFSET
+CONFIG_KEYBOARD
+CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE
+CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE
+CONFIG_KEYSTONE_RBL_NAND
+CONFIG_KEY_REVOCATION
+CONFIG_KGDB_BAUDRATE
+CONFIG_KGDB_EXTC_PINSEL
+CONFIG_KGDB_EXTC_RATE
+CONFIG_KGDB_INDEX
+CONFIG_KGDB_ON_SCC
+CONFIG_KGDB_ON_SMC
+CONFIG_KGDB_SER_INDEX
+CONFIG_KILAUEA
+CONFIG_KIRKWOOD_EGIGA_INIT
+CONFIG_KIRKWOOD_GPIO
+CONFIG_KIRKWOOD_PCIE_INIT
+CONFIG_KIRKWOOD_RGMII_PAD_1V8
+CONFIG_KIRKWOOD_SPI
+CONFIG_KIRQ_EN
+CONFIG_KM8321
+CONFIG_KM8XX
+CONFIG_KMCOGE4
+CONFIG_KMCOGE5NE
+CONFIG_KMETER1
+CONFIG_KMLION1
+CONFIG_KMOPTI2
+CONFIG_KMP204X
+CONFIG_KMSUPX5
+CONFIG_KMTEGR1
+CONFIG_KMTEPR2
+CONFIG_KMVECT1
+CONFIG_KM_82XX
+CONFIG_KM_BOARD_EXTRA_ENV
+CONFIG_KM_BOARD_NAME
+CONFIG_KM_COGE5UN
+CONFIG_KM_COMMON_ETH_INIT
+CONFIG_KM_CONSOLE_TTY
+CONFIG_KM_CRAMFS_ADDR
+CONFIG_KM_DEF_ARCH
+CONFIG_KM_DEF_BOOT_ARGS_CPU
+CONFIG_KM_DEF_ENV
+CONFIG_KM_DEF_ENV_BOOTARGS
+CONFIG_KM_DEF_ENV_BOOTPARAMS
+CONFIG_KM_DEF_ENV_BOOTTARGETS
+CONFIG_KM_DEF_ENV_CONSTANTS
+CONFIG_KM_DEF_ENV_CPU
+CONFIG_KM_DEF_ENV_FLASH_BOOT
+CONFIG_KM_DEF_NETDEV
+CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI
+CONFIG_KM_DISABLE_PCI
+CONFIG_KM_DISABLE_PCIE
+CONFIG_KM_ECC_MODE
+CONFIG_KM_ENV_IS_IN_SPI_NOR
+CONFIG_KM_FDT_ADDR
+CONFIG_KM_FPGA_CONFIG
+CONFIG_KM_I2C_ABORT
+CONFIG_KM_IVM_BUS
+CONFIG_KM_KERNEL_ADDR
+CONFIG_KM_KIRKWOOD
+CONFIG_KM_KIRKWOOD_128M16
+CONFIG_KM_KIRKWOOD_PCI
+CONFIG_KM_MGCOGE3UN
+CONFIG_KM_MVEXTSW_ADDR
+CONFIG_KM_NEW_ENV
+CONFIG_KM_NUSA
+CONFIG_KM_PHRAM
+CONFIG_KM_PIGGY4_88E6061
+CONFIG_KM_PIGGY4_88E6352
+CONFIG_KM_PNVRAM
+CONFIG_KM_PORTL2
+CONFIG_KM_RESERVED_PRAM
+CONFIG_KM_ROOTFSSIZE
+CONFIG_KM_SUGP1
+CONFIG_KM_SUV31
+CONFIG_KM_UBI_LINUX_MTD
+CONFIG_KM_UBI_PARTITION_NAME_APP
+CONFIG_KM_UBI_PARTITION_NAME_BOOT
+CONFIG_KM_UBI_PART_BOOT_OPTS
+CONFIG_KM_UIMAGE_NAME
+CONFIG_KM_UPDATE_UBOOT
+CONFIG_KONA
+CONFIG_KONA_GPIO
+CONFIG_KONA_RESET_S
+CONFIG_KONA_SDHCI
+CONFIG_KPROBES
+CONFIG_KS8851_MLL
+CONFIG_KS8851_MLL_BASEADDR
+CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE
+CONFIG_KSNAV_NETCP_PDMA_RX_BASE
+CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM
+CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE
+CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM
+CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE
+CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE
+CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE
+CONFIG_KSNAV_NETCP_PDMA_TX_BASE
+CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM
+CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE
+CONFIG_KSNAV_PKTDMA_NETCP
+CONFIG_KSNAV_QM_BASE_ADDRESS
+CONFIG_KSNAV_QM_CONF_BASE
+CONFIG_KSNAV_QM_DESC_SETUP_BASE
+CONFIG_KSNAV_QM_INTD_CONF_BASE
+CONFIG_KSNAV_QM_LINK_RAM_BASE
+CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE
+CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE
+CONFIG_KSNAV_QM_PDSP1_CMD_BASE
+CONFIG_KSNAV_QM_PDSP1_CTRL_BASE
+CONFIG_KSNAV_QM_PDSP1_IRAM_BASE
+CONFIG_KSNAV_QM_QPOOL_NUM
+CONFIG_KSNAV_QM_QUEUE_STATUS_BASE
+CONFIG_KSNAV_QM_REGION_NUM
+CONFIG_KSNAV_QM_STATUS_RAM_BASE
+CONFIG_KSNET_CPSW_NUM_PORTS
+CONFIG_KSNET_MAC_ID_BASE
+CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
+CONFIG_KSNET_NETCP_BASE
+CONFIG_KSNET_NETCP_V1_0
+CONFIG_KSNET_NETCP_V1_5
+CONFIG_KSNET_SERDES_LANES_PER_SGMII
+CONFIG_KSNET_SERDES_SGMII2_BASE
+CONFIG_KSNET_SERDES_SGMII_BASE
+CONFIG_KVM_GUEST
+CONFIG_KW88F6192
+CONFIG_KW88F6281
+CONFIG_KW88F6702
+CONFIG_KYOCERA_KCS057QV1AJ
+CONFIG_KZM_A9_GT
+CONFIG_L1_INIT_RAM
+CONFIG_L2_CACHE
+CONFIG_LAN91C96_USE_32_BIT
+CONFIG_LAST_STAGE_INIT
+CONFIG_LAYERSCAPE_NS_ACCESS
+CONFIG_LBA48
+CONFIG_LBD
+CONFIG_LBDAF
+CONFIG_LCD
+CONFIG_LCD_ALIGNMENT
+CONFIG_LCD_BMP_RLE8
+CONFIG_LCD_DT_SIMPLEFB
+CONFIG_LCD_INFO
+CONFIG_LCD_INFO_BELOW_LOGO
+CONFIG_LCD_IN_PSRAM
+CONFIG_LCD_LOGO
+CONFIG_LCD_MENU
+CONFIG_LCD_MENU_BOARD
+CONFIG_LCD_NOSTDOUT
+CONFIG_LCD_ROTATION
+CONFIG_LD9040
+CONFIG_LEGACY
+CONFIG_LEGACY_BOOTCMD_ENV
+CONFIG_LEON_RAM_SDRAM
+CONFIG_LEON_RAM_SDRAM_NOSRAM
+CONFIG_LEON_RAM_SELECT
+CONFIG_LEON_RAM_SRAM
+CONFIG_LG4573
+CONFIG_LG4573_BUS
+CONFIG_LG4573_CS
+CONFIG_LIBATA
+CONFIG_LIB_HW_RAND
+CONFIG_LIB_UUID
+CONFIG_LINUX
+CONFIG_LINUX_CMDLINE_ADDR
+CONFIG_LINUX_CMDLINE_SIZE
+CONFIG_LINUX_RESET_VEC
+CONFIG_LITTLETON_LCD
+CONFIG_LMB
+CONFIG_LMS283GF05
+CONFIG_LOADADDR
+CONFIG_LOADCMD
+CONFIG_LOADS_ECHO
+CONFIG_LOGBUFFER
+CONFIG_LOWBOOT
+CONFIG_LOWPOWER_ADDR
+CONFIG_LOWPOWER_FLAG
+CONFIG_LOW_MCFCLK
+CONFIG_LPC32XX_ETH
+CONFIG_LPC32XX_ETH_BUFS_BASE
+CONFIG_LPC32XX_HSUART
+CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY
+CONFIG_LPC32XX_NAND_MLC_NAND_TA
+CONFIG_LPC32XX_NAND_MLC_RD_HIGH
+CONFIG_LPC32XX_NAND_MLC_RD_LOW
+CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY
+CONFIG_LPC32XX_NAND_MLC_WR_HIGH
+CONFIG_LPC32XX_NAND_MLC_WR_LOW
+CONFIG_LPC32XX_NAND_SLC_RDR_CLKS
+CONFIG_LPC32XX_NAND_SLC_RHOLD
+CONFIG_LPC32XX_NAND_SLC_RSETUP
+CONFIG_LPC32XX_NAND_SLC_RWIDTH
+CONFIG_LPC32XX_NAND_SLC_WDR_CLKS
+CONFIG_LPC32XX_NAND_SLC_WHOLD
+CONFIG_LPC32XX_NAND_SLC_WSETUP
+CONFIG_LPC32XX_NAND_SLC_WWIDTH
+CONFIG_LPC32XX_SDRAM_
+CONFIG_LPC32XX_SPL
+CONFIG_LPC32XX_SSP
+CONFIG_LPC32XX_SSP_TIMEOUT
+CONFIG_LPC_BASE
+CONFIG_LPC_IO_BASE
+CONFIG_LPUART
+CONFIG_LPUART_32B_REG
+CONFIG_LQ035Q1_LCD_MODE
+CONFIG_LQ035Q1_SPI_BUS
+CONFIG_LQ035Q1_SPI_CS
+CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI
+CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI
+CONFIG_LQ038J7DH53
+CONFIG_LS1012A
+CONFIG_LS102XA
+CONFIG_LS102XA_STREAM_ID
+CONFIG_LS1043A
+CONFIG_LS2080A
+CONFIG_LSCHLV2
+CONFIG_LSXHL
+CONFIG_LUAN
+CONFIG_LWMON5
+CONFIG_LXT971_NO_SLEEP
+CONFIG_LYNXKDI
+CONFIG_LZMA
+CONFIG_LZO
+CONFIG_M41T94_SPI_CS
+CONFIG_M520x
+CONFIG_M52277EVB
+CONFIG_M5253DEMO
+CONFIG_M5253EVBE
+CONFIG_M5275EVB
+CONFIG_M5301x
+CONFIG_M54418TWR
+CONFIG_M54451EVB
+CONFIG_M54455EVB
+CONFIG_M88E1111_DISABLE_FIBER
+CONFIG_M88E1111_PHY
+CONFIG_M88E1112_PHY
+CONFIG_M88E1141_PHY
+CONFIG_MACB
+CONFIG_MACB0_PHY
+CONFIG_MACB1_PHY
+CONFIG_MACB2_PHY
+CONFIG_MACB3_PHY
+CONFIG_MACB_SEARCH_PHY
+CONFIG_MACH_A0
+CONFIG_MACH_A2F
+CONFIG_MACH_ABACUS
+CONFIG_MACH_ABB_GMA_1_1
+CONFIG_MACH_ABILENE
+CONFIG_MACH_ABLE
+CONFIG_MACH_ACER_A5
+CONFIG_MACH_ACER_A8
+CONFIG_MACH_ACER_GAUGUIN
+CONFIG_MACH_ACER_MAYA
+CONFIG_MACH_ACMENETUSFOXG20
+CONFIG_MACH_ACMEROVER1
+CONFIG_MACH_ACRO37XBRD
+CONFIG_MACH_ACS5K
+CONFIG_MACH_ACSX106
+CONFIG_MACH_ADSSPHERE
+CONFIG_MACH_AEBL
+CONFIG_MACH_AF4000
+CONFIG_MACH_AFEB9260
+CONFIG_MACH_AG11005
+CONFIG_MACH_AG5EVM
+CONFIG_MACH_AKITA
+CONFIG_MACH_AMK_A4
+CONFIG_MACH_AML_M5900
+CONFIG_MACH_AMS_DELTA
+CONFIG_MACH_ANCHOVY
+CONFIG_MACH_ANTARES
+CONFIG_MACH_ANTERO
+CONFIG_MACH_ANUBIS
+CONFIG_MACH_ANW6410
+CONFIG_MACH_AP4EVB
+CONFIG_MACH_APALIS_T30
+CONFIG_MACH_APP3K_ROBIN
+CONFIG_MACH_AQUARIUS
+CONFIG_MACH_AQUILA
+CONFIG_MACH_ARCOM_VULCAN
+CONFIG_MACH_ARCOM_ZEUS
+CONFIG_MACH_ARK9431
+CONFIG_MACH_ARMADA_XP_DB
+CONFIG_MACH_ARMADILLO460
+CONFIG_MACH_ARMADILLO5X0
+CONFIG_MACH_ARMADILLO800EVA
+CONFIG_MACH_ARMCORE
+CONFIG_MACH_ARMLEX4210
+CONFIG_MACH_ARMLGUEST
+CONFIG_MACH_AROWANA
+CONFIG_MACH_ARTHUR
+CONFIG_MACH_ARUBA
+CONFIG_MACH_AS1167
+CONFIG_MACH_ASL_PHOENIX
+CONFIG_MACH_ASPEN
+CONFIG_MACH_ASPENITE
+CONFIG_MACH_AST2200
+CONFIG_MACH_AT2440EVB
+CONFIG_MACH_AT572D940HFEB
+CONFIG_MACH_AT91CAP7STK
+CONFIG_MACH_AT91CAP7XDK
+CONFIG_MACH_AT91CAP9ADK
+CONFIG_MACH_AT91EB01
+CONFIG_MACH_AT91RM9200EK
+CONFIG_MACH_AT91SAM9260EK
+CONFIG_MACH_AT91SAM9261EK
+CONFIG_MACH_AT91SAM9263DESK16L
+CONFIG_MACH_AT91SAM9263EK
+CONFIG_MACH_AT91SAM9263OTLITE
+CONFIG_MACH_AT91SAM9G10EK
+CONFIG_MACH_AT91SAM9G20EK
+CONFIG_MACH_AT91SAM9G20EK_2MMC
+CONFIG_MACH_AT91SAM9G45EKES
+CONFIG_MACH_AT91SAM9M10G45EK
+CONFIG_MACH_AT91SAM9RLEK
+CONFIG_MACH_AT91SAM9X5EK
+CONFIG_MACH_ATDGP318
+CONFIG_MACH_ATEB9200
+CONFIG_MACH_ATHENE
+CONFIG_MACH_ATLAS5_C1
+CONFIG_MACH_AUTOBOT
+CONFIG_MACH_AVENGERS_LITE
+CONFIG_MACH_AVILA
+CONFIG_MACH_AWM2
+CONFIG_MACH_AX502
+CONFIG_MACH_AX8008
+CONFIG_MACH_B5500
+CONFIG_MACH_BASI
+CONFIG_MACH_BCM2708
+CONFIG_MACH_BCM589X
+CONFIG_MACH_BCMHANA_SV
+CONFIG_MACH_BCMHANA_TABLET
+CONFIG_MACH_BCMRING
+CONFIG_MACH_BEECT
+CONFIG_MACH_BIGDISK
+CONFIG_MACH_BIO3K
+CONFIG_MACH_BIPNET
+CONFIG_MACH_BLISS
+CONFIG_MACH_BLISSC
+CONFIG_MACH_BLUECHEESE
+CONFIG_MACH_BLUEPOINT
+CONFIG_MACH_BLUESHARK
+CONFIG_MACH_BOCKW
+CONFIG_MACH_BONAIRE
+CONFIG_MACH_BORABORA
+CONFIG_MACH_BORZOI
+CONFIG_MACH_BROWNSTONE
+CONFIG_MACH_BSTBRD
+CONFIG_MACH_BTMAVB101
+CONFIG_MACH_BTMAWB101
+CONFIG_MACH_BUBBA3
+CONFIG_MACH_BUG
+CONFIG_MACH_BUG20
+CONFIG_MACH_BURY_BL7582
+CONFIG_MACH_BURY_BPS5270
+CONFIG_MACH_BV07
+CONFIG_MACH_C2MMI
+CONFIG_MACH_CALLISTO
+CONFIG_MACH_CAM60
+CONFIG_MACH_CAPC7117
+CONFIG_MACH_CARDHU
+CONFIG_MACH_CARMEVA
+CONFIG_MACH_CAYENNE
+CONFIG_MACH_CC9P9360DEV
+CONFIG_MACH_CC9P9360JS
+CONFIG_MACH_CCMX53
+CONFIG_MACH_CCMX53JS
+CONFIG_MACH_CCWMX51MUT
+CONFIG_MACH_CCWMX53
+CONFIG_MACH_CCWMX53JS
+CONFIG_MACH_CENTRO
+CONFIG_MACH_CETUS9263
+CONFIG_MACH_CHACHA
+CONFIG_MACH_CHALTEN_XA1
+CONFIG_MACH_CHARON
+CONFIG_MACH_CLOD
+CONFIG_MACH_CM4745
+CONFIG_MACH_CM_A510
+CONFIG_MACH_CM_T35
+CONFIG_MACH_CM_T3517
+CONFIG_MACH_CM_T3730
+CONFIG_MACH_CM_X300
+CONFIG_MACH_CNS2133EVB
+CONFIG_MACH_CNS21XX
+CONFIG_MACH_CNS3420VB
+CONFIG_MACH_COBRAL138
+CONFIG_MACH_COCONUT
+CONFIG_MACH_COLIBRI
+CONFIG_MACH_COLIBRI300
+CONFIG_MACH_COLIBRI320
+CONFIG_MACH_COLIBRI_T20
+CONFIG_MACH_COLIBRI_T30
+CONFIG_MACH_CONTROLTEK9G20
+CONFIG_MACH_CORETEC_VCX7400
+CONFIG_MACH_CORGI
+CONFIG_MACH_CPUAT9G20
+CONFIG_MACH_CPX2
+CONFIG_MACH_CRANEBOARD
+CONFIG_MACH_CRUX
+CONFIG_MACH_CSB337
+CONFIG_MACH_CSB637
+CONFIG_MACH_CSB726
+CONFIG_MACH_CSC
+CONFIG_MACH_CTBU_GEN2
+CONFIG_MACH_CTERA_PLUG_C2
+CONFIG_MACH_CURACAO
+CONFIG_MACH_CV2201
+CONFIG_MACH_CV2202
+CONFIG_MACH_CV2203
+CONFIG_MACH_CWAM1808
+CONFIG_MACH_CWDM365
+CONFIG_MACH_CWME9210
+CONFIG_MACH_CWME9210JS
+CONFIG_MACH_CWMX233
+CONFIG_MACH_D2NET
+CONFIG_MACH_D2NET_V2
+CONFIG_MACH_D2PLUG
+CONFIG_MACH_DA850_K5
+CONFIG_MACH_DAINTREE_CWAC
+CONFIG_MACH_DATAWAY
+CONFIG_MACH_DAVINCI_CALIMAIN
+CONFIG_MACH_DAVINCI_DA830_EVM
+CONFIG_MACH_DAVINCI_DA850_EVM
+CONFIG_MACH_DAVINCI_DM355_EVM
+CONFIG_MACH_DAVINCI_DM355_MMM
+CONFIG_MACH_DAVINCI_DM365_BV
+CONFIG_MACH_DAVINCI_DM365_DVR
+CONFIG_MACH_DAVINCI_DM365_EVM
+CONFIG_MACH_DAVINCI_DM6467TEVM
+CONFIG_MACH_DAVINCI_DM6467_EVM
+CONFIG_MACH_DAVINCI_EVM
+CONFIG_MACH_DAVINCI_PICTO
+CONFIG_MACH_DAWAD7
+CONFIG_MACH_DB78X00_BP
+CONFIG_MACH_DB88F5281
+CONFIG_MACH_DB88F6281_BP
+CONFIG_MACH_DDNAS
+CONFIG_MACH_DDPLUG
+CONFIG_MACH_DDS
+CONFIG_MACH_DEEP_R_EK_1
+CONFIG_MACH_DEVIXP
+CONFIG_MACH_DEVKIT8000
+CONFIG_MACH_DGM3240
+CONFIG_MACH_DIMMSAM9G20
+CONFIG_MACH_DIMM_IMX28
+CONFIG_MACH_DIMM_MX257
+CONFIG_MACH_DINGO
+CONFIG_MACH_DIR665
+CONFIG_MACH_DM355_LEOPARD
+CONFIG_MACH_DM365_CV100
+CONFIG_MACH_DM368_LEOPARD
+CONFIG_MACH_DM3730_SOM_LV
+CONFIG_MACH_DM3730_TORPEDO
+CONFIG_MACH_DM6441_ESP
+CONFIG_MACH_DM6446_ADBOX
+CONFIG_MACH_DMA6410
+CONFIG_MACH_DMA_THUNDERBUG
+CONFIG_MACH_DMW96
+CONFIG_MACH_DNS323
+CONFIG_MACH_DOCKSTAR
+CONFIG_MACH_DOORBOY
+CONFIG_MACH_DOUBLESHOT
+CONFIG_MACH_DOVE_AVNG_V3
+CONFIG_MACH_DOVE_DB
+CONFIG_MACH_DP6XX
+CONFIG_MACH_DRAGONET
+CONFIG_MACH_DSM320
+CONFIG_MACH_DSMG600
+CONFIG_MACH_DURIAN
+CONFIG_MACH_DYNASTY
+CONFIG_MACH_E10
+CONFIG_MACH_E330
+CONFIG_MACH_E350
+CONFIG_MACH_E400
+CONFIG_MACH_E740
+CONFIG_MACH_E750
+CONFIG_MACH_E800
+CONFIG_MACH_EA20
+CONFIG_MACH_EA2478DEVKIT
+CONFIG_MACH_EAG_CI4000
+CONFIG_MACH_EASYCRRH
+CONFIG_MACH_EC4350SDB
+CONFIG_MACH_EC4350TBM
+CONFIG_MACH_ECBAT91
+CONFIG_MACH_ECO920
+CONFIG_MACH_ECUV5
+CONFIG_MACH_EDB9301
+CONFIG_MACH_EDB9302
+CONFIG_MACH_EDB9302A
+CONFIG_MACH_EDB9307
+CONFIG_MACH_EDB9307A
+CONFIG_MACH_EDB9312
+CONFIG_MACH_EDB9315
+CONFIG_MACH_EDB9315A
+CONFIG_MACH_EDISON
+CONFIG_MACH_EDMINIV2
+CONFIG_MACH_EDMINI_V2
+CONFIG_MACH_EELX2
+CONFIG_MACH_EIGEN_TTR
+CONFIG_MACH_ELEPHANT
+CONFIG_MACH_ELKE
+CONFIG_MACH_ELOG
+CONFIG_MACH_EM1SY
+CONFIG_MACH_EM7210
+CONFIG_MACH_EMERALD
+CONFIG_MACH_EM_X270
+CONFIG_MACH_ENCORE
+CONFIG_MACH_ENDIAN_MINI
+CONFIG_MACH_EP80219
+CONFIG_MACH_EPC10
+CONFIG_MACH_EPIPHAN
+CONFIG_MACH_ES2440
+CONFIG_MACH_ESATA_SHEEVAPLUG
+CONFIG_MACH_ESL_MOBILIS_A
+CONFIG_MACH_ESL_MOBILIS_B
+CONFIG_MACH_ESL_WAVE_A
+CONFIG_MACH_ESL_WAVE_B
+CONFIG_MACH_ESPRESSO
+CONFIG_MACH_ETHERPRO_ISP
+CONFIG_MACH_ETNA
+CONFIG_MACH_EUKREA_CPUIMX25SD
+CONFIG_MACH_EUKREA_CPUIMX35SD
+CONFIG_MACH_EUKREA_CPUIMX51
+CONFIG_MACH_EUKREA_CPUIMX51SD
+CONFIG_MACH_EVA2000
+CONFIG_MACH_EVSY
+CONFIG_MACH_EXEDA
+CONFIG_MACH_EXPRESS
+CONFIG_MACH_EXPRESSCT
+CONFIG_MACH_EXPRESSH
+CONFIG_MACH_EXPRESS_KT
+CONFIG_MACH_EZX_A1200
+CONFIG_MACH_EZX_A780
+CONFIG_MACH_EZX_A910
+CONFIG_MACH_EZX_E2
+CONFIG_MACH_EZX_E6
+CONFIG_MACH_EZX_E680
+CONFIG_MACH_FA9X27
+CONFIG_MACH_FFCORE
+CONFIG_MACH_FLEXIBITY
+CONFIG_MACH_FLINT
+CONFIG_MACH_FLYER
+CONFIG_MACH_FRISMS
+CONFIG_MACH_FRRHWCDMA60W
+CONFIG_MACH_FSG
+CONFIG_MACH_FSM9XXX_FFA
+CONFIG_MACH_FSM9XXX_SURF
+CONFIG_MACH_FS_S5PC100
+CONFIG_MACH_FUJI
+CONFIG_MACH_FWBD_0404
+CONFIG_MACH_G3EVM
+CONFIG_MACH_G4EVM
+CONFIG_MACH_GATEWAY7001
+CONFIG_MACH_GENEVA_B5
+CONFIG_MACH_GESBC9312
+CONFIG_MACH_GFS_SPM
+CONFIG_MACH_GINGER
+CONFIG_MACH_GIRA_KNXIP_ROUTER
+CONFIG_MACH_GLANTANK
+CONFIG_MACH_GNET_SGCE
+CONFIG_MACH_GNET_SGME
+CONFIG_MACH_GNET_SLC
+CONFIG_MACH_GOFLEXHOME
+CONFIG_MACH_GOFLEXNET
+CONFIG_MACH_GOLDENGATE
+CONFIG_MACH_GONI
+CONFIG_MACH_GORAMO_MLR
+CONFIG_MACH_GPSDISPLAY
+CONFIG_MACH_GREECO
+CONFIG_MACH_GSIA18S
+CONFIG_MACH_GSL_DIAMOND
+CONFIG_MACH_GSNCOMM
+CONFIG_MACH_GTA04
+CONFIG_MACH_GTIB
+CONFIG_MACH_GTL_IT5100
+CONFIG_MACH_GTWX5715
+CONFIG_MACH_GT_I5700
+CONFIG_MACH_GUPPY
+CONFIG_MACH_GURNARD
+CONFIG_MACH_GURUPLUG
+CONFIG_MACH_GW2361
+CONFIG_MACH_H1600
+CONFIG_MACH_H4700
+CONFIG_MACH_HABA_KNX_EXPLORER
+CONFIG_MACH_HALIBUT
+CONFIG_MACH_HAMMERHEAD
+CONFIG_MACH_HARMONY
+CONFIG_MACH_HARVEST_DESOTO
+CONFIG_MACH_HAWKS
+CONFIG_MACH_HDGU
+CONFIG_MACH_HDMINI
+CONFIG_MACH_HDNVP
+CONFIG_MACH_HELIOS_V1
+CONFIG_MACH_HELIOS_V2
+CONFIG_MACH_HERALD
+CONFIG_MACH_HERRING
+CONFIG_MACH_HIMALAYA
+CONFIG_MACH_HJSDU
+CONFIG_MACH_HKDKC100
+CONFIG_MACH_HMT
+CONFIG_MACH_HOLIDAY
+CONFIG_MACH_HREFV60
+CONFIG_MACH_HSGX6D
+CONFIG_MACH_HTCMEGA
+CONFIG_MACH_HTCTORNADO
+CONFIG_MACH_HTC_HD_MINI
+CONFIG_MACH_HTC_SPV_M700
+CONFIG_MACH_HUASHAN
+CONFIG_MACH_HUSKY
+CONFIG_MACH_HWGW6410
+CONFIG_MACH_IAM28
+CONFIG_MACH_ICON
+CONFIG_MACH_ICONG
+CONFIG_MACH_ICONNECT
+CONFIG_MACH_ICONTROL
+CONFIG_MACH_ICON_G
+CONFIG_MACH_ICS_IF_VOIP
+CONFIG_MACH_IDEA6410
+CONFIG_MACH_IGEP0020
+CONFIG_MACH_IGEP0030
+CONFIG_MACH_IGEP0032
+CONFIG_MACH_IJ3K_2440
+CONFIG_MACH_IMATE8502
+CONFIG_MACH_IMX27IPCAM
+CONFIG_MACH_IMX27LITE
+CONFIG_MACH_IMX27_VISSTRIM_M10
+CONFIG_MACH_INCOME
+CONFIG_MACH_INETSPACE_V2
+CONFIG_MACH_INHAND_APEIRON
+CONFIG_MACH_INHAND_FURY
+CONFIG_MACH_INHAND_SIREN
+CONFIG_MACH_INTELMOTE2
+CONFIG_MACH_IOMEGA_IX2_200
+CONFIG_MACH_IQ80332
+CONFIG_MACH_IQ81340MC
+CONFIG_MACH_IQ81340SC
+CONFIG_MACH_ISC3
+CONFIG_MACH_IXDP2351
+CONFIG_MACH_IXDP28X5
+CONFIG_MACH_IXDP465
+CONFIG_MACH_IXDPG425
+CONFIG_MACH_JANUS
+CONFIG_MACH_JIGEN
+CONFIG_MACH_JIVE
+CONFIG_MACH_JOCPU550
+CONFIG_MACH_KAEN
+CONFIG_MACH_KAFA
+CONFIG_MACH_KB9200
+CONFIG_MACH_KEV7A400
+CONFIG_MACH_KINGDOM
+CONFIG_MACH_KIXRP435
+CONFIG_MACH_KMM2M01
+CONFIG_MACH_KMP_AM17_01
+CONFIG_MACH_KM_KIRKWOOD
+CONFIG_MACH_KOI
+CONFIG_MACH_KRONOS
+CONFIG_MACH_KT_SBC_SAM9_1
+CONFIG_MACH_KUROBOX_PRO
+CONFIG_MACH_KX33XX
+CONFIG_MACH_KZM9D
+CONFIG_MACH_KZM9G
+CONFIG_MACH_KZM_ARM11_01
+CONFIG_MACH_LANREADYFN511
+CONFIG_MACH_LAUSANNE
+CONFIG_MACH_LB88RC8480
+CONFIG_MACH_LEAD
+CONFIG_MACH_LEGACY
+CONFIG_MACH_LEMON
+CONFIG_MACH_LIBRA
+CONFIG_MACH_LIGHTNING
+CONFIG_MACH_LILLY1131
+CONFIG_MACH_LINKSTATION_CHLV2
+CONFIG_MACH_LINKSTATION_LSCHL
+CONFIG_MACH_LINKSTATION_LS_HGL
+CONFIG_MACH_LINKSTATION_MINI
+CONFIG_MACH_LINKSTATION_PRO
+CONFIG_MACH_LITTLETON
+CONFIG_MACH_LOFT
+CONFIG_MACH_LOGICPD_PXA270
+CONFIG_MACH_LPC24XX
+CONFIG_MACH_LPD7A400
+CONFIG_MACH_LPD7A404
+CONFIG_MACH_LQ2
+CONFIG_MACH_LS9G20
+CONFIG_MACH_LSWXL
+CONFIG_MACH_M502
+CONFIG_MACH_MACH_SDH001
+CONFIG_MACH_MACKEREL
+CONFIG_MACH_MAGICIAN
+CONFIG_MACH_MAGX_ZN5
+CONFIG_MACH_MAHIMAHI
+CONFIG_MACH_MAINSTONE
+CONFIG_MACH_MANUAE
+CONFIG_MACH_MAPLE1
+CONFIG_MACH_MARVEL
+CONFIG_MACH_MARVELC
+CONFIG_MACH_MARVELCT
+CONFIG_MACH_MARVELL_JASPER
+CONFIG_MACH_MATRIX505
+CONFIG_MACH_MATRIX518
+CONFIG_MACH_MAXIMASP
+CONFIG_MACH_MB3
+CONFIG_MACH_MECHA
+CONFIG_MACH_MENO_QNG
+CONFIG_MACH_MESON
+CONFIG_MACH_MESON_6236M
+CONFIG_MACH_MESON_8626M
+CONFIG_MACH_MESSINA
+CONFIG_MACH_MIC256
+CONFIG_MACH_MICCPT
+CONFIG_MACH_MICRO9
+CONFIG_MACH_MICRO9L
+CONFIG_MACH_MICRO9M
+CONFIG_MACH_MICRO9S
+CONFIG_MACH_MIF10P
+CONFIG_MACH_MIMAS
+CONFIG_MACH_MINI210
+CONFIG_MACH_MINI2440
+CONFIG_MACH_MINI6410
+CONFIG_MACH_MINI8168
+CONFIG_MACH_MIOA502
+CONFIG_MACH_MIOA701
+CONFIG_MACH_MIONE
+CONFIG_MACH_MIOS_V1
+CONFIG_MACH_MITYOMAPL138
+CONFIG_MACH_MMM
+CONFIG_MACH_MONCH
+CONFIG_MACH_MONE
+CONFIG_MACH_MOON
+CONFIG_MACH_MORA
+CONFIG_MACH_MR301A
+CONFIG_MACH_MSM7X25_FFA
+CONFIG_MACH_MSM7X25_SURF
+CONFIG_MACH_MSM7X27A_FFA
+CONFIG_MACH_MSM7X27A_RUMI3
+CONFIG_MACH_MSM7X27A_SURF
+CONFIG_MACH_MSM7X27_FFA
+CONFIG_MACH_MSM7X27_SURF
+CONFIG_MACH_MSM7X30_FFA
+CONFIG_MACH_MSM7X30_FLUID
+CONFIG_MACH_MSM7X30_SURF
+CONFIG_MACH_MSM8960_APQ
+CONFIG_MACH_MSM8960_CDP
+CONFIG_MACH_MSM8960_FLUID
+CONFIG_MACH_MSM8960_MDP
+CONFIG_MACH_MSM8960_RUMI3
+CONFIG_MACH_MSM8960_SIM
+CONFIG_MACH_MSM8X55_SVLTE_FFA
+CONFIG_MACH_MSM8X55_SVLTE_SURF
+CONFIG_MACH_MSM8X60_FFA
+CONFIG_MACH_MSM8X60_FLUID
+CONFIG_MACH_MSM8X60_QRDC
+CONFIG_MACH_MSM8X60_QT
+CONFIG_MACH_MSM8X60_RUMI3
+CONFIG_MACH_MSM8X60_SIM
+CONFIG_MACH_MSM8X60_SURF
+CONFIG_MACH_MSS2
+CONFIG_MACH_MULTHSU
+CONFIG_MACH_MV2120
+CONFIG_MACH_MV88F6281GTW_GE
+CONFIG_MACH_MVBLX
+CONFIG_MACH_MX21ADS
+CONFIG_MACH_MX23EVK
+CONFIG_MACH_MX257SOL
+CONFIG_MACH_MX257SX
+CONFIG_MACH_MX25_3DS
+CONFIG_MACH_MX25_E2S_UC
+CONFIG_MACH_MX27ADS
+CONFIG_MACH_MX27SU2
+CONFIG_MACH_MX27_3DS
+CONFIG_MACH_MX27_WMULTRA
+CONFIG_MACH_MX28EVK
+CONFIG_MACH_MX31ADS
+CONFIG_MACH_MX31LITE
+CONFIG_MACH_MX31MOBOARD
+CONFIG_MACH_MX31_3DS
+CONFIG_MACH_MX35_3DS
+CONFIG_MACH_MX50_ARM2
+CONFIG_MACH_MX50_RDP
+CONFIG_MACH_MX51EREBUS
+CONFIG_MACH_MX51_3DS
+CONFIG_MACH_MX51_ASTER7
+CONFIG_MACH_MX51_BABBAGE
+CONFIG_MACH_MX51_BRAVO
+CONFIG_MACH_MX51_EFIKAMX
+CONFIG_MACH_MX51_EFIKASB
+CONFIG_MACH_MX51_GGC
+CONFIG_MACH_MX51_MORAY
+CONFIG_MACH_MX51_TULIP
+CONFIG_MACH_MX53_ARD
+CONFIG_MACH_MX53_EVK
+CONFIG_MACH_MX53_LOCO
+CONFIG_MACH_MX53_SMD
+CONFIG_MACH_MX61_ARD
+CONFIG_MACH_MXC25_TOPAZ
+CONFIG_MACH_MXLADS
+CONFIG_MACH_MXT_TD60
+CONFIG_MACH_MXT_TD61
+CONFIG_MACH_N2100
+CONFIG_MACH_N30
+CONFIG_MACH_N35
+CONFIG_MACH_NAJAY_A9263
+CONFIG_MACH_NANOS
+CONFIG_MACH_NANOZOOM
+CONFIG_MACH_NAS100D
+CONFIG_MACH_NAS4220B
+CONFIG_MACH_NAS6210
+CONFIG_MACH_NAVEFIHID
+CONFIG_MACH_NAXY1200
+CONFIG_MACH_NAXY400
+CONFIG_MACH_NB31
+CONFIG_MACH_NCP
+CONFIG_MACH_NDA_EVM
+CONFIG_MACH_NEC_MP900
+CONFIG_MACH_NEO1973_GTA02
+CONFIG_MACH_NEOCORE926
+CONFIG_MACH_NERY_1000
+CONFIG_MACH_NET2BIG
+CONFIG_MACH_NET2BIG_NAND_V2
+CONFIG_MACH_NET2BIG_V2
+CONFIG_MACH_NET5BIG_NAND_V2
+CONFIG_MACH_NET5BIG_V2
+CONFIG_MACH_NETSPACE_LITE_V2
+CONFIG_MACH_NETSPACE_MAX_V2
+CONFIG_MACH_NETSPACE_V2
+CONFIG_MACH_NETVIZ
+CONFIG_MACH_NETWALKER
+CONFIG_MACH_NEUROS_OSD2
+CONFIG_MACH_NEXCODER_2440
+CONFIG_MACH_NITROGEN_IMX51
+CONFIG_MACH_NITROGEN_IMX53
+CONFIG_MACH_NITROGEN_VM_IMX51
+CONFIG_MACH_NMH
+CONFIG_MACH_NOKIA770
+CONFIG_MACH_NOKIA_N800
+CONFIG_MACH_NOKIA_N810
+CONFIG_MACH_NOKIA_N810_WIMAX
+CONFIG_MACH_NOKIA_RM680
+CONFIG_MACH_NOKIA_RX51
+CONFIG_MACH_NOMADIK
+CONFIG_MACH_NOTLE
+CONFIG_MACH_NS2416
+CONFIG_MACH_NS2816TB
+CONFIG_MACH_NS2816_NTNB
+CONFIG_MACH_NS2816_NTPAD
+CONFIG_MACH_NSB3AST
+CONFIG_MACH_NSK330
+CONFIG_MACH_NSLU2
+CONFIG_MACH_NSSLSBOARD
+CONFIG_MACH_NS_K330
+CONFIG_MACH_NUC700EVB
+CONFIG_MACH_NUC710EVB
+CONFIG_MACH_NUC740EVB
+CONFIG_MACH_NUC745EVB
+CONFIG_MACH_NUC932EVB
+CONFIG_MACH_NUC950TS
+CONFIG_MACH_NURI
+CONFIG_MACH_NV1000
+CONFIG_MACH_NXDB500
+CONFIG_MACH_NXDKN
+CONFIG_MACH_NXEB500HMI
+CONFIG_MACH_OCE_NIGMA
+CONFIG_MACH_OMAP2EVM
+CONFIG_MACH_OMAP3505NOVA8
+CONFIG_MACH_OMAP3517EVM
+CONFIG_MACH_OMAP3530_LV_SOM
+CONFIG_MACH_OMAP3621_EDP1
+CONFIG_MACH_OMAP3EVM
+CONFIG_MACH_OMAP3SMARTDISPLAY
+CONFIG_MACH_OMAP3_BAIA
+CONFIG_MACH_OMAP3_BC10
+CONFIG_MACH_OMAP3_BEAGLE
+CONFIG_MACH_OMAP3_BRAILLO
+CONFIG_MACH_OMAP3_IBIZA
+CONFIG_MACH_OMAP3_PANDORA
+CONFIG_MACH_OMAP3_RFS200
+CONFIG_MACH_OMAP3_TDM3730
+CONFIG_MACH_OMAP3_TORPEDO
+CONFIG_MACH_OMAP3_WALDO1
+CONFIG_MACH_OMAP4_PANDA
+CONFIG_MACH_OMAP5_SEVM
+CONFIG_MACH_OMAPL138_CASE_A3
+CONFIG_MACH_OMAPL138_EUROPALC
+CONFIG_MACH_OMAPL138_HAWKBOARD
+CONFIG_MACH_OMAPL138_LCDK
+CONFIG_MACH_OMAP_2430SDP
+CONFIG_MACH_OMAP_3430SDP
+CONFIG_MACH_OMAP_3630SDP
+CONFIG_MACH_OMAP_4430SDP
+CONFIG_MACH_OMAP_APOLLON
+CONFIG_MACH_OMAP_BENDER
+CONFIG_MACH_OMAP_FSAMPLE
+CONFIG_MACH_OMAP_GENERIC
+CONFIG_MACH_OMAP_H2
+CONFIG_MACH_OMAP_H3
+CONFIG_MACH_OMAP_H4
+CONFIG_MACH_OMAP_INNOVATOR
+CONFIG_MACH_OMAP_LDP
+CONFIG_MACH_OMAP_MCOP
+CONFIG_MACH_OMAP_OSK
+CONFIG_MACH_OMAP_PALMTE
+CONFIG_MACH_OMAP_PALMTT
+CONFIG_MACH_OMAP_PALMZ71
+CONFIG_MACH_OMAP_PERSEUS2
+CONFIG_MACH_OMAP_ZOOM2
+CONFIG_MACH_OMAP_ZOOM3
+CONFIG_MACH_OMN_AT91SAM9G20
+CONFIG_MACH_ONEARM
+CONFIG_MACH_OPENRD_BASE
+CONFIG_MACH_OPENRD_CLIENT
+CONFIG_MACH_OPENRD_ULTIMATE
+CONFIG_MACH_ORATISAES
+CONFIG_MACH_ORATISLINK
+CONFIG_MACH_ORIGEN
+CONFIG_MACH_OSIRIS
+CONFIG_MACH_OSLO_AMUNDSEN
+CONFIG_MACH_OTOM
+CONFIG_MACH_OVERO
+CONFIG_MACH_OVERO_CTU_INERTIAL
+CONFIG_MACH_P87_SMARTSIM
+CONFIG_MACH_PALMLD
+CONFIG_MACH_PALMT5
+CONFIG_MACH_PALMTC
+CONFIG_MACH_PALMTE2
+CONFIG_MACH_PALMTX
+CONFIG_MACH_PALMZ72
+CONFIG_MACH_PAZ00
+CONFIG_MACH_PC7302
+CONFIG_MACH_PC7308
+CONFIG_MACH_PC9260_V2
+CONFIG_MACH_PCA100
+CONFIG_MACH_PCA102
+CONFIG_MACH_PCATS_OVERLAY
+CONFIG_MACH_PCM027
+CONFIG_MACH_PCM037
+CONFIG_MACH_PCM038
+CONFIG_MACH_PCM043
+CONFIG_MACH_PCM048
+CONFIG_MACH_PCM049
+CONFIG_MACH_PCONTROL_G20
+CONFIG_MACH_PEC_HC2
+CONFIG_MACH_PEC_TC
+CONFIG_MACH_PEMP_OMAP3_APOLLO
+CONFIG_MACH_PGS_SITARA
+CONFIG_MACH_PHILHWANI
+CONFIG_MACH_PHY3250
+CONFIG_MACH_PICASSO
+CONFIG_MACH_PICO
+CONFIG_MACH_PICOCOM3
+CONFIG_MACH_PICOCOM4
+CONFIG_MACH_PICOTUX2XX
+CONFIG_MACH_PIVICC
+CONFIG_MACH_PNX4008
+CONFIG_MACH_POLYSAT1
+CONFIG_MACH_POODLE
+CONFIG_MACH_PORTUXG20
+CONFIG_MACH_POV15HD
+CONFIG_MACH_PREMIERWAVE_EN
+CONFIG_MACH_PRIMA2_EVB
+CONFIG_MACH_PTX7510
+CONFIG_MACH_PTX7545
+CONFIG_MACH_PUNICA
+CONFIG_MACH_PUPITRE
+CONFIG_MACH_PVM2030
+CONFIG_MACH_PWB3090
+CONFIG_MACH_PXWNAS_500_1000
+CONFIG_MACH_PYRAMID
+CONFIG_MACH_QBC9263
+CONFIG_MACH_QIL_A9260
+CONFIG_MACH_QONG
+CONFIG_MACH_QSD8X50A_ST1_5
+CONFIG_MACH_QSD8X50_SURF
+CONFIG_MACH_QSD8X72_FFA
+CONFIG_MACH_QSD8X72_SURF
+CONFIG_MACH_QT2410
+CONFIG_MACH_QUAD_SALSA
+CONFIG_MACH_QUICKSTEP
+CONFIG_MACH_R1801E
+CONFIG_MACH_RASCAL
+CONFIG_MACH_RAUMFELD_CONNECTOR
+CONFIG_MACH_RAUMFELD_RC
+CONFIG_MACH_RAUMFELD_SPEAKER
+CONFIG_MACH_RD78X00_MASA
+CONFIG_MACH_RD88F5181L_FXO
+CONFIG_MACH_RD88F5181L_GE
+CONFIG_MACH_RD88F5182
+CONFIG_MACH_RD88F6183AP_GE
+CONFIG_MACH_RD88F6192_NAS
+CONFIG_MACH_RD88F6281
+CONFIG_MACH_RDSTOR
+CONFIG_MACH_RE2REV20
+CONFIG_MACH_RE2REV21
+CONFIG_MACH_REAL6410
+CONFIG_MACH_REALVIEW_EB
+CONFIG_MACH_REALVIEW_PB1176
+CONFIG_MACH_REALVIEW_PB11MP
+CONFIG_MACH_REALVIEW_PBA8
+CONFIG_MACH_REALVIEW_PBX
+CONFIG_MACH_REMUS
+CONFIG_MACH_REXMAS
+CONFIG_MACH_RFL109145_SSRV
+CONFIG_MACH_RHINO
+CONFIG_MACH_RIB
+CONFIG_MACH_RIDER
+CONFIG_MACH_RIOT_BEI2
+CONFIG_MACH_RIOT_X37
+CONFIG_MACH_ROADRUNNER
+CONFIG_MACH_ROCKHOPPER
+CONFIG_MACH_ROVERPCS8
+CONFIG_MACH_ROVERX7
+CONFIG_MACH_ROVER_G8
+CONFIG_MACH_RPC353
+CONFIG_MACH_RUBY
+CONFIG_MACH_RUBYS
+CONFIG_MACH_RUMP
+CONFIG_MACH_RUT100
+CONFIG_MACH_RV082
+CONFIG_MACH_RX1950
+CONFIG_MACH_RX3715
+CONFIG_MACH_S3C2413
+CONFIG_MACH_S5500
+CONFIG_MACH_S5PC110_CRESPO
+CONFIG_MACH_SAAR
+CONFIG_MACH_SAARB
+CONFIG_MACH_SAARB_MG1
+CONFIG_MACH_SAGA
+CONFIG_MACH_SALUDA
+CONFIG_MACH_SAM9REPEATER
+CONFIG_MACH_SAM9_L9260
+CONFIG_MACH_SANTIAGO
+CONFIG_MACH_SAPPHIRE
+CONFIG_MACH_SBC3530
+CONFIG_MACH_SBC6000X
+CONFIG_MACH_SBCA11
+CONFIG_MACH_SC575IPC
+CONFIG_MACH_SC575PLC
+CONFIG_MACH_SCB9328
+CONFIG_MACH_SCIPHONE_G2
+CONFIG_MACH_SDI_ESS_9263
+CONFIG_MACH_SDVR
+CONFIG_MACH_SEABOARD
+CONFIG_MACH_SERRANO
+CONFIG_MACH_SFFSDR
+CONFIG_MACH_SGH_I740
+CONFIG_MACH_SHARESPACE
+CONFIG_MACH_SHEEVAPLUG
+CONFIG_MACH_SHENZHOU
+CONFIG_MACH_SHEPHERD
+CONFIG_MACH_SHOOTER
+CONFIG_MACH_SHOOTER_CT
+CONFIG_MACH_SHOOTER_U
+CONFIG_MACH_SHORTLOIN
+CONFIG_MACH_SIEMENS_L0
+CONFIG_MACH_SIMPLENET
+CONFIG_MACH_SIMTEC_KIRKMOD
+CONFIG_MACH_SIM_ONE
+CONFIG_MACH_SKY25
+CONFIG_MACH_SKY6410
+CONFIG_MACH_SM1K
+CONFIG_MACH_SMARTQ5
+CONFIG_MACH_SMARTQ7
+CONFIG_MACH_SMARTQV3
+CONFIG_MACH_SMARTQV5
+CONFIG_MACH_SMARTQV7
+CONFIG_MACH_SMDK2412
+CONFIG_MACH_SMDK2413
+CONFIG_MACH_SMDK2416
+CONFIG_MACH_SMDK2443
+CONFIG_MACH_SMDK6410
+CONFIG_MACH_SMDK6440
+CONFIG_MACH_SMDK6442
+CONFIG_MACH_SMDK6450
+CONFIG_MACH_SMDKC100
+CONFIG_MACH_SMDKC110
+CONFIG_MACH_SMDKC210
+CONFIG_MACH_SMDKV210
+CONFIG_MACH_SMDKV310
+CONFIG_MACH_SNAPPER_9260
+CONFIG_MACH_SNAPPER_CL15
+CONFIG_MACH_SOFTWINNER
+CONFIG_MACH_SOLI_01
+CONFIG_MACH_SPADE
+CONFIG_MACH_SPADE_LTE
+CONFIG_MACH_SPDM
+CONFIG_MACH_SPEAR1310
+CONFIG_MACH_SPEAR1340
+CONFIG_MACH_SPEAR300
+CONFIG_MACH_SPEAR310
+CONFIG_MACH_SPEAR320
+CONFIG_MACH_SPEAR600
+CONFIG_MACH_SPEAR900
+CONFIG_MACH_SPECIFIC
+CONFIG_MACH_SPICA
+CONFIG_MACH_SPITZ
+CONFIG_MACH_SPLENDOR
+CONFIG_MACH_SPX_SAKURA
+CONFIG_MACH_SPYPLUG
+CONFIG_MACH_SSC
+CONFIG_MACH_STAMP9G20
+CONFIG_MACH_STAMP9G45
+CONFIG_MACH_STARGATE2
+CONFIG_MACH_STEELYARD
+CONFIG_MACH_STELLA
+CONFIG_MACH_STMP378X
+CONFIG_MACH_STMP37XX
+CONFIG_MACH_STRASBOURG
+CONFIG_MACH_STRASBOURG_A2
+CONFIG_MACH_STRETCHS7000
+CONFIG_MACH_SUNFIRE
+CONFIG_MACH_SUNFLOWER
+CONFIG_MACH_SVCID
+CONFIG_MACH_SVP5500
+CONFIG_MACH_SVP8500V1
+CONFIG_MACH_SVP8500V2
+CONFIG_MACH_SWARCOEXTMODEM
+CONFIG_MACH_SWEDA_TMS2
+CONFIG_MACH_SX1
+CONFIG_MACH_SYNERGY
+CONFIG_MACH_SYNOLOGY_6282
+CONFIG_MACH_T20
+CONFIG_MACH_T5325
+CONFIG_MACH_T5388P
+CONFIG_MACH_T55
+CONFIG_MACH_TAG
+CONFIG_MACH_TAGW
+CONFIG_MACH_TANNA
+CONFIG_MACH_TAVOREVB
+CONFIG_MACH_TAVOREVB3
+CONFIG_MACH_TCC8000_SDK
+CONFIG_MACH_TCT_HAMMER
+CONFIG_MACH_TD3_REV1
+CONFIG_MACH_TEENOTE
+CONFIG_MACH_TEGRA_DAYTONA
+CONFIG_MACH_TEGRA_E1165
+CONFIG_MACH_TEGRA_SWORDFISH
+CONFIG_MACH_TEGRA_VOGUE
+CONFIG_MACH_TEM3X30
+CONFIG_MACH_TENDERLOIN
+CONFIG_MACH_TERASTATION_PRO2
+CONFIG_MACH_TERASTATION_WXL
+CONFIG_MACH_TERA_PRO2_RACK
+CONFIG_MACH_TETON_BGA
+CONFIG_MACH_THALES_ADC
+CONFIG_MACH_THALES_CBC
+CONFIG_MACH_THEBE
+CONFIG_MACH_TI8148EVM
+CONFIG_MACH_TI8168EVM
+CONFIG_MACH_TIMU
+CONFIG_MACH_TIN307
+CONFIG_MACH_TIN510
+CONFIG_MACH_TINY_GURNARD
+CONFIG_MACH_TITAN
+CONFIG_MACH_TJINC1000
+CONFIG_MACH_TM_EFDC
+CONFIG_MACH_TN200
+CONFIG_MACH_TNETV107X
+CONFIG_MACH_TNY_T3530
+CONFIG_MACH_TONGA2_TFTTIMER
+CONFIG_MACH_TOP9000
+CONFIG_MACH_TOP9000_BSL
+CONFIG_MACH_TOP9000_EVAL
+CONFIG_MACH_TOP9000_SU
+CONFIG_MACH_TOP9000_TCU
+CONFIG_MACH_TORBRECK
+CONFIG_MACH_TORNADO3240
+CONFIG_MACH_TOSA
+CONFIG_MACH_TOUCHBOOK
+CONFIG_MACH_TPT_2_0
+CONFIG_MACH_TQ6410
+CONFIG_MACH_TQMA35
+CONFIG_MACH_TQMA9263
+CONFIG_MACH_TRANSCEDE
+CONFIG_MACH_TREO680
+CONFIG_MACH_TRICORDER
+CONFIG_MACH_TRIDENT
+CONFIG_MACH_TRIMSLICE
+CONFIG_MACH_TRIPEL
+CONFIG_MACH_TRITIP
+CONFIG_MACH_TRIZEPS4
+CONFIG_MACH_TRIZEPS4WL
+CONFIG_MACH_TROUT
+CONFIG_MACH_TS209
+CONFIG_MACH_TS219
+CONFIG_MACH_TS3
+CONFIG_MACH_TS409
+CONFIG_MACH_TS41X
+CONFIG_MACH_TS42XX
+CONFIG_MACH_TS47XX
+CONFIG_MACH_TS4800
+CONFIG_MACH_TS48XX
+CONFIG_MACH_TS72XX
+CONFIG_MACH_TS75XX
+CONFIG_MACH_TS78XX
+CONFIG_MACH_TSOPLOADER
+CONFIG_MACH_TSUNAGI
+CONFIG_MACH_TTC_DKB
+CONFIG_MACH_TUBE
+CONFIG_MACH_TULIP
+CONFIG_MACH_TUNA
+CONFIG_MACH_TUXRAIL
+CONFIG_MACH_TX28
+CONFIG_MACH_TX53
+CONFIG_MACH_TYPE
+CONFIG_MACH_TYPE_COMPAT_REV
+CONFIG_MACH_U300
+CONFIG_MACH_U5500
+CONFIG_MACH_UBISYS_P9D_EVP
+CONFIG_MACH_UEMD
+CONFIG_MACH_UNINO1
+CONFIG_MACH_UNISDEV
+CONFIG_MACH_UNISENSE_MMM
+CONFIG_MACH_UNIT2S
+CONFIG_MACH_UNIVERSAL_C210
+CONFIG_MACH_USB_A9260
+CONFIG_MACH_USB_A9263
+CONFIG_MACH_USDLOADER
+CONFIG_MACH_UTM300
+CONFIG_MACH_VALDEZ
+CONFIG_MACH_VANGOGH
+CONFIG_MACH_VC0718
+CONFIG_MACH_VENTANA
+CONFIG_MACH_VERDI
+CONFIG_MACH_VERDI_LTE
+CONFIG_MACH_VERIDIS_A300
+CONFIG_MACH_VERSATILE_AB
+CONFIG_MACH_VEXPRESS
+CONFIG_MACH_VIGOR
+CONFIG_MACH_VIPRINET
+CONFIG_MACH_VIT_IBOX
+CONFIG_MACH_VIVO
+CONFIG_MACH_VIVOW_CT
+CONFIG_MACH_VMX25
+CONFIG_MACH_VMX51
+CONFIG_MACH_VMX53
+CONFIG_MACH_VOICEBLUE
+CONFIG_MACH_VPAC270
+CONFIG_MACH_VPR200
+CONFIG_MACH_VR1000
+CONFIG_MACH_VSTMS
+CONFIG_MACH_VVBOX_SDLITE2
+CONFIG_MACH_VVBOX_SDORIG2
+CONFIG_MACH_VVBOX_SDPRO4
+CONFIG_MACH_W21
+CONFIG_MACH_W90N960EVB
+CONFIG_MACH_W90P910EVB
+CONFIG_MACH_W90P950EVB
+CONFIG_MACH_WARIO
+CONFIG_MACH_WASABI
+CONFIG_MACH_WATSON_EFM_PLUGIN
+CONFIG_MACH_WB40N
+CONFIG_MACH_WBD111
+CONFIG_MACH_WBD222
+CONFIG_MACH_WG302V2
+CONFIG_MACH_WHISTLER
+CONFIG_MACH_WLAN_COMPUTER
+CONFIG_MACH_WLF_CRAGG_6410
+CONFIG_MACH_WM8505_7IN_NETBOOK
+CONFIG_MACH_WM8650REFBOARD
+CONFIG_MACH_WN802T
+CONFIG_MACH_WNR854T
+CONFIG_MACH_WRT350N_V2
+CONFIG_MACH_WTPLUG
+CONFIG_MACH_XARINA
+CONFIG_MACH_XCEP
+CONFIG_MACH_XILINX
+CONFIG_MACH_XILINX_EP107
+CONFIG_MACH_XSBASE255
+CONFIG_MACH_YANOMAMI
+CONFIG_MACH_YL9200
+CONFIG_MACH_Z3_814X_MOD
+CONFIG_MACH_Z3_816X_MOD
+CONFIG_MACH_ZIPIT2
+CONFIG_MACH_ZMX25
+CONFIG_MACH_ZYLONITE
+CONFIG_MACH_ZYLONITE2
+CONFIG_MACPWR
+CONFIG_MACRESET_TIMEOUT
+CONFIG_MAC_ADDR_IN_EEPROM
+CONFIG_MAC_ADDR_IN_SPIFLASH
+CONFIG_MAC_OFFSET
+CONFIG_MAC_PARTITION
+CONFIG_MAKALU
+CONFIG_MALLOC_F_ADDR
+CONFIG_MALTA
+CONFIG_MARCO_MEMSET
+CONFIG_MARUBUN_PCCARD
+CONFIG_MARVELL
+CONFIG_MARVELL_GPIO
+CONFIG_MARVELL_MFP
+CONFIG_MASK_AER_AO
+CONFIG_MAX_DSP_CPUS
+CONFIG_MAX_FPGA_DEVICES
+CONFIG_MAX_I2C_NUM
+CONFIG_MAX_MEM_MAPPED
+CONFIG_MAX_PKT
+CONFIG_MAX_RAM_BANK_SIZE
+CONFIG_MCAST_TFTP
+CONFIG_MCF5249
+CONFIG_MCF5253
+CONFIG_MCFFEC
+CONFIG_MCFPIT
+CONFIG_MCFRTC
+CONFIG_MCFTMR
+CONFIG_MCFUART
+CONFIG_MCLK_DIS
+CONFIG_MD5
+CONFIG_MD5SUM_VERIFY
+CONFIG_MDIO_TIMEOUT
+CONFIG_MECP5123
+CONFIG_MEMSIZE
+CONFIG_MEMSIZE_IN_BYTES
+CONFIG_MEMSIZE_MASK
+CONFIG_MEM_ADD_WDTH
+CONFIG_MEM_HOLE_16M
+CONFIG_MEM_INIT_VALUE
+CONFIG_MEM_REMAP
+CONFIG_MEM_SIZE
+CONFIG_MENU
+CONFIG_MENUKEY
+CONFIG_MENUPROMPT
+CONFIG_MENU_SHOW
+CONFIG_MFG_ENV_SETTINGS
+CONFIG_MGCOGE
+CONFIG_MGCOGE3NE
+CONFIG_MIGO_R
+CONFIG_MII
+CONFIG_MIIM_ADDRESS
+CONFIG_MII_DEFAULT_TSEC
+CONFIG_MII_INIT
+CONFIG_MII_SUPPRESS_PREAMBLE
+CONFIG_MINIFAP
+CONFIG_MIPS_HUGE_TLB_SUPPORT
+CONFIG_MIPS_MT_FPAFF
+CONFIG_MIRQ_EN
+CONFIG_MISC_COMMON
+CONFIG_MISC_INIT_F
+CONFIG_MISC_INIT_R
+CONFIG_MIU_1BIT_INTERLEAVED
+CONFIG_MIU_2BIT_21_7_INTERLEAVED
+CONFIG_MIU_2BIT_INTERLEAVED
+CONFIG_MIU_LINEAR
+CONFIG_MK_edb9301
+CONFIG_MK_edb9315a
+CONFIG_MMCBOOTCOMMAND
+CONFIG_MMCROOT
+CONFIG_MMC_DEFAULT_DEV
+CONFIG_MMC_RPMB_TRACE
+CONFIG_MMC_SDHCI_IO_ACCESSORS
+CONFIG_MMC_SDMA
+CONFIG_MMC_SPI
+CONFIG_MMC_SPI_BUS
+CONFIG_MMC_SPI_CRC_ON
+CONFIG_MMC_SPI_CS
+CONFIG_MMC_SPI_CS_EPGIO
+CONFIG_MMC_SPI_MODE
+CONFIG_MMC_SPI_NPOWER_EGPIO
+CONFIG_MMC_SPI_POWER_EGPIO
+CONFIG_MMC_SPI_SPEED
+CONFIG_MMC_SUNXI
+CONFIG_MMC_SUNXI_SLOT
+CONFIG_MMC_TRACE
+CONFIG_MMU
+CONFIG_MODVERSIONS
+CONFIG_MONITOR_IS_IN_RAM
+CONFIG_MOTIONPRO
+CONFIG_MP
+CONFIG_MPC5121ADS
+CONFIG_MPC5121ADS_REV2
+CONFIG_MPC512x_FEC
+CONFIG_MPC5200
+CONFIG_MPC5200_DDR
+CONFIG_MPC52XX_SPI
+CONFIG_MPC555
+CONFIG_MPC5xxx_FEC
+CONFIG_MPC5xxx_FEC_MII10
+CONFIG_MPC5xxx_FEC_MII100
+CONFIG_MPC823
+CONFIG_MPC8247
+CONFIG_MPC8255
+CONFIG_MPC8272_FAMILY
+CONFIG_MPC8308
+CONFIG_MPC8308RDB
+CONFIG_MPC8308_P1M
+CONFIG_MPC8309
+CONFIG_MPC830x
+CONFIG_MPC8313
+CONFIG_MPC8313ERDB
+CONFIG_MPC8315
+CONFIG_MPC8315ERDB
+CONFIG_MPC831x
+CONFIG_MPC832XEMDS
+CONFIG_MPC832x
+CONFIG_MPC8349
+CONFIG_MPC8349EMDS
+CONFIG_MPC8349ITX
+CONFIG_MPC8349ITXGP
+CONFIG_MPC834x
+CONFIG_MPC8360
+CONFIG_MPC837XEMDS
+CONFIG_MPC837XERDB
+CONFIG_MPC837x
+CONFIG_MPC83XX_GPIO
+CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION
+CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN
+CONFIG_MPC83XX_GPIO_0_INIT_VALUE
+CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION
+CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN
+CONFIG_MPC83XX_GPIO_1_INIT_VALUE
+CONFIG_MPC83XX_PCI2
+CONFIG_MPC850
+CONFIG_MPC8536
+CONFIG_MPC8536DS
+CONFIG_MPC8540
+CONFIG_MPC8540ADS
+CONFIG_MPC8541
+CONFIG_MPC8541CDS
+CONFIG_MPC8544
+CONFIG_MPC8544DS
+CONFIG_MPC8548
+CONFIG_MPC8548CDS
+CONFIG_MPC855
+CONFIG_MPC8555
+CONFIG_MPC8555CDS
+CONFIG_MPC8560
+CONFIG_MPC8560ADS
+CONFIG_MPC8568
+CONFIG_MPC8568MDS
+CONFIG_MPC8569
+CONFIG_MPC8569MDS
+CONFIG_MPC857
+CONFIG_MPC8572
+CONFIG_MPC8572DS
+CONFIG_MPC85XX_FEC
+CONFIG_MPC85XX_FEC_NAME
+CONFIG_MPC85XX_PCI2
+CONFIG_MPC860
+CONFIG_MPC860T
+CONFIG_MPC8610
+CONFIG_MPC8610HPCD
+CONFIG_MPC862
+CONFIG_MPC8641
+CONFIG_MPC8641HPCN
+CONFIG_MPC866
+CONFIG_MPC866_FAMILY
+CONFIG_MPC86x
+CONFIG_MPC885
+CONFIG_MPC885_FAMILY
+CONFIG_MPC8XXX_SPI
+CONFIG_MPC8XX_LCD
+CONFIG_MPC8xxx_DISABLE_BPTR
+CONFIG_MPLL_FREQ
+CONFIG_MPR2
+CONFIG_MPX5200
+CONFIG_MP_CLK_FREQ
+CONFIG_MS7720SE
+CONFIG_MS7722SE
+CONFIG_MS7750SE
+CONFIG_MSHC_FREQ
+CONFIG_MTDMAP
+CONFIG_MTDPARTS
+CONFIG_MTD_CONCAT
+CONFIG_MTD_DEBUG
+CONFIG_MTD_DEBUG_VERBOSE
+CONFIG_MTD_DEVICE
+CONFIG_MTD_ECC_SOFT
+CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR
+CONFIG_MTD_NAND_ECC_SMC
+CONFIG_MTD_NAND_MUSEUM_IDS
+CONFIG_MTD_NAND_VERIFY_WRITE
+CONFIG_MTD_ONENAND_VERIFY_WRITE
+CONFIG_MTD_PARTITION
+CONFIG_MTD_PARTITIONS
+CONFIG_MTD_UBI_BEB_RESERVE
+CONFIG_MTD_UBI_BLOCK
+CONFIG_MTD_UBI_DEBUG
+CONFIG_MTD_UBI_DEBUG_MSG
+CONFIG_MTD_UBI_DEBUG_MSG_BLD
+CONFIG_MTD_UBI_DEBUG_MSG_EBA
+CONFIG_MTD_UBI_DEBUG_MSG_IO
+CONFIG_MTD_UBI_DEBUG_MSG_WL
+CONFIG_MTD_UBI_DEBUG_PARANOID
+CONFIG_MTD_UBI_GLUEBI
+CONFIG_MTD_UBI_MODULE
+CONFIG_MULTI_CS
+CONFIG_MUNICES
+CONFIG_MUSB_HOST
+CONFIG_MV88E61XX_CPU_PORT
+CONFIG_MV88E61XX_PHY_PORTS
+CONFIG_MV88E61XX_SWITCH
+CONFIG_MV88E6352_SWITCH
+CONFIG_MVEBU_MMC
+CONFIG_MVGBE
+CONFIG_MVGBE_PORTS
+CONFIG_MVMFP_V2
+CONFIG_MVNETA
+CONFIG_MVS
+CONFIG_MVSATA_IDE
+CONFIG_MVSATA_IDE_USE_PORT0
+CONFIG_MVSATA_IDE_USE_PORT1
+CONFIG_MV_ETH_RXQ
+CONFIG_MV_I2C_NUM
+CONFIG_MV_I2C_REG
+CONFIG_MV_SDHCI
+CONFIG_MX23
+CONFIG_MX25
+CONFIG_MX25_CLK32
+CONFIG_MX25_HCLK_FREQ
+CONFIG_MX27
+CONFIG_MX27_CLK32
+CONFIG_MX27_TIMER_HIGH_PRECISION
+CONFIG_MX28
+CONFIG_MX28_FEC_MAC_IN_OCOTP
+CONFIG_MX31
+CONFIG_MX31_CLK32
+CONFIG_MX31_HCLK_FREQ
+CONFIG_MX35
+CONFIG_MX35_CLK32
+CONFIG_MX35_HCLK_FREQ
+CONFIG_MX6DL_LPDDR2
+CONFIG_MX6DQ_LPDDR2
+CONFIG_MX6SX_SABRESD_REVA
+CONFIG_MX6UL_14X14_EVK_EMMC_REWORK
+CONFIG_MXC_EPDC
+CONFIG_MXC_GPIO
+CONFIG_MXC_GPT_HCLK
+CONFIG_MXC_MCI_REGS_BASE
+CONFIG_MXC_MMC
+CONFIG_MXC_NAND_HWECC
+CONFIG_MXC_NAND_IP_REGS_BASE
+CONFIG_MXC_NAND_REGS_BASE
+CONFIG_MXC_SPI
+CONFIG_MXC_UART
+CONFIG_MXC_UART_BASE
+CONFIG_MXC_USB_FLAGS
+CONFIG_MXC_USB_PORT
+CONFIG_MXC_USB_PORTSC
+CONFIG_MXS
+CONFIG_MXS_AUART
+CONFIG_MXS_AUART_BASE
+CONFIG_MXS_GPIO
+CONFIG_MXS_MMC
+CONFIG_MXS_OCOTP
+CONFIG_MXS_SPI
+CONFIG_MX_CYCLIC
+CONFIG_MY_OPTION
+CONFIG_NAND
+CONFIG_NANDFLASH_SIZE
+CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
+CONFIG_NAND_ACTL
+CONFIG_NAND_ATMEL
+CONFIG_NAND_CS_INIT
+CONFIG_NAND_DATA_REG
+CONFIG_NAND_DAVINCI
+CONFIG_NAND_DENALI_ECC_SIZE
+CONFIG_NAND_ECC_BCH
+CONFIG_NAND_ENV_DST
+CONFIG_NAND_FSL_ELBC
+CONFIG_NAND_FSL_IFC
+CONFIG_NAND_FSL_NFC
+CONFIG_NAND_FSMC
+CONFIG_NAND_KIRKWOOD
+CONFIG_NAND_KMETER1
+CONFIG_NAND_LPC32XX_MLC
+CONFIG_NAND_LPC32XX_SLC
+CONFIG_NAND_MODE_REG
+CONFIG_NAND_MPC5121_NFC
+CONFIG_NAND_MXC
+CONFIG_NAND_MXC_V1_1
+CONFIG_NAND_MXS
+CONFIG_NAND_NDFC
+CONFIG_NAND_OMAP_ECCSCHEME
+CONFIG_NAND_OMAP_ELM
+CONFIG_NAND_OMAP_GPMC
+CONFIG_NAND_OMAP_GPMC_PREFETCH
+CONFIG_NAND_OMAP_GPMC_WSCFG
+CONFIG_NAND_PLAT
+CONFIG_NAND_S3C2410
+CONFIG_NAND_SECBOOT
+CONFIG_NAND_SPL
+CONFIG_NAND_U_BOOT
+CONFIG_NATSEMI
+CONFIG_NB
+CONFIG_NCEL2C100_BASE
+CONFIG_NCEMIC100_BASE
+CONFIG_NDS_DLM1_BASE
+CONFIG_NDS_DLM2_BASE
+CONFIG_NEC_NL6448AC33
+CONFIG_NEC_NL6448BC20
+CONFIG_NEC_NL6448BC33_54
+CONFIG_NEEDS_MANUAL_RELOC
+CONFIG_NEO
+CONFIG_NET2BIG_V2
+CONFIG_NETCONSOLE_BUFFER_SIZE
+CONFIG_NETDEV
+CONFIG_NETMASK
+CONFIG_NETSPACE_LITE_V2
+CONFIG_NETSPACE_MAX_V2
+CONFIG_NETSPACE_MINI_V2
+CONFIG_NETSPACE_V2
+CONFIG_NET_MAXDEFRAG
+CONFIG_NET_MULTI
+CONFIG_NET_RETRY_COUNT
+CONFIG_NEVER_ASSERT_ODT_TO_CPU
+CONFIG_NFC_FREQ
+CONFIG_NFSBOOTCOMMAND
+CONFIG_NFS_READ_SIZE
+CONFIG_NFS_TIMEOUT
+CONFIG_NOBQFMAN
+CONFIG_NON_SECURE
+CONFIG_NORBOOT
+CONFIG_NORFLASH_PS32BIT
+CONFIG_NOT_SELECTED
+CONFIG_NO_ETH
+CONFIG_NO_RELOCATION
+CONFIG_NO_SERIAL_EEPROM
+CONFIG_NO_WAIT
+CONFIG_NR_CPUS
+CONFIG_NR_DRAM_BANKS
+CONFIG_NR_DRAM_BANKS_MAX
+CONFIG_NR_DRAM_POPULATED
+CONFIG_NS16550_MIN_FUNCTIONS
+CONFIG_NS8382X
+CONFIG_NS87308
+CONFIG_NUM_DDR_CONTROLLERS
+CONFIG_NUM_DSP_CPUS
+CONFIG_NUM_PAMU
+CONFIG_OCLK_DIV
+CONFIG_ODROID_REV_AIN
+CONFIG_OFF_PADCONF
+CONFIG_OF_
+CONFIG_OF_IDE_FIXUP
+CONFIG_OF_PLATDATA
+CONFIG_OF_SPI
+CONFIG_OF_SPI_FLASH
+CONFIG_OF_STDOUT_PATH
+CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
+CONFIG_OMAP
+CONFIG_OMAP3430
+CONFIG_OMAP3_AM3517CRANE
+CONFIG_OMAP3_DEVKIT8000
+CONFIG_OMAP3_EVM
+CONFIG_OMAP3_GPIO_2
+CONFIG_OMAP3_GPIO_3
+CONFIG_OMAP3_GPIO_4
+CONFIG_OMAP3_GPIO_5
+CONFIG_OMAP3_GPIO_6
+CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID
+CONFIG_OMAP3_MCX
+CONFIG_OMAP3_MICRON_DDR
+CONFIG_OMAP3_RX51
+CONFIG_OMAP3_SPI_D0_D1_SWAPPED
+CONFIG_OMAP3_ZOOM1
+CONFIG_OMAP4430
+CONFIG_OMAP54X
+CONFIG_OMAP_COMMON
+CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
+CONFIG_OMAP_EHCI_PHY2_RESET_GPIO
+CONFIG_OMAP_EHCI_PHY3_RESET_GPIO
+CONFIG_OMAP_GPIO
+CONFIG_OMAP_HSMMC
+CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
+CONFIG_OMAP_USB2PHY2_HOST
+CONFIG_OMAP_USB3PHY1_HOST
+CONFIG_OMAP_USB_PHY
+CONFIG_OMAP_VC_I2C_HS_MCODE
+CONFIG_OMAP_WATCHDOG
+CONFIG_OPTREX_BW
+CONFIG_ORIGEN
+CONFIG_OS1_ENV_ADDR
+CONFIG_OS2_ENV_ADDR
+CONFIG_OS_ENV_ADDR
+CONFIG_OTHBOOTARGS
+CONFIG_OVERWRITE_ETHADDR_ONCE
+CONFIG_P1010
+CONFIG_P1010RDB_PA
+CONFIG_P1010RDB_PB
+CONFIG_P1020
+CONFIG_P1020MBG
+CONFIG_P1020RDB_PC
+CONFIG_P1020RDB_PD
+CONFIG_P1020UTM
+CONFIG_P1021
+CONFIG_P1021RDB
+CONFIG_P1022
+CONFIG_P1022DS
+CONFIG_P1023
+CONFIG_P1024
+CONFIG_P1024RDB
+CONFIG_P1025
+CONFIG_P1025RDB
+CONFIG_P2020
+CONFIG_P2020RDB
+CONFIG_P2041RDB
+CONFIG_P3041DS
+CONFIG_P4080DS
+CONFIG_P5020DS
+CONFIG_P5040DS
+CONFIG_PAGE_CNT_MASK
+CONFIG_PAGE_CNT_SHIFT
+CONFIG_PALMAS_AUDPWR
+CONFIG_PALMAS_POWER
+CONFIG_PALMAS_SMPS7_FPWM
+CONFIG_PALMAS_USB_SS_PWR
+CONFIG_PANIC_HANG
+CONFIG_PARAVIRT
+CONFIG_PARTITIONS
+CONFIG_PARTITION_TYPE_GUID
+CONFIG_PARTITION_UUIDS
+CONFIG_PATA_BFIN
+CONFIG_PATI
+CONFIG_PB1000
+CONFIG_PB1100
+CONFIG_PB1500
+CONFIG_PB1X00
+CONFIG_PCA953X
+CONFIG_PCA9564_BASE
+CONFIG_PCA9564_I2C
+CONFIG_PCA9698
+CONFIG_PCI1
+CONFIG_PCI2
+CONFIG_PCIAUTO_SKIP_HOST_BRIDGE
+CONFIG_PCIE
+CONFIG_PCIE1
+CONFIG_PCIE2
+CONFIG_PCIE3
+CONFIG_PCIE4
+CONFIG_PCIE_IMX
+CONFIG_PCIE_IMX_PERST_GPIO
+CONFIG_PCIE_IMX_POWER_GPIO
+CONFIG_PCIE_LAYERSCAPE
+CONFIG_PCISLAVE
+CONFIG_PCIX_CHECK
+CONFIG_PCI_33M
+CONFIG_PCI_4xx_PTM_OVERWRITE
+CONFIG_PCI_66M
+CONFIG_PCI_BOOTDELAY
+CONFIG_PCI_CLK_FREQ
+CONFIG_PCI_CONFIG_HOST_BRIDGE
+CONFIG_PCI_DISABLE_PCIE
+CONFIG_PCI_EHCI_DEVICE
+CONFIG_PCI_EHCI_DEVNO
+CONFIG_PCI_ENUM_ONLY
+CONFIG_PCI_FIXUP_DEV
+CONFIG_PCI_GT64120
+CONFIG_PCI_HOST
+CONFIG_PCI_INDIRECT_BRIDGE
+CONFIG_PCI_IO_BUS
+CONFIG_PCI_IO_PHYS
+CONFIG_PCI_IO_SIZE
+CONFIG_PCI_MEMORY_BUS
+CONFIG_PCI_MEMORY_PHYS
+CONFIG_PCI_MEMORY_SIZE
+CONFIG_PCI_MEM_BUS
+CONFIG_PCI_MEM_PHYS
+CONFIG_PCI_MEM_SIZE
+CONFIG_PCI_MSC01
+CONFIG_PCI_MVEBU
+CONFIG_PCI_NOSCAN
+CONFIG_PCI_OHCI
+CONFIG_PCI_OHCI_DEVNO
+CONFIG_PCI_PNP
+CONFIG_PCI_PREF_BUS
+CONFIG_PCI_PREF_PHYS
+CONFIG_PCI_PREF_SIZE
+CONFIG_PCI_SCAN_SHOW
+CONFIG_PCI_SKIP_HOST_BRIDGE
+CONFIG_PCI_SYS_BUS
+CONFIG_PCI_SYS_MEM_BUS
+CONFIG_PCI_SYS_MEM_PHYS
+CONFIG_PCI_SYS_MEM_SIZE
+CONFIG_PCI_SYS_PHYS
+CONFIG_PCI_SYS_SIZE
+CONFIG_PCMCIA
+CONFIG_PCMCIA_SLOT_A
+CONFIG_PCMCIA_SLOT_B
+CONFIG_PCNET
+CONFIG_PCNET_79C973
+CONFIG_PCNET_79C975
+CONFIG_PDM360NG
+CONFIG_PDSP188x
+CONFIG_PEN_ADDR_BIG_ENDIAN
+CONFIG_PERIF1_FREQ
+CONFIG_PERIF2_FREQ
+CONFIG_PERIF3_FREQ
+CONFIG_PERIF4_FREQ
+CONFIG_PHY1_ADDR
+CONFIG_PHY2_ADDR
+CONFIG_PHY3_ADDR
+CONFIG_PHYCORE_MPC5200B_TINY
+CONFIG_PHYLIB_10G
+CONFIG_PHYSMEM
+CONFIG_PHY_ADDR
+CONFIG_PHY_AQUANTIA
+CONFIG_PHY_ATHEROS
+CONFIG_PHY_BASE_ADR
+CONFIG_PHY_BCM5421S
+CONFIG_PHY_BROADCOM
+CONFIG_PHY_CLK_FREQ
+CONFIG_PHY_CLOCK_FREQ
+CONFIG_PHY_CMD_DELAY
+CONFIG_PHY_CORTINA
+CONFIG_PHY_DAVICOM
+CONFIG_PHY_DYNAMIC_ANEG
+CONFIG_PHY_ET1011C
+CONFIG_PHY_ET1011C_TX_CLK_FIX
+CONFIG_PHY_GIGE
+CONFIG_PHY_ID
+CONFIG_PHY_INTERFACE_MODE
+CONFIG_PHY_IRAM_BASE
+CONFIG_PHY_KSZ9031
+CONFIG_PHY_LXT
+CONFIG_PHY_M88E1111
+CONFIG_PHY_MARVELL
+CONFIG_PHY_MAX_ADDR
+CONFIG_PHY_MICREL
+CONFIG_PHY_MICREL_KSZ9021
+CONFIG_PHY_MICREL_KSZ9031
+CONFIG_PHY_MODE_NEED_CHANGE
+CONFIG_PHY_NATSEMI
+CONFIG_PHY_REALTEK
+CONFIG_PHY_RESET
+CONFIG_PHY_RESET_DELAY
+CONFIG_PHY_SMSC
+CONFIG_PHY_TERANETICS
+CONFIG_PHY_TI
+CONFIG_PHY_TYPE
+CONFIG_PHY_VITESSE
+CONFIG_PHY_XILINX
+CONFIG_PHYx_ADDR
+CONFIG_PICOSAM
+CONFIG_PIGGY_MAC_ADRESS_OFFSET
+CONFIG_PIP405
+CONFIG_PIXIS_BRDCFG0_SPI
+CONFIG_PIXIS_BRDCFG0_USB2
+CONFIG_PIXIS_BRDCFG1_AUDCLK_11
+CONFIG_PIXIS_BRDCFG1_AUDCLK_12
+CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK
+CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK
+CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI
+CONFIG_PIXIS_BRDCFG1_TDM
+CONFIG_PIXIS_SGMII_CMD
+CONFIG_PL010_SERIAL
+CONFIG_PL011_CLOCK
+CONFIG_PL011_SERIAL
+CONFIG_PL011_SERIAL_RLCR
+CONFIG_PL01X_SERIAL
+CONFIG_PL01x_PORTS
+CONFIG_PLATFORM_ENV_SETTINGS
+CONFIG_PLATINUM_BOARD
+CONFIG_PLATINUM_CPU
+CONFIG_PLATINUM_PICON
+CONFIG_PLATINUM_PROJECT
+CONFIG_PLATINUM_TITANIUM
+CONFIG_PLL
+CONFIG_PLL1_CLK_FREQ
+CONFIG_PLL1_DIV2_CLK_FREQ
+CONFIG_PLL_BYPASS
+CONFIG_PLL_CTL_VAL
+CONFIG_PLL_DIV_VAL
+CONFIG_PLL_LOCKCNT_VAL
+CONFIG_PLU405
+CONFIG_PM
+CONFIG_PM9261
+CONFIG_PM9263
+CONFIG_PM9G45
+CONFIG_PMC405DE
+CONFIG_PMC_BR_PRELIM
+CONFIG_PMC_OR_PRELIM
+CONFIG_PMECC_CAP
+CONFIG_PMECC_INDEX_TABLE_OFFSET
+CONFIG_PMECC_SECTOR_SIZE
+CONFIG_PME_PLAT_CLK_DIV
+CONFIG_PMIC
+CONFIG_PMU
+CONFIG_PMW_BASE
+CONFIG_PM_SLEEP
+CONFIG_PORTMUX_PIO
+CONFIG_PORT_ADDR
+CONFIG_PORT_AP
+CONFIG_PORT_BEM
+CONFIG_PORT_BME
+CONFIG_PORT_BS
+CONFIG_PORT_BU
+CONFIG_PORT_BW
+CONFIG_PORT_CR
+CONFIG_PORT_CSN
+CONFIG_PORT_OEN
+CONFIG_PORT_PEN
+CONFIG_PORT_RE
+CONFIG_PORT_SOR
+CONFIG_PORT_TH
+CONFIG_PORT_TWE
+CONFIG_PORT_WBF
+CONFIG_PORT_WBN
+CONFIG_POST
+CONFIG_POSTBOOTMENU
+CONFIG_POST_ALT_LIST
+CONFIG_POST_BSPEC1
+CONFIG_POST_BSPEC1_GPIO_LEDS
+CONFIG_POST_BSPEC2
+CONFIG_POST_BSPEC2_GPIO_BUTTONS
+CONFIG_POST_BSPEC2_GPIO_NAMES
+CONFIG_POST_BSPEC3
+CONFIG_POST_BSPEC4
+CONFIG_POST_BSPEC5
+CONFIG_POST_EXTERNAL_WORD_FUNCS
+CONFIG_POST_KEY_MAGIC
+CONFIG_POST_SKIP_ENV_FLAGS
+CONFIG_POST_STD_LIST
+CONFIG_POST_UART
+CONFIG_POST_WATCHDOG
+CONFIG_POWER
+CONFIG_POWER_BATTERY
+CONFIG_POWER_BATTERY_TRATS
+CONFIG_POWER_BATTERY_TRATS2
+CONFIG_POWER_FG
+CONFIG_POWER_FG_MAX17042
+CONFIG_POWER_FG_MAX77693
+CONFIG_POWER_FSL
+CONFIG_POWER_FSL_MC13892
+CONFIG_POWER_FSL_MC34704
+CONFIG_POWER_HI6553
+CONFIG_POWER_I2C
+CONFIG_POWER_LTC3676
+CONFIG_POWER_LTC3676_I2C_ADDR
+CONFIG_POWER_MAX77686
+CONFIG_POWER_MAX77696
+CONFIG_POWER_MAX77696_I2C_ADDR
+CONFIG_POWER_MAX8997
+CONFIG_POWER_MAX8998
+CONFIG_POWER_MUIC
+CONFIG_POWER_MUIC_MAX77693
+CONFIG_POWER_MUIC_MAX8997
+CONFIG_POWER_PFUZE100
+CONFIG_POWER_PFUZE100_I2C_ADDR
+CONFIG_POWER_PFUZE3000
+CONFIG_POWER_PFUZE3000_I2C_ADDR
+CONFIG_POWER_PMIC_MAX77693
+CONFIG_POWER_SPI
+CONFIG_POWER_TPS62362
+CONFIG_POWER_TPS65090_EC
+CONFIG_POWER_TPS65217
+CONFIG_POWER_TPS65218
+CONFIG_POWER_TPS65910
+CONFIG_PPC4XX_RAPIDIO_DEBUG
+CONFIG_PPC4XX_RAPIDIO_IN_BAR_USE_OCM
+CONFIG_PPC4XX_RAPIDIO_LOOPBACK
+CONFIG_PPC4XX_RAPIDIO_PROMISCUOUS_MODE
+CONFIG_PPC4XX_RAPIDIO_USE_HB_PLB
+CONFIG_PPC4xx_DDR_AUTOCALIBRATION
+CONFIG_PPC4xx_DDR_METHOD_A
+CONFIG_PPC4xx_EMAC
+CONFIG_PPC64BRIDGE
+CONFIG_PPC_B4420
+CONFIG_PPC_B4860
+CONFIG_PPC_C29X
+CONFIG_PPC_CLUSTER_START
+CONFIG_PPC_P2041
+CONFIG_PPC_P3041
+CONFIG_PPC_P4080
+CONFIG_PPC_P5020
+CONFIG_PPC_P5040
+CONFIG_PPC_SPINTABLE_COMPATIBLE
+CONFIG_PPC_T1023
+CONFIG_PPC_T1024
+CONFIG_PPC_T1040
+CONFIG_PPC_T1042
+CONFIG_PPC_T2080
+CONFIG_PPC_T2081
+CONFIG_PPC_T4160
+CONFIG_PPC_T4240
+CONFIG_PQ_MDS_PIB
+CONFIG_PQ_MDS_PIB_ATM
+CONFIG_PRAM
+CONFIG_PREBOOT
+CONFIG_PRE_CONSOLE_BUFFER
+CONFIG_PRE_CON_BUF_ADDR
+CONFIG_PRE_CON_BUF_SZ
+CONFIG_PRIMEVIEW_V16C6448AC
+CONFIG_PRINTK
+CONFIG_PROC_FS
+CONFIG_PROFILE_ALL_BRANCHES
+CONFIG_PROFILING
+CONFIG_PROG_FDT
+CONFIG_PROG_FDT1
+CONFIG_PROG_FDT2
+CONFIG_PROG_OS
+CONFIG_PROG_OS1
+CONFIG_PROG_OS2
+CONFIG_PROG_SDRAM_TLB
+CONFIG_PROG_UBOOT
+CONFIG_PROG_UBOOT1
+CONFIG_PROG_UBOOT2
+CONFIG_PROOF_POINTS
+CONFIG_PRPMC_PCI_ALIAS
+CONFIG_PS2KBD
+CONFIG_PS2MULT
+CONFIG_PS2MULT_DELAY
+CONFIG_PS2SERIAL
+CONFIG_PSC3_USB
+CONFIG_PSC_CONSOLE
+CONFIG_PSC_CONSOLE2
+CONFIG_PSRAM_SCFG
+CONFIG_PWM
+CONFIG_PWM_IMX
+CONFIG_PXA_LCD
+CONFIG_PXA_MMC_GENERIC
+CONFIG_PXA_PWR_I2C
+CONFIG_PXA_SERIAL
+CONFIG_PXA_STD_I2C
+CONFIG_PXA_VGA
+CONFIG_PXA_VIDEO
+CONFIG_P_CLK_FREQ
+CONFIG_QBMAN_CLK_DIV
+CONFIG_QE
+CONFIG_QEMU_E500
+CONFIG_QEMU_MIPS
+CONFIG_QIXIS_I2C_ACCESS
+CONFIG_QSPI
+CONFIG_QSPI_QUAD_SUPPORT
+CONFIG_QSPI_SEL_GPIO
+CONFIG_QUOTA
+CONFIG_R0P7734
+CONFIG_R2DPLUS
+CONFIG_R7780MP
+CONFIG_R8A66597_BASE_ADDR
+CONFIG_R8A66597_ENDIAN
+CONFIG_R8A66597_LDRV
+CONFIG_R8A66597_XTAL
+CONFIG_R8A7740
+CONFIG_R8A7790
+CONFIG_R8A7791
+CONFIG_R8A7792
+CONFIG_R8A7793
+CONFIG_R8A7794
+CONFIG_RAINIER
+CONFIG_RAMBOOT
+CONFIG_RAMBOOTCOMMAND
+CONFIG_RAMBOOTCOMMAND_TFTP
+CONFIG_RAMBOOT_NAND
+CONFIG_RAMBOOT_PBL
+CONFIG_RAMBOOT_SDCARD
+CONFIG_RAMBOOT_SPIFLASH
+CONFIG_RAMBOOT_TEXT_BASE
+CONFIG_RAMDISKFILE
+CONFIG_RAMDISK_ADDR
+CONFIG_RAMDISK_BOOT
+CONFIG_RAM_BOOT
+CONFIG_RAM_BOOT_PHYS
+CONFIG_RANDOM_UUID
+CONFIG_RAPIDIO
+CONFIG_RBTREE
+CONFIG_RCAR_BOARD_STRING
+CONFIG_RD_LVL
+CONFIG_REALMODE_DEBUG
+CONFIG_RED_LED
+CONFIG_REFCLK_FREQ
+CONFIG_REG
+CONFIG_REG_0
+CONFIG_REG_1_BASE
+CONFIG_REG_2
+CONFIG_REG_3
+CONFIG_REG_8
+CONFIG_REG_APER_SIZE
+CONFIG_RELOC_GOT_SKIP_NULL
+CONFIG_REMAKE_ELF
+CONFIG_REQ
+CONFIG_RESERVED_01_BASE
+CONFIG_RESERVED_02_BASE
+CONFIG_RESERVED_03_BASE
+CONFIG_RESERVED_04_BASE
+CONFIG_RESET
+CONFIG_RESET_PHY_R
+CONFIG_RESET_TO_RETRY
+CONFIG_RESET_VECTOR_ADDRESS
+CONFIG_RESTORE_FLASH
+CONFIG_RES_BLOCK_SIZE
+CONFIG_REV1
+CONFIG_REV3
+CONFIG_REVISION_TAG
+CONFIG_RFSPART
+CONFIG_RGMII
+CONFIG_RIO
+CONFIG_RMII
+CONFIG_RMOBILE_BOARD_STRING
+CONFIG_RMSTP0_ENA
+CONFIG_RMSTP10_ENA
+CONFIG_RMSTP11_ENA
+CONFIG_RMSTP1_ENA
+CONFIG_RMSTP2_ENA
+CONFIG_RMSTP3_ENA
+CONFIG_RMSTP4_ENA
+CONFIG_RMSTP5_ENA
+CONFIG_RMSTP6_ENA
+CONFIG_RMSTP7_ENA
+CONFIG_RMSTP8_ENA
+CONFIG_RMSTP9_ENA
+CONFIG_ROCKCHIP_CHIP_TAG
+CONFIG_ROCKCHIP_MAX_INIT_SIZE
+CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
+CONFIG_ROCKCHIP_USB2_PHY
+CONFIG_ROM_STUBS
+CONFIG_ROOTFS_OFFSET
+CONFIG_ROOTPATH
+CONFIG_RSK7203
+CONFIG_RSK7264
+CONFIG_RSK7269
+CONFIG_RTC_BFIN
+CONFIG_RTC_DS1307
+CONFIG_RTC_DS1337
+CONFIG_RTC_DS1338
+CONFIG_RTC_DS1374
+CONFIG_RTC_DS1388
+CONFIG_RTC_DS1556
+CONFIG_RTC_DS174x
+CONFIG_RTC_DS3231
+CONFIG_RTC_FTRTC010
+CONFIG_RTC_IMXDI
+CONFIG_RTC_INTERNAL
+CONFIG_RTC_M41T11
+CONFIG_RTC_M41T60
+CONFIG_RTC_M41T62
+CONFIG_RTC_M48T35A
+CONFIG_RTC_MC13XXX
+CONFIG_RTC_MC146818
+CONFIG_RTC_MCFRRTC
+CONFIG_RTC_MCP79411
+CONFIG_RTC_MPC5200
+CONFIG_RTC_MPC8xx
+CONFIG_RTC_MV
+CONFIG_RTC_MXS
+CONFIG_RTC_PCF8563
+CONFIG_RTC_PT7C4338
+CONFIG_RTC_RTC4543
+CONFIG_RTC_RV3029
+CONFIG_RTC_RX8025
+CONFIG_RTC_S3C24X0
+CONFIG_RTC_X1205
+CONFIG_RUN_FROM_DDR0
+CONFIG_RUN_FROM_DDR1
+CONFIG_RUN_FROM_IRAM_ONLY
+CONFIG_RX_DESCR_NUM
+CONFIG_S32V234
+CONFIG_S3C2400
+CONFIG_S3C2410
+CONFIG_S3C2410_NAND_BBT
+CONFIG_S3C2410_NAND_HWECC
+CONFIG_S3C2440
+CONFIG_S3C24X0
+CONFIG_S3C24X0_SERIAL
+CONFIG_S3C24XX_CUSTOM_NAND_TIMING
+CONFIG_S3C24XX_TACLS
+CONFIG_S3C24XX_TWRPH0
+CONFIG_S3C24XX_TWRPH1
+CONFIG_S3D2_CLK_FREQ
+CONFIG_S5P
+CONFIG_S5PC100
+CONFIG_S5PC110
+CONFIG_S5P_PA_SYSRAM
+CONFIG_S5P_SDHCI
+CONFIG_S6E63D6
+CONFIG_S6E8AX0
+CONFIG_SA1100_ADSBITSY
+CONFIG_SA1100_ASSABET
+CONFIG_SA1100_BADGE4
+CONFIG_SA1100_BRUTUS
+CONFIG_SA1100_CERF
+CONFIG_SA1100_COLLIE
+CONFIG_SA1100_CONSUS
+CONFIG_SA1100_FLEXANET
+CONFIG_SA1100_GRAPHICSCLIENT
+CONFIG_SA1100_GRAPHICSMASTER
+CONFIG_SA1100_H3100
+CONFIG_SA1100_H3600
+CONFIG_SA1100_HACKKIT
+CONFIG_SA1100_JORNADA720
+CONFIG_SA1100_LART
+CONFIG_SA1100_NANOENGINE
+CONFIG_SA1100_PFS168
+CONFIG_SA1100_PLEB
+CONFIG_SA1100_PT_SYSTEM3
+CONFIG_SA1100_SHANNON
+CONFIG_SA1100_SIMPAD
+CONFIG_SA1100_XP860
+CONFIG_SABRELITE
+CONFIG_SAMA5D2
+CONFIG_SAMA5D3
+CONFIG_SAMA5D3_LCD_BASE
+CONFIG_SAMA5D4
+CONFIG_SAMSUNG
+CONFIG_SAMSUNG_ONENAND
+CONFIG_SANDBOX_ARCH
+CONFIG_SANDBOX_BIG_ENDIAN
+CONFIG_SANDBOX_BITS_PER_LONG
+CONFIG_SANDBOX_SDL
+CONFIG_SANDBOX_SPI_MAX_BUS
+CONFIG_SANDBOX_SPI_MAX_CS
+CONFIG_SAR2_REG
+CONFIG_SAR_REG
+CONFIG_SATA1
+CONFIG_SATA2
+CONFIG_SATAPWR
+CONFIG_SATA_CEVA
+CONFIG_SATA_DWC
+CONFIG_SATA_MV
+CONFIG_SATA_SIL
+CONFIG_SATA_SIL3114
+CONFIG_SATA_ULI5288
+CONFIG_SBC8349
+CONFIG_SBC8548
+CONFIG_SBC8641D
+CONFIG_SCC1_ENET
+CONFIG_SCC2_ENET
+CONFIG_SCF0403_LCD
+CONFIG_SCIF
+CONFIG_SCIF_A
+CONFIG_SCIF_CONSOLE
+CONFIG_SCIF_EXT_CLOCK
+CONFIG_SCIF_USE_EXT_CLK
+CONFIG_SCLK0_DIV
+CONFIG_SCLK1_DIV
+CONFIG_SCLK_DIV
+CONFIG_SCLK_HZ
+CONFIG_SCSI
+CONFIG_SCSI_AHCI
+CONFIG_SCSI_AHCI_PLAT
+CONFIG_SCSI_DEV_ID
+CONFIG_SCSI_DEV_LIST
+CONFIG_SCSI_SYM53C8XX
+CONFIG_SC_TIMER_CLK
+CONFIG_SDCARD
+CONFIG_SDHCI
+CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT
+CONFIG_SDHCI_CMD_MAX_TIMEOUT
+CONFIG_SDRAM_BANK0
+CONFIG_SDRAM_BANK1
+CONFIG_SDRAM_ECC
+CONFIG_SDRAM_OFFSET_FOR_RT
+CONFIG_SDRAM_PPC4xx_DENALI_DDR2
+CONFIG_SDRAM_PPC4xx_IBM_DDR
+CONFIG_SDRAM_PPC4xx_IBM_DDR2
+CONFIG_SDRAM_PPC4xx_IBM_SDRAM
+CONFIG_SDRC
+CONFIG_SDR_MT48LC16M16A2
+CONFIG_SD_BOOT_QSPI
+CONFIG_SECBOOT
+CONFIG_SECURE_BL1_ONLY
+CONFIG_SECURE_BOOT
+CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ
+CONFIG_SECURITY
+CONFIG_SEC_DEQ_TIMEOUT
+CONFIG_SEC_FW_SIZE
+CONFIG_SELECTED
+CONFIG_SEQUOIA
+CONFIG_SERIAL0
+CONFIG_SERIAL1
+CONFIG_SERIAL2
+CONFIG_SERIAL3
+CONFIG_SERIAL_BOOT
+CONFIG_SERIAL_FLASH
+CONFIG_SERIAL_HW_FLOW_CONTROL
+CONFIG_SERIAL_MULTI
+CONFIG_SERIAL_SOFTWARE_FIFO
+CONFIG_SERIAL_TAG
+CONFIG_SERIRQ_CONTINUOUS_MODE
+CONFIG_SERVERIP
+CONFIG_SETUP_INITRD_TAG
+CONFIG_SETUP_MEMORY_TAGS
+CONFIG_SET_BIST
+CONFIG_SET_BOOTARGS
+CONFIG_SET_DFU_ALT_BUF_LEN
+CONFIG_SET_DFU_ALT_INFO
+CONFIG_SFIO
+CONFIG_SF_DATAFLASH
+CONFIG_SF_DEFAULT_BUS
+CONFIG_SF_DEFAULT_CS
+CONFIG_SF_DEFAULT_HZ
+CONFIG_SF_DEFAULT_MODE
+CONFIG_SF_DEFAULT_SPEED
+CONFIG_SF_DUAL_FLASH
+CONFIG_SGI_IP28
+CONFIG_SH4_PCI
+CONFIG_SH73A0
+CONFIG_SH7751_PCI
+CONFIG_SH7752EVB
+CONFIG_SH7753EVB
+CONFIG_SH7757LCR
+CONFIG_SH7757LCR_DDR_ECC
+CONFIG_SH7763RDP
+CONFIG_SH7780_PCI
+CONFIG_SH7780_PCI_BAR
+CONFIG_SH7780_PCI_LAR
+CONFIG_SH7780_PCI_LSR
+CONFIG_SH7785LCR
+CONFIG_SHA1SUM_VERIFY
+CONFIG_SHARP_16x9
+CONFIG_SHARP_LM8V31
+CONFIG_SHARP_LQ035Q7DH06
+CONFIG_SHARP_LQ057Q3DC02
+CONFIG_SHARP_LQ065T9DR51U
+CONFIG_SHARP_LQ084V1DG21
+CONFIG_SHARP_LQ104V7DS01
+CONFIG_SHARP_LQ64D341
+CONFIG_SHEEVA_88SV131
+CONFIG_SHEEVA_88SV331xV5
+CONFIG_SHELL
+CONFIG_SHMIN
+CONFIG_SHOW_ACTIVITY
+CONFIG_SHOW_BOOT_PROGRESS
+CONFIG_SH_CMT_CLK_FREQ
+CONFIG_SH_DSP
+CONFIG_SH_ETHER
+CONFIG_SH_ETHER_ALIGNE_SIZE
+CONFIG_SH_ETHER_BASE_ADDR
+CONFIG_SH_ETHER_CACHE_INVALIDATE
+CONFIG_SH_ETHER_CACHE_WRITEBACK
+CONFIG_SH_ETHER_PHY_ADDR
+CONFIG_SH_ETHER_PHY_MODE
+CONFIG_SH_ETHER_SH7734_MII
+CONFIG_SH_ETHER_USE_GETHER
+CONFIG_SH_ETHER_USE_PORT
+CONFIG_SH_GPIO_PFC
+CONFIG_SH_I2C_8BIT
+CONFIG_SH_I2C_BASE0
+CONFIG_SH_I2C_BASE1
+CONFIG_SH_I2C_CLOCK
+CONFIG_SH_I2C_DATA_HIGH
+CONFIG_SH_I2C_DATA_LOW
+CONFIG_SH_MMCIF
+CONFIG_SH_MMCIF_ADDR
+CONFIG_SH_MMCIF_CLK
+CONFIG_SH_QSPI
+CONFIG_SH_QSPI_BASE
+CONFIG_SH_SCIF_CLK_FREQ
+CONFIG_SH_SDHI_FREQ
+CONFIG_SH_SDRAM_OFFSET
+CONFIG_SH_SH7734_I2C
+CONFIG_SH_SPI
+CONFIG_SH_SPI_BASE
+CONFIG_SH_TMU_CLK_FREQ
+CONFIG_SIEMENS_DRACO
+CONFIG_SIEMENS_MACH_TYPE
+CONFIG_SIEMENS_PXM2
+CONFIG_SIEMENS_RUT
+CONFIG_SILENT_CONSOLE
+CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC
+CONFIG_SILENT_CONSOLE_UPDATE_ON_SET
+CONFIG_SIMU
+CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
+CONFIG_SKIP_LOWLEVEL_INIT
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+CONFIG_SKIP_TRUNOFF_WATCHDOG
+CONFIG_SLIC
+CONFIG_SLTTMR
+CONFIG_SMC91111
+CONFIG_SMC91111_BASE
+CONFIG_SMC91111_EXT_PHY
+CONFIG_SMC911X
+CONFIG_SMC911X_16_BIT
+CONFIG_SMC911X_32_BIT
+CONFIG_SMC911X_BASE
+CONFIG_SMC911X_NO_EEPROM
+CONFIG_SMC_91111_EXT_PHY
+CONFIG_SMC_AUTONEG_TIMEOUT
+CONFIG_SMC_B0CTL_VAL
+CONFIG_SMC_B0ETIM_VAL
+CONFIG_SMC_B0TIM_VAL
+CONFIG_SMC_B1CTL_VAL
+CONFIG_SMC_B1ETIM_VAL
+CONFIG_SMC_B1TIM_VAL
+CONFIG_SMC_B2CTL_VAL
+CONFIG_SMC_B2ETIM_VAL
+CONFIG_SMC_B2TIM_VAL
+CONFIG_SMC_B3CTL_VAL
+CONFIG_SMC_B3ETIM_VAL
+CONFIG_SMC_B3TIM_VAL
+CONFIG_SMC_GCTL_VAL
+CONFIG_SMC_USE_32_BIT
+CONFIG_SMC_USE_IOFUNCS
+CONFIG_SMDK2410
+CONFIG_SMDK5420
+CONFIG_SMDKC100
+CONFIG_SMDKV310
+CONFIG_SMP_PEN_ADDR
+CONFIG_SMSC_LPC47M
+CONFIG_SMSC_SIO1007
+CONFIG_SMSTP0_ENA
+CONFIG_SMSTP10_ENA
+CONFIG_SMSTP11_ENA
+CONFIG_SMSTP1_ENA
+CONFIG_SMSTP2_ENA
+CONFIG_SMSTP3_ENA
+CONFIG_SMSTP4_ENA
+CONFIG_SMSTP5_ENA
+CONFIG_SMSTP6_ENA
+CONFIG_SMSTP7_ENA
+CONFIG_SMSTP8_ENA
+CONFIG_SMSTP9_ENA
+CONFIG_SOCFPGA_DWMMC
+CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH
+CONFIG_SOCFPGA_VIRTUAL_TARGET
+CONFIG_SOCRATES
+CONFIG_SOC_AU1000
+CONFIG_SOC_AU1100
+CONFIG_SOC_AU1500
+CONFIG_SOC_AU1550
+CONFIG_SOC_AU1X00
+CONFIG_SOC_DA850
+CONFIG_SOC_DA8XX
+CONFIG_SOC_DM355
+CONFIG_SOC_DM365
+CONFIG_SOC_DM644X
+CONFIG_SOC_DM646X
+CONFIG_SOC_K2E
+CONFIG_SOC_K2G
+CONFIG_SOC_K2HK
+CONFIG_SOC_K2L
+CONFIG_SOC_KEYSTONE
+CONFIG_SOC_OMAP3430
+CONFIG_SOFT_I2C_GPIO_SCL
+CONFIG_SOFT_I2C_GPIO_SDA
+CONFIG_SOFT_I2C_I2C10_SCL
+CONFIG_SOFT_I2C_I2C10_SDA
+CONFIG_SOFT_I2C_I2C5_SCL
+CONFIG_SOFT_I2C_I2C5_SDA
+CONFIG_SOFT_I2C_I2C9_SCL
+CONFIG_SOFT_I2C_I2C9_SDA
+CONFIG_SOFT_I2C_MULTI_BUS
+CONFIG_SOFT_I2C_READ_REPEATED_START
+CONFIG_SOFT_SPI
+CONFIG_SOFT_TWS
+CONFIG_SOURCE
+CONFIG_SPARSE_RCU_POINTER
+CONFIG_SPDDRAM_SILENT
+CONFIG_SPD_EEPROM
+CONFIG_SPEAR300
+CONFIG_SPEAR310
+CONFIG_SPEAR320
+CONFIG_SPEAR3XX
+CONFIG_SPEAR600
+CONFIG_SPEAR_BOOTSTRAPCFG
+CONFIG_SPEAR_BOOTSTRAPMASK
+CONFIG_SPEAR_BOOTSTRAPSHFT
+CONFIG_SPEAR_EMI
+CONFIG_SPEAR_EMIBASE
+CONFIG_SPEAR_ETHBASE
+CONFIG_SPEAR_GPIO
+CONFIG_SPEAR_HZ
+CONFIG_SPEAR_HZ_CLOCK
+CONFIG_SPEAR_MISCBASE
+CONFIG_SPEAR_MPMCBASE
+CONFIG_SPEAR_MPMCREGS
+CONFIG_SPEAR_NORNAND16BOOT
+CONFIG_SPEAR_NORNAND8BOOT
+CONFIG_SPEAR_NORNANDBOOT
+CONFIG_SPEAR_ONLYSNORBOOT
+CONFIG_SPEAR_RASBASE
+CONFIG_SPEAR_SYSCNTLBASE
+CONFIG_SPEAR_TIMERBASE
+CONFIG_SPEAR_UART48M
+CONFIG_SPEAR_UARTCLKMSK
+CONFIG_SPEAR_USBBOOT
+CONFIG_SPEAR_USBTTY
+CONFIG_SPI
+CONFIG_SPI_ADDR
+CONFIG_SPI_BAUD_INITBLOCK
+CONFIG_SPI_BOOTING
+CONFIG_SPI_CS_IS_VALID
+CONFIG_SPI_DATAFLASH_WRITE_VERIFY
+CONFIG_SPI_FLASH_ALL
+CONFIG_SPI_FLASH_ISSI
+CONFIG_SPI_FLASH_QUAD
+CONFIG_SPI_FLASH_SIZE
+CONFIG_SPI_HALF_DUPLEX
+CONFIG_SPI_IDLE_VAL
+CONFIG_SPI_LENGTH
+CONFIG_SPI_N25Q256A_RESET
+CONFIG_SPLASHIMAGE_GUARD
+CONFIG_SPLASH_SCREEN
+CONFIG_SPLASH_SCREEN_ALIGN
+CONFIG_SPLASH_SOURCE
+CONFIG_SPLL_FREQ
+CONFIG_SPL_
+CONFIG_SPL_ABORT_ON_RAW_IMAGE
+CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
+CONFIG_SPL_ATMEL_SIZE
+CONFIG_SPL_BOARD_INIT
+CONFIG_SPL_BOARD_LOAD_IMAGE
+CONFIG_SPL_BOOTROM_SAVE
+CONFIG_SPL_BOOT_DEVICE
+CONFIG_SPL_BSS_MAX_SIZE
+CONFIG_SPL_BSS_START_ADDR
+CONFIG_SPL_BUILD
+CONFIG_SPL_CMT
+CONFIG_SPL_CMT_DEBUG
+CONFIG_SPL_COMMON_INIT_DDR
+CONFIG_SPL_CONSOLE
+CONFIG_SPL_DISPLAY_PRINT
+CONFIG_SPL_ETH_DEVICE
+CONFIG_SPL_FLUSH_IMAGE
+CONFIG_SPL_FOO
+CONFIG_SPL_FRAMEWORK
+CONFIG_SPL_FSL_PBL
+CONFIG_SPL_FS_LOAD_ARGS_NAME
+CONFIG_SPL_FS_LOAD_KERNEL_NAME
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
+CONFIG_SPL_GD_ADDR
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
+CONFIG_SPL_INIT_MINIMAL
+CONFIG_SPL_JR0_LIODN_NS
+CONFIG_SPL_JR0_LIODN_S
+CONFIG_SPL_LDSCRIPT
+CONFIG_SPL_LOAD_FIT_ADDRESS
+CONFIG_SPL_MAX_FOOTPRINT
+CONFIG_SPL_MAX_PEB_SIZE
+CONFIG_SPL_MAX_SIZE
+CONFIG_SPL_MMC_BOOT
+CONFIG_SPL_MMC_LOAD
+CONFIG_SPL_MMC_MINIMAL
+CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
+CONFIG_SPL_MXS_PSWITCH_WAIT
+CONFIG_SPL_NAND_AM33XX_BCH
+CONFIG_SPL_NAND_BASE
+CONFIG_SPL_NAND_BOOT
+CONFIG_SPL_NAND_DRIVERS
+CONFIG_SPL_NAND_ECC
+CONFIG_SPL_NAND_INIT
+CONFIG_SPL_NAND_LOAD
+CONFIG_SPL_NAND_MINIMAL
+CONFIG_SPL_NAND_MXS
+CONFIG_SPL_NAND_RAW_ONLY
+CONFIG_SPL_NAND_SIMPLE
+CONFIG_SPL_NAND_SOFTECC
+CONFIG_SPL_NAND_WORKSPACE
+CONFIG_SPL_NO_CPU_SUPPORT_CODE
+CONFIG_SPL_OMAP3_ID_NAND
+CONFIG_SPL_OS_BOOT
+CONFIG_SPL_PAD_TO
+CONFIG_SPL_PANIC_ON_RAW_IMAGE
+CONFIG_SPL_PBL_PAD
+CONFIG_SPL_PPAACT_ADDR
+CONFIG_SPL_RAM_DEVICE
+CONFIG_SPL_RELOC_MALLOC_ADDR
+CONFIG_SPL_RELOC_MALLOC_SIZE
+CONFIG_SPL_RELOC_STACK
+CONFIG_SPL_RELOC_STACK_SIZE
+CONFIG_SPL_RELOC_TEXT_BASE
+CONFIG_SPL_SATA_BOOT_DEVICE
+CONFIG_SPL_SIZE
+CONFIG_SPL_SKIP_RELOCATE
+CONFIG_SPL_SPAACT_ADDR
+CONFIG_SPL_SPI_BOOT
+CONFIG_SPL_SPI_FLASH_MINIMAL
+CONFIG_SPL_SPI_LOAD
+CONFIG_SPL_STACK
+CONFIG_SPL_STACK_ADDR
+CONFIG_SPL_STACK_SIZE
+CONFIG_SPL_START_S_PATH
+CONFIG_SPL_TARGET
+CONFIG_SPL_TEXT_BASE
+CONFIG_SPL_UBI
+CONFIG_SPL_UBI_INFO_ADDR
+CONFIG_SPL_UBI_LEB_START
+CONFIG_SPL_UBI_LOAD_ARGS_ID
+CONFIG_SPL_UBI_LOAD_KERNEL_ID
+CONFIG_SPL_UBI_LOAD_MONITOR_ID
+CONFIG_SPL_UBI_MAX_PEBS
+CONFIG_SPL_UBI_MAX_PEB_SIZE
+CONFIG_SPL_UBI_MAX_VOL_LEBS
+CONFIG_SPL_UBI_PEB_OFFSET
+CONFIG_SPL_UBI_VID_OFFSET
+CONFIG_SPL_UBI_VOL_IDS
+CONFIG_SPL_UBOOT_KEY_HASH
+CONFIG_SRAM_BASE
+CONFIG_SRAM_SIZE
+CONFIG_SRIO1
+CONFIG_SRIO2
+CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET
+CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1
+CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2
+CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS
+CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE
+CONFIG_SRIO_PCIE_BOOT_MASTER
+CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK
+CONFIG_SRIO_PCIE_BOOT_SLAVE
+CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS
+CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS
+CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE
+CONFIG_SSD_BR_PRELIM
+CONFIG_SSD_OR_PRELIM
+CONFIG_SSE2
+CONFIG_SSI1_FREQ
+CONFIG_SSI2_FREQ
+CONFIG_SSP1_BASE
+CONFIG_SSP2_BASE
+CONFIG_SSP3_BASE
+CONFIG_STACKBASE
+CONFIG_STACKSIZE
+CONFIG_STACKSIZE_FIQ
+CONFIG_STACKSIZE_IRQ
+CONFIG_STAMP_CF
+CONFIG_STANDALONE_LOAD_ADDR
+CONFIG_STATIC_BOARD_REV
+CONFIG_STATIC_RELA
+CONFIG_STATUSLED
+CONFIG_STATUS_LED
+CONFIG_STD_DEVICES_SETTINGS
+CONFIG_STK52XX
+CONFIG_STK52XX_REV100
+CONFIG_STM32F4DISCOVERY
+CONFIG_STM32X7_SERIAL
+CONFIG_STM32_FLASH
+CONFIG_STM32_GPIO
+CONFIG_STM32_HSE_HZ
+CONFIG_STM32_HZ
+CONFIG_STM32_SERIAL
+CONFIG_STORAGE_EMMC
+CONFIG_STRESS
+CONFIG_STRIDER
+CONFIG_STRIDER_CON
+CONFIG_STRIDER_CON_DP
+CONFIG_STRIDER_CPU
+CONFIG_STRIDER_CPU_DP
+CONFIG_STRIDER_FANS
+CONFIG_STUART
+CONFIG_STV0991
+CONFIG_STV0991_HZ
+CONFIG_STV0991_HZ_CLOCK
+CONFIG_ST_SMI
+CONFIG_SUN4
+CONFIG_SUNXI
+CONFIG_SUNXI_AHCI
+CONFIG_SUNXI_EMAC
+CONFIG_SUNXI_GMAC
+CONFIG_SUNXI_GPIO
+CONFIG_SUNXI_MAX_FB_SIZE
+CONFIG_SUNXI_USB_PHYS
+CONFIG_SUPERH_ON_CHIP_R8A66597
+CONFIG_SUPPORT_EMMC_BOOT
+CONFIG_SUPPORT_EMMC_RPMB
+CONFIG_SUPPORT_RAW_INITRD
+CONFIG_SUPPORT_VFAT
+CONFIG_SUVD3
+CONFIG_SX151X_GPIO_COUNT_8
+CONFIG_SX151X_SPI_BUS
+CONFIG_SXNI855T
+CONFIG_SYSCOUNTER_TIMER
+CONFIG_SYSFLAGS_ADDR
+CONFIG_SYSFS
+CONFIG_SYSMGR_ISWGRP_HANDOFF
+CONFIG_SYSTEMACE
+CONFIG_SYS_33MHZ
+CONFIG_SYS_405_UART_ERRATA_59
+CONFIG_SYS_460GT_SRIO_ERRATA_1
+CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY
+CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY
+CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY
+CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY
+CONFIG_SYS_4xx_CHIP_21_ERRATA
+CONFIG_SYS_4xx_GPIO_TABLE
+CONFIG_SYS_4xx_RESET_TYPE
+CONFIG_SYS_64BIT
+CONFIG_SYS_64BIT_LBA
+CONFIG_SYS_64BIT_VSPRINTF
+CONFIG_SYS_66MHZ
+CONFIG_SYS_8313ERDB_BROKEN_PMC
+CONFIG_SYS_83XX_DDR_USES_CS0
+CONFIG_SYS_8XX_XIN
+CONFIG_SYS_8xx_CPUCLK_MAX
+CONFIG_SYS_8xx_CPUCLK_MIN
+CONFIG_SYS_ACE_BASE
+CONFIG_SYS_ACE_BASE_PHYS_H
+CONFIG_SYS_ACE_BASE_PHYS_L
+CONFIG_SYS_ACR_APARK
+CONFIG_SYS_ACR_PARKM
+CONFIG_SYS_ACR_PIPE_DEP
+CONFIG_SYS_ACR_RPTCNT
+CONFIG_SYS_ADDRESS_MAP_A
+CONFIG_SYS_ADV7611_I2C
+CONFIG_SYS_AHB_BASE
+CONFIG_SYS_ALE_MASK
+CONFIG_SYS_ALLOC_DPRAM
+CONFIG_SYS_ALT_BOOT
+CONFIG_SYS_ALT_FLASH
+CONFIG_SYS_ALT_MEMTEST
+CONFIG_SYS_AMASK0
+CONFIG_SYS_AMASK0_FINAL
+CONFIG_SYS_AMASK1
+CONFIG_SYS_AMASK1_FINAL
+CONFIG_SYS_AMASK2
+CONFIG_SYS_AMASK2_FINAL
+CONFIG_SYS_AMASK3
+CONFIG_SYS_AMASK3_FINAL
+CONFIG_SYS_AMASK4
+CONFIG_SYS_AMASK5
+CONFIG_SYS_AMASK6
+CONFIG_SYS_AMASK7
+CONFIG_SYS_APP1_BASE
+CONFIG_SYS_APP1_SIZE
+CONFIG_SYS_APP2_BASE
+CONFIG_SYS_APP2_SIZE
+CONFIG_SYS_ARCH_TIMER
+CONFIG_SYS_ARIA_FPGA_BASE
+CONFIG_SYS_ARIA_FPGA_SIZE
+CONFIG_SYS_ARIA_SRAM_BASE
+CONFIG_SYS_ARIA_SRAM_SIZE
+CONFIG_SYS_ARM_CACHE_WRITETHROUGH
+CONFIG_SYS_AT91_CPU_NAME
+CONFIG_SYS_AT91_MAIN_CLOCK
+CONFIG_SYS_AT91_PLLA
+CONFIG_SYS_AT91_PLLB
+CONFIG_SYS_AT91_SLOW_CLOCK
+CONFIG_SYS_ATA_ALT_OFFSET
+CONFIG_SYS_ATA_BASE_ADDR
+CONFIG_SYS_ATA_CS_ON_I2C2
+CONFIG_SYS_ATA_CS_ON_TIMER01
+CONFIG_SYS_ATA_DATA_OFFSET
+CONFIG_SYS_ATA_IDE0_OFFSET
+CONFIG_SYS_ATA_IDE1_OFFSET
+CONFIG_SYS_ATA_PORT_ADDR
+CONFIG_SYS_ATA_REG_OFFSET
+CONFIG_SYS_ATA_STRIDE
+CONFIG_SYS_ATI_REV_A11
+CONFIG_SYS_ATI_REV_A12
+CONFIG_SYS_ATI_REV_A13
+CONFIG_SYS_ATI_REV_ID_MASK
+CONFIG_SYS_ATMEL_BASE
+CONFIG_SYS_ATMEL_BOOT
+CONFIG_SYS_ATMEL_CPU_NAME
+CONFIG_SYS_ATMEL_REGION
+CONFIG_SYS_ATMEL_SECT
+CONFIG_SYS_ATMEL_SECTSZ
+CONFIG_SYS_ATMEL_TOTALSECT
+CONFIG_SYS_AUTOLOAD
+CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
+CONFIG_SYS_AUXCORE_BOOTDATA
+CONFIG_SYS_BARGSIZE
+CONFIG_SYS_BASE_BAUD
+CONFIG_SYS_BAUDRATE_TABLE
+CONFIG_SYS_BCR
+CONFIG_SYS_BCR_60x
+CONFIG_SYS_BCR_SINGLE
+CONFIG_SYS_BCSR
+CONFIG_SYS_BCSR3_PCIE
+CONFIG_SYS_BCSR5_PCI66EN
+CONFIG_SYS_BCSR_ADDR
+CONFIG_SYS_BCSR_BASE
+CONFIG_SYS_BCSR_BASE_PHYS
+CONFIG_SYS_BCSR_SIZE
+CONFIG_SYS_BD_INFO_ADDR
+CONFIG_SYS_BD_REV
+CONFIG_SYS_BFTIC3_BASE
+CONFIG_SYS_BFTIC3_SIZE
+CONFIG_SYS_BITBANG_PHY_PORT
+CONFIG_SYS_BITBANG_PHY_PORTS
+CONFIG_SYS_BLACK_IN_WRITE
+CONFIG_SYS_BMAN_CENA_BASE
+CONFIG_SYS_BMAN_CENA_SIZE
+CONFIG_SYS_BMAN_CINH_BASE
+CONFIG_SYS_BMAN_CINH_SIZE
+CONFIG_SYS_BMAN_MEM_BASE
+CONFIG_SYS_BMAN_MEM_PHYS
+CONFIG_SYS_BMAN_MEM_SIZE
+CONFIG_SYS_BMAN_NUM_PORTALS
+CONFIG_SYS_BMAN_SP_CENA_SIZE
+CONFIG_SYS_BMAN_SP_CINH_SIZE
+CONFIG_SYS_BMAN_SWP_ISDR_REG
+CONFIG_SYS_BOARD_NAME
+CONFIG_SYS_BOARD_OMAP3_HA
+CONFIG_SYS_BOARD_VERSION
+CONFIG_SYS_BOOK3E_HV
+CONFIG_SYS_BOOTCOUNT_ADDR
+CONFIG_SYS_BOOTCOUNT_BE
+CONFIG_SYS_BOOTCOUNT_LE
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD
+CONFIG_SYS_BOOTCS_CFG
+CONFIG_SYS_BOOTCS_SIZE
+CONFIG_SYS_BOOTCS_START
+CONFIG_SYS_BOOTFILE
+CONFIG_SYS_BOOTFILE_PREFIX
+CONFIG_SYS_BOOTMAPSZ
+CONFIG_SYS_BOOTM_LEN
+CONFIG_SYS_BOOTPARAMS_LEN
+CONFIG_SYS_BOOTSZ
+CONFIG_SYS_BOOT_BASE_ADDR
+CONFIG_SYS_BOOT_BLOCK
+CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS
+CONFIG_SYS_BOOT_GET_CMDLINE
+CONFIG_SYS_BOOT_GET_KBD
+CONFIG_SYS_BOOT_RAMDISK_HIGH
+CONFIG_SYS_BOOT_SPINOR
+CONFIG_SYS_BR0_64M
+CONFIG_SYS_BR0_8M
+CONFIG_SYS_BR0_PRELIM
+CONFIG_SYS_BR10_PRELIM
+CONFIG_SYS_BR11_PRELIM
+CONFIG_SYS_BR1_PRELIM
+CONFIG_SYS_BR2_PRELIM
+CONFIG_SYS_BR3_CAN
+CONFIG_SYS_BR3_PRELIM
+CONFIG_SYS_BR4_PRELIM
+CONFIG_SYS_BR5_ISP1362
+CONFIG_SYS_BR5_PRELIM
+CONFIG_SYS_BR6_64M
+CONFIG_SYS_BR6_8M
+CONFIG_SYS_BR6_PRELIM
+CONFIG_SYS_BR7_PRELIM
+CONFIG_SYS_BR8_PRELIM
+CONFIG_SYS_BR9_PRELIM
+CONFIG_SYS_BRGCLK_PRESCALE
+CONFIG_SYS_BRIGHTNESS
+CONFIG_SYS_BUSCLK
+CONFIG_SYS_CACHELINE_SHIFT
+CONFIG_SYS_CACHE_ACR0
+CONFIG_SYS_CACHE_ACR1
+CONFIG_SYS_CACHE_ACR2
+CONFIG_SYS_CACHE_ACR3
+CONFIG_SYS_CACHE_ACR4
+CONFIG_SYS_CACHE_ACR5
+CONFIG_SYS_CACHE_ACR6
+CONFIG_SYS_CACHE_ACR7
+CONFIG_SYS_CACHE_DCACR
+CONFIG_SYS_CACHE_ICACR
+CONFIG_SYS_CACHE_STASHING
+CONFIG_SYS_CADMUS_BASE_REG
+CONFIG_SYS_CAN_BASE
+CONFIG_SYS_CAN_OR_AM
+CONFIG_SYS_CBSIZE
+CONFIG_SYS_CCCR
+CONFIG_SYS_CCI400_ADDR
+CONFIG_SYS_CCSRBAR
+CONFIG_SYS_CCSRBAR_DEFAULT
+CONFIG_SYS_CCSRBAR_PHYS
+CONFIG_SYS_CCSRBAR_PHYS_HIGH
+CONFIG_SYS_CCSRBAR_PHYS_LOW
+CONFIG_SYS_CCSR_DEFAULT_DBATL
+CONFIG_SYS_CCSR_DEFAULT_DBATU
+CONFIG_SYS_CCSR_DEFAULT_IBATL
+CONFIG_SYS_CCSR_DEFAULT_IBATU
+CONFIG_SYS_CCSR_DO_NOT_RELOCATE
+CONFIG_SYS_CFI_FLASH_CONFIG_REGS
+CONFIG_SYS_CFI_FLASH_STATUS_POLL
+CONFIG_SYS_CF_BASE
+CONFIG_SYS_CF_INTC_REG1
+CONFIG_SYS_CF_SIZE
+CONFIG_SYS_CH7301_I2C
+CONFIG_SYS_CKEN
+CONFIG_SYS_CLE_MASK
+CONFIG_SYS_CLK
+CONFIG_SYS_CLKDIV_CPU
+CONFIG_SYS_CLKDIV_HSB
+CONFIG_SYS_CLKDIV_PBA
+CONFIG_SYS_CLKDIV_PBB
+CONFIG_SYS_CLKTL_CBCDR
+CONFIG_SYS_CLK_100
+CONFIG_SYS_CLK_100_DDR_100
+CONFIG_SYS_CLK_100_DDR_133
+CONFIG_SYS_CLK_DIV
+CONFIG_SYS_CLK_FREQ_C100
+CONFIG_SYS_CLK_FREQ_C110
+CONFIG_SYS_CMD_CONFIGURE
+CONFIG_SYS_CMD_EL
+CONFIG_SYS_CMD_IAS
+CONFIG_SYS_CMD_INT
+CONFIG_SYS_CMD_SUSPEND
+CONFIG_SYS_CMXFCR_MASK1
+CONFIG_SYS_CMXFCR_MASK2
+CONFIG_SYS_CMXFCR_MASK3
+CONFIG_SYS_CMXFCR_VALUE1
+CONFIG_SYS_CMXFCR_VALUE2
+CONFIG_SYS_CMXFCR_VALUE3
+CONFIG_SYS_CMXSCR_VALUE
+CONFIG_SYS_CONSOLE_BG_COL
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE
+CONFIG_SYS_CONSOLE_FG_COL
+CONFIG_SYS_CONSOLE_INFO_QUIET
+CONFIG_SYS_CONSOLE_IS_IN_ENV
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+CONFIG_SYS_CORE_SRAM
+CONFIG_SYS_CORE_SRAM_SIZE
+CONFIG_SYS_CORTEX_R4
+CONFIG_SYS_CORTINA_FW_IN_MMC
+CONFIG_SYS_CORTINA_FW_IN_NAND
+CONFIG_SYS_CORTINA_FW_IN_NOR
+CONFIG_SYS_CORTINA_FW_IN_REMOTE
+CONFIG_SYS_CORTINA_FW_IN_SPIFLASH
+CONFIG_SYS_CPC_REINIT_F
+CONFIG_SYS_CPLD
+CONFIG_SYS_CPLD_ADDR
+CONFIG_SYS_CPLD_AMASK
+CONFIG_SYS_CPLD_BASE
+CONFIG_SYS_CPLD_BASE_PHYS
+CONFIG_SYS_CPLD_CSOR
+CONFIG_SYS_CPLD_CSPR
+CONFIG_SYS_CPLD_CSPR_EXT
+CONFIG_SYS_CPLD_DATA
+CONFIG_SYS_CPLD_FTIM0
+CONFIG_SYS_CPLD_FTIM1
+CONFIG_SYS_CPLD_FTIM2
+CONFIG_SYS_CPLD_FTIM3
+CONFIG_SYS_CPLD_SIZE
+CONFIG_SYS_CPMFCR_RAMTYPE
+CONFIG_SYS_CPM_BOOTCOUNT_ADDR
+CONFIG_SYS_CPM_INTERRUPT
+CONFIG_SYS_CPM_POST_WORD_ADDR
+CONFIG_SYS_CPRI
+CONFIG_SYS_CPRI_CLK
+CONFIG_SYS_CPUSPEED
+CONFIG_SYS_CPU_CLK
+CONFIG_SYS_CPU_PCI_IO_START
+CONFIG_SYS_CPU_PCI_MEMIO_START
+CONFIG_SYS_CPU_PCI_MEM_START
+CONFIG_SYS_CS0_BASE
+CONFIG_SYS_CS0_CFG
+CONFIG_SYS_CS0_CTRL
+CONFIG_SYS_CS0_FTIM0
+CONFIG_SYS_CS0_FTIM1
+CONFIG_SYS_CS0_FTIM2
+CONFIG_SYS_CS0_FTIM3
+CONFIG_SYS_CS0_MASK
+CONFIG_SYS_CS0_SIZE
+CONFIG_SYS_CS0_START
+CONFIG_SYS_CS1_BASE
+CONFIG_SYS_CS1_CFG
+CONFIG_SYS_CS1_CTRL
+CONFIG_SYS_CS1_FLASH_BASE
+CONFIG_SYS_CS1_FTIM0
+CONFIG_SYS_CS1_FTIM1
+CONFIG_SYS_CS1_FTIM2
+CONFIG_SYS_CS1_FTIM3
+CONFIG_SYS_CS1_MASK
+CONFIG_SYS_CS1_SIZE
+CONFIG_SYS_CS1_START
+CONFIG_SYS_CS2_BASE
+CONFIG_SYS_CS2_CFG
+CONFIG_SYS_CS2_CTRL
+CONFIG_SYS_CS2_FLASH_BASE
+CONFIG_SYS_CS2_FTIM0
+CONFIG_SYS_CS2_FTIM1
+CONFIG_SYS_CS2_FTIM2
+CONFIG_SYS_CS2_FTIM3
+CONFIG_SYS_CS2_MASK
+CONFIG_SYS_CS2_SIZE
+CONFIG_SYS_CS2_START
+CONFIG_SYS_CS3_BASE
+CONFIG_SYS_CS3_CFG
+CONFIG_SYS_CS3_CTRL
+CONFIG_SYS_CS3_FLASH_BASE
+CONFIG_SYS_CS3_FTIM0
+CONFIG_SYS_CS3_FTIM1
+CONFIG_SYS_CS3_FTIM2
+CONFIG_SYS_CS3_FTIM3
+CONFIG_SYS_CS3_MASK
+CONFIG_SYS_CS3_SIZE
+CONFIG_SYS_CS3_START
+CONFIG_SYS_CS4_BASE
+CONFIG_SYS_CS4_CFG
+CONFIG_SYS_CS4_CTRL
+CONFIG_SYS_CS4_FLASH_BASE
+CONFIG_SYS_CS4_FTIM0
+CONFIG_SYS_CS4_FTIM1
+CONFIG_SYS_CS4_FTIM2
+CONFIG_SYS_CS4_FTIM3
+CONFIG_SYS_CS4_MASK
+CONFIG_SYS_CS4_SIZE
+CONFIG_SYS_CS4_START
+CONFIG_SYS_CS5_BASE
+CONFIG_SYS_CS5_CFG
+CONFIG_SYS_CS5_CTRL
+CONFIG_SYS_CS5_FLASH_BASE
+CONFIG_SYS_CS5_FTIM0
+CONFIG_SYS_CS5_FTIM1
+CONFIG_SYS_CS5_FTIM2
+CONFIG_SYS_CS5_FTIM3
+CONFIG_SYS_CS5_MASK
+CONFIG_SYS_CS5_SIZE
+CONFIG_SYS_CS5_START
+CONFIG_SYS_CS6_BASE
+CONFIG_SYS_CS6_CFG
+CONFIG_SYS_CS6_CTRL
+CONFIG_SYS_CS6_FTIM0
+CONFIG_SYS_CS6_FTIM1
+CONFIG_SYS_CS6_FTIM2
+CONFIG_SYS_CS6_FTIM3
+CONFIG_SYS_CS6_MASK
+CONFIG_SYS_CS6_SIZE
+CONFIG_SYS_CS6_START
+CONFIG_SYS_CS7_BASE
+CONFIG_SYS_CS7_CFG
+CONFIG_SYS_CS7_CTRL
+CONFIG_SYS_CS7_FTIM0
+CONFIG_SYS_CS7_FTIM1
+CONFIG_SYS_CS7_FTIM2
+CONFIG_SYS_CS7_FTIM3
+CONFIG_SYS_CS7_MASK
+CONFIG_SYS_CS7_SIZE
+CONFIG_SYS_CS7_START
+CONFIG_SYS_CSOR0
+CONFIG_SYS_CSOR0_EXT
+CONFIG_SYS_CSOR1
+CONFIG_SYS_CSOR1_EXT
+CONFIG_SYS_CSOR2
+CONFIG_SYS_CSOR2_EXT
+CONFIG_SYS_CSOR3
+CONFIG_SYS_CSOR3_EXT
+CONFIG_SYS_CSOR4
+CONFIG_SYS_CSOR4_EXT
+CONFIG_SYS_CSOR5
+CONFIG_SYS_CSOR5_EXT
+CONFIG_SYS_CSOR6
+CONFIG_SYS_CSOR6_EXT
+CONFIG_SYS_CSOR7
+CONFIG_SYS_CSOR7_EXT
+CONFIG_SYS_CSPR0
+CONFIG_SYS_CSPR0_EXT
+CONFIG_SYS_CSPR0_FINAL
+CONFIG_SYS_CSPR1
+CONFIG_SYS_CSPR1_EXT
+CONFIG_SYS_CSPR1_FINAL
+CONFIG_SYS_CSPR2
+CONFIG_SYS_CSPR2_EXT
+CONFIG_SYS_CSPR2_FINAL
+CONFIG_SYS_CSPR3
+CONFIG_SYS_CSPR3_EXT
+CONFIG_SYS_CSPR3_FINAL
+CONFIG_SYS_CSPR4
+CONFIG_SYS_CSPR4_EXT
+CONFIG_SYS_CSPR5
+CONFIG_SYS_CSPR5_EXT
+CONFIG_SYS_CSPR6
+CONFIG_SYS_CSPR6_EXT
+CONFIG_SYS_CSPR7
+CONFIG_SYS_CSPR7_EXT
+CONFIG_SYS_CS_ALETIMING
+CONFIG_SYS_CS_BURST
+CONFIG_SYS_CS_DEADCYCLE
+CONFIG_SYS_CS_HOLDCYCLE
+CONFIG_SYS_DA850_CS2CFG
+CONFIG_SYS_DA850_CS3CFG
+CONFIG_SYS_DA850_DDR2_DDRPHYCR
+CONFIG_SYS_DA850_DDR2_PBBPR
+CONFIG_SYS_DA850_DDR2_SDBCR
+CONFIG_SYS_DA850_DDR2_SDBCR2
+CONFIG_SYS_DA850_DDR2_SDRCR
+CONFIG_SYS_DA850_DDR2_SDTIMR
+CONFIG_SYS_DA850_DDR2_SDTIMR2
+CONFIG_SYS_DA850_DDR_INIT
+CONFIG_SYS_DA850_PLL0_PLLDIV1
+CONFIG_SYS_DA850_PLL0_PLLDIV2
+CONFIG_SYS_DA850_PLL0_PLLDIV3
+CONFIG_SYS_DA850_PLL0_PLLDIV4
+CONFIG_SYS_DA850_PLL0_PLLDIV5
+CONFIG_SYS_DA850_PLL0_PLLDIV6
+CONFIG_SYS_DA850_PLL0_PLLDIV7
+CONFIG_SYS_DA850_PLL0_PLLM
+CONFIG_SYS_DA850_PLL0_POSTDIV
+CONFIG_SYS_DA850_PLL0_PREDIV
+CONFIG_SYS_DA850_PLL1_PLLDIV1
+CONFIG_SYS_DA850_PLL1_PLLDIV2
+CONFIG_SYS_DA850_PLL1_PLLDIV3
+CONFIG_SYS_DA850_PLL1_PLLM
+CONFIG_SYS_DA850_PLL1_POSTDIV
+CONFIG_SYS_DA850_PLL_INIT
+CONFIG_SYS_DA850_SYSCFG_SUSPSRC
+CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0
+CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
+CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
+CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
+CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
+CONFIG_SYS_DAVINCI_I2C_SLAVE
+CONFIG_SYS_DAVINCI_I2C_SLAVE1
+CONFIG_SYS_DAVINCI_I2C_SLAVE2
+CONFIG_SYS_DAVINCI_I2C_SPEED
+CONFIG_SYS_DAVINCI_I2C_SPEED1
+CONFIG_SYS_DAVINCI_I2C_SPEED2
+CONFIG_SYS_DBAT
+CONFIG_SYS_DBAT0L
+CONFIG_SYS_DBAT0U
+CONFIG_SYS_DBAT1L
+CONFIG_SYS_DBAT1U
+CONFIG_SYS_DBAT2L
+CONFIG_SYS_DBAT2U
+CONFIG_SYS_DBAT3L
+CONFIG_SYS_DBAT3U
+CONFIG_SYS_DBAT4L
+CONFIG_SYS_DBAT4U
+CONFIG_SYS_DBAT5L
+CONFIG_SYS_DBAT5U
+CONFIG_SYS_DBAT6L
+CONFIG_SYS_DBAT6L_EARLY
+CONFIG_SYS_DBAT6U
+CONFIG_SYS_DBAT6U_EARLY
+CONFIG_SYS_DBAT7L
+CONFIG_SYS_DBAT7U
+CONFIG_SYS_DCACHE_INV
+CONFIG_SYS_DCACHE_LINESZ
+CONFIG_SYS_DCACHE_SACR_VALUE
+CONFIG_SYS_DCSRBAR
+CONFIG_SYS_DCSRBAR_PHYS
+CONFIG_SYS_DCSR_COP_CCP_ADDR
+CONFIG_SYS_DCSR_DCFG_ADDR
+CONFIG_SYS_DCSR_DCFG_OFFSET
+CONFIG_SYS_DCU_ADDR
+CONFIG_SYS_DDR1_CS0_BNDS
+CONFIG_SYS_DDR2_CFG_1A
+CONFIG_SYS_DDR2_CFG_1B
+CONFIG_SYS_DDR2_CFG_2
+CONFIG_SYS_DDR2_CLK_CTRL
+CONFIG_SYS_DDR2_CS0_BNDS
+CONFIG_SYS_DDR2_CS0_CONFIG
+CONFIG_SYS_DDR2_CS1_BNDS
+CONFIG_SYS_DDR2_CS1_CONFIG
+CONFIG_SYS_DDR2_CS2_BNDS
+CONFIG_SYS_DDR2_CS2_CONFIG
+CONFIG_SYS_DDR2_CS3_BNDS
+CONFIG_SYS_DDR2_CS3_CONFIG
+CONFIG_SYS_DDR2_DATA_INIT
+CONFIG_SYS_DDR2_EXT_REFRESH
+CONFIG_SYS_DDR2_INTERVAL
+CONFIG_SYS_DDR2_MODE_1
+CONFIG_SYS_DDR2_MODE_2
+CONFIG_SYS_DDR2_MODE_CTL
+CONFIG_SYS_DDR2_TIMING_0
+CONFIG_SYS_DDR2_TIMING_1
+CONFIG_SYS_DDR2_TIMING_2
+CONFIG_SYS_DDRCDR
+CONFIG_SYS_DDRCDR_VALUE
+CONFIG_SYS_DDRCMD_EM2
+CONFIG_SYS_DDRCMD_EM3
+CONFIG_SYS_DDRCMD_EN_DLL
+CONFIG_SYS_DDRCMD_NOP
+CONFIG_SYS_DDRCMD_OCD_DEFAULT
+CONFIG_SYS_DDRCMD_OCD_EXIT
+CONFIG_SYS_DDRCMD_PCHG_ALL
+CONFIG_SYS_DDRCMD_RES_DLL
+CONFIG_SYS_DDRCMD_RFSH
+CONFIG_SYS_DDRD
+CONFIG_SYS_DDRTC
+CONFIG_SYS_DDRUA
+CONFIG_SYS_DDR_BASE
+CONFIG_SYS_DDR_BLOCK1_SIZE
+CONFIG_SYS_DDR_BLOCK2_BASE
+CONFIG_SYS_DDR_CACHED_ADDR
+CONFIG_SYS_DDR_CDR_1
+CONFIG_SYS_DDR_CDR_2
+CONFIG_SYS_DDR_CFG_1A
+CONFIG_SYS_DDR_CFG_1B
+CONFIG_SYS_DDR_CFG_2
+CONFIG_SYS_DDR_CLKSEL
+CONFIG_SYS_DDR_CLK_CNTL
+CONFIG_SYS_DDR_CLK_CONTROL
+CONFIG_SYS_DDR_CLK_CTRL
+CONFIG_SYS_DDR_CLK_CTRL_1000
+CONFIG_SYS_DDR_CLK_CTRL_1200
+CONFIG_SYS_DDR_CLK_CTRL_1333
+CONFIG_SYS_DDR_CLK_CTRL_667
+CONFIG_SYS_DDR_CLK_CTRL_800
+CONFIG_SYS_DDR_CLK_CTRL_900
+CONFIG_SYS_DDR_CONFIG
+CONFIG_SYS_DDR_CONFIG_2
+CONFIG_SYS_DDR_CONFIG_256
+CONFIG_SYS_DDR_CONTROL
+CONFIG_SYS_DDR_CONTROL2
+CONFIG_SYS_DDR_CONTROL_1333
+CONFIG_SYS_DDR_CONTROL_2
+CONFIG_SYS_DDR_CONTROL_2_1333
+CONFIG_SYS_DDR_CONTROL_2_800
+CONFIG_SYS_DDR_CONTROL_800
+CONFIG_SYS_DDR_CPO
+CONFIG_SYS_DDR_CS0_BNDS
+CONFIG_SYS_DDR_CS0_CONFIG
+CONFIG_SYS_DDR_CS0_CONFIG_1333
+CONFIG_SYS_DDR_CS0_CONFIG_2
+CONFIG_SYS_DDR_CS0_CONFIG_800
+CONFIG_SYS_DDR_CS1_BNDS
+CONFIG_SYS_DDR_CS1_CONFIG
+CONFIG_SYS_DDR_CS1_CONFIG_2
+CONFIG_SYS_DDR_CS2_BNDS
+CONFIG_SYS_DDR_CS2_CONFIG
+CONFIG_SYS_DDR_CS3_BNDS
+CONFIG_SYS_DDR_CS3_CONFIG
+CONFIG_SYS_DDR_DATA_INIT
+CONFIG_SYS_DDR_ERR_DIS
+CONFIG_SYS_DDR_ERR_INT_EN
+CONFIG_SYS_DDR_INIT_ADDR
+CONFIG_SYS_DDR_INIT_EXT_ADDR
+CONFIG_SYS_DDR_INTERVAL
+CONFIG_SYS_DDR_INTERVAL_1000
+CONFIG_SYS_DDR_INTERVAL_1200
+CONFIG_SYS_DDR_INTERVAL_1333
+CONFIG_SYS_DDR_INTERVAL_667
+CONFIG_SYS_DDR_INTERVAL_800
+CONFIG_SYS_DDR_INTERVAL_900
+CONFIG_SYS_DDR_MODE
+CONFIG_SYS_DDR_MODE2
+CONFIG_SYS_DDR_MODE_1
+CONFIG_SYS_DDR_MODE_1_1000
+CONFIG_SYS_DDR_MODE_1_1200
+CONFIG_SYS_DDR_MODE_1_1333
+CONFIG_SYS_DDR_MODE_1_667
+CONFIG_SYS_DDR_MODE_1_800
+CONFIG_SYS_DDR_MODE_1_900
+CONFIG_SYS_DDR_MODE_2
+CONFIG_SYS_DDR_MODE_2_1000
+CONFIG_SYS_DDR_MODE_2_1200
+CONFIG_SYS_DDR_MODE_2_1333
+CONFIG_SYS_DDR_MODE_2_667
+CONFIG_SYS_DDR_MODE_2_800
+CONFIG_SYS_DDR_MODE_2_900
+CONFIG_SYS_DDR_MODE_CONTROL
+CONFIG_SYS_DDR_MODE_CTL
+CONFIG_SYS_DDR_MODE_WEAK
+CONFIG_SYS_DDR_OCD_CTRL
+CONFIG_SYS_DDR_OCD_STATUS
+CONFIG_SYS_DDR_RAW_TIMING
+CONFIG_SYS_DDR_RCW_1
+CONFIG_SYS_DDR_RCW_2
+CONFIG_SYS_DDR_SBE
+CONFIG_SYS_DDR_SDRAM_BASE
+CONFIG_SYS_DDR_SDRAM_BASE2
+CONFIG_SYS_DDR_SDRAM_CFG
+CONFIG_SYS_DDR_SDRAM_CFG2
+CONFIG_SYS_DDR_SDRAM_CFG_2
+CONFIG_SYS_DDR_SDRAM_CLK_CNTL
+CONFIG_SYS_DDR_SDRAM_INTERVAL
+CONFIG_SYS_DDR_SDRAM_MODE
+CONFIG_SYS_DDR_SDRAM_MODE_2
+CONFIG_SYS_DDR_SIZE
+CONFIG_SYS_DDR_SR_CNTR
+CONFIG_SYS_DDR_TIMING_0
+CONFIG_SYS_DDR_TIMING_0_1000
+CONFIG_SYS_DDR_TIMING_0_1200
+CONFIG_SYS_DDR_TIMING_0_1333
+CONFIG_SYS_DDR_TIMING_0_667
+CONFIG_SYS_DDR_TIMING_0_800
+CONFIG_SYS_DDR_TIMING_0_900
+CONFIG_SYS_DDR_TIMING_1
+CONFIG_SYS_DDR_TIMING_1_1000
+CONFIG_SYS_DDR_TIMING_1_1200
+CONFIG_SYS_DDR_TIMING_1_1333
+CONFIG_SYS_DDR_TIMING_1_667
+CONFIG_SYS_DDR_TIMING_1_800
+CONFIG_SYS_DDR_TIMING_1_900
+CONFIG_SYS_DDR_TIMING_2
+CONFIG_SYS_DDR_TIMING_2_1000
+CONFIG_SYS_DDR_TIMING_2_1200
+CONFIG_SYS_DDR_TIMING_2_1333
+CONFIG_SYS_DDR_TIMING_2_667
+CONFIG_SYS_DDR_TIMING_2_800
+CONFIG_SYS_DDR_TIMING_2_900
+CONFIG_SYS_DDR_TIMING_3
+CONFIG_SYS_DDR_TIMING_3_1000
+CONFIG_SYS_DDR_TIMING_3_1200
+CONFIG_SYS_DDR_TIMING_3_1333
+CONFIG_SYS_DDR_TIMING_3_667
+CONFIG_SYS_DDR_TIMING_3_800
+CONFIG_SYS_DDR_TIMING_3_900
+CONFIG_SYS_DDR_TIMING_4
+CONFIG_SYS_DDR_TIMING_4_1333
+CONFIG_SYS_DDR_TIMING_4_800
+CONFIG_SYS_DDR_TIMING_5
+CONFIG_SYS_DDR_TIMING_5_1333
+CONFIG_SYS_DDR_TIMING_5_800
+CONFIG_SYS_DDR_WRITE_DATA_DELAY
+CONFIG_SYS_DDR_WRLVL_CNTL
+CONFIG_SYS_DDR_WRLVL_CONTROL
+CONFIG_SYS_DDR_WRLVL_CONTROL_1333
+CONFIG_SYS_DDR_WRLVL_CONTROL_667
+CONFIG_SYS_DDR_WRLVL_CONTROL_800
+CONFIG_SYS_DDR_ZQ_CNTL
+CONFIG_SYS_DDR_ZQ_CONTROL
+CONFIG_SYS_DEBUG
+CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE
+CONFIG_SYS_DEBUG_SERVER_FW_ADDR
+CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
+CONFIG_SYS_DEBUG_SERVER_TIMEOUT
+CONFIG_SYS_DECREMENT_PATTERNS
+CONFIG_SYS_DEFAULT_IMMR
+CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
+CONFIG_SYS_DEFAULT_MBAR
+CONFIG_SYS_DEFAULT_VIDEO_MODE
+CONFIG_SYS_DEF_EEPROM_ADDR
+CONFIG_SYS_DELAYED_ICACHE
+CONFIG_SYS_DER
+CONFIG_SYS_DEVICE_NULLDEV
+CONFIG_SYS_DFU_DATA_BUF_SIZE
+CONFIG_SYS_DFU_MAX_FILE_SIZE
+CONFIG_SYS_DIAG_ADDR
+CONFIG_SYS_DIALOG_PMIC_I2C_ADDR
+CONFIG_SYS_DIMM_SLOTS_PER_CTLR
+CONFIG_SYS_DIRECT_FLASH_NFS
+CONFIG_SYS_DIRECT_FLASH_TFTP
+CONFIG_SYS_DISCOVER_PHY
+CONFIG_SYS_DISPLAY_BASE
+CONFIG_SYS_DISP_CHR_RAM
+CONFIG_SYS_DIU_ADDR
+CONFIG_SYS_DM36x_PINMUX0
+CONFIG_SYS_DM36x_PINMUX1
+CONFIG_SYS_DM36x_PINMUX2
+CONFIG_SYS_DM36x_PINMUX3
+CONFIG_SYS_DM36x_PINMUX4
+CONFIG_SYS_DM36x_PLL1_PREDIV
+CONFIG_SYS_DM36x_PLL2_PREDIV
+CONFIG_SYS_DMA_USE_INTSRAM
+CONFIG_SYS_DOC_SHORT_TIMEOUT
+CONFIG_SYS_DOC_SUPPORT_2000
+CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
+CONFIG_SYS_DP501_BASE
+CONFIG_SYS_DP501_DIFFERENTIAL
+CONFIG_SYS_DP501_I2C
+CONFIG_SYS_DP501_VCAPCTRL0
+CONFIG_SYS_DPAA_DCE
+CONFIG_SYS_DPAA_FMAN
+CONFIG_SYS_DPAA_PME
+CONFIG_SYS_DPAA_QBMAN
+CONFIG_SYS_DPAA_RMAN
+CONFIG_SYS_DP_DDR_BASE
+CONFIG_SYS_DP_DDR_BASE_PHY
+CONFIG_SYS_DRAMSZ
+CONFIG_SYS_DRAMSZ1
+CONFIG_SYS_DRAM_BASE
+CONFIG_SYS_DRAM_SIZE
+CONFIG_SYS_DRAM_TEST
+CONFIG_SYS_DS1339_TCR_VAL
+CONFIG_SYS_DS1388_TCR_VAL
+CONFIG_SYS_DSPIC_TEST_ADDR
+CONFIG_SYS_DSPIC_TEST_MASK
+CONFIG_SYS_DSPI_CS0
+CONFIG_SYS_DSPI_CS2
+CONFIG_SYS_DSPI_CTAR0
+CONFIG_SYS_DSPI_CTAR1
+CONFIG_SYS_DSPI_CTAR2
+CONFIG_SYS_DSPI_CTAR3
+CONFIG_SYS_DSPI_CTAR4
+CONFIG_SYS_DSPI_CTAR5
+CONFIG_SYS_DSPI_CTAR6
+CONFIG_SYS_DSPI_CTAR7
+CONFIG_SYS_DTT_ADM1021
+CONFIG_SYS_DTT_BUS_NUM
+CONFIG_SYS_DTT_HYSTERESIS
+CONFIG_SYS_DTT_LOW_TEMP
+CONFIG_SYS_DTT_MAX_TEMP
+CONFIG_SYS_DTT_MIN_TEMP
+CONFIG_SYS_DUART_RST
+CONFIG_SYS_DV_CLKMODE
+CONFIG_SYS_DV_NOR_BOOT_CFG
+CONFIG_SYS_EBC_CFG
+CONFIG_SYS_EBC_PB0AP
+CONFIG_SYS_EBC_PB0CR
+CONFIG_SYS_EBC_PB1AP
+CONFIG_SYS_EBC_PB1CR
+CONFIG_SYS_EBC_PB2AP
+CONFIG_SYS_EBC_PB2CR
+CONFIG_SYS_EBC_PB3AP
+CONFIG_SYS_EBC_PB3CR
+CONFIG_SYS_EBC_PB4AP
+CONFIG_SYS_EBC_PB4CR
+CONFIG_SYS_EBC_PB5AP
+CONFIG_SYS_EBC_PB5CR
+CONFIG_SYS_EBC_PB6AP
+CONFIG_SYS_EBC_PB6CR
+CONFIG_SYS_EBC_PB7AP
+CONFIG_SYS_EBC_PB7CR
+CONFIG_SYS_EBI_CFGR_VAL
+CONFIG_SYS_EBI_CSA_VAL
+CONFIG_SYS_EEPROM_BASE
+CONFIG_SYS_EEPROM_BUS_NUM
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
+CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
+CONFIG_SYS_EEPROM_SIZE
+CONFIG_SYS_EEPROM_WP
+CONFIG_SYS_EEPROM_WREN
+CONFIG_SYS_EHCI_USB1_ADDR
+CONFIG_SYS_ELBC_BASE
+CONFIG_SYS_ELBC_BASE_PHYS
+CONFIG_SYS_ELO3_DMA3
+CONFIG_SYS_ELPIDA_INIT_DEV_OP
+CONFIG_SYS_ELPIDA_OCD_EXIT
+CONFIG_SYS_ELPIDA_RES_DLL
+CONFIG_SYS_EMAC_TI_CLKDIV
+CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+CONFIG_SYS_ENABLE_PADS_ALL
+CONFIG_SYS_ENET_BD_BASE
+CONFIG_SYS_ENV_ADDR
+CONFIG_SYS_ENV_OFFSET
+CONFIG_SYS_ENV_SECT_SIZE
+CONFIG_SYS_EPLD_BASE
+CONFIG_SYS_ETHOC_BASE
+CONFIG_SYS_ETHOC_BUFFER_ADDR
+CONFIG_SYS_ETH_IOBASE
+CONFIG_SYS_ETVPE_CLK
+CONFIG_SYS_EXCEPTION_VECTORS_HIGH
+CONFIG_SYS_EXTBDINFO
+CONFIG_SYS_EXTRA_ENV_RELOC
+CONFIG_SYS_EXT_SERIAL_CLOCK
+CONFIG_SYS_FAST_CLK
+CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN
+CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+CONFIG_SYS_FAULT_MII_ADDR
+CONFIG_SYS_FCC_PSMR
+CONFIG_SYS_FCPU133MHZ
+CONFIG_SYS_FCPU266MHZ
+CONFIG_SYS_FCPU333MHZ
+CONFIG_SYS_FDC_DRIVE_NUMBER
+CONFIG_SYS_FDC_HW_INIT
+CONFIG_SYS_FDT_ADDR
+CONFIG_SYS_FDT_BASE
+CONFIG_SYS_FDT_LOAD_ADDR
+CONFIG_SYS_FDT_PAD
+CONFIG_SYS_FDT_SIZE
+CONFIG_SYS_FEC0_IOBASE
+CONFIG_SYS_FEC0_MIIBASE
+CONFIG_SYS_FEC0_PHYADDR
+CONFIG_SYS_FEC0_PINMUX
+CONFIG_SYS_FEC1_IOBASE
+CONFIG_SYS_FEC1_MIIBASE
+CONFIG_SYS_FEC1_PHYADDR
+CONFIG_SYS_FEC1_PINMUX
+CONFIG_SYS_FECI2C
+CONFIG_SYS_FEC_BUF_USE_SRAM
+CONFIG_SYS_FEC_FULL_MII
+CONFIG_SYS_FEC_NO_SHARED_PHY
+CONFIG_SYS_FIFO_BASE
+CONFIG_SYS_FIXED_PHY_ADDR
+CONFIG_SYS_FIXED_PHY_PORT
+CONFIG_SYS_FIXED_PHY_PORTS
+CONFIG_SYS_FLASH
+CONFIG_SYS_FLASH0
+CONFIG_SYS_FLASH0_BASE
+CONFIG_SYS_FLASH1
+CONFIG_SYS_FLASH1_BASE
+CONFIG_SYS_FLASH1_BASE_PHYS
+CONFIG_SYS_FLASH1_BASE_PHYS_EARLY
+CONFIG_SYS_FLASH2_BASE
+CONFIG_SYS_FLASHBOOT
+CONFIG_SYS_FLASH_2ND_16BIT_DEV
+CONFIG_SYS_FLASH_2ND_ADDR
+CONFIG_SYS_FLASH_ADDR0
+CONFIG_SYS_FLASH_ADDR1
+CONFIG_SYS_FLASH_ADDR_BASE
+CONFIG_SYS_FLASH_AMD_CHECK_DQ7
+CONFIG_SYS_FLASH_AUTOPROTECT_LIST
+CONFIG_SYS_FLASH_BANKS_LIST
+CONFIG_SYS_FLASH_BANKS_SIZES
+CONFIG_SYS_FLASH_BANK_SIZE
+CONFIG_SYS_FLASH_BASE
+CONFIG_SYS_FLASH_BASE0
+CONFIG_SYS_FLASH_BASE1
+CONFIG_SYS_FLASH_BASE2
+CONFIG_SYS_FLASH_BASE_1
+CONFIG_SYS_FLASH_BASE_2
+CONFIG_SYS_FLASH_BASE_CS1
+CONFIG_SYS_FLASH_BASE_PHYS
+CONFIG_SYS_FLASH_BASE_PHYS_EARLY
+CONFIG_SYS_FLASH_BASE_PHYS_H
+CONFIG_SYS_FLASH_BASE_PHYS_L
+CONFIG_SYS_FLASH_BASE_PHYS_LOW
+CONFIG_SYS_FLASH_BR_PRELIM
+CONFIG_SYS_FLASH_CFI
+CONFIG_SYS_FLASH_CFI_AMD_RESET
+CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
+CONFIG_SYS_FLASH_CFI_BYPASS_READ
+CONFIG_SYS_FLASH_CFI_NONBLOCK
+CONFIG_SYS_FLASH_CFI_WIDTH
+CONFIG_SYS_FLASH_CHECKSUM
+CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
+CONFIG_SYS_FLASH_EMPTY_INFO
+CONFIG_SYS_FLASH_ERASE_TOUT
+CONFIG_SYS_FLASH_LEGACY_256Kx8
+CONFIG_SYS_FLASH_LEGACY_512Kx16
+CONFIG_SYS_FLASH_LEGACY_512Kx8
+CONFIG_SYS_FLASH_LOCK_TOUT
+CONFIG_SYS_FLASH_OR_PRELIM
+CONFIG_SYS_FLASH_PARMSECT_SZ
+CONFIG_SYS_FLASH_PROTECTION
+CONFIG_SYS_FLASH_QUIET_TEST
+CONFIG_SYS_FLASH_READ0
+CONFIG_SYS_FLASH_READ1
+CONFIG_SYS_FLASH_READ2
+CONFIG_SYS_FLASH_SECT_SIZE
+CONFIG_SYS_FLASH_SECT_SZ
+CONFIG_SYS_FLASH_SIZE
+CONFIG_SYS_FLASH_SIZE_1
+CONFIG_SYS_FLASH_SIZE_2
+CONFIG_SYS_FLASH_UNLOCK_TOUT
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+CONFIG_SYS_FLASH_VERIFY_AFTER_WRITE
+CONFIG_SYS_FLASH_WORD_SIZE
+CONFIG_SYS_FLASH_WRITE_TOUT
+CONFIG_SYS_FLYCNFG_VAL
+CONFIG_SYS_FM1_10GEC1_PHY_ADDR
+CONFIG_SYS_FM1_10GEC2_PHY_ADDR
+CONFIG_SYS_FM1_CLK
+CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR
+CONFIG_SYS_FM1_DTSEC1_PHY_ADDR
+CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR
+CONFIG_SYS_FM1_DTSEC2_PHY_ADDR
+CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR
+CONFIG_SYS_FM1_DTSEC3_PHY_ADDR
+CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR
+CONFIG_SYS_FM1_DTSEC4_PHY_ADDR
+CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR
+CONFIG_SYS_FM1_DTSEC5_PHY_ADDR
+CONFIG_SYS_FM1_DTSEC_MDIO_ADDR
+CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR
+CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR
+CONFIG_SYS_FM1_QSGMII11_PHY_ADDR
+CONFIG_SYS_FM1_QSGMII21_PHY_ADDR
+CONFIG_SYS_FM1_TGEC_MDIO_ADDR
+CONFIG_SYS_FM2_10GEC1_PHY_ADDR
+CONFIG_SYS_FM2_CLK
+CONFIG_SYS_FM2_DTSEC1_PHY_ADDR
+CONFIG_SYS_FM2_DTSEC2_PHY_ADDR
+CONFIG_SYS_FM2_DTSEC3_PHY_ADDR
+CONFIG_SYS_FM2_DTSEC4_PHY_ADDR
+CONFIG_SYS_FM2_DTSEC_MDIO_ADDR
+CONFIG_SYS_FM2_TGEC_MDIO_ADDR
+CONFIG_SYS_FMAN_FW_ADDR
+CONFIG_SYS_FMAN_V3
+CONFIG_SYS_FM_MURAM_SIZE
+CONFIG_SYS_FORM_3U_CPCI
+CONFIG_SYS_FORM_3U_VPX
+CONFIG_SYS_FORM_6U_CPCI
+CONFIG_SYS_FORM_6U_VPX
+CONFIG_SYS_FORM_AMC
+CONFIG_SYS_FORM_ATCA_AMC
+CONFIG_SYS_FORM_ATCA_PMC
+CONFIG_SYS_FORM_CUSTOM
+CONFIG_SYS_FORM_PCI
+CONFIG_SYS_FORM_PCI_EXPRESS
+CONFIG_SYS_FORM_PMC
+CONFIG_SYS_FORM_PMC_XMC
+CONFIG_SYS_FORM_VME
+CONFIG_SYS_FORM_XMC
+CONFIG_SYS_FPGA0_BASE
+CONFIG_SYS_FPGA0_SIZE
+CONFIG_SYS_FPGA1_BASE
+CONFIG_SYS_FPGA2_BASE
+CONFIG_SYS_FPGA3_BASE
+CONFIG_SYS_FPGAREG_DATE
+CONFIG_SYS_FPGAREG_DIPSW
+CONFIG_SYS_FPGAREG_FREQ
+CONFIG_SYS_FPGAREG_RESET
+CONFIG_SYS_FPGAREG_RESET_CODE
+CONFIG_SYS_FPGA_AMASK
+CONFIG_SYS_FPGA_BASE
+CONFIG_SYS_FPGA_BASE0
+CONFIG_SYS_FPGA_BASE1
+CONFIG_SYS_FPGA_BASE_0
+CONFIG_SYS_FPGA_BASE_1
+CONFIG_SYS_FPGA_BASE_ADDR
+CONFIG_SYS_FPGA_BASE_PHYS
+CONFIG_SYS_FPGA_CHECK_BUSY
+CONFIG_SYS_FPGA_CHECK_CTRLC
+CONFIG_SYS_FPGA_CHECK_ERROR
+CONFIG_SYS_FPGA_CHIPSIDE_LOOPBACK
+CONFIG_SYS_FPGA_CLK
+CONFIG_SYS_FPGA_COMMON
+CONFIG_SYS_FPGA_COUNT
+CONFIG_SYS_FPGA_CSOR
+CONFIG_SYS_FPGA_CSPR
+CONFIG_SYS_FPGA_CSPR_EXT
+CONFIG_SYS_FPGA_CTRL
+CONFIG_SYS_FPGA_CTRL_CF_RESET
+CONFIG_SYS_FPGA_CTRL_PS2_RESET
+CONFIG_SYS_FPGA_CTRL_WDI
+CONFIG_SYS_FPGA_DATA
+CONFIG_SYS_FPGA_DONE
+CONFIG_SYS_FPGA_DPRAM_RST
+CONFIG_SYS_FPGA_DPRAM_RW_TYPE
+CONFIG_SYS_FPGA_DPRAM_R_INT_LINE
+CONFIG_SYS_FPGA_DPRAM_W_INT_LINE
+CONFIG_SYS_FPGA_FIFO_BASE
+CONFIG_SYS_FPGA_FTIM0
+CONFIG_SYS_FPGA_FTIM1
+CONFIG_SYS_FPGA_FTIM2
+CONFIG_SYS_FPGA_FTIM3
+CONFIG_SYS_FPGA_INIT
+CONFIG_SYS_FPGA_IS_PROTO
+CONFIG_SYS_FPGA_LINESIDE_LOOPBACK
+CONFIG_SYS_FPGA_MAGIC
+CONFIG_SYS_FPGA_MAGIC_MASK
+CONFIG_SYS_FPGA_MAX_SIZE
+CONFIG_SYS_FPGA_MODE
+CONFIG_SYS_FPGA_MODE_CF_RESET
+CONFIG_SYS_FPGA_MODE_DUART_RESET
+CONFIG_SYS_FPGA_MODE_ENABLE_OUTPUT
+CONFIG_SYS_FPGA_MODE_TS_CLEAR
+CONFIG_SYS_FPGA_MODE_TS_IRQ_CLEAR
+CONFIG_SYS_FPGA_MODE_TS_IRQ_ENABLE
+CONFIG_SYS_FPGA_NO_RFL_HI
+CONFIG_SYS_FPGA_PHY0_INT
+CONFIG_SYS_FPGA_PHY1_INT
+CONFIG_SYS_FPGA_PRG
+CONFIG_SYS_FPGA_PROG
+CONFIG_SYS_FPGA_PROG_FEEDBACK
+CONFIG_SYS_FPGA_PROG_TIME
+CONFIG_SYS_FPGA_PTR
+CONFIG_SYS_FPGA_REG_BASE
+CONFIG_SYS_FPGA_REG_BASE_ADDR
+CONFIG_SYS_FPGA_SIZE
+CONFIG_SYS_FPGA_SLIC0_CS
+CONFIG_SYS_FPGA_SLIC0_ENABLE
+CONFIG_SYS_FPGA_SLIC0_INT
+CONFIG_SYS_FPGA_SLIC0_R_DPRAM_INT
+CONFIG_SYS_FPGA_SLIC0_W_DPRAM_INT
+CONFIG_SYS_FPGA_SLIC1_CS
+CONFIG_SYS_FPGA_SLIC1_ENABLE
+CONFIG_SYS_FPGA_SLIC1_INT
+CONFIG_SYS_FPGA_SLIC1_R_DPRAM_INT
+CONFIG_SYS_FPGA_SLIC1_W_DPRAM_INT
+CONFIG_SYS_FPGA_SPARTAN2
+CONFIG_SYS_FPGA_STATUS
+CONFIG_SYS_FPGA_STATUS_DIP0
+CONFIG_SYS_FPGA_STATUS_DIP1
+CONFIG_SYS_FPGA_STATUS_DIP2
+CONFIG_SYS_FPGA_STATUS_FLASH
+CONFIG_SYS_FPGA_STATUS_TS_IRQ
+CONFIG_SYS_FPGA_TS
+CONFIG_SYS_FPGA_TS_CAP0
+CONFIG_SYS_FPGA_TS_CAP0_LOW
+CONFIG_SYS_FPGA_TS_CAP1
+CONFIG_SYS_FPGA_TS_CAP1_LOW
+CONFIG_SYS_FPGA_TS_CAP2
+CONFIG_SYS_FPGA_TS_CAP2_LOW
+CONFIG_SYS_FPGA_TS_CAP3
+CONFIG_SYS_FPGA_TS_CAP3_LOW
+CONFIG_SYS_FPGA_TS_LOW
+CONFIG_SYS_FPGA_UART0_FO
+CONFIG_SYS_FPGA_UART1_FO
+CONFIG_SYS_FPGA_USER_LED0
+CONFIG_SYS_FPGA_USER_LED1
+CONFIG_SYS_FPGA_VER_MASK
+CONFIG_SYS_FPGA_WAIT
+CONFIG_SYS_FPGA_WAIT_BUSY
+CONFIG_SYS_FPGA_WAIT_CONFIG
+CONFIG_SYS_FPGA_WAIT_INIT
+CONFIG_SYS_FPGA_xxx
+CONFIG_SYS_FSL_A004447_SVR_REV
+CONFIG_SYS_FSL_AIOP1_BASE
+CONFIG_SYS_FSL_AIOP1_SIZE
+CONFIG_SYS_FSL_B4860QDS_XFI_ERR
+CONFIG_SYS_FSL_BMAN_ADDR
+CONFIG_SYS_FSL_BMAN_OFFSET
+CONFIG_SYS_FSL_BOOTROM_BASE
+CONFIG_SYS_FSL_BOOTROM_SIZE
+CONFIG_SYS_FSL_CCSR_BASE
+CONFIG_SYS_FSL_CCSR_GUR_BE
+CONFIG_SYS_FSL_CCSR_GUR_LE
+CONFIG_SYS_FSL_CCSR_SCFG_BE
+CONFIG_SYS_FSL_CCSR_SCFG_LE
+CONFIG_SYS_FSL_CCSR_SIZE
+CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR
+CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR
+CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR
+CONFIG_SYS_FSL_CLK
+CONFIG_SYS_FSL_CLK_ADDR
+CONFIG_SYS_FSL_CLUSTER_1_L2
+CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET
+CONFIG_SYS_FSL_CLUSTER_CLOCKS
+CONFIG_SYS_FSL_CORENET_CCM_ADDR
+CONFIG_SYS_FSL_CORENET_CCM_OFFSET
+CONFIG_SYS_FSL_CORENET_CLK_ADDR
+CONFIG_SYS_FSL_CORENET_CLK_OFFSET
+CONFIG_SYS_FSL_CORENET_PMAN
+CONFIG_SYS_FSL_CORENET_PMAN1_OFFSET
+CONFIG_SYS_FSL_CORENET_PMAN2_OFFSET
+CONFIG_SYS_FSL_CORENET_PMAN3_OFFSET
+CONFIG_SYS_FSL_CORENET_PME_ADDR
+CONFIG_SYS_FSL_CORENET_PME_OFFSET
+CONFIG_SYS_FSL_CORENET_RCPM_ADDR
+CONFIG_SYS_FSL_CORENET_RCPM_OFFSET
+CONFIG_SYS_FSL_CORENET_RMAN_ADDR
+CONFIG_SYS_FSL_CORENET_RMAN_OFFSET
+CONFIG_SYS_FSL_CORENET_SERDES2_ADDR
+CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET
+CONFIG_SYS_FSL_CORENET_SERDES3_ADDR
+CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET
+CONFIG_SYS_FSL_CORENET_SERDES4_ADDR
+CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET
+CONFIG_SYS_FSL_CORENET_SERDES_ADDR
+CONFIG_SYS_FSL_CORENET_SERDES_OFFSET
+CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
+CONFIG_SYS_FSL_CORES_PER_CLUSTER
+CONFIG_SYS_FSL_CPC
+CONFIG_SYS_FSL_CPC_ADDR
+CONFIG_SYS_FSL_CPC_OFFSET
+CONFIG_SYS_FSL_CSU_ADDR
+CONFIG_SYS_FSL_DCFG_ADDR
+CONFIG_SYS_FSL_DCSR_BASE
+CONFIG_SYS_FSL_DCSR_DDR2_ADDR
+CONFIG_SYS_FSL_DCSR_DDR3_ADDR
+CONFIG_SYS_FSL_DCSR_DDR4_ADDR
+CONFIG_SYS_FSL_DCSR_DDR_ADDR
+CONFIG_SYS_FSL_DCSR_SIZE
+CONFIG_SYS_FSL_DCU_BE
+CONFIG_SYS_FSL_DCU_LE
+CONFIG_SYS_FSL_DDR
+CONFIG_SYS_FSL_DDR1
+CONFIG_SYS_FSL_DDR2
+CONFIG_SYS_FSL_DDR2_ADDR
+CONFIG_SYS_FSL_DDR3
+CONFIG_SYS_FSL_DDR3L
+CONFIG_SYS_FSL_DDR3_ADDR
+CONFIG_SYS_FSL_DDR4
+CONFIG_SYS_FSL_DDRC_ARM_GEN3
+CONFIG_SYS_FSL_DDRC_GEN1
+CONFIG_SYS_FSL_DDRC_GEN2
+CONFIG_SYS_FSL_DDRC_GEN3
+CONFIG_SYS_FSL_DDRC_GEN4
+CONFIG_SYS_FSL_DDR_86XX
+CONFIG_SYS_FSL_DDR_ADDR
+CONFIG_SYS_FSL_DDR_BE
+CONFIG_SYS_FSL_DDR_EMU
+CONFIG_SYS_FSL_DDR_INTLV_256B
+CONFIG_SYS_FSL_DDR_LE
+CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
+CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
+CONFIG_SYS_FSL_DDR_VER
+CONFIG_SYS_FSL_DRAM_BASE1
+CONFIG_SYS_FSL_DRAM_BASE2
+CONFIG_SYS_FSL_DRAM_BASE3
+CONFIG_SYS_FSL_DRAM_SIZE1
+CONFIG_SYS_FSL_DRAM_SIZE2
+CONFIG_SYS_FSL_DRAM_SIZE3
+CONFIG_SYS_FSL_DSPI_BE
+CONFIG_SYS_FSL_DSP_CCSRBAR
+CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
+CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS
+CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
+CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
+CONFIG_SYS_FSL_DSP_DDR_ADDR
+CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
+CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
+CONFIG_SYS_FSL_ERRATUM_A004468
+CONFIG_SYS_FSL_ERRATUM_A004477
+CONFIG_SYS_FSL_ERRATUM_A004508
+CONFIG_SYS_FSL_ERRATUM_A004510
+CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
+CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2
+CONFIG_SYS_FSL_ERRATUM_A004580
+CONFIG_SYS_FSL_ERRATUM_A004699
+CONFIG_SYS_FSL_ERRATUM_A004849
+CONFIG_SYS_FSL_ERRATUM_A005125
+CONFIG_SYS_FSL_ERRATUM_A005434
+CONFIG_SYS_FSL_ERRATUM_A005812
+CONFIG_SYS_FSL_ERRATUM_A005871
+CONFIG_SYS_FSL_ERRATUM_A006261
+CONFIG_SYS_FSL_ERRATUM_A006379
+CONFIG_SYS_FSL_ERRATUM_A006384
+CONFIG_SYS_FSL_ERRATUM_A006475
+CONFIG_SYS_FSL_ERRATUM_A006593
+CONFIG_SYS_FSL_ERRATUM_A007075
+CONFIG_SYS_FSL_ERRATUM_A007186
+CONFIG_SYS_FSL_ERRATUM_A007212
+CONFIG_SYS_FSL_ERRATUM_A007798
+CONFIG_SYS_FSL_ERRATUM_A008044
+CONFIG_SYS_FSL_ERRATUM_A008336
+CONFIG_SYS_FSL_ERRATUM_A008378
+CONFIG_SYS_FSL_ERRATUM_A008407
+CONFIG_SYS_FSL_ERRATUM_A008511
+CONFIG_SYS_FSL_ERRATUM_A008514
+CONFIG_SYS_FSL_ERRATUM_A008585
+CONFIG_SYS_FSL_ERRATUM_A008751
+CONFIG_SYS_FSL_ERRATUM_A008850
+CONFIG_SYS_FSL_ERRATUM_A009635
+CONFIG_SYS_FSL_ERRATUM_A009660
+CONFIG_SYS_FSL_ERRATUM_A009663
+CONFIG_SYS_FSL_ERRATUM_A009801
+CONFIG_SYS_FSL_ERRATUM_A009803
+CONFIG_SYS_FSL_ERRATUM_A009929
+CONFIG_SYS_FSL_ERRATUM_A009942
+CONFIG_SYS_FSL_ERRATUM_A010165
+CONFIG_SYS_FSL_ERRATUM_A_004934
+CONFIG_SYS_FSL_ERRATUM_CPC_A002
+CONFIG_SYS_FSL_ERRATUM_CPC_A003
+CONFIG_SYS_FSL_ERRATUM_CPU_A003999
+CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
+CONFIG_SYS_FSL_ERRATUM_DDR_115
+CONFIG_SYS_FSL_ERRATUM_DDR_A003
+CONFIG_SYS_FSL_ERRATUM_DDR_A003474
+CONFIG_SYS_FSL_ERRATUM_ELBC_A001
+CONFIG_SYS_FSL_ERRATUM_ESDHC111
+CONFIG_SYS_FSL_ERRATUM_ESDHC13
+CONFIG_SYS_FSL_ERRATUM_ESDHC135
+CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
+CONFIG_SYS_FSL_ERRATUM_I2C_A004447
+CONFIG_SYS_FSL_ERRATUM_IFC_A002769
+CONFIG_SYS_FSL_ERRATUM_IFC_A003399
+CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
+CONFIG_SYS_FSL_ERRATUM_NMG_DDR120
+CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
+CONFIG_SYS_FSL_ERRATUM_NMG_LBC103
+CONFIG_SYS_FSL_ERRATUM_P1010_A003549
+CONFIG_SYS_FSL_ERRATUM_SEC_A003571
+CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
+CONFIG_SYS_FSL_ERRATUM_USB14
+CONFIG_SYS_FSL_ESDHC_ADDR
+CONFIG_SYS_FSL_ESDHC_BE
+CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
+CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
+CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
+CONFIG_SYS_FSL_ESDHC_LE
+CONFIG_SYS_FSL_ESDHC_NUM
+CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
+CONFIG_SYS_FSL_ESDHC_USE_PIO
+CONFIG_SYS_FSL_FM
+CONFIG_SYS_FSL_FM1_ADDR
+CONFIG_SYS_FSL_FM1_DTSEC1_ADDR
+CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET
+CONFIG_SYS_FSL_FM1_OFFSET
+CONFIG_SYS_FSL_FM1_RX0_10G_OFFSET
+CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET
+CONFIG_SYS_FSL_FM1_RX1_10G_OFFSET
+CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET
+CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET
+CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET
+CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET
+CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET
+CONFIG_SYS_FSL_FM2_ADDR
+CONFIG_SYS_FSL_FM2_OFFSET
+CONFIG_SYS_FSL_FM2_RX0_10G_OFFSET
+CONFIG_SYS_FSL_FM2_RX0_1G_OFFSET
+CONFIG_SYS_FSL_FM2_RX1_10G_OFFSET
+CONFIG_SYS_FSL_FM2_RX1_1G_OFFSET
+CONFIG_SYS_FSL_FM2_RX2_1G_OFFSET
+CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET
+CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET
+CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET
+CONFIG_SYS_FSL_FMAN_ADDR
+CONFIG_SYS_FSL_GUTS_ADDR
+CONFIG_SYS_FSL_HAS_DP_DDR
+CONFIG_SYS_FSL_I2C
+CONFIG_SYS_FSL_I2C2_OFFSET
+CONFIG_SYS_FSL_I2C2_SLAVE
+CONFIG_SYS_FSL_I2C2_SPEED
+CONFIG_SYS_FSL_I2C3_OFFSET
+CONFIG_SYS_FSL_I2C3_SLAVE
+CONFIG_SYS_FSL_I2C3_SPEED
+CONFIG_SYS_FSL_I2C4_OFFSET
+CONFIG_SYS_FSL_I2C4_SLAVE
+CONFIG_SYS_FSL_I2C4_SPEED
+CONFIG_SYS_FSL_I2C_OFFSET
+CONFIG_SYS_FSL_I2C_SLAVE
+CONFIG_SYS_FSL_I2C_SPEED
+CONFIG_SYS_FSL_IFC_BANK_COUNT
+CONFIG_SYS_FSL_IFC_BASE
+CONFIG_SYS_FSL_IFC_BASE1
+CONFIG_SYS_FSL_IFC_BASE2
+CONFIG_SYS_FSL_IFC_BE
+CONFIG_SYS_FSL_IFC_LE
+CONFIG_SYS_FSL_IFC_SIZE
+CONFIG_SYS_FSL_IFC_SIZE1
+CONFIG_SYS_FSL_IFC_SIZE1_1
+CONFIG_SYS_FSL_IFC_SIZE2
+CONFIG_SYS_FSL_ISBC_VER
+CONFIG_SYS_FSL_JR0_ADDR
+CONFIG_SYS_FSL_JR0_OFFSET
+CONFIG_SYS_FSL_LS1_CLK_ADDR
+CONFIG_SYS_FSL_LSCH3_SERDES_ADDR
+CONFIG_SYS_FSL_MAX_NUM_OF_SEC
+CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR
+CONFIG_SYS_FSL_MC_BASE
+CONFIG_SYS_FSL_MC_SIZE
+CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
+CONFIG_SYS_FSL_NI_BASE
+CONFIG_SYS_FSL_NI_SIZE
+CONFIG_SYS_FSL_NO_SERDES
+CONFIG_SYS_FSL_NUM_CC_PLL
+CONFIG_SYS_FSL_NUM_CC_PLLS
+CONFIG_SYS_FSL_NUM_LAWS
+CONFIG_SYS_FSL_OCRAM_BASE
+CONFIG_SYS_FSL_OCRAM_SIZE
+CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
+CONFIG_SYS_FSL_PAMU_OFFSET
+CONFIG_SYS_FSL_PBL_PBI
+CONFIG_SYS_FSL_PBL_RCW
+CONFIG_SYS_FSL_PCIE_COMPAT
+CONFIG_SYS_FSL_PCI_VER_3_X
+CONFIG_SYS_FSL_PEBUF_BASE
+CONFIG_SYS_FSL_PEBUF_SIZE
+CONFIG_SYS_FSL_PEX_LUT_BE
+CONFIG_SYS_FSL_PEX_LUT_LE
+CONFIG_SYS_FSL_PMIC_I2C_ADDR
+CONFIG_SYS_FSL_PMU_ADDR
+CONFIG_SYS_FSL_PMU_CLTBENR
+CONFIG_SYS_FSL_QBMAN_BASE
+CONFIG_SYS_FSL_QBMAN_SIZE
+CONFIG_SYS_FSL_QBMAN_SIZE_1
+CONFIG_SYS_FSL_QMAN_ADDR
+CONFIG_SYS_FSL_QMAN_OFFSET
+CONFIG_SYS_FSL_QMAN_V3
+CONFIG_SYS_FSL_QORIQ_CHASSIS1
+CONFIG_SYS_FSL_QORIQ_CHASSIS2
+CONFIG_SYS_FSL_QSPI_AHB
+CONFIG_SYS_FSL_QSPI_BASE
+CONFIG_SYS_FSL_QSPI_BASE1
+CONFIG_SYS_FSL_QSPI_BASE2
+CONFIG_SYS_FSL_QSPI_BE
+CONFIG_SYS_FSL_QSPI_LE
+CONFIG_SYS_FSL_QSPI_SIZE
+CONFIG_SYS_FSL_QSPI_SIZE1
+CONFIG_SYS_FSL_QSPI_SIZE2
+CONFIG_SYS_FSL_RAID_ENGINE
+CONFIG_SYS_FSL_RAID_ENGINE_ADDR
+CONFIG_SYS_FSL_RAID_ENGINE_OFFSET
+CONFIG_SYS_FSL_RCPM_ADDR
+CONFIG_SYS_FSL_RMU
+CONFIG_SYS_FSL_RST_ADDR
+CONFIG_SYS_FSL_SCFG_ADDR
+CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
+CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
+CONFIG_SYS_FSL_SCFG_OFFSET
+CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET
+CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR
+CONFIG_SYS_FSL_SEC_ADDR
+CONFIG_SYS_FSL_SEC_BE
+CONFIG_SYS_FSL_SEC_COMPAT
+CONFIG_SYS_FSL_SEC_IDX_OFFSET
+CONFIG_SYS_FSL_SEC_LE
+CONFIG_SYS_FSL_SEC_MON_BE
+CONFIG_SYS_FSL_SEC_MON_LE
+CONFIG_SYS_FSL_SEC_OFFSET
+CONFIG_SYS_FSL_SERDES
+CONFIG_SYS_FSL_SERDES_ADDR
+CONFIG_SYS_FSL_SFP_BE
+CONFIG_SYS_FSL_SFP_LE
+CONFIG_SYS_FSL_SFP_VER_3_0
+CONFIG_SYS_FSL_SFP_VER_3_2
+CONFIG_SYS_FSL_SFP_VER_3_4
+CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
+CONFIG_SYS_FSL_SNVS_LE
+CONFIG_SYS_FSL_SP_ADDR
+CONFIG_SYS_FSL_SP_LOOPBACK_DUART
+CONFIG_SYS_FSL_SP_VSG_GIC_ADDR
+CONFIG_SYS_FSL_SP_VSG_GIC_VIGR1
+CONFIG_SYS_FSL_SP_VSG_GIC_VIGR2
+CONFIG_SYS_FSL_SRDS_1
+CONFIG_SYS_FSL_SRDS_2
+CONFIG_SYS_FSL_SRDS_3
+CONFIG_SYS_FSL_SRDS_4
+CONFIG_SYS_FSL_SRDS_NUM_PLLS
+CONFIG_SYS_FSL_SRIO_ADDR
+CONFIG_SYS_FSL_SRIO_IB_WIN_NUM
+CONFIG_SYS_FSL_SRIO_LIODN
+CONFIG_SYS_FSL_SRIO_MAX_PORTS
+CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM
+CONFIG_SYS_FSL_SRIO_OB_WIN_NUM
+CONFIG_SYS_FSL_SRIO_OFFSET
+CONFIG_SYS_FSL_SRK_LE
+CONFIG_SYS_FSL_TBCLK_DIV
+CONFIG_SYS_FSL_THREADS_PER_CORE
+CONFIG_SYS_FSL_TIMER_ADDR
+CONFIG_SYS_FSL_USB1_ADDR
+CONFIG_SYS_FSL_USB1_PHY_ENABLE
+CONFIG_SYS_FSL_USB2_ADDR
+CONFIG_SYS_FSL_USB2_PHY_ENABLE
+CONFIG_SYS_FSL_USB_CTRL_PHY_EN
+CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN
+CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
+CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE
+CONFIG_SYS_FSL_USB_HS_DISCNCT_INC
+CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN
+CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
+CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV
+CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN
+CONFIG_SYS_FSL_USB_PLLPRG2_MFI
+CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK
+CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN
+CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN
+CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN
+CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV
+CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK
+CONFIG_SYS_FSL_USB_PWRFLT_CR_EN
+CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL
+CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK
+CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0
+CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3
+CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0
+CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3
+CONFIG_SYS_FSL_USB_SYS_CLK_VALID
+CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN
+CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK
+CONFIG_SYS_FSL_USDHC_NUM
+CONFIG_SYS_FSL_WDOG_BE
+CONFIG_SYS_FSL_WRIOP1_ADDR
+CONFIG_SYS_FSL_WRIOP1_BASE
+CONFIG_SYS_FSL_WRIOP1_MDIO1
+CONFIG_SYS_FSL_WRIOP1_MDIO2
+CONFIG_SYS_FSL_WRIOP1_SIZE
+CONFIG_SYS_FSL_XHCI_USB1_ADDR
+CONFIG_SYS_FSL_XHCI_USB2_ADDR
+CONFIG_SYS_FSL_XHCI_USB3_ADDR
+CONFIG_SYS_FSMC_BASE
+CONFIG_SYS_FSMC_NAND_16BIT
+CONFIG_SYS_FSMC_NAND_8BIT
+CONFIG_SYS_FSMC_NAND_SP
+CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6
+CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE
+CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS
+CONFIG_SYS_FTPMU010_SDRAMHTC
+CONFIG_SYS_FTSDMC021_BANK0_BASE
+CONFIG_SYS_FTSDMC021_BANK0_BSR
+CONFIG_SYS_FTSDMC021_BANK1_BASE
+CONFIG_SYS_FTSDMC021_BANK1_BSR
+CONFIG_SYS_FTSDMC021_CR1
+CONFIG_SYS_FTSDMC021_CR2
+CONFIG_SYS_FTSDMC021_TP1
+CONFIG_SYS_FTSDMC021_TP2
+CONFIG_SYS_FTSMC020_CONFIGS
+CONFIG_SYS_FULL_VA
+CONFIG_SYS_GAFR0_L_VAL
+CONFIG_SYS_GAFR0_U_VAL
+CONFIG_SYS_GAFR1_L_VAL
+CONFIG_SYS_GAFR1_U_VAL
+CONFIG_SYS_GAFR2_L_VAL
+CONFIG_SYS_GAFR2_U_VAL
+CONFIG_SYS_GAFR3_L_VAL
+CONFIG_SYS_GAFR3_U_VAL
+CONFIG_SYS_GBIT_MII1_BUSNAME
+CONFIG_SYS_GBIT_MII_BUSNAME
+CONFIG_SYS_GBL_DATA_ADDR
+CONFIG_SYS_GBL_DATA_OFFSET
+CONFIG_SYS_GBL_DATA_SIZE
+CONFIG_SYS_GENERIC_BOARD
+CONFIG_SYS_GENERIC_GLOBAL_DATA
+CONFIG_SYS_GIC400_ADDR
+CONFIG_SYS_GLOBAL_SDRAM_LIMIT
+CONFIG_SYS_GP1DIR
+CONFIG_SYS_GP1ODR
+CONFIG_SYS_GP2DIR
+CONFIG_SYS_GP2ODR
+CONFIG_SYS_GPCR0_VAL
+CONFIG_SYS_GPCR1_VAL
+CONFIG_SYS_GPCR2_VAL
+CONFIG_SYS_GPCR3_VAL
+CONFIG_SYS_GPDR0_VAL
+CONFIG_SYS_GPDR1_VAL
+CONFIG_SYS_GPDR2_VAL
+CONFIG_SYS_GPDR3_VAL
+CONFIG_SYS_GPIO0_ISR1H
+CONFIG_SYS_GPIO0_ISR1L
+CONFIG_SYS_GPIO0_ISR2H
+CONFIG_SYS_GPIO0_ISR2L
+CONFIG_SYS_GPIO0_ODR
+CONFIG_SYS_GPIO0_OR
+CONFIG_SYS_GPIO0_OSRH
+CONFIG_SYS_GPIO0_OSRL
+CONFIG_SYS_GPIO0_TCR
+CONFIG_SYS_GPIO0_TSRH
+CONFIG_SYS_GPIO0_TSRL
+CONFIG_SYS_GPIO1_DAT
+CONFIG_SYS_GPIO1_DIR
+CONFIG_SYS_GPIO1_EN
+CONFIG_SYS_GPIO1_FUNC
+CONFIG_SYS_GPIO1_ISR1H
+CONFIG_SYS_GPIO1_ISR1L
+CONFIG_SYS_GPIO1_LED
+CONFIG_SYS_GPIO1_OSRH
+CONFIG_SYS_GPIO1_OSRL
+CONFIG_SYS_GPIO1_OUT
+CONFIG_SYS_GPIO1_PRELIM
+CONFIG_SYS_GPIO1_TCR
+CONFIG_SYS_GPIO1_TSRH
+CONFIG_SYS_GPIO1_TSRL
+CONFIG_SYS_GPIO2_DAT
+CONFIG_SYS_GPIO2_DIR
+CONFIG_SYS_GPIO2_PRELIM
+CONFIG_SYS_GPIO_0_ADDR
+CONFIG_SYS_GPIO_BASE
+CONFIG_SYS_GPIO_BOARD_RESET
+CONFIG_SYS_GPIO_CAN_ENABLE
+CONFIG_SYS_GPIO_CRAM_ADV
+CONFIG_SYS_GPIO_CRAM_CLK
+CONFIG_SYS_GPIO_CRAM_CRE
+CONFIG_SYS_GPIO_CRAM_WAIT
+CONFIG_SYS_GPIO_DATADIR
+CONFIG_SYS_GPIO_DATAVALUE
+CONFIG_SYS_GPIO_DSPIC_READY
+CONFIG_SYS_GPIO_EEPROM_EXT_WP
+CONFIG_SYS_GPIO_EEPROM_INT_WP
+CONFIG_SYS_GPIO_EEPROM_WP
+CONFIG_SYS_GPIO_EN
+CONFIG_SYS_GPIO_ENABLE
+CONFIG_SYS_GPIO_EREADY
+CONFIG_SYS_GPIO_FLASH_WP
+CONFIG_SYS_GPIO_FUNC
+CONFIG_SYS_GPIO_HIGHSIDE
+CONFIG_SYS_GPIO_HWREV_MASK
+CONFIG_SYS_GPIO_HWREV_SHIFT
+CONFIG_SYS_GPIO_I2C_SCL
+CONFIG_SYS_GPIO_I2C_SDA
+CONFIG_SYS_GPIO_LEDA_N
+CONFIG_SYS_GPIO_LEDB_N
+CONFIG_SYS_GPIO_LEDRUN_N
+CONFIG_SYS_GPIO_LIME_RST
+CONFIG_SYS_GPIO_LIME_S
+CONFIG_SYS_GPIO_LSB_ENABLE
+CONFIG_SYS_GPIO_M66EN
+CONFIG_SYS_GPIO_MONARCH_N
+CONFIG_SYS_GPIO_ODR
+CONFIG_SYS_GPIO_OPENDRAIN
+CONFIG_SYS_GPIO_OR
+CONFIG_SYS_GPIO_OUT
+CONFIG_SYS_GPIO_PCIE_CLKREQ
+CONFIG_SYS_GPIO_PCIE_PRESENT0
+CONFIG_SYS_GPIO_PCIE_PRESENT1
+CONFIG_SYS_GPIO_PCIE_PRESENT2
+CONFIG_SYS_GPIO_PCIE_RST
+CONFIG_SYS_GPIO_PCIE_WAKE
+CONFIG_SYS_GPIO_PERM_VOLT_FEED
+CONFIG_SYS_GPIO_PHY0_RST
+CONFIG_SYS_GPIO_PHY1_RST
+CONFIG_SYS_GPIO_PHY_RST
+CONFIG_SYS_GPIO_RS232_FORCEOFF
+CONFIG_SYS_GPIO_SELFRST_N
+CONFIG_SYS_GPIO_STARTUP_FINISHED
+CONFIG_SYS_GPIO_STARTUP_FINISHED_N
+CONFIG_SYS_GPIO_SYSMON_STATUS
+CONFIG_SYS_GPIO_TCR
+CONFIG_SYS_GPIO_WATCHDOG
+CONFIG_SYS_GPIO_WIDTH
+CONFIG_SYS_GPR1
+CONFIG_SYS_GPSR0_VAL
+CONFIG_SYS_GPSR1_VAL
+CONFIG_SYS_GPSR2_VAL
+CONFIG_SYS_GPSR3_VAL
+CONFIG_SYS_GPS_PORT_CONFIG
+CONFIG_SYS_GPS_PORT_CONFIG_1
+CONFIG_SYS_GPS_PORT_CONFIG_2
+CONFIG_SYS_GRLIB_APBUART_INDEX
+CONFIG_SYS_GRLIB_ESA_MCTRL1
+CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1
+CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2
+CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3
+CONFIG_SYS_GRLIB_ESA_MCTRL2
+CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG1
+CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG2
+CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG3
+CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
+CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1_CFG1
+CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1_CFG3
+CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1_CFG4
+CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2
+CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2_CFG1
+CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2_CFG3
+CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2_CFG4
+CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
+CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL
+CONFIG_SYS_GRLIB_GAISLER_DDRSPA2
+CONFIG_SYS_GRLIB_GAISLER_DDRSPA2_CTRL
+CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
+CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1
+CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2
+CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3
+CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2
+CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG1
+CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG2
+CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG3
+CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
+CONFIG_SYS_GRLIB_GAISLER_SDCTRL1_CTRL
+CONFIG_SYS_GRLIB_GAISLER_SDCTRL2
+CONFIG_SYS_GRLIB_GAISLER_SDCTRL2_CTRL
+CONFIG_SYS_GRLIB_GPTIMER_INDEX
+CONFIG_SYS_GRLIB_GRETH_INDEX
+CONFIG_SYS_GRLIB_GRETH_PHYADDR
+CONFIG_SYS_GRLIB_GRUSB_INDEX
+CONFIG_SYS_GRLIB_MEMCFG1
+CONFIG_SYS_GRLIB_MEMCFG2
+CONFIG_SYS_GRLIB_MEMCFG3
+CONFIG_SYS_GRLIB_SDRAM
+CONFIG_SYS_GRLIB_SINGLE_BUS
+CONFIG_SYS_HALT_BEFOR_RAM_JUMP
+CONFIG_SYS_HAS_NO_CACHE
+CONFIG_SYS_HAS_SERDES
+CONFIG_SYS_HELP_CMD_WIDTH
+CONFIG_SYS_HID0_FINAL
+CONFIG_SYS_HID0_INIT
+CONFIG_SYS_HID2
+CONFIG_SYS_HIGH
+CONFIG_SYS_HMI_BASE
+CONFIG_SYS_HOSTNAME
+CONFIG_SYS_HRCW_HIGH
+CONFIG_SYS_HRCW_HIGH_BASE
+CONFIG_SYS_HRCW_LOW
+CONFIG_SYS_HRCW_MASTER
+CONFIG_SYS_HRCW_SLAVE1
+CONFIG_SYS_HRCW_SLAVE2
+CONFIG_SYS_HRCW_SLAVE3
+CONFIG_SYS_HRCW_SLAVE4
+CONFIG_SYS_HRCW_SLAVE5
+CONFIG_SYS_HRCW_SLAVE6
+CONFIG_SYS_HRCW_SLAVE7
+CONFIG_SYS_HSDRAMC
+CONFIG_SYS_HWINFO_MAGIC
+CONFIG_SYS_HWINFO_OFFSET
+CONFIG_SYS_HWINFO_SIZE
+CONFIG_SYS_HZ_CLOCK
+CONFIG_SYS_I2C
+CONFIG_SYS_I2C2_FSL_OFFSET
+CONFIG_SYS_I2C2_OFFSET
+CONFIG_SYS_I2C2_PINMUX_CLR
+CONFIG_SYS_I2C2_PINMUX_REG
+CONFIG_SYS_I2C2_PINMUX_SET
+CONFIG_SYS_I2C_0
+CONFIG_SYS_I2C_2
+CONFIG_SYS_I2C_5
+CONFIG_SYS_I2C_8574A_ADDR1
+CONFIG_SYS_I2C_8574A_ADDR2
+CONFIG_SYS_I2C_8574_ADDR1
+CONFIG_SYS_I2C_8574_ADDR2
+CONFIG_SYS_I2C_ADI
+CONFIG_SYS_I2C_BASE
+CONFIG_SYS_I2C_BASE0
+CONFIG_SYS_I2C_BASE1
+CONFIG_SYS_I2C_BASE2
+CONFIG_SYS_I2C_BASE3
+CONFIG_SYS_I2C_BASE4
+CONFIG_SYS_I2C_BASE5
+CONFIG_SYS_I2C_BOARD_LATE_INIT
+CONFIG_SYS_I2C_BOOT_EEPROM_ADDR
+CONFIG_SYS_I2C_BUSES
+CONFIG_SYS_I2C_BUS_MAX
+CONFIG_SYS_I2C_CLK_OFFSET
+CONFIG_SYS_I2C_DAVINCI
+CONFIG_SYS_I2C_DIRECT_BUS
+CONFIG_SYS_I2C_DPMEM_OFFSET
+CONFIG_SYS_I2C_DS1621_ADDR
+CONFIG_SYS_I2C_DS4510_ADDR
+CONFIG_SYS_I2C_DSPIC_2_ADDR
+CONFIG_SYS_I2C_DSPIC_ADDR
+CONFIG_SYS_I2C_DSPIC_IO_ADDR
+CONFIG_SYS_I2C_DSPIC_KEYB_ADDR
+CONFIG_SYS_I2C_DTT_ADDR
+CONFIG_SYS_I2C_DVI_ADDR
+CONFIG_SYS_I2C_DVI_BUS_NUM
+CONFIG_SYS_I2C_EARLY_INIT
+CONFIG_SYS_I2C_EEPROM
+CONFIG_SYS_I2C_EEPROM_ADDR
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN
+CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
+CONFIG_SYS_I2C_EEPROM_BUS
+CONFIG_SYS_I2C_EEPROM_BUS_NUM
+CONFIG_SYS_I2C_EEPROM_CCID
+CONFIG_SYS_I2C_EEPROM_CPU_ADDR
+CONFIG_SYS_I2C_EEPROM_MAC_OFFSET
+CONFIG_SYS_I2C_EEPROM_MB_ADDR
+CONFIG_SYS_I2C_EEPROM_NXID
+CONFIG_SYS_I2C_EEPROM_NXID_MAC
+CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS
+CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS
+CONFIG_SYS_I2C_EXPANDER_ADDR
+CONFIG_SYS_I2C_FACT_ADDR
+CONFIG_SYS_I2C_FPGA_ADDR
+CONFIG_SYS_I2C_FRAM
+CONFIG_SYS_I2C_G762_ADDR
+CONFIG_SYS_I2C_GENERIC_MAC
+CONFIG_SYS_I2C_HWMON_ADDR
+CONFIG_SYS_I2C_IDT6V49205B
+CONFIG_SYS_I2C_IFDR_DIV
+CONFIG_SYS_I2C_IHS
+CONFIG_SYS_I2C_IHS_CH0
+CONFIG_SYS_I2C_IHS_CH0_1
+CONFIG_SYS_I2C_IHS_CH1
+CONFIG_SYS_I2C_IHS_CH1_1
+CONFIG_SYS_I2C_IHS_CH2
+CONFIG_SYS_I2C_IHS_CH2_1
+CONFIG_SYS_I2C_IHS_CH3
+CONFIG_SYS_I2C_IHS_CH3_1
+CONFIG_SYS_I2C_IHS_DUAL
+CONFIG_SYS_I2C_IHS_SLAVE_0
+CONFIG_SYS_I2C_IHS_SLAVE_0_1
+CONFIG_SYS_I2C_IHS_SLAVE_1
+CONFIG_SYS_I2C_IHS_SLAVE_1_1
+CONFIG_SYS_I2C_IHS_SLAVE_2
+CONFIG_SYS_I2C_IHS_SLAVE_2_1
+CONFIG_SYS_I2C_IHS_SLAVE_3
+CONFIG_SYS_I2C_IHS_SLAVE_3_1
+CONFIG_SYS_I2C_IHS_SPEED_0
+CONFIG_SYS_I2C_IHS_SPEED_0_1
+CONFIG_SYS_I2C_IHS_SPEED_1
+CONFIG_SYS_I2C_IHS_SPEED_1_1
+CONFIG_SYS_I2C_IHS_SPEED_2
+CONFIG_SYS_I2C_IHS_SPEED_2_1
+CONFIG_SYS_I2C_IHS_SPEED_3
+CONFIG_SYS_I2C_IHS_SPEED_3_1
+CONFIG_SYS_I2C_INIT_BOARD
+CONFIG_SYS_I2C_IO
+CONFIG_SYS_I2C_KEYBD_ADDR
+CONFIG_SYS_I2C_KONA
+CONFIG_SYS_I2C_LDI_ADDR
+CONFIG_SYS_I2C_LM75_ADDR
+CONFIG_SYS_I2C_LM90_ADDR
+CONFIG_SYS_I2C_LPC32XX
+CONFIG_SYS_I2C_LPC32XX_SLAVE
+CONFIG_SYS_I2C_LPC32XX_SPEED
+CONFIG_SYS_I2C_MAC1_BUS
+CONFIG_SYS_I2C_MAC1_CHIP_ADDR
+CONFIG_SYS_I2C_MAC1_DATA_ADDR
+CONFIG_SYS_I2C_MAC2_BUS
+CONFIG_SYS_I2C_MAC2_CHIP_ADDR
+CONFIG_SYS_I2C_MAC2_DATA_ADDR
+CONFIG_SYS_I2C_MAC_OFFSET
+CONFIG_SYS_I2C_MAX1237_ADDR
+CONFIG_SYS_I2C_MAX_HOPS
+CONFIG_SYS_I2C_MODULE
+CONFIG_SYS_I2C_MXC
+CONFIG_SYS_I2C_MXC_I2C1
+CONFIG_SYS_I2C_MXC_I2C2
+CONFIG_SYS_I2C_MXC_I2C3
+CONFIG_SYS_I2C_MXC_I2C4
+CONFIG_SYS_I2C_MXS
+CONFIG_SYS_I2C_NCT72_ADDR
+CONFIG_SYS_I2C_NOPROBES
+CONFIG_SYS_I2C_OFFSET
+CONFIG_SYS_I2C_OMAP24XX
+CONFIG_SYS_I2C_OMAP34XX
+CONFIG_SYS_I2C_PCA953X_ADDR
+CONFIG_SYS_I2C_PCA953X_ADDR0
+CONFIG_SYS_I2C_PCA953X_ADDR1
+CONFIG_SYS_I2C_PCA953X_ADDR2
+CONFIG_SYS_I2C_PCA953X_ADDR3
+CONFIG_SYS_I2C_PCA953X_WIDTH
+CONFIG_SYS_I2C_PCA9553_ADDR
+CONFIG_SYS_I2C_PCA9555_ADDR
+CONFIG_SYS_I2C_PCA9557_ADDR
+CONFIG_SYS_I2C_PCF8574A_ADDR
+CONFIG_SYS_I2C_PEX8518_ADDR
+CONFIG_SYS_I2C_PINMUX_CLR
+CONFIG_SYS_I2C_PINMUX_REG
+CONFIG_SYS_I2C_PINMUX_SET
+CONFIG_SYS_I2C_POWERIC_ADDR
+CONFIG_SYS_I2C_PPC4XX
+CONFIG_SYS_I2C_PPC4XX_CH0
+CONFIG_SYS_I2C_PPC4XX_CH1
+CONFIG_SYS_I2C_PPC4XX_SLAVE_0
+CONFIG_SYS_I2C_PPC4XX_SLAVE_1
+CONFIG_SYS_I2C_PPC4XX_SPEED_0
+CONFIG_SYS_I2C_PPC4XX_SPEED_1
+CONFIG_SYS_I2C_PXA
+CONFIG_SYS_I2C_QIXIS_ADDR
+CONFIG_SYS_I2C_RCAR
+CONFIG_SYS_I2C_RTC_ADDR
+CONFIG_SYS_I2C_S3C24X0
+CONFIG_SYS_I2C_S3C24X0_SLAVE
+CONFIG_SYS_I2C_S3C24X0_SPEED
+CONFIG_SYS_I2C_SH
+CONFIG_SYS_I2C_SH_BASE0
+CONFIG_SYS_I2C_SH_BASE1
+CONFIG_SYS_I2C_SH_BASE2
+CONFIG_SYS_I2C_SH_BASE3
+CONFIG_SYS_I2C_SH_BASE4
+CONFIG_SYS_I2C_SH_NUM_CONTROLLERS
+CONFIG_SYS_I2C_SH_SPEED0
+CONFIG_SYS_I2C_SH_SPEED1
+CONFIG_SYS_I2C_SH_SPEED2
+CONFIG_SYS_I2C_SH_SPEED3
+CONFIG_SYS_I2C_SH_SPEED4
+CONFIG_SYS_I2C_SLAVE
+CONFIG_SYS_I2C_SLAVE1
+CONFIG_SYS_I2C_SLAVE2
+CONFIG_SYS_I2C_SLAVE3
+CONFIG_SYS_I2C_SOFT
+CONFIG_SYS_I2C_SOFT_SLAVE
+CONFIG_SYS_I2C_SOFT_SLAVE_10
+CONFIG_SYS_I2C_SOFT_SLAVE_11
+CONFIG_SYS_I2C_SOFT_SLAVE_12
+CONFIG_SYS_I2C_SOFT_SLAVE_2
+CONFIG_SYS_I2C_SOFT_SLAVE_3
+CONFIG_SYS_I2C_SOFT_SLAVE_4
+CONFIG_SYS_I2C_SOFT_SLAVE_5
+CONFIG_SYS_I2C_SOFT_SLAVE_6
+CONFIG_SYS_I2C_SOFT_SLAVE_7
+CONFIG_SYS_I2C_SOFT_SLAVE_8
+CONFIG_SYS_I2C_SOFT_SLAVE_9
+CONFIG_SYS_I2C_SOFT_SPEED
+CONFIG_SYS_I2C_SOFT_SPEED_10
+CONFIG_SYS_I2C_SOFT_SPEED_11
+CONFIG_SYS_I2C_SOFT_SPEED_12
+CONFIG_SYS_I2C_SOFT_SPEED_2
+CONFIG_SYS_I2C_SOFT_SPEED_3
+CONFIG_SYS_I2C_SOFT_SPEED_4
+CONFIG_SYS_I2C_SOFT_SPEED_5
+CONFIG_SYS_I2C_SOFT_SPEED_6
+CONFIG_SYS_I2C_SOFT_SPEED_7
+CONFIG_SYS_I2C_SOFT_SPEED_8
+CONFIG_SYS_I2C_SOFT_SPEED_9
+CONFIG_SYS_I2C_SPEED
+CONFIG_SYS_I2C_SPEED1
+CONFIG_SYS_I2C_SPEED2
+CONFIG_SYS_I2C_SPEED3
+CONFIG_SYS_I2C_TCA642X_ADDR
+CONFIG_SYS_I2C_TCA642X_BUS_NUM
+CONFIG_SYS_I2C_TEGRA
+CONFIG_SYS_I2C_UCODE_PATCH
+CONFIG_SYS_I2C_W83782G_ADDR
+CONFIG_SYS_I2C_ZYNQ
+CONFIG_SYS_I2C_ZYNQ_SLAVE
+CONFIG_SYS_I2C_ZYNQ_SPEED
+CONFIG_SYS_I2ODMA_BASE
+CONFIG_SYS_I2ODMA_PHYS_ADDR
+CONFIG_SYS_I2c_INIT_MPC5XXX
+CONFIG_SYS_IBAT
+CONFIG_SYS_IBAT0L
+CONFIG_SYS_IBAT0U
+CONFIG_SYS_IBAT1L
+CONFIG_SYS_IBAT1U
+CONFIG_SYS_IBAT2L
+CONFIG_SYS_IBAT2U
+CONFIG_SYS_IBAT3L
+CONFIG_SYS_IBAT3U
+CONFIG_SYS_IBAT4L
+CONFIG_SYS_IBAT4U
+CONFIG_SYS_IBAT5L
+CONFIG_SYS_IBAT5U
+CONFIG_SYS_IBAT6L
+CONFIG_SYS_IBAT6L_EARLY
+CONFIG_SYS_IBAT6U
+CONFIG_SYS_IBAT6U_EARLY
+CONFIG_SYS_IBAT7L
+CONFIG_SYS_IBAT7U
+CONFIG_SYS_ICACHE_INV
+CONFIG_SYS_ICACHE_LINESZ
+CONFIG_SYS_ICACHE_SACR_VALUE
+CONFIG_SYS_ICS8N3QV01_I2C
+CONFIG_SYS_ICTRL
+CONFIG_SYS_IDE_MAXBUS
+CONFIG_SYS_IDE_MAXDEVICE
+CONFIG_SYS_ID_EEPROM
+CONFIG_SYS_IFC_ADDR
+CONFIG_SYS_IFC_CCR
+CONFIG_SYS_IMMR
+CONFIG_SYS_INIT_DBCR
+CONFIG_SYS_INIT_DCACHE_CS
+CONFIG_SYS_INIT_DCACHE_PBxAR
+CONFIG_SYS_INIT_DCACHE_PBxCR
+CONFIG_SYS_INIT_EXTRA_SIZE
+CONFIG_SYS_INIT_L2CSR0
+CONFIG_SYS_INIT_L2_ADDR
+CONFIG_SYS_INIT_L2_ADDR_PHYS
+CONFIG_SYS_INIT_L2_END
+CONFIG_SYS_INIT_L3_ADDR
+CONFIG_SYS_INIT_L3_ADDR_PHYS
+CONFIG_SYS_INIT_L3_END
+CONFIG_SYS_INIT_L3_VADDR
+CONFIG_SYS_INIT_RAM1_ADDR
+CONFIG_SYS_INIT_RAM1_CTRL
+CONFIG_SYS_INIT_RAM1_END
+CONFIG_SYS_INIT_RAM_ADDR
+CONFIG_SYS_INIT_RAM_ADDR_PHYS
+CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH
+CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW
+CONFIG_SYS_INIT_RAM_CTRL
+CONFIG_SYS_INIT_RAM_DCACHE
+CONFIG_SYS_INIT_RAM_LOCK
+CONFIG_SYS_INIT_RAM_PATTERN
+CONFIG_SYS_INIT_RAM_SIZE
+CONFIG_SYS_INIT_SP_ADDR
+CONFIG_SYS_INIT_SP_OFFSET
+CONFIG_SYS_INPUT_CLKSRC
+CONFIG_SYS_INTA_FAKE
+CONFIG_SYS_INTEL_BOOT
+CONFIG_SYS_INTERLAKEN
+CONFIG_SYS_INTRAM_BASE
+CONFIG_SYS_INTRAM_SIZE
+CONFIG_SYS_INTR_BASE
+CONFIG_SYS_INTSRAM
+CONFIG_SYS_INTSRAMSZ
+CONFIG_SYS_INT_FLASH_BASE
+CONFIG_SYS_INT_FLASH_ENABLE
+CONFIG_SYS_IOCTRL_MUX_DDR
+CONFIG_SYS_IO_BASE
+CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
+CONFIG_SYS_IPBSPEED_133
+CONFIG_SYS_IR_REG_BASE_ADDR
+CONFIG_SYS_ISA_BASE
+CONFIG_SYS_ISA_IO
+CONFIG_SYS_ISA_IO_BASE_ADDRESS
+CONFIG_SYS_ISA_IO_OFFSET
+CONFIG_SYS_ISA_IO_STRIDE
+CONFIG_SYS_ISA_MEM
+CONFIG_SYS_ISB
+CONFIG_SYS_ISRAM_BASE
+CONFIG_SYS_IVM_EEPROM_ADR
+CONFIG_SYS_IVM_EEPROM_MAX_LEN
+CONFIG_SYS_IVM_EEPROM_PAGE_LEN
+CONFIG_SYS_JFFS2_FIRST_BANK
+CONFIG_SYS_JFFS2_FIRST_SECTOR
+CONFIG_SYS_JFFS2_MEM_NAND
+CONFIG_SYS_JFFS2_NUM_BANKS
+CONFIG_SYS_JFFS2_SORT_FRAGMENTS
+CONFIG_SYS_KBYTES_SDRAM
+CONFIG_SYS_KEY_REG_BASE_ADDR
+CONFIG_SYS_KMBEC_FPGA_BASE
+CONFIG_SYS_KMBEC_FPGA_SIZE
+CONFIG_SYS_KWD_CONFIG
+CONFIG_SYS_KW_SPI_MPP
+CONFIG_SYS_L2
+CONFIG_SYS_L2_PL310
+CONFIG_SYS_L2_SIZE
+CONFIG_SYS_L3_SIZE
+CONFIG_SYS_LARGE_FLASH
+CONFIG_SYS_LATCH0_BOOT
+CONFIG_SYS_LATCH0_RESET
+CONFIG_SYS_LATCH1_BOOT
+CONFIG_SYS_LATCH1_RESET
+CONFIG_SYS_LATCH_ADDR
+CONFIG_SYS_LATCH_BASE
+CONFIG_SYS_LBAPP1_BASE
+CONFIG_SYS_LBAPP1_BASE_PHYS
+CONFIG_SYS_LBAPP1_BR_PRELIM
+CONFIG_SYS_LBAPP1_OR_PRELIM
+CONFIG_SYS_LBAPP2_BASE
+CONFIG_SYS_LBAPP2_BASE_PHYS
+CONFIG_SYS_LBAPP2_BR_PRELIM
+CONFIG_SYS_LBAPP2_OR_PRELIM
+CONFIG_SYS_LBC0_BASE
+CONFIG_SYS_LBC0_BASE_PHYS
+CONFIG_SYS_LBC1_BASE
+CONFIG_SYS_LBC1_BASE_PHYS
+CONFIG_SYS_LBCR_ADDR
+CONFIG_SYS_LBC_ADDR
+CONFIG_SYS_LBC_BASE
+CONFIG_SYS_LBC_BASE_PHYS_LOW
+CONFIG_SYS_LBC_CACHE_BASE
+CONFIG_SYS_LBC_FLASH_BASE
+CONFIG_SYS_LBC_LBCR
+CONFIG_SYS_LBC_LCRR
+CONFIG_SYS_LBC_LSDMR_1
+CONFIG_SYS_LBC_LSDMR_2
+CONFIG_SYS_LBC_LSDMR_3
+CONFIG_SYS_LBC_LSDMR_4
+CONFIG_SYS_LBC_LSDMR_5
+CONFIG_SYS_LBC_LSDMR_ARFRSH
+CONFIG_SYS_LBC_LSDMR_COMMON
+CONFIG_SYS_LBC_LSDMR_MRW
+CONFIG_SYS_LBC_LSDMR_PCHALL
+CONFIG_SYS_LBC_LSDMR_RFEN
+CONFIG_SYS_LBC_LSRT
+CONFIG_SYS_LBC_MRTPR
+CONFIG_SYS_LBC_NONCACHE_BASE
+CONFIG_SYS_LBC_SDRAM_BASE
+CONFIG_SYS_LBC_SDRAM_BASE_PHYS
+CONFIG_SYS_LBC_SDRAM_SIZE
+CONFIG_SYS_LBLAWAR0_PRELIM
+CONFIG_SYS_LBLAWAR1_PRELIM
+CONFIG_SYS_LBLAWAR2_PRELIM
+CONFIG_SYS_LBLAWAR3_PRELIM
+CONFIG_SYS_LBLAWAR4_PRELIM
+CONFIG_SYS_LBLAWAR5_PRELIM
+CONFIG_SYS_LBLAWAR6_PRELIM
+CONFIG_SYS_LBLAWAR7_PRELIM
+CONFIG_SYS_LBLAWBAR0_PRELIM
+CONFIG_SYS_LBLAWBAR1_PRELIM
+CONFIG_SYS_LBLAWBAR2_PRELIM
+CONFIG_SYS_LBLAWBAR3_PRELIM
+CONFIG_SYS_LBLAWBAR4_PRELIM
+CONFIG_SYS_LBLAWBAR5_PRELIM
+CONFIG_SYS_LBLAWBAR6_PRELIM
+CONFIG_SYS_LBLAWBAR7_PRELIM
+CONFIG_SYS_LB_SDRAM
+CONFIG_SYS_LCD0_RST
+CONFIG_SYS_LCD1_RST
+CONFIG_SYS_LCD_BASE
+CONFIG_SYS_LCD_ENDIAN
+CONFIG_SYS_LCRR_CLKDIV
+CONFIG_SYS_LCRR_DBYP
+CONFIG_SYS_LCRR_EADC
+CONFIG_SYS_LDB_CLOCK
+CONFIG_SYS_LDSCRIPT
+CONFIG_SYS_LED_ADDR
+CONFIG_SYS_LED_BASE
+CONFIG_SYS_LED_DISP_BASE
+CONFIG_SYS_LIME_BASE
+CONFIG_SYS_LIME_BASE_0
+CONFIG_SYS_LIME_BASE_1
+CONFIG_SYS_LIME_BASE_2
+CONFIG_SYS_LIME_BASE_3
+CONFIG_SYS_LIME_CLOCK_100MHZ
+CONFIG_SYS_LIME_CLOCK_133MHZ
+CONFIG_SYS_LIME_MMR
+CONFIG_SYS_LIME_SDRAM_CLOCK
+CONFIG_SYS_LIME_SIZE
+CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE
+CONFIG_SYS_LOADS_BAUD_CHANGE
+CONFIG_SYS_LOAD_ADDR
+CONFIG_SYS_LOAD_ADDR2
+CONFIG_SYS_LOCAL_CONF_REGS
+CONFIG_SYS_LONGHELP
+CONFIG_SYS_LOW
+CONFIG_SYS_LOWBOOT
+CONFIG_SYS_LOWBOOT16
+CONFIG_SYS_LOWBOOT32
+CONFIG_SYS_LOWMEM_BASE
+CONFIG_SYS_LOW_RES_TIMER
+CONFIG_SYS_LPAE_SDRAM_BASE
+CONFIG_SYS_LPC32XX_UART
+CONFIG_SYS_LS1_DDR_BLOCK1_SIZE
+CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
+CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH
+CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS
+CONFIG_SYS_LS_MC_DPC_ADDR
+CONFIG_SYS_LS_MC_DPC_IN_DDR
+CONFIG_SYS_LS_MC_DPC_IN_NOR
+CONFIG_SYS_LS_MC_DPC_MAX_LENGTH
+CONFIG_SYS_LS_MC_DPL_ADDR
+CONFIG_SYS_LS_MC_DPL_IN_DDR
+CONFIG_SYS_LS_MC_DPL_IN_NOR
+CONFIG_SYS_LS_MC_DPL_MAX_LENGTH
+CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
+CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
+CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
+CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
+CONFIG_SYS_LS_MC_FW_ADDR
+CONFIG_SYS_LS_MC_FW_IN_DDR
+CONFIG_SYS_LS_MC_FW_IN_NOR
+CONFIG_SYS_LS_PPA_FW_ADDR
+CONFIG_SYS_LS_PPA_FW_IN_XIP
+CONFIG_SYS_LS_PPA_FW_IN_xxx
+CONFIG_SYS_M41T11_BASE_YEAR
+CONFIG_SYS_M41T11_EXT_CENTURY_DATA
+CONFIG_SYS_MACB0_BASE
+CONFIG_SYS_MACB1_BASE
+CONFIG_SYS_MACB2_BASE
+CONFIG_SYS_MACB3_BASE
+CONFIG_SYS_MAIN_PWR_ON
+CONFIG_SYS_MALLOC_BASE
+CONFIG_SYS_MALLOC_CLEAR_ON_INIT
+CONFIG_SYS_MALLOC_END
+CONFIG_SYS_MALLOC_LEN
+CONFIG_SYS_MALLOC_SIMPLE
+CONFIG_SYS_MAMR
+CONFIG_SYS_MAMR_10COL
+CONFIG_SYS_MAMR_8COL
+CONFIG_SYS_MAMR_9COL
+CONFIG_SYS_MAMR_PTA
+CONFIG_SYS_MAPLE
+CONFIG_SYS_MAPLE_MEM_PHYS
+CONFIG_SYS_MAPPED_RAM_BASE
+CONFIG_SYS_MARUBUN_IO
+CONFIG_SYS_MARUBUN_MRSHPC
+CONFIG_SYS_MARUBUN_MW1
+CONFIG_SYS_MARUBUN_MW2
+CONFIG_SYS_MASK
+CONFIG_SYS_MASTER_CLOCK
+CONFIG_SYS_MATRIX_EBI0CSA_VAL
+CONFIG_SYS_MATRIX_EBICSA_VAL
+CONFIG_SYS_MATRIX_MCFG_REMAP
+CONFIG_SYS_MAXARGS
+CONFIG_SYS_MAXIDLE
+CONFIG_SYS_MAX_DATAFLASH_BANKS
+CONFIG_SYS_MAX_DDR_BAT_SIZE
+CONFIG_SYS_MAX_DOC_DEVICE
+CONFIG_SYS_MAX_FLASH_BANKS
+CONFIG_SYS_MAX_FLASH_BANKS_DETECT
+CONFIG_SYS_MAX_FLASH_SECT
+CONFIG_SYS_MAX_I2C_BUS
+CONFIG_SYS_MAX_MTD_BANKS
+CONFIG_SYS_MAX_NAND_CHIPS
+CONFIG_SYS_MAX_NAND_DEVICE
+CONFIG_SYS_MAX_PCI_EPS
+CONFIG_SYS_MAX_RAM_SIZE
+CONFIG_SYS_MB862xx_CCF
+CONFIG_SYS_MB862xx_MMR
+CONFIG_SYS_MBAR
+CONFIG_SYS_MBAR2
+CONFIG_SYS_MBYTES_RAM
+CONFIG_SYS_MBYTES_SDRAM
+CONFIG_SYS_MCATT0_VAL
+CONFIG_SYS_MCATT1_VAL
+CONFIG_SYS_MCFRRTC_BASE
+CONFIG_SYS_MCFRTC_BASE
+CONFIG_SYS_MCF_SYNCR
+CONFIG_SYS_MCIO0_VAL
+CONFIG_SYS_MCIO1_VAL
+CONFIG_SYS_MCKR
+CONFIG_SYS_MCKR1_VAL
+CONFIG_SYS_MCKR2_VAL
+CONFIG_SYS_MCKR_CSS
+CONFIG_SYS_MCKR_VAL
+CONFIG_SYS_MCLINK_MAX
+CONFIG_SYS_MCMEM0_VAL
+CONFIG_SYS_MCMEM1_VAL
+CONFIG_SYS_MC_RSV_MEM_ALIGN
+CONFIG_SYS_MDC1_PIN
+CONFIG_SYS_MDCNFG_VAL
+CONFIG_SYS_MDC_PIN
+CONFIG_SYS_MDDRCGRP_HIPRIO_CFG
+CONFIG_SYS_MDDRCGRP_LUT0_AL
+CONFIG_SYS_MDDRCGRP_LUT0_AU
+CONFIG_SYS_MDDRCGRP_LUT0_ML
+CONFIG_SYS_MDDRCGRP_LUT0_MU
+CONFIG_SYS_MDDRCGRP_LUT1_AL
+CONFIG_SYS_MDDRCGRP_LUT1_AU
+CONFIG_SYS_MDDRCGRP_LUT1_ML
+CONFIG_SYS_MDDRCGRP_LUT1_MU
+CONFIG_SYS_MDDRCGRP_LUT2_AL
+CONFIG_SYS_MDDRCGRP_LUT2_AU
+CONFIG_SYS_MDDRCGRP_LUT2_ML
+CONFIG_SYS_MDDRCGRP_LUT2_MU
+CONFIG_SYS_MDDRCGRP_LUT3_AL
+CONFIG_SYS_MDDRCGRP_LUT3_AU
+CONFIG_SYS_MDDRCGRP_LUT3_ML
+CONFIG_SYS_MDDRCGRP_LUT3_MU
+CONFIG_SYS_MDDRCGRP_LUT4_AL
+CONFIG_SYS_MDDRCGRP_LUT4_AU
+CONFIG_SYS_MDDRCGRP_LUT4_ML
+CONFIG_SYS_MDDRCGRP_LUT4_MU
+CONFIG_SYS_MDDRCGRP_PM_CFG1
+CONFIG_SYS_MDDRCGRP_PM_CFG2
+CONFIG_SYS_MDDRC_SYS_CFG
+CONFIG_SYS_MDDRC_SYS_CFG_ALT1
+CONFIG_SYS_MDDRC_SYS_CFG_ELPIDA
+CONFIG_SYS_MDDRC_SYS_CFG_EN
+CONFIG_SYS_MDDRC_TIME_CFG0
+CONFIG_SYS_MDDRC_TIME_CFG0_ALT1
+CONFIG_SYS_MDDRC_TIME_CFG1
+CONFIG_SYS_MDDRC_TIME_CFG1_ALT1
+CONFIG_SYS_MDDRC_TIME_CFG1_ELPIDA
+CONFIG_SYS_MDDRC_TIME_CFG2
+CONFIG_SYS_MDDRC_TIME_CFG2_ALT1
+CONFIG_SYS_MDDRC_TIME_CFG2_ELPIDA
+CONFIG_SYS_MDIO1_OFFSET
+CONFIG_SYS_MDIO1_PIN
+CONFIG_SYS_MDIO_BASE_ADDR
+CONFIG_SYS_MDIO_PIN
+CONFIG_SYS_MDMRS_VAL
+CONFIG_SYS_MDREFR_VAL
+CONFIG_SYS_MEASURE_CPUCLK
+CONFIG_SYS_MECR_VAL
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN
+CONFIG_SYS_MEMORY_BASE
+CONFIG_SYS_MEMORY_SIZE
+CONFIG_SYS_MEMORY_TOP
+CONFIG_SYS_MEMTEST_END
+CONFIG_SYS_MEMTEST_SCRATCH
+CONFIG_SYS_MEMTEST_START
+CONFIG_SYS_MEM_MAP
+CONFIG_SYS_MEM_RESERVE_SECURE
+CONFIG_SYS_MEM_SIZE
+CONFIG_SYS_MEM_TOP_HIDE
+CONFIG_SYS_MFD
+CONFIG_SYS_MHZ
+CONFIG_SYS_MICRON_BMODE
+CONFIG_SYS_MICRON_BMODE_PARAM
+CONFIG_SYS_MICRON_BMODE_RSTDLL
+CONFIG_SYS_MICRON_EMODE
+CONFIG_SYS_MICRON_EMODE2
+CONFIG_SYS_MICRON_EMODE3
+CONFIG_SYS_MICRON_EMODE_PARAM
+CONFIG_SYS_MICRON_EMR
+CONFIG_SYS_MICRON_EMR2
+CONFIG_SYS_MICRON_EMR3
+CONFIG_SYS_MICRON_EMR_OCD
+CONFIG_SYS_MICRON_INIT_DEV_OP
+CONFIG_SYS_MII_MODE
+CONFIG_SYS_MIPS_CACHE_MODE
+CONFIG_SYS_MIPS_TIMER_FREQ
+CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
+CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
+CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
+CONFIG_SYS_MMC_BASE
+CONFIG_SYS_MMC_CD_PIN
+CONFIG_SYS_MMC_CLK_OD
+CONFIG_SYS_MMC_ENV_DEV
+CONFIG_SYS_MMC_ENV_PART
+CONFIG_SYS_MMC_IMG_LOAD_PART
+CONFIG_SYS_MMC_MAX_BLK_COUNT
+CONFIG_SYS_MMC_MAX_DEVICE
+CONFIG_SYS_MMC_U_BOOT_DST
+CONFIG_SYS_MMC_U_BOOT_OFFS
+CONFIG_SYS_MMC_U_BOOT_SIZE
+CONFIG_SYS_MMC_U_BOOT_START
+CONFIG_SYS_MMDC_CORE_ADDR_PARTITION
+CONFIG_SYS_MMDC_CORE_CONTROL_1
+CONFIG_SYS_MMDC_CORE_CONTROL_2
+CONFIG_SYS_MMDC_CORE_MISC
+CONFIG_SYS_MMDC_CORE_ODT_TIMING
+CONFIG_SYS_MMDC_CORE_OUT_OF_RESET_DELAY
+CONFIG_SYS_MMDC_CORE_PWR_DOWN_CTRL
+CONFIG_SYS_MMDC_CORE_PWR_SAV_CTRL_STAT
+CONFIG_SYS_MMDC_CORE_RDWR_CMD_DELAY
+CONFIG_SYS_MMDC_CORE_REFRESH_CTL
+CONFIG_SYS_MMDC_CORE_TIMING_CFG_0
+CONFIG_SYS_MMDC_CORE_TIMING_CFG_1
+CONFIG_SYS_MMDC_CORE_TIMING_CFG_2
+CONFIG_SYS_MMDC_PHY_MEASURE_UNIT
+CONFIG_SYS_MMDC_PHY_ODT_CTRL
+CONFIG_SYS_MMDC_PHY_RD_DLY_LINES_CFG
+CONFIG_SYS_MMDC_PHY_ZQ_HW_CTRL
+CONFIG_SYS_MM_TOP_HIDE
+CONFIG_SYS_MONITOR_
+CONFIG_SYS_MONITOR_BASE
+CONFIG_SYS_MONITOR_BASE_EARLY
+CONFIG_SYS_MONITOR_LEN
+CONFIG_SYS_MONITOR_SEC
+CONFIG_SYS_MOR_VAL
+CONFIG_SYS_MPC512X_CLKIN
+CONFIG_SYS_MPC512x_USB1_ADDR
+CONFIG_SYS_MPC512x_USB1_OFFSET
+CONFIG_SYS_MPC5XXX_CLKIN
+CONFIG_SYS_MPC83xx_DMA_ADDR
+CONFIG_SYS_MPC83xx_DMA_OFFSET
+CONFIG_SYS_MPC83xx_ESDHC_ADDR
+CONFIG_SYS_MPC83xx_ESDHC_OFFSET
+CONFIG_SYS_MPC83xx_USB1_ADDR
+CONFIG_SYS_MPC83xx_USB1_OFFSET
+CONFIG_SYS_MPC83xx_USB2_ADDR
+CONFIG_SYS_MPC83xx_USB2_OFFSET
+CONFIG_SYS_MPC85XX_NO_RESETVEC
+CONFIG_SYS_MPC85xx_CPM_ADDR
+CONFIG_SYS_MPC85xx_CPM_OFFSET
+CONFIG_SYS_MPC85xx_DMA
+CONFIG_SYS_MPC85xx_DMA1_OFFSET
+CONFIG_SYS_MPC85xx_DMA2_OFFSET
+CONFIG_SYS_MPC85xx_DMA3_OFFSET
+CONFIG_SYS_MPC85xx_DMA_ADDR
+CONFIG_SYS_MPC85xx_DMA_OFFSET
+CONFIG_SYS_MPC85xx_ECM_ADDR
+CONFIG_SYS_MPC85xx_ECM_OFFSET
+CONFIG_SYS_MPC85xx_ESDHC_ADDR
+CONFIG_SYS_MPC85xx_ESDHC_OFFSET
+CONFIG_SYS_MPC85xx_ESPI_ADDR
+CONFIG_SYS_MPC85xx_ESPI_OFFSET
+CONFIG_SYS_MPC85xx_GPIO3_ADDR
+CONFIG_SYS_MPC85xx_GPIO_ADDR
+CONFIG_SYS_MPC85xx_GPIO_OFFSET
+CONFIG_SYS_MPC85xx_GUTS_ADDR
+CONFIG_SYS_MPC85xx_GUTS_OFFSET
+CONFIG_SYS_MPC85xx_IFC_OFFSET
+CONFIG_SYS_MPC85xx_L2_ADDR
+CONFIG_SYS_MPC85xx_L2_OFFSET
+CONFIG_SYS_MPC85xx_LBC_OFFSET
+CONFIG_SYS_MPC85xx_PCI1_OFFSET
+CONFIG_SYS_MPC85xx_PCI2_OFFSET
+CONFIG_SYS_MPC85xx_PCIE
+CONFIG_SYS_MPC85xx_PCIE1_OFFSET
+CONFIG_SYS_MPC85xx_PCIE2_OFFSET
+CONFIG_SYS_MPC85xx_PCIE3_OFFSET
+CONFIG_SYS_MPC85xx_PCIE4_OFFSET
+CONFIG_SYS_MPC85xx_PCIX2_ADDR
+CONFIG_SYS_MPC85xx_PCIX2_OFFSET
+CONFIG_SYS_MPC85xx_PCIX_ADDR
+CONFIG_SYS_MPC85xx_PCIX_OFFSET
+CONFIG_SYS_MPC85xx_PIC_OFFSET
+CONFIG_SYS_MPC85xx_QE_OFFSET
+CONFIG_SYS_MPC85xx_SATA
+CONFIG_SYS_MPC85xx_SATA1_ADDR
+CONFIG_SYS_MPC85xx_SATA1_OFFSET
+CONFIG_SYS_MPC85xx_SATA2_ADDR
+CONFIG_SYS_MPC85xx_SATA2_OFFSET
+CONFIG_SYS_MPC85xx_SCFG
+CONFIG_SYS_MPC85xx_SCFG_OFFSET
+CONFIG_SYS_MPC85xx_SERDES1_ADDR
+CONFIG_SYS_MPC85xx_SERDES1_OFFSET
+CONFIG_SYS_MPC85xx_SERDES2_ADDR
+CONFIG_SYS_MPC85xx_SERDES2_OFFSET
+CONFIG_SYS_MPC85xx_TDM_OFFSET
+CONFIG_SYS_MPC85xx_USB
+CONFIG_SYS_MPC85xx_USB1_ADDR
+CONFIG_SYS_MPC85xx_USB1_OFFSET
+CONFIG_SYS_MPC85xx_USB1_PHY_ADDR
+CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET
+CONFIG_SYS_MPC85xx_USB2_ADDR
+CONFIG_SYS_MPC85xx_USB2_OFFSET
+CONFIG_SYS_MPC85xx_USB2_PHY_ADDR
+CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET
+CONFIG_SYS_MPC86xx_DMA_ADDR
+CONFIG_SYS_MPC86xx_DMA_OFFSET
+CONFIG_SYS_MPC86xx_PCI1_OFFSET
+CONFIG_SYS_MPC86xx_PCI2_OFFSET
+CONFIG_SYS_MPC86xx_PCIE1_OFFSET
+CONFIG_SYS_MPC86xx_PCIE2_OFFSET
+CONFIG_SYS_MPC86xx_PIC_OFFSET
+CONFIG_SYS_MPC8xxx_DDR2_OFFSET
+CONFIG_SYS_MPC8xxx_DDR3_OFFSET
+CONFIG_SYS_MPC8xxx_DDR_OFFSET
+CONFIG_SYS_MPC8xxx_GUTS_ADDR
+CONFIG_SYS_MPC8xxx_PIC_ADDR
+CONFIG_SYS_MPC92469AC
+CONFIG_SYS_MPEG_BASE
+CONFIG_SYS_MPEG_SIZE
+CONFIG_SYS_MPTPR
+CONFIG_SYS_MPTPR_1BK_2K
+CONFIG_SYS_MPTPR_1BK_4K
+CONFIG_SYS_MPTPR_1BK_8K
+CONFIG_SYS_MPTPR_2BK_2K
+CONFIG_SYS_MPTPR_2BK_4K
+CONFIG_SYS_MPTPR_2BK_8K
+CONFIG_SYS_MPUCLK
+CONFIG_SYS_MRAM_BASE
+CONFIG_SYS_MRAM_SIZE
+CONFIG_SYS_MRS_OFFS
+CONFIG_SYS_MSC0_VAL
+CONFIG_SYS_MSC1_VAL
+CONFIG_SYS_MSC2_VAL
+CONFIG_SYS_MTDPARTS_RUNTIME
+CONFIG_SYS_MVEBU_PLL_CLOCK
+CONFIG_SYS_MVFS
+CONFIG_SYS_MX5_CLK32
+CONFIG_SYS_MX5_HCLK
+CONFIG_SYS_MX6_CLK32
+CONFIG_SYS_MX6_HCLK
+CONFIG_SYS_MX7_CLK32
+CONFIG_SYS_MX7_HCLK
+CONFIG_SYS_MXC_I2C1_SLAVE
+CONFIG_SYS_MXC_I2C1_SPEED
+CONFIG_SYS_MXC_I2C2_SLAVE
+CONFIG_SYS_MXC_I2C2_SPEED
+CONFIG_SYS_MXC_I2C3_SLAVE
+CONFIG_SYS_MXC_I2C3_SPEED
+CONFIG_SYS_MXC_I2C4_SLAVE
+CONFIG_SYS_MXC_I2C4_SPEED
+CONFIG_SYS_MXS_VDD5V_ONLY
+CONFIG_SYS_NAND2_ADDR
+CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
+CONFIG_SYS_NAND_4_ADDR_CYCLE
+CONFIG_SYS_NAND_5_ADDR_CYCLE
+CONFIG_SYS_NAND_ACTL_ALE
+CONFIG_SYS_NAND_ACTL_CLE
+CONFIG_SYS_NAND_ACTL_DELAY
+CONFIG_SYS_NAND_ACTL_NCE
+CONFIG_SYS_NAND_ADDR
+CONFIG_SYS_NAND_ALE
+CONFIG_SYS_NAND_AMASK
+CONFIG_SYS_NAND_BAD_BLOCK_POS
+CONFIG_SYS_NAND_BASE
+CONFIG_SYS_NAND_BASE2
+CONFIG_SYS_NAND_BASE_LIST
+CONFIG_SYS_NAND_BASE_PHYS
+CONFIG_SYS_NAND_BCR
+CONFIG_SYS_NAND_BLOCK_SIZE
+CONFIG_SYS_NAND_BOOT
+CONFIG_SYS_NAND_BR_PRELIM
+CONFIG_SYS_NAND_BUSWIDTH_16
+CONFIG_SYS_NAND_BUSWIDTH_16_BIT
+CONFIG_SYS_NAND_CE
+CONFIG_SYS_NAND_CLE
+CONFIG_SYS_NAND_CS
+CONFIG_SYS_NAND_CSOR
+CONFIG_SYS_NAND_CSPR
+CONFIG_SYS_NAND_CSPR_EXT
+CONFIG_SYS_NAND_DATA_BASE
+CONFIG_SYS_NAND_DBW_16
+CONFIG_SYS_NAND_DBW_8
+CONFIG_SYS_NAND_DDR_LAW
+CONFIG_SYS_NAND_ECCBYTES
+CONFIG_SYS_NAND_ECCPOS
+CONFIG_SYS_NAND_ECCSIZE
+CONFIG_SYS_NAND_ECCSTEPS
+CONFIG_SYS_NAND_ECCTOTAL
+CONFIG_SYS_NAND_ECC_BASE
+CONFIG_SYS_NAND_ENABLE_PIN
+CONFIG_SYS_NAND_ENABLE_PIN_SPL
+CONFIG_SYS_NAND_FTIM0
+CONFIG_SYS_NAND_FTIM1
+CONFIG_SYS_NAND_FTIM2
+CONFIG_SYS_NAND_FTIM3
+CONFIG_SYS_NAND_HW_ECC
+CONFIG_SYS_NAND_HW_ECC_OOBFIRST
+CONFIG_SYS_NAND_LARGEPAGE
+CONFIG_SYS_NAND_LBLAWAR_PRELIM
+CONFIG_SYS_NAND_LBLAWBAR_PRELIM
+CONFIG_SYS_NAND_MASK_ALE
+CONFIG_SYS_NAND_MASK_CLE
+CONFIG_SYS_NAND_MAX_CHIPS
+CONFIG_SYS_NAND_MAX_ECCPOS
+CONFIG_SYS_NAND_MAX_OOBFREE
+CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
+CONFIG_SYS_NAND_NO_SUBPAGE
+CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
+CONFIG_SYS_NAND_ONFI_DETECTION
+CONFIG_SYS_NAND_OOBSIZE
+CONFIG_SYS_NAND_OR_PRELIM
+CONFIG_SYS_NAND_PAGE_2K
+CONFIG_SYS_NAND_PAGE_4K
+CONFIG_SYS_NAND_PAGE_COUNT
+CONFIG_SYS_NAND_PAGE_SIZE
+CONFIG_SYS_NAND_QUIET
+CONFIG_SYS_NAND_RDY
+CONFIG_SYS_NAND_READY_PIN
+CONFIG_SYS_NAND_REGS_BASE
+CONFIG_SYS_NAND_SELECT_DEVICE
+CONFIG_SYS_NAND_SIZE
+CONFIG_SYS_NAND_SKIP_BAD_DOT_I
+CONFIG_SYS_NAND_SPL_KERNEL_OFFS
+CONFIG_SYS_NAND_SPL_SIZE
+CONFIG_SYS_NAND_USE_FLASH_BBT
+CONFIG_SYS_NAND_U_BOOT_DST
+CONFIG_SYS_NAND_U_BOOT_RELOC
+CONFIG_SYS_NAND_U_BOOT_RELOC_SP
+CONFIG_SYS_NAND_U_BOOT_SIZE
+CONFIG_SYS_NAND_U_BOOT_START
+CONFIG_SYS_NAND_WINDOW_SIZE
+CONFIG_SYS_NDFC_EBC0_CFG
+CONFIG_SYS_NETA_INTERFACE_TYPE
+CONFIG_SYS_NONCACHED_MEMORY
+CONFIG_SYS_NOR0_CSPR
+CONFIG_SYS_NOR0_CSPR_EARLY
+CONFIG_SYS_NOR0_CSPR_EXT
+CONFIG_SYS_NOR1SZ
+CONFIG_SYS_NOR1_CSPR
+CONFIG_SYS_NOR1_CSPR_EARLY
+CONFIG_SYS_NOR1_CSPR_EXT
+CONFIG_SYS_NOR_AMASK
+CONFIG_SYS_NOR_AMASK_EARLY
+CONFIG_SYS_NOR_BR_PRELIM
+CONFIG_SYS_NOR_CS
+CONFIG_SYS_NOR_CSOR
+CONFIG_SYS_NOR_CSPR
+CONFIG_SYS_NOR_CSPR_EXT
+CONFIG_SYS_NOR_FTIM0
+CONFIG_SYS_NOR_FTIM1
+CONFIG_SYS_NOR_FTIM2
+CONFIG_SYS_NOR_FTIM3
+CONFIG_SYS_NOR_OR_PRELIM
+CONFIG_SYS_NO_DCACHE
+CONFIG_SYS_NR_PIOS
+CONFIG_SYS_NR_VM_REGIONS
+CONFIG_SYS_NS16550_CLK
+CONFIG_SYS_NS16550_CLK_DIV
+CONFIG_SYS_NS16550_COM1
+CONFIG_SYS_NS16550_COM2
+CONFIG_SYS_NS16550_COM3
+CONFIG_SYS_NS16550_COM4
+CONFIG_SYS_NS16550_COM5
+CONFIG_SYS_NS16550_COM6
+CONFIG_SYS_NS16550_IER
+CONFIG_SYS_NS16550_MEM32
+CONFIG_SYS_NS16550_PORT_MAPPED
+CONFIG_SYS_NS16550_REG_SIZE
+CONFIG_SYS_NS16550_SERIAL
+CONFIG_SYS_NS87308_CS0_BASE
+CONFIG_SYS_NS87308_CS0_CONF
+CONFIG_SYS_NS87308_CS1_BASE
+CONFIG_SYS_NS87308_CS1_CONF
+CONFIG_SYS_NS87308_CS2_BASE
+CONFIG_SYS_NS87308_CS2_CONF
+CONFIG_SYS_NS87308_FDC
+CONFIG_SYS_NS87308_FDC_BASE
+CONFIG_SYS_NS87308_GPIO
+CONFIG_SYS_NS87308_GPIO_BASE
+CONFIG_SYS_NS87308_KBC1
+CONFIG_SYS_NS87308_KBC1_BASE
+CONFIG_SYS_NS87308_KBC2
+CONFIG_SYS_NS87308_LPT_BASE
+CONFIG_SYS_NS87308_MOUSE
+CONFIG_SYS_NS87308_PARP
+CONFIG_SYS_NS87308_PMC1
+CONFIG_SYS_NS87308_PMC2
+CONFIG_SYS_NS87308_PMC3
+CONFIG_SYS_NS87308_POWRMAN
+CONFIG_SYS_NS87308_PS2MOD
+CONFIG_SYS_NS87308_PWMAN_BASE
+CONFIG_SYS_NS87308_RARP
+CONFIG_SYS_NS87308_RTC_APC
+CONFIG_SYS_NS87308_RTC_BASE
+CONFIG_SYS_NS87308_UART1
+CONFIG_SYS_NS87308_UART1_BASE
+CONFIG_SYS_NS87308_UART2
+CONFIG_SYS_NS87308_UART2_BASE
+CONFIG_SYS_NUM_ADDR_MAP
+CONFIG_SYS_NUM_CPC
+CONFIG_SYS_NUM_DDR_CTLRS
+CONFIG_SYS_NUM_FM1_10GEC
+CONFIG_SYS_NUM_FM1_DTSEC
+CONFIG_SYS_NUM_FM2_10GEC
+CONFIG_SYS_NUM_FM2_DTSEC
+CONFIG_SYS_NUM_FMAN
+CONFIG_SYS_NUM_I2C_BUSES
+CONFIG_SYS_NUM_IRQS
+CONFIG_SYS_NUM_TLBCAMS
+CONFIG_SYS_NVRAM_ACCESS_ROUTINE
+CONFIG_SYS_NVRAM_BASE
+CONFIG_SYS_NVRAM_BASE_ADDR
+CONFIG_SYS_NVRAM_SIZE
+CONFIG_SYS_OBIR
+CONFIG_SYS_OCM_BASE
+CONFIG_SYS_OCM_DATA_ADDR
+CONFIG_SYS_OCM_DATA_SIZE
+CONFIG_SYS_OCM_SIZE
+CONFIG_SYS_OCM_STATUS_ADDR
+CONFIG_SYS_OCM_STATUS_FAIL
+CONFIG_SYS_OCM_STATUS_MASK
+CONFIG_SYS_OCM_STATUS_OK
+CONFIG_SYS_OHCI_BE_CONTROLLER
+CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+CONFIG_SYS_OHCI_USE_NPS
+CONFIG_SYS_OMAP24_I2C_SLAVE
+CONFIG_SYS_OMAP24_I2C_SLAVE1
+CONFIG_SYS_OMAP24_I2C_SLAVE2
+CONFIG_SYS_OMAP24_I2C_SLAVE3
+CONFIG_SYS_OMAP24_I2C_SLAVE4
+CONFIG_SYS_OMAP24_I2C_SPEED
+CONFIG_SYS_OMAP24_I2C_SPEED1
+CONFIG_SYS_OMAP24_I2C_SPEED2
+CONFIG_SYS_OMAP24_I2C_SPEED3
+CONFIG_SYS_OMAP24_I2C_SPEED4
+CONFIG_SYS_OMAP24_I2C_SPEED_PSOC
+CONFIG_SYS_OMAP_ABE_SYSCK
+CONFIG_SYS_ONENAND_BASE
+CONFIG_SYS_ONENAND_BLOCK_SIZE
+CONFIG_SYS_ONENAND_PAGE_SIZE
+CONFIG_SYS_OPENRISC_TMR_HZ
+CONFIG_SYS_OPER_FLASH
+CONFIG_SYS_OR0_64M
+CONFIG_SYS_OR0_8M
+CONFIG_SYS_OR0_PRELIM
+CONFIG_SYS_OR0_REMAP
+CONFIG_SYS_OR1
+CONFIG_SYS_OR10_PRELIM
+CONFIG_SYS_OR11_PRELIM
+CONFIG_SYS_OR1_PRELIM
+CONFIG_SYS_OR1_REMAP
+CONFIG_SYS_OR2_PRELIM
+CONFIG_SYS_OR3_CAN
+CONFIG_SYS_OR3_PRELIM
+CONFIG_SYS_OR4_PRELIM
+CONFIG_SYS_OR5_ISP1362
+CONFIG_SYS_OR5_PRELIM
+CONFIG_SYS_OR5_REMAP
+CONFIG_SYS_OR6_64M
+CONFIG_SYS_OR6_8M
+CONFIG_SYS_OR6_PRELIM
+CONFIG_SYS_OR7_PRELIM
+CONFIG_SYS_OR8_PRELIM
+CONFIG_SYS_OR9_PRELIM
+CONFIG_SYS_OR_TIMING_FLASH
+CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ
+CONFIG_SYS_OR_TIMING_MRAM
+CONFIG_SYS_OR_TIMING_SDRAM
+CONFIG_SYS_OSC0_HZ
+CONFIG_SYS_OSC1_HZ
+CONFIG_SYS_OSCIN_FREQ
+CONFIG_SYS_OSC_CLK
+CONFIG_SYS_OSD_DH
+CONFIG_SYS_OSD_SCREENS
+CONFIG_SYS_OSPR_OFFSET
+CONFIG_SYS_OS_BASE
+CONFIG_SYS_P4080_ERRATUM_CPU22
+CONFIG_SYS_P4080_ERRATUM_PCIE_A003
+CONFIG_SYS_P4080_ERRATUM_SERDES8
+CONFIG_SYS_P4080_ERRATUM_SERDES9
+CONFIG_SYS_P4080_ERRATUM_SERDES_A001
+CONFIG_SYS_P4080_ERRATUM_SERDES_A005
+CONFIG_SYS_PACNT
+CONFIG_SYS_PADAT
+CONFIG_SYS_PADDR
+CONFIG_SYS_PAGE_SIZE
+CONFIG_SYS_PAMU_ADDR
+CONFIG_SYS_PASPAR
+CONFIG_SYS_PAXE_BASE
+CONFIG_SYS_PAXE_SIZE
+CONFIG_SYS_PBCNT
+CONFIG_SYS_PBDAT
+CONFIG_SYS_PBDDR
+CONFIG_SYS_PBI_FLASH_BASE
+CONFIG_SYS_PBI_FLASH_WINDOW
+CONFIG_SYS_PBSIZE
+CONFIG_SYS_PB_LED
+CONFIG_SYS_PCA953X_BRD_CFG0
+CONFIG_SYS_PCA953X_BRD_CFG1
+CONFIG_SYS_PCA953X_BRD_CFG2
+CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS
+CONFIG_SYS_PCA953X_C0_SER0_EN
+CONFIG_SYS_PCA953X_C0_SER0_MODE
+CONFIG_SYS_PCA953X_C0_SER1_EN
+CONFIG_SYS_PCA953X_C0_SER1_MODE
+CONFIG_SYS_PCA953X_C0_VCORE_VID2
+CONFIG_SYS_PCA953X_C0_VCORE_VID3
+CONFIG_SYS_PCA953X_EREADY
+CONFIG_SYS_PCA953X_FLASH_PASS_CS
+CONFIG_SYS_PCA953X_GPIO_VPX0
+CONFIG_SYS_PCA953X_GPIO_VPX1
+CONFIG_SYS_PCA953X_GPIO_VPX2
+CONFIG_SYS_PCA953X_GPIO_VPX3
+CONFIG_SYS_PCA953X_MC_GPIO0
+CONFIG_SYS_PCA953X_MC_GPIO1
+CONFIG_SYS_PCA953X_MC_GPIO2
+CONFIG_SYS_PCA953X_MC_GPIO3
+CONFIG_SYS_PCA953X_MC_GPIO4
+CONFIG_SYS_PCA953X_MC_GPIO5
+CONFIG_SYS_PCA953X_MC_GPIO6
+CONFIG_SYS_PCA953X_MC_GPIO7
+CONFIG_SYS_PCA953X_MONARCH
+CONFIG_SYS_PCA953X_NVM_WP
+CONFIG_SYS_PCA953X_P0_GA0
+CONFIG_SYS_PCA953X_P0_GA1
+CONFIG_SYS_PCA953X_P0_GA2
+CONFIG_SYS_PCA953X_P0_GA3
+CONFIG_SYS_PCA953X_P0_GA4
+CONFIG_SYS_PCA953X_P0_GAP
+CONFIG_SYS_PCA953X_P14_IO0
+CONFIG_SYS_PCA953X_P14_IO1
+CONFIG_SYS_PCA953X_P14_IO2
+CONFIG_SYS_PCA953X_P14_IO3
+CONFIG_SYS_PCA953X_P14_IO4
+CONFIG_SYS_PCA953X_P14_IO5
+CONFIG_SYS_PCA953X_P14_IO6
+CONFIG_SYS_PCA953X_P14_IO7
+CONFIG_SYS_PCA953X_P1_SYSEN
+CONFIG_SYS_PCA953X_PLUG_GPIO0
+CONFIG_SYS_PCA953X_PMC0_EREADY
+CONFIG_SYS_PCA953X_PMC0_MONARCH
+CONFIG_SYS_PCA953X_PMC_EREADY
+CONFIG_SYS_PCA953X_PMC_MONARCH
+CONFIG_SYS_PCA953X_PMC_PRESENT
+CONFIG_SYS_PCA953X_VPX_FRU_WRCTL
+CONFIG_SYS_PCA953X_VPX_GPIO0
+CONFIG_SYS_PCA953X_VPX_GPIO1
+CONFIG_SYS_PCA953X_VPX_GPIO2
+CONFIG_SYS_PCA953X_VPX_GPIO3
+CONFIG_SYS_PCA953X_XMC0_BIST
+CONFIG_SYS_PCA953X_XMC0_MVMR0
+CONFIG_SYS_PCA953X_XMC0_ROOT0
+CONFIG_SYS_PCA953X_XMC0_WAKE
+CONFIG_SYS_PCA953X_XMC_BIST
+CONFIG_SYS_PCA953X_XMC_GA0
+CONFIG_SYS_PCA953X_XMC_GA1
+CONFIG_SYS_PCA953X_XMC_GA2
+CONFIG_SYS_PCA953X_XMC_PRESENT
+CONFIG_SYS_PCA953X_XMC_ROOT0
+CONFIG_SYS_PCA953X_XMC_WAKE
+CONFIG_SYS_PCCNT
+CONFIG_SYS_PCDAT
+CONFIG_SYS_PCDDR
+CONFIG_SYS_PCI
+CONFIG_SYS_PCI0_IO_SPACE
+CONFIG_SYS_PCI1_ADDR
+CONFIG_SYS_PCI1_IO_BASE
+CONFIG_SYS_PCI1_IO_BUS
+CONFIG_SYS_PCI1_IO_PHYS
+CONFIG_SYS_PCI1_IO_SIZE
+CONFIG_SYS_PCI1_IO_VIRT
+CONFIG_SYS_PCI1_MEM_BASE
+CONFIG_SYS_PCI1_MEM_BUS
+CONFIG_SYS_PCI1_MEM_PHYS
+CONFIG_SYS_PCI1_MEM_SIZE
+CONFIG_SYS_PCI1_MEM_VIRT
+CONFIG_SYS_PCI1_MMIO_BASE
+CONFIG_SYS_PCI1_MMIO_PHYS
+CONFIG_SYS_PCI1_MMIO_SIZE
+CONFIG_SYS_PCI2_ADDR
+CONFIG_SYS_PCI2_IO_BASE
+CONFIG_SYS_PCI2_IO_BUS
+CONFIG_SYS_PCI2_IO_PHYS
+CONFIG_SYS_PCI2_IO_SIZE
+CONFIG_SYS_PCI2_IO_VIRT
+CONFIG_SYS_PCI2_MEM_BASE
+CONFIG_SYS_PCI2_MEM_BUS
+CONFIG_SYS_PCI2_MEM_PHYS
+CONFIG_SYS_PCI2_MEM_SIZE
+CONFIG_SYS_PCI2_MEM_VIRT
+CONFIG_SYS_PCI2_MMIO_BASE
+CONFIG_SYS_PCI2_MMIO_PHYS
+CONFIG_SYS_PCI2_MMIO_SIZE
+CONFIG_SYS_PCI64_MEMORY_BUS
+CONFIG_SYS_PCI9054_IOBASE
+CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
+CONFIG_SYS_PCIE
+CONFIG_SYS_PCIE0_CFGBASE
+CONFIG_SYS_PCIE0_CFGMASK
+CONFIG_SYS_PCIE0_MEMBASE
+CONFIG_SYS_PCIE0_REGBASE
+CONFIG_SYS_PCIE0_UTLBASE
+CONFIG_SYS_PCIE0_XCFGBASE
+CONFIG_SYS_PCIE1_ADDR
+CONFIG_SYS_PCIE1_BASE
+CONFIG_SYS_PCIE1_CFGBASE
+CONFIG_SYS_PCIE1_CFGMASK
+CONFIG_SYS_PCIE1_CFG_BASE
+CONFIG_SYS_PCIE1_CFG_SIZE
+CONFIG_SYS_PCIE1_IO_BASE
+CONFIG_SYS_PCIE1_IO_BUS
+CONFIG_SYS_PCIE1_IO_PHYS
+CONFIG_SYS_PCIE1_IO_PHYS_LOW
+CONFIG_SYS_PCIE1_IO_SIZE
+CONFIG_SYS_PCIE1_IO_VIRT
+CONFIG_SYS_PCIE1_MEMBASE
+CONFIG_SYS_PCIE1_MEM_BASE
+CONFIG_SYS_PCIE1_MEM_BUS
+CONFIG_SYS_PCIE1_MEM_PHYS
+CONFIG_SYS_PCIE1_MEM_PHYS_HIGH
+CONFIG_SYS_PCIE1_MEM_PHYS_LOW
+CONFIG_SYS_PCIE1_MEM_SIZE
+CONFIG_SYS_PCIE1_MEM_VIRT
+CONFIG_SYS_PCIE1_NAME
+CONFIG_SYS_PCIE1_PHYS_ADDR
+CONFIG_SYS_PCIE1_PHYS_BASE
+CONFIG_SYS_PCIE1_PHYS_SIZE
+CONFIG_SYS_PCIE1_REGBASE
+CONFIG_SYS_PCIE1_UTLBASE
+CONFIG_SYS_PCIE1_VIRT_ADDR
+CONFIG_SYS_PCIE1_XCFGBASE
+CONFIG_SYS_PCIE2_ADDR
+CONFIG_SYS_PCIE2_BASE
+CONFIG_SYS_PCIE2_CFGBASE
+CONFIG_SYS_PCIE2_CFG_BASE
+CONFIG_SYS_PCIE2_CFG_SIZE
+CONFIG_SYS_PCIE2_IO_BASE
+CONFIG_SYS_PCIE2_IO_BUS
+CONFIG_SYS_PCIE2_IO_PHYS
+CONFIG_SYS_PCIE2_IO_PHYS_LOW
+CONFIG_SYS_PCIE2_IO_SIZE
+CONFIG_SYS_PCIE2_IO_VIRT
+CONFIG_SYS_PCIE2_MEM_BASE
+CONFIG_SYS_PCIE2_MEM_BUS
+CONFIG_SYS_PCIE2_MEM_PHYS
+CONFIG_SYS_PCIE2_MEM_PHYS_HIGH
+CONFIG_SYS_PCIE2_MEM_PHYS_LOW
+CONFIG_SYS_PCIE2_MEM_SIZE
+CONFIG_SYS_PCIE2_MEM_VIRT
+CONFIG_SYS_PCIE2_NAME
+CONFIG_SYS_PCIE2_PHYS_ADDR
+CONFIG_SYS_PCIE2_PHYS_BASE
+CONFIG_SYS_PCIE2_PHYS_SIZE
+CONFIG_SYS_PCIE2_REGBASE
+CONFIG_SYS_PCIE2_VIRT_ADDR
+CONFIG_SYS_PCIE2_XCFGBASE
+CONFIG_SYS_PCIE3_ADDR
+CONFIG_SYS_PCIE3_IO_BUS
+CONFIG_SYS_PCIE3_IO_PHYS
+CONFIG_SYS_PCIE3_IO_SIZE
+CONFIG_SYS_PCIE3_IO_VIRT
+CONFIG_SYS_PCIE3_MEM_BUS
+CONFIG_SYS_PCIE3_MEM_BUS2
+CONFIG_SYS_PCIE3_MEM_PHYS
+CONFIG_SYS_PCIE3_MEM_PHYS2
+CONFIG_SYS_PCIE3_MEM_SIZE
+CONFIG_SYS_PCIE3_MEM_SIZE2
+CONFIG_SYS_PCIE3_MEM_VIRT
+CONFIG_SYS_PCIE3_MEM_VIRT2
+CONFIG_SYS_PCIE3_NAME
+CONFIG_SYS_PCIE3_PHYS_ADDR
+CONFIG_SYS_PCIE3_PHYS_SIZE
+CONFIG_SYS_PCIE4_ADDR
+CONFIG_SYS_PCIE4_IO_BUS
+CONFIG_SYS_PCIE4_IO_PHYS
+CONFIG_SYS_PCIE4_IO_SIZE
+CONFIG_SYS_PCIE4_IO_VIRT
+CONFIG_SYS_PCIE4_MEM_BUS
+CONFIG_SYS_PCIE4_MEM_PHYS
+CONFIG_SYS_PCIE4_MEM_SIZE
+CONFIG_SYS_PCIE4_MEM_VIRT
+CONFIG_SYS_PCIE4_NAME
+CONFIG_SYS_PCIE4_PHYS_ADDR
+CONFIG_SYS_PCIE4_PHYS_SIZE
+CONFIG_SYS_PCIE_ADDR_HIGH
+CONFIG_SYS_PCIE_BASE
+CONFIG_SYS_PCIE_CFG0_PHYS_OFF
+CONFIG_SYS_PCIE_CFG0_SIZE
+CONFIG_SYS_PCIE_CFG1_PHYS_OFF
+CONFIG_SYS_PCIE_CFG1_SIZE
+CONFIG_SYS_PCIE_INBOUND_BASE
+CONFIG_SYS_PCIE_IO_BUS
+CONFIG_SYS_PCIE_IO_PHYS_OFF
+CONFIG_SYS_PCIE_IO_SIZE
+CONFIG_SYS_PCIE_MEMBASE
+CONFIG_SYS_PCIE_MEMSIZE
+CONFIG_SYS_PCIE_MEM_BUS
+CONFIG_SYS_PCIE_MEM_PHYS_OFF
+CONFIG_SYS_PCIE_MEM_SIZE
+CONFIG_SYS_PCIE_MMAP_SIZE
+CONFIG_SYS_PCIE_NR_PORTS
+CONFIG_SYS_PCIE_PHYS
+CONFIG_SYS_PCIE_VIRT
+CONFIG_SYS_PCIMSK0_MASK
+CONFIG_SYS_PCIMSK1_MASK
+CONFIG_SYS_PCISPEED_66
+CONFIG_SYS_PCI_64BIT
+CONFIG_SYS_PCI_BAR0
+CONFIG_SYS_PCI_BAR1
+CONFIG_SYS_PCI_BAR2
+CONFIG_SYS_PCI_BAR3
+CONFIG_SYS_PCI_BAR4
+CONFIG_SYS_PCI_BAR5
+CONFIG_SYS_PCI_BASE
+CONFIG_SYS_PCI_BOARD_FIXUP_IRQ
+CONFIG_SYS_PCI_CACHE_LINE_SIZE
+CONFIG_SYS_PCI_CFG_BASE
+CONFIG_SYS_PCI_CFG_BUS
+CONFIG_SYS_PCI_CFG_PHYS
+CONFIG_SYS_PCI_CFG_SIZE
+CONFIG_SYS_PCI_CLASSCODE
+CONFIG_SYS_PCI_CLASSCODE_MONARCH
+CONFIG_SYS_PCI_CLASSCODE_NONMONARCH
+CONFIG_SYS_PCI_CON_DEVICE
+CONFIG_SYS_PCI_EP_MEMORY_BASE
+CONFIG_SYS_PCI_FORCE_PCI_CONV
+CONFIG_SYS_PCI_IO_BASE
+CONFIG_SYS_PCI_IO_BUS
+CONFIG_SYS_PCI_IO_PHYS
+CONFIG_SYS_PCI_IO_SIZE
+CONFIG_SYS_PCI_MAP_END
+CONFIG_SYS_PCI_MAP_START
+CONFIG_SYS_PCI_MASTER_INIT
+CONFIG_SYS_PCI_MEMBASE
+CONFIG_SYS_PCI_MEMBASE1
+CONFIG_SYS_PCI_MEMBASE2
+CONFIG_SYS_PCI_MEMBASE3
+CONFIG_SYS_PCI_MEMORY_BUS
+CONFIG_SYS_PCI_MEMORY_PHYS
+CONFIG_SYS_PCI_MEMORY_SIZE
+CONFIG_SYS_PCI_MEMSIZE
+CONFIG_SYS_PCI_MEM_BASE
+CONFIG_SYS_PCI_MEM_BUS
+CONFIG_SYS_PCI_MEM_PHYS
+CONFIG_SYS_PCI_MEM_SIZE
+CONFIG_SYS_PCI_MMIO_BASE
+CONFIG_SYS_PCI_MMIO_PHYS
+CONFIG_SYS_PCI_MMIO_SIZE
+CONFIG_SYS_PCI_MSTR0_LOCAL
+CONFIG_SYS_PCI_MSTR1_LOCAL
+CONFIG_SYS_PCI_MSTR_IO_BUS
+CONFIG_SYS_PCI_MSTR_IO_LOCAL
+CONFIG_SYS_PCI_MSTR_IO_SIZE
+CONFIG_SYS_PCI_MSTR_MEMIO_BUS
+CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL
+CONFIG_SYS_PCI_MSTR_MEMIO_SIZE
+CONFIG_SYS_PCI_MSTR_MEM_BUS
+CONFIG_SYS_PCI_MSTR_MEM_LOCAL
+CONFIG_SYS_PCI_MSTR_MEM_SIZE
+CONFIG_SYS_PCI_NR_INBOUND_WIN
+CONFIG_SYS_PCI_PHYS
+CONFIG_SYS_PCI_PTM1LA
+CONFIG_SYS_PCI_PTM1MS
+CONFIG_SYS_PCI_PTM1PCI
+CONFIG_SYS_PCI_PTM2LA
+CONFIG_SYS_PCI_PTM2MS
+CONFIG_SYS_PCI_PTM2PCI
+CONFIG_SYS_PCI_SLV_MEM_BUS
+CONFIG_SYS_PCI_SLV_MEM_LOCAL
+CONFIG_SYS_PCI_SLV_MEM_SIZE
+CONFIG_SYS_PCI_SUBSYS_DEVICEID
+CONFIG_SYS_PCI_SUBSYS_DEVICEID2
+CONFIG_SYS_PCI_SUBSYS_ID
+CONFIG_SYS_PCI_SUBSYS_ID_MONARCH
+CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH
+CONFIG_SYS_PCI_SUBSYS_VENDORID
+CONFIG_SYS_PCI_SYS_MEM_BUS
+CONFIG_SYS_PCI_SYS_MEM_PHYS
+CONFIG_SYS_PCI_SYS_MEM_SIZE
+CONFIG_SYS_PCI_TARGBASE
+CONFIG_SYS_PCI_TARGET_INIT
+CONFIG_SYS_PCI_TBATR0
+CONFIG_SYS_PCI_TBATR1
+CONFIG_SYS_PCI_TBATR2
+CONFIG_SYS_PCI_TBATR3
+CONFIG_SYS_PCI_TBATR4
+CONFIG_SYS_PCI_TBATR5
+CONFIG_SYS_PCI_VIRT
+CONFIG_SYS_PCMCIA_ATTRB_ADDR
+CONFIG_SYS_PCMCIA_ATTRB_SIZE
+CONFIG_SYS_PCMCIA_ATTR_BASE
+CONFIG_SYS_PCMCIA_CIS_WIN
+CONFIG_SYS_PCMCIA_CIS_WIN_SIZE
+CONFIG_SYS_PCMCIA_DMA_ADDR
+CONFIG_SYS_PCMCIA_DMA_SIZE
+CONFIG_SYS_PCMCIA_IO_ADDR
+CONFIG_SYS_PCMCIA_IO_BASE
+CONFIG_SYS_PCMCIA_IO_SIZE
+CONFIG_SYS_PCMCIA_IO_WIN
+CONFIG_SYS_PCMCIA_IO_WIN_SIZE
+CONFIG_SYS_PCMCIA_MEM_ADDR
+CONFIG_SYS_PCMCIA_MEM_SIZE
+CONFIG_SYS_PCMCIA_PBR0
+CONFIG_SYS_PCMCIA_PBR1
+CONFIG_SYS_PCMCIA_PBR2
+CONFIG_SYS_PCMCIA_PBR3
+CONFIG_SYS_PCMCIA_PBR4
+CONFIG_SYS_PCMCIA_PBR5
+CONFIG_SYS_PCMCIA_PBR6
+CONFIG_SYS_PCMCIA_PBR7
+CONFIG_SYS_PCMCIA_POR0
+CONFIG_SYS_PCMCIA_POR1
+CONFIG_SYS_PCMCIA_POR2
+CONFIG_SYS_PCMCIA_POR3
+CONFIG_SYS_PCMCIA_POR4
+CONFIG_SYS_PCMCIA_POR5
+CONFIG_SYS_PCMCIA_POR6
+CONFIG_SYS_PCMCIA_POR7
+CONFIG_SYS_PCMCIA_TIMING
+CONFIG_SYS_PDCNT
+CONFIG_SYS_PDM360NG_COPROC_BAUDRATE
+CONFIG_SYS_PDM360NG_COPROC_READ_DELAY
+CONFIG_SYS_PEHLPAR
+CONFIG_SYS_PEPAR
+CONFIG_SYS_PERIPHERAL_BASE
+CONFIG_SYS_PFC0
+CONFIG_SYS_PFPAR
+CONFIG_SYS_PHYS_ADDR_HIGH
+CONFIG_SYS_PHY_UBOOT_BASE
+CONFIG_SYS_PIB_BASE
+CONFIG_SYS_PIB_WINDOW_SIZE
+CONFIG_SYS_PICMR0_MASK_ATTRIB
+CONFIG_SYS_PIOC_ASR_VAL
+CONFIG_SYS_PIOC_BSR_VAL
+CONFIG_SYS_PIOC_PDR_VAL
+CONFIG_SYS_PIOC_PDR_VAL1
+CONFIG_SYS_PIOC_PPUDR_VAL
+CONFIG_SYS_PIOD_PDR_VAL1
+CONFIG_SYS_PIOD_PPUDR_VAL
+CONFIG_SYS_PIO_MODE
+CONFIG_SYS_PISCR
+CONFIG_SYS_PIT_BASE
+CONFIG_SYS_PIT_PRESCALE
+CONFIG_SYS_PIXIS_VBOOT_ENABLE
+CONFIG_SYS_PIXIS_VBOOT_MASK
+CONFIG_SYS_PIXIS_VCFGEN0_ENABLE
+CONFIG_SYS_PJPAR
+CONFIG_SYS_PL310_BASE
+CONFIG_SYS_PLATFORM_SRAM_BASE
+CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS
+CONFIG_SYS_PLATFORM_SRAM_SIZE
+CONFIG_SYS_PLL0_DIV
+CONFIG_SYS_PLL0_MUL
+CONFIG_SYS_PLL0_OPT
+CONFIG_SYS_PLL0_SUPPRESS_CYCLES
+CONFIG_SYS_PLLAR_VAL
+CONFIG_SYS_PLLBR_VAL
+CONFIG_SYS_PLLCR
+CONFIG_SYS_PLL_BYPASS
+CONFIG_SYS_PLL_FDR
+CONFIG_SYS_PLL_ODR
+CONFIG_SYS_PLL_RECONFIG
+CONFIG_SYS_PLL_SETTLING_TIME
+CONFIG_SYS_PLPRCR
+CONFIG_SYS_PLUG_BASE
+CONFIG_SYS_PMAN
+CONFIG_SYS_PMC_BASE
+CONFIG_SYS_PMC_BASE_PHYS
+CONFIG_SYS_PME_CLK
+CONFIG_SYS_POCMR0_MASK_ATTRIB
+CONFIG_SYS_POCMR1_MASK_ATTRIB
+CONFIG_SYS_POCMR2_MASK_ATTRIB
+CONFIG_SYS_PORTTC
+CONFIG_SYS_POST_BSPEC1
+CONFIG_SYS_POST_BSPEC2
+CONFIG_SYS_POST_BSPEC3
+CONFIG_SYS_POST_BSPEC4
+CONFIG_SYS_POST_BSPEC5
+CONFIG_SYS_POST_CACHE
+CONFIG_SYS_POST_CACHE_ADDR
+CONFIG_SYS_POST_CODEC
+CONFIG_SYS_POST_COPROC
+CONFIG_SYS_POST_CPU
+CONFIG_SYS_POST_DSP
+CONFIG_SYS_POST_ECC
+CONFIG_SYS_POST_ETHER
+CONFIG_SYS_POST_ETHER_EXT_LOOPBACK
+CONFIG_SYS_POST_ETH_LOOPS
+CONFIG_SYS_POST_FLASH
+CONFIG_SYS_POST_FLASH_END
+CONFIG_SYS_POST_FLASH_NUM
+CONFIG_SYS_POST_FLASH_START
+CONFIG_SYS_POST_FPU
+CONFIG_SYS_POST_FPU_ON
+CONFIG_SYS_POST_HOTKEYS_GPIO
+CONFIG_SYS_POST_I2C
+CONFIG_SYS_POST_I2C_ADDRS
+CONFIG_SYS_POST_I2C_IGNORES
+CONFIG_SYS_POST_MEMORY
+CONFIG_SYS_POST_MEMORY_ON
+CONFIG_SYS_POST_MEM_REGIONS
+CONFIG_SYS_POST_OCM
+CONFIG_SYS_POST_PREREL
+CONFIG_SYS_POST_RTC
+CONFIG_SYS_POST_SPI
+CONFIG_SYS_POST_SPR
+CONFIG_SYS_POST_SYSMON
+CONFIG_SYS_POST_UART
+CONFIG_SYS_POST_UART_TABLE
+CONFIG_SYS_POST_USB
+CONFIG_SYS_POST_WATCHDOG
+CONFIG_SYS_POST_WORD_ADDR
+CONFIG_SYS_POWER_MANAGER
+CONFIG_SYS_PPC4XX_USB_ADDR
+CONFIG_SYS_PPC64
+CONFIG_SYS_PPC_DDR_WIMGE
+CONFIG_SYS_PPC_E500_DEBUG_TLB
+CONFIG_SYS_PQSPAR
+CONFIG_SYS_PRELIM_OR_AM
+CONFIG_SYS_PROMPT_HUSH_PS2
+CONFIG_SYS_PROM_OFFSET
+CONFIG_SYS_PROM_SIZE
+CONFIG_SYS_PSC1
+CONFIG_SYS_PSC3
+CONFIG_SYS_PSC4
+CONFIG_SYS_PSC6
+CONFIG_SYS_PSDMR
+CONFIG_SYS_PSDPAR
+CONFIG_SYS_PSRT
+CONFIG_SYS_PSSR_VAL
+CONFIG_SYS_PTA_PER_CLK
+CONFIG_SYS_PTCPAR
+CONFIG_SYS_PTDPAR
+CONFIG_SYS_PTL2_BITS
+CONFIG_SYS_PTV
+CONFIG_SYS_PUAPAR
+CONFIG_SYS_QE_FMAN_FW_IN_MMC
+CONFIG_SYS_QE_FMAN_FW_IN_NAND
+CONFIG_SYS_QE_FMAN_FW_IN_NOR
+CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
+CONFIG_SYS_QE_FMAN_FW_LENGTH
+CONFIG_SYS_QE_FW_ADDR
+CONFIG_SYS_QE_FW_IN_SPIFLASH
+CONFIG_SYS_QMAN_CENA_BASE
+CONFIG_SYS_QMAN_CENA_SIZE
+CONFIG_SYS_QMAN_CINH_BASE
+CONFIG_SYS_QMAN_CINH_SIZE
+CONFIG_SYS_QMAN_MEM_BASE
+CONFIG_SYS_QMAN_MEM_PHYS
+CONFIG_SYS_QMAN_MEM_SIZE
+CONFIG_SYS_QMAN_NUM_PORTALS
+CONFIG_SYS_QMAN_SP_CENA_SIZE
+CONFIG_SYS_QMAN_SP_CINH_SIZE
+CONFIG_SYS_QMAN_SWP_ISDR_REG
+CONFIG_SYS_QRIO_BASE
+CONFIG_SYS_QRIO_BASE_PHYS
+CONFIG_SYS_QRIO_BR_PRELIM
+CONFIG_SYS_QRIO_OR_PRELIM
+CONFIG_SYS_R7780MP_OLD_FLASH
+CONFIG_SYS_RAMBOOT
+CONFIG_SYS_RAM_BASE
+CONFIG_SYS_RAM_CS
+CONFIG_SYS_RAM_END
+CONFIG_SYS_RAM_FREQ_DIV
+CONFIG_SYS_RAM_SIZE
+CONFIG_SYS_RCAR_I2C0_BASE
+CONFIG_SYS_RCAR_I2C0_SPEED
+CONFIG_SYS_RCAR_I2C1_BASE
+CONFIG_SYS_RCAR_I2C1_SPEED
+CONFIG_SYS_RCAR_I2C2_BASE
+CONFIG_SYS_RCAR_I2C2_SPEED
+CONFIG_SYS_RCAR_I2C3_BASE
+CONFIG_SYS_RCAR_I2C3_SPEED
+CONFIG_SYS_RCCR
+CONFIG_SYS_RCWH_PCIHOST
+CONFIG_SYS_READ_SPD
+CONFIG_SYS_REDUNDAND_ENVIRONMENT
+CONFIG_SYS_RELOC_MONITOR_BASE
+CONFIG_SYS_RELOC_MONITOR_MAX_END
+CONFIG_SYS_REMAP_OR_AM
+CONFIG_SYS_RESET_ADDR
+CONFIG_SYS_RESET_ADDRESS
+CONFIG_SYS_RESET_BASE
+CONFIG_SYS_RESET_SCTRL
+CONFIG_SYS_RFD
+CONFIG_SYS_RGMII1_PHY_ADDR
+CONFIG_SYS_RGMII2_PHY_ADDR
+CONFIG_SYS_RIO_MEM_BASE
+CONFIG_SYS_RIO_MEM_BUS
+CONFIG_SYS_RIO_MEM_PHYS
+CONFIG_SYS_RIO_MEM_SIZE
+CONFIG_SYS_RIO_MEM_VIRT
+CONFIG_SYS_RMDS
+CONFIG_SYS_RMR
+CONFIG_SYS_ROM_BASE
+CONFIG_SYS_ROOTPATH
+CONFIG_SYS_RSTC_RMR_VAL
+CONFIG_SYS_RTCSC
+CONFIG_SYS_RTC_BUS_NUM
+CONFIG_SYS_RTC_CNT
+CONFIG_SYS_RTC_DS1337
+CONFIG_SYS_RTC_DS1337_NOOSC
+CONFIG_SYS_RTC_DS1388
+CONFIG_SYS_RTC_OSCILLATOR
+CONFIG_SYS_RTC_PL031_BASE
+CONFIG_SYS_RTC_REG_BASE_ADDR
+CONFIG_SYS_RTC_SETUP
+CONFIG_SYS_RV3029_TCR
+CONFIG_SYS_RX_ETH_BUFFER
+CONFIG_SYS_S3C2410_NAND_HWECC
+CONFIG_SYS_SATA
+CONFIG_SYS_SATA1
+CONFIG_SYS_SATA1_FLAGS
+CONFIG_SYS_SATA1_OFFSET
+CONFIG_SYS_SATA2
+CONFIG_SYS_SATA2_FLAGS
+CONFIG_SYS_SATA2_OFFSET
+CONFIG_SYS_SATA_ENV_DEV
+CONFIG_SYS_SATA_FAT_BOOT_PARTITION
+CONFIG_SYS_SATA_MAX_DEVICE
+CONFIG_SYS_SBFHDR_DATA_OFFSET
+CONFIG_SYS_SBFHDR_SIZE
+CONFIG_SYS_SCCR
+CONFIG_SYS_SCCR_ENCCM
+CONFIG_SYS_SCCR_PCICM
+CONFIG_SYS_SCCR_PCIEXP1CM
+CONFIG_SYS_SCCR_PCIEXP2CM
+CONFIG_SYS_SCCR_SATACM
+CONFIG_SYS_SCCR_TSEC1CM
+CONFIG_SYS_SCCR_TSEC1ON
+CONFIG_SYS_SCCR_TSEC2CM
+CONFIG_SYS_SCCR_TSEC2ON
+CONFIG_SYS_SCCR_TSECCM
+CONFIG_SYS_SCCR_USBDRCM
+CONFIG_SYS_SCCR_USBMPHCM
+CONFIG_SYS_SCC_TOUT_LOOP
+CONFIG_SYS_SCR
+CONFIG_SYS_SCRATCH_VA
+CONFIG_SYS_SCSI_MAXDEVICE
+CONFIG_SYS_SCSI_MAX_DEVICE
+CONFIG_SYS_SCSI_MAX_LUN
+CONFIG_SYS_SCSI_MAX_SCSI_ID
+CONFIG_SYS_SCSI_SPIN_UP_TIME
+CONFIG_SYS_SCSI_SYM53C8XX_CCF
+CONFIG_SYS_SDHC_CLK
+CONFIG_SYS_SDHC_CLK_2_PLL
+CONFIG_SYS_SDIO0
+CONFIG_SYS_SDIO0_MAX_CLK
+CONFIG_SYS_SDIO1
+CONFIG_SYS_SDIO1_MAX_CLK
+CONFIG_SYS_SDIO2
+CONFIG_SYS_SDIO2_MAX_CLK
+CONFIG_SYS_SDIO3
+CONFIG_SYS_SDIO3_MAX_CLK
+CONFIG_SYS_SDIO_BASE0
+CONFIG_SYS_SDIO_BASE1
+CONFIG_SYS_SDIO_BASE2
+CONFIG_SYS_SDIO_BASE3
+CONFIG_SYS_SDMR
+CONFIG_SYS_SDRAM
+CONFIG_SYS_SDRAM0_CFG0
+CONFIG_SYS_SDRAM0_CLKTR
+CONFIG_SYS_SDRAM0_CODT
+CONFIG_SYS_SDRAM0_DLCR
+CONFIG_SYS_SDRAM0_INITPLR0
+CONFIG_SYS_SDRAM0_INITPLR1
+CONFIG_SYS_SDRAM0_INITPLR10
+CONFIG_SYS_SDRAM0_INITPLR11
+CONFIG_SYS_SDRAM0_INITPLR12
+CONFIG_SYS_SDRAM0_INITPLR13
+CONFIG_SYS_SDRAM0_INITPLR14
+CONFIG_SYS_SDRAM0_INITPLR15
+CONFIG_SYS_SDRAM0_INITPLR2
+CONFIG_SYS_SDRAM0_INITPLR3
+CONFIG_SYS_SDRAM0_INITPLR4
+CONFIG_SYS_SDRAM0_INITPLR5
+CONFIG_SYS_SDRAM0_INITPLR6
+CONFIG_SYS_SDRAM0_INITPLR7
+CONFIG_SYS_SDRAM0_INITPLR8
+CONFIG_SYS_SDRAM0_INITPLR9
+CONFIG_SYS_SDRAM0_MB0CF
+CONFIG_SYS_SDRAM0_MB0CF_BASE
+CONFIG_SYS_SDRAM0_MB1CF
+CONFIG_SYS_SDRAM0_MB1CF_BASE
+CONFIG_SYS_SDRAM0_MB2CF
+CONFIG_SYS_SDRAM0_MB3CF
+CONFIG_SYS_SDRAM0_MCOPT1
+CONFIG_SYS_SDRAM0_MCOPT2
+CONFIG_SYS_SDRAM0_MEMODE
+CONFIG_SYS_SDRAM0_MMODE
+CONFIG_SYS_SDRAM0_MODT0
+CONFIG_SYS_SDRAM0_MODT1
+CONFIG_SYS_SDRAM0_MODT2
+CONFIG_SYS_SDRAM0_MODT3
+CONFIG_SYS_SDRAM0_RDCC
+CONFIG_SYS_SDRAM0_RFDC
+CONFIG_SYS_SDRAM0_RQDC
+CONFIG_SYS_SDRAM0_RTR
+CONFIG_SYS_SDRAM0_SDTR1
+CONFIG_SYS_SDRAM0_SDTR2
+CONFIG_SYS_SDRAM0_SDTR3
+CONFIG_SYS_SDRAM0_TR0
+CONFIG_SYS_SDRAM0_WDDCTR
+CONFIG_SYS_SDRAM0_WRDTR
+CONFIG_SYS_SDRAM1
+CONFIG_SYS_SDRAM_BANKS
+CONFIG_SYS_SDRAM_BASE
+CONFIG_SYS_SDRAM_BASE0
+CONFIG_SYS_SDRAM_BASE1
+CONFIG_SYS_SDRAM_BASE1xx
+CONFIG_SYS_SDRAM_BASE2
+CONFIG_SYS_SDRAM_CASL
+CONFIG_SYS_SDRAM_CFG
+CONFIG_SYS_SDRAM_CFG1
+CONFIG_SYS_SDRAM_CFG2
+CONFIG_SYS_SDRAM_CL
+CONFIG_SYS_SDRAM_CONF1HB
+CONFIG_SYS_SDRAM_CONF1LL
+CONFIG_SYS_SDRAM_CONFPATHB
+CONFIG_SYS_SDRAM_CS1
+CONFIG_SYS_SDRAM_CTP
+CONFIG_SYS_SDRAM_CTRL
+CONFIG_SYS_SDRAM_DRVSTRENGTH
+CONFIG_SYS_SDRAM_DRV_STRENGTH
+CONFIG_SYS_SDRAM_EMOD
+CONFIG_SYS_SDRAM_END
+CONFIG_SYS_SDRAM_LDF
+CONFIG_SYS_SDRAM_LIST
+CONFIG_SYS_SDRAM_LOWER
+CONFIG_SYS_SDRAM_MODE
+CONFIG_SYS_SDRAM_PLBADDUHB
+CONFIG_SYS_SDRAM_PLBADDULL
+CONFIG_SYS_SDRAM_PTA
+CONFIG_SYS_SDRAM_R0BAS
+CONFIG_SYS_SDRAM_R1BAS
+CONFIG_SYS_SDRAM_R2BAS
+CONFIG_SYS_SDRAM_R3BAS
+CONFIG_SYS_SDRAM_RCD
+CONFIG_SYS_SDRAM_RFTA
+CONFIG_SYS_SDRAM_SIZE
+CONFIG_SYS_SDRAM_SIZE0
+CONFIG_SYS_SDRAM_SIZE1
+CONFIG_SYS_SDRAM_SIZE_LAW
+CONFIG_SYS_SDRAM_SIZE_MB
+CONFIG_SYS_SDRAM_TABLE
+CONFIG_SYS_SDRAM_UPPER
+CONFIG_SYS_SDRAM_VAL
+CONFIG_SYS_SDRAM_VAL1
+CONFIG_SYS_SDRAM_VAL10
+CONFIG_SYS_SDRAM_VAL11
+CONFIG_SYS_SDRAM_VAL12
+CONFIG_SYS_SDRAM_VAL2
+CONFIG_SYS_SDRAM_VAL3
+CONFIG_SYS_SDRAM_VAL4
+CONFIG_SYS_SDRAM_VAL5
+CONFIG_SYS_SDRAM_VAL6
+CONFIG_SYS_SDRAM_VAL7
+CONFIG_SYS_SDRAM_VAL8
+CONFIG_SYS_SDRAM_VAL9
+CONFIG_SYS_SDRAM_tRC
+CONFIG_SYS_SDRAM_tRCD
+CONFIG_SYS_SDRAM_tRFC
+CONFIG_SYS_SDRAM_tRP
+CONFIG_SYS_SDRC_CR_VAL
+CONFIG_SYS_SDRC_MDR_VAL
+CONFIG_SYS_SDRC_MR_VAL
+CONFIG_SYS_SDRC_MR_VAL1
+CONFIG_SYS_SDRC_MR_VAL2
+CONFIG_SYS_SDRC_MR_VAL3
+CONFIG_SYS_SDRC_MR_VAL4
+CONFIG_SYS_SDRC_MR_VAL5
+CONFIG_SYS_SDRC_TR_VAL
+CONFIG_SYS_SDRC_TR_VAL1
+CONFIG_SYS_SDRC_TR_VAL2
+CONFIG_SYS_SDSR
+CONFIG_SYS_SD_VOLTAGE
+CONFIG_SYS_SEC_MON_ADDR
+CONFIG_SYS_SEC_MON_OFFSET
+CONFIG_SYS_SELF_RST
+CONFIG_SYS_SERIAL0
+CONFIG_SYS_SERIAL1
+CONFIG_SYS_SERIAL2
+CONFIG_SYS_SERIAL3
+CONFIG_SYS_SERIAL4
+CONFIG_SYS_SERIAL5
+CONFIG_SYS_SERIAL_BOOT
+CONFIG_SYS_SFP_ADDR
+CONFIG_SYS_SFP_OFFSET
+CONFIG_SYS_SGMII1_PHY_ADDR
+CONFIG_SYS_SGMII2_PHY_ADDR
+CONFIG_SYS_SGMII3_PHY_ADDR
+CONFIG_SYS_SGMII_LINERATE_MHZ
+CONFIG_SYS_SGMII_RATESCALE
+CONFIG_SYS_SGMII_REFCLK_MHZ
+CONFIG_SYS_SH_SDHI0_BASE
+CONFIG_SYS_SH_SDHI1_BASE
+CONFIG_SYS_SH_SDHI2_BASE
+CONFIG_SYS_SH_SDHI3_BASE
+CONFIG_SYS_SH_SDHI_NR_CHANNEL
+CONFIG_SYS_SICRH
+CONFIG_SYS_SICRL
+CONFIG_SYS_SIL1178_I2C
+CONFIG_SYS_SIMULATE_SPD_EEPROM
+CONFIG_SYS_SIUMCR
+CONFIG_SYS_SIUMCR_HIGH
+CONFIG_SYS_SIUMCR_LOW
+CONFIG_SYS_SJA1000_BASE
+CONFIG_SYS_SMALL_FLASH
+CONFIG_SYS_SMC0_CYCLE0_VAL
+CONFIG_SYS_SMC0_MODE0_VAL
+CONFIG_SYS_SMC0_PULSE0_VAL
+CONFIG_SYS_SMC0_SETUP0_VAL
+CONFIG_SYS_SMC_CSR0_VAL
+CONFIG_SYS_SMC_DPMEM_OFFSET
+CONFIG_SYS_SMC_RXBUFLEN
+CONFIG_SYS_SMC_UCODE_PATCH
+CONFIG_SYS_SMI_BASE
+CONFIG_SYS_SPANSION_BASE
+CONFIG_SYS_SPANSION_BOOT
+CONFIG_SYS_SPC1920_PLD_BASE
+CONFIG_SYS_SPC1920_SMC1_CLK4
+CONFIG_SYS_SPCR_OPT
+CONFIG_SYS_SPCR_TSEC1EP
+CONFIG_SYS_SPCR_TSEC2EP
+CONFIG_SYS_SPCR_TSECEP
+CONFIG_SYS_SPD_BUS_NUM
+CONFIG_SYS_SPD_MAX_DIMMS
+CONFIG_SYS_SPI0
+CONFIG_SYS_SPI0_NUM_CS
+CONFIG_SYS_SPI1
+CONFIG_SYS_SPI1_BASE
+CONFIG_SYS_SPI1_NUM_CS
+CONFIG_SYS_SPI2
+CONFIG_SYS_SPI2_BASE
+CONFIG_SYS_SPI2_NUM_CS
+CONFIG_SYS_SPI_ARGS_OFFS
+CONFIG_SYS_SPI_ARGS_SIZE
+CONFIG_SYS_SPI_BASE
+CONFIG_SYS_SPI_CLK
+CONFIG_SYS_SPI_CS_ACT
+CONFIG_SYS_SPI_CS_BASE
+CONFIG_SYS_SPI_CS_USED
+CONFIG_SYS_SPI_DPMEM_OFFSET
+CONFIG_SYS_SPI_FLASH_U_BOOT_DST
+CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS
+CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE
+CONFIG_SYS_SPI_FLASH_U_BOOT_START
+CONFIG_SYS_SPI_INIT_OFFSET
+CONFIG_SYS_SPI_KERNEL_OFFS
+CONFIG_SYS_SPI_MXC_WAIT
+CONFIG_SYS_SPI_RTC_DEVID
+CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
+CONFIG_SYS_SPI_UCODE_PATCH
+CONFIG_SYS_SPI_U_BOOT_OFFS
+CONFIG_SYS_SPI_U_BOOT_SIZE
+CONFIG_SYS_SPI_WRITE_TOUT
+CONFIG_SYS_SPL_ARGS_ADDR
+CONFIG_SYS_SPL_LEN
+CONFIG_SYS_SPL_MALLOC_SIZE
+CONFIG_SYS_SPL_MALLOC_START
+CONFIG_SYS_SPL_MAX_LEN
+CONFIG_SYS_SPR
+CONFIG_SYS_SRAM_BASE
+CONFIG_SYS_SRAM_END
+CONFIG_SYS_SRAM_SIZE
+CONFIG_SYS_SRAM_START
+CONFIG_SYS_SRGPL0_CFG_BAR
+CONFIG_SYS_SRGPL0_MNT_BAR
+CONFIG_SYS_SRGPL0_MSG_BAR
+CONFIG_SYS_SRGPL0_REG_BAR
+CONFIG_SYS_SRIO
+CONFIG_SYS_SRIO1_MEM_BASE
+CONFIG_SYS_SRIO1_MEM_BUS
+CONFIG_SYS_SRIO1_MEM_PHYS
+CONFIG_SYS_SRIO1_MEM_PHYS_HIGH
+CONFIG_SYS_SRIO1_MEM_PHYS_LOW
+CONFIG_SYS_SRIO1_MEM_SIZE
+CONFIG_SYS_SRIO1_MEM_VIRT
+CONFIG_SYS_SRIO2_MEM_PHYS
+CONFIG_SYS_SRIO2_MEM_SIZE
+CONFIG_SYS_SRIO2_MEM_VIRT
+CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR
+CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS
+CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR
+CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS
+CONFIG_SYS_SSD_BASE
+CONFIG_SYS_SSD_BASE_PHYS
+CONFIG_SYS_SSP_PORT
+CONFIG_SYS_SST_SECT
+CONFIG_SYS_SST_SECTSZ
+CONFIG_SYS_STACKSIZE
+CONFIG_SYS_STACK_LENGTH
+CONFIG_SYS_STACK_SIZE
+CONFIG_SYS_STATUS_C
+CONFIG_SYS_STATUS_OK
+CONFIG_SYS_STDIO_DEREGISTER
+CONFIG_SYS_STMICRO_BOOT
+CONFIG_SYS_SUPPORT_64BIT_DATA
+CONFIG_SYS_SXCNFG_VAL
+CONFIG_SYS_SYPCR
+CONFIG_SYS_SYSTEMACE_BASE
+CONFIG_SYS_SYSTEMACE_WIDTH
+CONFIG_SYS_TBIPA_VALUE
+CONFIG_SYS_TBSCR
+CONFIG_SYS_TCLK
+CONFIG_SYS_TEMP_STACK_OCM
+CONFIG_SYS_TEXT_ADDR
+CONFIG_SYS_TEXT_BASE_NOR
+CONFIG_SYS_TEXT_BASE_SPL
+CONFIG_SYS_TFP410_ADDR
+CONFIG_SYS_TFP410_BUS
+CONFIG_SYS_THUMB_BUILD
+CONFIG_SYS_TIMERBASE
+CONFIG_SYS_TIMER_BASE
+CONFIG_SYS_TIMER_COUNTER
+CONFIG_SYS_TIMER_COUNTS_DOWN
+CONFIG_SYS_TIMER_PRESCALER
+CONFIG_SYS_TIMER_RATE
+CONFIG_SYS_TLB_FOR_BOOT_FLASH
+CONFIG_SYS_TMCNTSC
+CONFIG_SYS_TMPVIRT
+CONFIG_SYS_TMRINTR_MASK
+CONFIG_SYS_TMRINTR_NO
+CONFIG_SYS_TMRINTR_PEND
+CONFIG_SYS_TMRINTR_PRI
+CONFIG_SYS_TMRPND_REG
+CONFIG_SYS_TMR_BASE
+CONFIG_SYS_TMU_CLK_DIV
+CONFIG_SYS_TSEC1
+CONFIG_SYS_TSEC1_OFFSET
+CONFIG_SYS_TSEC2
+CONFIG_SYS_TSEC2_OFFSET
+CONFIG_SYS_TSEC3_OFFSET
+CONFIG_SYS_TX_ETH_BUFFER
+CONFIG_SYS_UART1_ALT1_GPIO
+CONFIG_SYS_UART1_PRI_GPIO
+CONFIG_SYS_UART2_ALT1_GPIO
+CONFIG_SYS_UART2_ALT3_GPIO
+CONFIG_SYS_UART2_PRI_GPIO
+CONFIG_SYS_UART_BASE
+CONFIG_SYS_UART_BAUD
+CONFIG_SYS_UART_FREQ
+CONFIG_SYS_UART_PORT
+CONFIG_SYS_UBOOT_BASE
+CONFIG_SYS_UBOOT_END
+CONFIG_SYS_UBOOT_START
+CONFIG_SYS_UCC_RGMII_MODE
+CONFIG_SYS_UCC_RMII_MODE
+CONFIG_SYS_UDELAY_BASE
+CONFIG_SYS_UEC
+CONFIG_SYS_UEC1_ETH_TYPE
+CONFIG_SYS_UEC1_INTERFACE_SPEED
+CONFIG_SYS_UEC1_INTERFACE_TYPE
+CONFIG_SYS_UEC1_PHY_ADDR
+CONFIG_SYS_UEC1_RX_CLK
+CONFIG_SYS_UEC1_TX_CLK
+CONFIG_SYS_UEC1_UCC_NUM
+CONFIG_SYS_UEC2_ETH_TYPE
+CONFIG_SYS_UEC2_INTERFACE_SPEED
+CONFIG_SYS_UEC2_INTERFACE_TYPE
+CONFIG_SYS_UEC2_PHY_ADDR
+CONFIG_SYS_UEC2_RX_CLK
+CONFIG_SYS_UEC2_TX_CLK
+CONFIG_SYS_UEC2_UCC_NUM
+CONFIG_SYS_UEC3_ETH_TYPE
+CONFIG_SYS_UEC3_INTERFACE_SPEED
+CONFIG_SYS_UEC3_INTERFACE_TYPE
+CONFIG_SYS_UEC3_PHY_ADDR
+CONFIG_SYS_UEC3_RX_CLK
+CONFIG_SYS_UEC3_TX_CLK
+CONFIG_SYS_UEC3_UCC_NUM
+CONFIG_SYS_UEC4_ETH_TYPE
+CONFIG_SYS_UEC4_INTERFACE_SPEED
+CONFIG_SYS_UEC4_INTERFACE_TYPE
+CONFIG_SYS_UEC4_PHY_ADDR
+CONFIG_SYS_UEC4_RX_CLK
+CONFIG_SYS_UEC4_TX_CLK
+CONFIG_SYS_UEC4_UCC_NUM
+CONFIG_SYS_UEC5_ETH_TYPE
+CONFIG_SYS_UEC5_INTERFACE_SPEED
+CONFIG_SYS_UEC5_INTERFACE_TYPE
+CONFIG_SYS_UEC5_PHY_ADDR
+CONFIG_SYS_UEC5_RX_CLK
+CONFIG_SYS_UEC5_TX_CLK
+CONFIG_SYS_UEC5_UCC_NUM
+CONFIG_SYS_UEC6_ETH_TYPE
+CONFIG_SYS_UEC6_INTERFACE_SPEED
+CONFIG_SYS_UEC6_INTERFACE_TYPE
+CONFIG_SYS_UEC6_PHY_ADDR
+CONFIG_SYS_UEC6_RX_CLK
+CONFIG_SYS_UEC6_TX_CLK
+CONFIG_SYS_UEC6_UCC_NUM
+CONFIG_SYS_UEC8_ETH_TYPE
+CONFIG_SYS_UEC8_INTERFACE_SPEED
+CONFIG_SYS_UEC8_INTERFACE_TYPE
+CONFIG_SYS_UEC8_PHY_ADDR
+CONFIG_SYS_UEC8_RX_CLK
+CONFIG_SYS_UEC8_TX_CLK
+CONFIG_SYS_UEC8_UCC_NUM
+CONFIG_SYS_UECx_PHY_ADDR
+CONFIG_SYS_UHC0_EHCI_BASE
+CONFIG_SYS_UHC1_EHCI_BASE
+CONFIG_SYS_ULB_CLK
+CONFIG_SYS_UMCR
+CONFIG_SYS_UNIFY_CACHE
+CONFIG_SYS_UNSPEC_PHYID
+CONFIG_SYS_UNSPEC_STRID
+CONFIG_SYS_UPDATE_FLASH_SIZE
+CONFIG_SYS_USB2D0_BASE
+CONFIG_SYS_USBCTRL
+CONFIG_SYS_USBD_BASE
+CONFIG_SYS_USB_BRGCLK
+CONFIG_SYS_USB_DEVICE
+CONFIG_SYS_USB_EHCI_CPU_INIT
+CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
+CONFIG_SYS_USB_EHCI_REGS_BASE
+CONFIG_SYS_USB_EVENT_POLL
+CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
+CONFIG_SYS_USB_FAT_BOOT_PARTITION
+CONFIG_SYS_USB_HOST
+CONFIG_SYS_USB_OHCI_BOARD_INIT
+CONFIG_SYS_USB_OHCI_CPU_INIT
+CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
+CONFIG_SYS_USB_OHCI_REGS_BASE
+CONFIG_SYS_USB_OHCI_SLOT_NAME
+CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS
+CONFIG_SYS_USER_SWITCHES_BASE
+CONFIG_SYS_USE_BOOT_NORFLASH
+CONFIG_SYS_USE_DATAFLASH
+CONFIG_SYS_USE_DATAFLASH_CS0
+CONFIG_SYS_USE_DATAFLASH_CS1
+CONFIG_SYS_USE_DATAFLASH_CS3
+CONFIG_SYS_USE_DSPLINK
+CONFIG_SYS_USE_FLASH
+CONFIG_SYS_USE_MAIN_OSCILLATOR
+CONFIG_SYS_USE_MMC
+CONFIG_SYS_USE_MPC834XSYS_USB_PHY
+CONFIG_SYS_USE_NAND
+CONFIG_SYS_USE_NANDFLASH
+CONFIG_SYS_USE_NOR
+CONFIG_SYS_USE_NORFLASH
+CONFIG_SYS_USE_PPCENV
+CONFIG_SYS_USE_SERIALFLASH
+CONFIG_SYS_USE_SPIFLASH
+CONFIG_SYS_USE_UBI
+CONFIG_SYS_USR_EXCEP
+CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS
+CONFIG_SYS_U_BOOT_OFFS
+CONFIG_SYS_VA_BITS
+CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR
+CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN
+CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT
+CONFIG_SYS_VCXK_AUTODETECT
+CONFIG_SYS_VCXK_BASE
+CONFIG_SYS_VCXK_DEFAULT_LINEALIGN
+CONFIG_SYS_VCXK_DOUBLEBUFFERED
+CONFIG_SYS_VCXK_ENABLE_DDR
+CONFIG_SYS_VCXK_ENABLE_PIN
+CONFIG_SYS_VCXK_ENABLE_PORT
+CONFIG_SYS_VCXK_INVERT_DDR
+CONFIG_SYS_VCXK_INVERT_PIN
+CONFIG_SYS_VCXK_INVERT_PORT
+CONFIG_SYS_VCXK_REQUEST_DDR
+CONFIG_SYS_VCXK_REQUEST_PIN
+CONFIG_SYS_VCXK_REQUEST_PORT
+CONFIG_SYS_VCXK_RESET_DDR
+CONFIG_SYS_VCXK_RESET_PIN
+CONFIG_SYS_VCXK_RESET_PORT
+CONFIG_SYS_VGA_RAM_EN
+CONFIG_SYS_VIDEO
+CONFIG_SYS_VIDEO_LOGO_MAX_SIZE
+CONFIG_SYS_VPC3_BASE
+CONFIG_SYS_VPC3_SIZE
+CONFIG_SYS_VSC7385_BASE
+CONFIG_SYS_VSC7385_BASE_PHYS
+CONFIG_SYS_VSC7385_BR_PRELIM
+CONFIG_SYS_VSC7385_OR_PRELIM
+CONFIG_SYS_VSC7385_SIZE
+CONFIG_SYS_VSC8601_SKEWFIX
+CONFIG_SYS_VXWORKS_MAC_PTR
+CONFIG_SYS_WATCHDOG_FLAGS_ADDR
+CONFIG_SYS_WATCHDOG_FREQ
+CONFIG_SYS_WATCHDOG_MAGIC
+CONFIG_SYS_WATCHDOG_MAGIC_MASK
+CONFIG_SYS_WATCHDOG_TIME_ADDR
+CONFIG_SYS_WATCHDOG_VALUE
+CONFIG_SYS_WDTC_WDMR_VAL
+CONFIG_SYS_WDTTIMERBASE
+CONFIG_SYS_WDT_PERIOD_HIGH
+CONFIG_SYS_WDT_PERIOD_LOW
+CONFIG_SYS_WHITE_ON_BLACK
+CONFIG_SYS_WINDOW1_BASE
+CONFIG_SYS_WRITE_SWAPPED_DATA
+CONFIG_SYS_XHCI_USB1_ADDR
+CONFIG_SYS_XHCI_USB2_ADDR
+CONFIG_SYS_XHCI_USB3_ADDR
+CONFIG_SYS_XILINX_SPI_LIST
+CONFIG_SYS_XIMG_LEN
+CONFIG_SYS_XLB_PIPELINING
+CONFIG_SYS_XSVF_DEFAULT_ADDR
+CONFIG_SYS_XWAY_EBU_BOOTCFG
+CONFIG_SYS_XXX
+CONFIG_SYS_ZYNQ_QSPI_WAIT
+CONFIG_SYS_ZYNQ_SPI_WAIT
+CONFIG_SYS_i2C_FSL
+CONFIG_T1023RDB
+CONFIG_T1024RDB
+CONFIG_T1040D4RDB
+CONFIG_T1040QDS
+CONFIG_T1040RDB
+CONFIG_T1042D4RDB
+CONFIG_T1042RDB
+CONFIG_T1042RDB_PI
+CONFIG_T104XD4RDB
+CONFIG_T104xRDB
+CONFIG_T2080QDS
+CONFIG_T2080RDB
+CONFIG_T2081QDS
+CONFIG_T4240QDS
+CONFIG_T4240RDB
+CONFIG_TAM3517_SETTINGS
+CONFIG_TAM3517_SW3_SETTINGS
+CONFIG_TCA642X
+CONFIG_TEGRA_BOARD_STRING
+CONFIG_TEGRA_CLOCK_SCALING
+CONFIG_TEGRA_ENABLE_UARTA
+CONFIG_TEGRA_ENABLE_UARTB
+CONFIG_TEGRA_ENABLE_UARTC
+CONFIG_TEGRA_ENABLE_UARTD
+CONFIG_TEGRA_ENABLE_UARTE
+CONFIG_TEGRA_GPU
+CONFIG_TEGRA_KEYBOARD
+CONFIG_TEGRA_LP0
+CONFIG_TEGRA_MMC
+CONFIG_TEGRA_NAND
+CONFIG_TEGRA_PMU
+CONFIG_TEGRA_SLINK_CTRLS
+CONFIG_TEGRA_SPI
+CONFIG_TEGRA_UARTA_GPU
+CONFIG_TEGRA_UARTA_SDIO1
+CONFIG_TEGRA_UARTA_UAA_UAB
+CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
+CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
+CONFIG_TESTPIN_MASK
+CONFIG_TESTPIN_REG
+CONFIG_TEST_LIST_SORT
+CONFIG_TFP410_I2C_ADDR
+CONFIG_TFTP_BLOCKSIZE
+CONFIG_TFTP_FILE_NAME_MAX_LEN
+CONFIG_TFTP_PORT
+CONFIG_TFTP_TSIZE
+CONFIG_THOR_RESET_OFF
+CONFIG_THUMB2_KERNEL
+CONFIG_THUNDERX
+CONFIG_TI814X
+CONFIG_TI816X
+CONFIG_TI816X_DDR_PLL_796
+CONFIG_TI816X_EVM_DDR2
+CONFIG_TI816X_EVM_DDR3
+CONFIG_TI816X_USE_EMIF0
+CONFIG_TI816X_USE_EMIF1
+CONFIG_TI81XX
+CONFIG_TIMER_CLK_FREQ
+CONFIG_TIMESTAMP
+CONFIG_TIZEN
+CONFIG_TI_KEYSTONE_SERDES
+CONFIG_TI_KSNAV
+CONFIG_TI_SPI_MMAP
+CONFIG_TMU_CMD_DTT
+CONFIG_TMU_TIMER
+CONFIG_TOTAL5200
+CONFIG_TPL_BUILD
+CONFIG_TPL_DRIVERS_MISC_SUPPORT
+CONFIG_TPL_PAD_TO
+CONFIG_TPM_TIS_BASE_ADDRESS
+CONFIG_TPS6586X_POWER
+CONFIG_TQM5200
+CONFIG_TQM5200S
+CONFIG_TQM5200_B
+CONFIG_TQM5200_REV100
+CONFIG_TQM823L
+CONFIG_TQM823M
+CONFIG_TQM834X
+CONFIG_TQM850L
+CONFIG_TQM850M
+CONFIG_TQM855L
+CONFIG_TQM855M
+CONFIG_TQM860L
+CONFIG_TQM860M
+CONFIG_TQM862L
+CONFIG_TQM862M
+CONFIG_TQM866M
+CONFIG_TQM885D
+CONFIG_TQM8xxL
+CONFIG_TQM8xxM
+CONFIG_TRACE
+CONFIG_TRACE_BUFFER_SIZE
+CONFIG_TRACE_EARLY
+CONFIG_TRACE_EARLY_ADDR
+CONFIG_TRACE_EARLY_SIZE
+CONFIG_TRAILBLAZER
+CONFIG_TRATS
+CONFIG_TRDX_PID_COLIBRI_VF50
+CONFIG_TRDX_PID_COLIBRI_VF50IT
+CONFIG_TRDX_PID_COLIBRI_VF61
+CONFIG_TRDX_PID_COLIBRI_VF61IT
+CONFIG_TRDX_VID
+CONFIG_TSEC
+CONFIG_TSEC1
+CONFIG_TSEC1_NAME
+CONFIG_TSEC2
+CONFIG_TSEC2_NAME
+CONFIG_TSEC3
+CONFIG_TSEC3_NAME
+CONFIG_TSEC4
+CONFIG_TSEC4_NAME
+CONFIG_TSECV2
+CONFIG_TSECV2_1
+CONFIG_TSEC_ENET
+CONFIG_TSEC_TBI
+CONFIG_TSEC_TBICR_SETTINGS
+CONFIG_TSI108_ETH_NUM_PORTS
+CONFIG_TSIM
+CONFIG_TUGE1
+CONFIG_TULIP
+CONFIG_TULIP_FIX_DAVICOM
+CONFIG_TULIP_SELECT_MEDIA
+CONFIG_TULIP_USE_IO
+CONFIG_TUXX1
+CONFIG_TWL4030_INPUT
+CONFIG_TWL4030_KEYPAD
+CONFIG_TWL4030_LED
+CONFIG_TWL4030_POWER
+CONFIG_TWL4030_PWM
+CONFIG_TWL4030_USB
+CONFIG_TWL6030_INPUT
+CONFIG_TWL6030_POWER
+CONFIG_TWR
+CONFIG_TWR_P1025
+CONFIG_TX_DESCR_NUM
+CONFIG_TZSW_RESERVED_DRAM_SIZE
+CONFIG_T_SH7706LSR
+CONFIG_UART_BASE
+CONFIG_UART_BR_PRELIM
+CONFIG_UART_CONSOLE
+CONFIG_UART_CONSOLE_IS_JTAG
+CONFIG_UART_MEM
+CONFIG_UART_OR_PRELIM
+CONFIG_UBIBLOCK
+CONFIG_UBIFS_SILENCE_MSG
+CONFIG_UBIFS_VOLUME
+CONFIG_UBI_PART
+CONFIG_UBI_SILENCE_MSG
+CONFIG_UBI_SIZE
+CONFIG_UBOOT1_ENV_ADDR
+CONFIG_UBOOT2_ENV_ADDR
+CONFIG_UBOOTPATH
+CONFIG_UBOOT_ENABLE_PADS_ALL
+CONFIG_UBOOT_ENV_ADDR
+CONFIG_UBOOT_SECTOR_COUNT
+CONFIG_UBOOT_SECTOR_START
+CONFIG_UCP1020
+CONFIG_UCP1020_REV_1_3
+CONFIG_UDP_CHECKSUM
+CONFIG_UEC_ETH
+CONFIG_UEC_ETH1
+CONFIG_UEC_ETH2
+CONFIG_UEC_ETH3
+CONFIG_UEC_ETH4
+CONFIG_UEC_ETH5
+CONFIG_UEC_ETH6
+CONFIG_UEC_ETH7
+CONFIG_UEC_ETH8
+CONFIG_UID16
+CONFIG_ULI526X
+CONFIG_ULPI_REF_CLK
+CONFIG_UMSDEVS
+CONFIG_UNIPHIER_ETH
+CONFIG_UPDATEB
+CONFIG_UPDATE_LOAD_ADDR
+CONFIG_UPDATE_TFTP
+CONFIG_UPDATE_TFTP_CNT_MAX
+CONFIG_UPDATE_TFTP_MSEC_MAX
+CONFIG_USART1
+CONFIG_USART3
+CONFIG_USART_BASE
+CONFIG_USART_ID
+CONFIG_USBBOOTCOMMAND
+CONFIG_USBDEBUG
+CONFIG_USBD_CONFIGURATION_STR
+CONFIG_USBD_CTRL_INTERFACE_STR
+CONFIG_USBD_DATA_INTERFACE_STR
+CONFIG_USBD_HS
+CONFIG_USBD_MANUFACTURER
+CONFIG_USBD_PRODUCTID
+CONFIG_USBD_PRODUCTID_CDCACM
+CONFIG_USBD_PRODUCTID_GSERIAL
+CONFIG_USBD_PRODUCT_NAME
+CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE
+CONFIG_USBD_SERIAL_BULK_PKTSIZE
+CONFIG_USBD_SERIAL_INT_ENDPOINT
+CONFIG_USBD_SERIAL_INT_PKTSIZE
+CONFIG_USBD_SERIAL_IN_ENDPOINT
+CONFIG_USBD_SERIAL_IN_PKTSIZE
+CONFIG_USBD_SERIAL_OUT_ENDPOINT
+CONFIG_USBD_SERIAL_OUT_PKTSIZE
+CONFIG_USBD_VENDORID
+CONFIG_USBID_ADDR
+CONFIG_USBNET_DEV_ADDR
+CONFIG_USBNET_HOST_ADDR
+CONFIG_USBNET_MANUFACTURER
+CONFIG_USBTTY
+CONFIG_USB_AM35X
+CONFIG_USB_ATMEL
+CONFIG_USB_ATMEL_CLK_SEL_PLLB
+CONFIG_USB_ATMEL_CLK_SEL_UPLL
+CONFIG_USB_BIN_FIXUP
+CONFIG_USB_BLACKFIN
+CONFIG_USB_BLACKFIN_CLKIN
+CONFIG_USB_BOOTING
+CONFIG_USB_CABLE_CHECK
+CONFIG_USB_CLOCK
+CONFIG_USB_CONFIG
+CONFIG_USB_DEVICE
+CONFIG_USB_DEV_BASE
+CONFIG_USB_DEV_PULLUP_GPIO
+CONFIG_USB_DWC2
+CONFIG_USB_DWC2_REG_ADDR
+CONFIG_USB_EHCI_ARMADA100
+CONFIG_USB_EHCI_BASE
+CONFIG_USB_EHCI_BASE_LIST
+CONFIG_USB_EHCI_EXYNOS
+CONFIG_USB_EHCI_FARADAY
+CONFIG_USB_EHCI_FSL
+CONFIG_USB_EHCI_KIRKWOOD
+CONFIG_USB_EHCI_MX5
+CONFIG_USB_EHCI_MXC
+CONFIG_USB_EHCI_MXS
+CONFIG_USB_EHCI_OMAP
+CONFIG_USB_EHCI_PCI
+CONFIG_USB_EHCI_PPC4XX
+CONFIG_USB_EHCI_RMOBILE
+CONFIG_USB_EHCI_SPEAR
+CONFIG_USB_EHCI_SUNXI
+CONFIG_USB_EHCI_TEGRA
+CONFIG_USB_EHCI_TXFIFO_THRESH
+CONFIG_USB_EHCI_VCT
+CONFIG_USB_EHCI_VF
+CONFIG_USB_ETHER
+CONFIG_USB_ETHER_ASIX
+CONFIG_USB_ETHER_ASIX88179
+CONFIG_USB_ETHER_DM9601
+CONFIG_USB_ETHER_MCS7830
+CONFIG_USB_ETHER_RNDIS
+CONFIG_USB_ETHER_RTL8152
+CONFIG_USB_ETHER_SMSC95XX
+CONFIG_USB_ETHER_xxx
+CONFIG_USB_ETH_CDC
+CONFIG_USB_ETH_QMULT
+CONFIG_USB_ETH_RNDIS
+CONFIG_USB_ETH_SUBSET
+CONFIG_USB_EXT2_BOOT
+CONFIG_USB_FAT_BOOT
+CONFIG_USB_FREQ
+CONFIG_USB_FUNCTION_DFU
+CONFIG_USB_FUNCTION_MASS_STORAGE
+CONFIG_USB_FUNCTION_THOR
+CONFIG_USB_GADGET_AMD5536UDC
+CONFIG_USB_GADGET_AT91
+CONFIG_USB_GADGET_AU1X00
+CONFIG_USB_GADGET_DUMMY_HCD
+CONFIG_USB_GADGET_DWC2_OTG_PHY
+CONFIG_USB_GADGET_FOTG210
+CONFIG_USB_GADGET_FSL_USB2
+CONFIG_USB_GADGET_GOKU
+CONFIG_USB_GADGET_IMX
+CONFIG_USB_GADGET_M66592
+CONFIG_USB_GADGET_MASS_STORAGE
+CONFIG_USB_GADGET_MPC8272
+CONFIG_USB_GADGET_MQ11XX
+CONFIG_USB_GADGET_MUSBHSFC
+CONFIG_USB_GADGET_N9604
+CONFIG_USB_GADGET_NET2280
+CONFIG_USB_GADGET_OMAP
+CONFIG_USB_GADGET_PXA27X
+CONFIG_USB_GADGET_PXA2XX
+CONFIG_USB_GADGET_S3C2410
+CONFIG_USB_GADGET_SA1100
+CONFIG_USB_GADGET_SUPERH
+CONFIG_USB_GADGET_SX2
+CONFIG_USB_HOST_ETHER
+CONFIG_USB_HOST_XHCI_BASE
+CONFIG_USB_INVENTRA_DMA
+CONFIG_USB_ISP1301_I2C_ADDR
+CONFIG_USB_MAX_CONTROLLER_COUNT
+CONFIG_USB_MUSB_AM35X
+CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
+CONFIG_USB_MUSB_DSPS
+CONFIG_USB_MUSB_HCD
+CONFIG_USB_MUSB_OMAP2PLUS
+CONFIG_USB_MUSB_PIO_ONLY
+CONFIG_USB_MUSB_TIMEOUT
+CONFIG_USB_MUSB_TUSB6010
+CONFIG_USB_MUSB_UDC
+CONFIG_USB_MUSB_UDD
+CONFIG_USB_OHCI
+CONFIG_USB_OHCI_EP93XX
+CONFIG_USB_OHCI_LPC32XX
+CONFIG_USB_OHCI_NEW
+CONFIG_USB_OHCI_S3C24XX
+CONFIG_USB_OHCI_SUNXI
+CONFIG_USB_OMAP3
+CONFIG_USB_OTG
+CONFIG_USB_OTG_BLACKLIST_HUB
+CONFIG_USB_PHY_CFG_BASE
+CONFIG_USB_PHY_TYPE
+CONFIG_USB_PXA25X_SMALL
+CONFIG_USB_R8A66597_HCD
+CONFIG_USB_SERIALNO
+CONFIG_USB_SS_BASE
+CONFIG_USB_TI_CPPI_DMA
+CONFIG_USB_TTY
+CONFIG_USB_TUSB_OMAP_DMA
+CONFIG_USB_UHCI
+CONFIG_USB_ULPI_TIMEOUT
+CONFIG_USB_XHCI_EXYNOS
+CONFIG_USB_XHCI_FSL
+CONFIG_USB_XHCI_KEYSTONE
+CONFIG_USB_XHCI_OMAP
+CONFIG_USB_XHCI_PCI
+CONFIG_USB_XHCI_ZYNQMP
+CONFIG_USER_LOWLEVEL_INIT
+CONFIG_USE_ARCH_MEMCPY
+CONFIG_USE_ARCH_MEMSET
+CONFIG_USE_FDT
+CONFIG_USE_INTERRUPT
+CONFIG_USE_IRQ
+CONFIG_USE_NAND
+CONFIG_USE_NETDEV
+CONFIG_USE_NOR
+CONFIG_USE_ONENAND_BOARD_INIT
+CONFIG_USE_SPIFLASH
+CONFIG_USE_STDINT
+CONFIG_USE_TTY
+CONFIG_UTBIPAR_INIT_TBIPA
+CONFIG_U_BOOT_HDR_ADDR
+CONFIG_U_BOOT_HDR_SIZE
+CONFIG_U_QE
+CONFIG_V38B
+CONFIG_VAL
+CONFIG_VAR_SIZE_SPL
+CONFIG_VCMA9
+CONFIG_VCO_HZ
+CONFIG_VCO_MULT
+CONFIG_VCT_NOR
+CONFIG_VE8313
+CONFIG_VERY_BIG_RAM
+CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP
+CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
+CONFIG_VF610
+CONFIG_VGA_AS_SINGLE_DEVICE
+CONFIG_VID
+CONFIG_VIDEO_BCM2835
+CONFIG_VIDEO_BMP_GZIP
+CONFIG_VIDEO_BMP_LOGO
+CONFIG_VIDEO_BMP_RLE8
+CONFIG_VIDEO_CORALP
+CONFIG_VIDEO_CT69000
+CONFIG_VIDEO_DA8XX
+CONFIG_VIDEO_DT_SIMPLEFB
+CONFIG_VIDEO_FONT_4X6
+CONFIG_VIDEO_HW_CURSOR
+CONFIG_VIDEO_IPUV3
+CONFIG_VIDEO_LCD_I2C_BUS
+CONFIG_VIDEO_LOGO
+CONFIG_VIDEO_MB862xx
+CONFIG_VIDEO_MB862xx_ACCEL
+CONFIG_VIDEO_MX3
+CONFIG_VIDEO_MXS
+CONFIG_VIDEO_MXS_MODE_SYSTEM
+CONFIG_VIDEO_OMAP3
+CONFIG_VIDEO_ONBOARD
+CONFIG_VIDEO_SED13806
+CONFIG_VIDEO_SM501
+CONFIG_VIDEO_SM501_16BPP
+CONFIG_VIDEO_SM501_32BPP
+CONFIG_VIDEO_SM501_8BPP
+CONFIG_VIDEO_SM501_PCI
+CONFIG_VIDEO_SMI_LYNXEM
+CONFIG_VIDEO_STD_TIMINGS
+CONFIG_VIDEO_SUNXI
+CONFIG_VIDEO_SW_CURSOR
+CONFIG_VIDEO_VCXK
+CONFIG_VID_FLS_ENV
+CONFIG_VM86
+CONFIG_VME8349
+CONFIG_VOIPAC_LCD
+CONFIG_VOL_MONITOR_INA220
+CONFIG_VOL_MONITOR_IR36021_READ
+CONFIG_VOL_MONITOR_IR36021_SET
+CONFIG_VOM405
+CONFIG_VR_CTL_CLKBUF
+CONFIG_VR_CTL_FREQ
+CONFIG_VR_CTL_VAL
+CONFIG_VR_CTL_VLEV
+CONFIG_VSC7385_ENET
+CONFIG_VSC7385_IMAGE
+CONFIG_VSC7385_IMAGE_SIZE
+CONFIG_VSC9953
+CONFIG_VSC_CROSSBAR
+CONFIG_WALNUT
+CONFIG_WATCHDOG
+CONFIG_WATCHDOG_BASEADDR
+CONFIG_WATCHDOG_IRQ
+CONFIG_WATCHDOG_NOWAYOUT
+CONFIG_WATCHDOG_PRESC
+CONFIG_WATCHDOG_RC
+CONFIG_WATCHDOG_TIMEOUT
+CONFIG_WATCHDOG_TIMEOUT_MSECS
+CONFIG_WDOG_GPIO_PIN
+CONFIG_WD_MAX_RATE
+CONFIG_WD_PERIOD
+CONFIG_WINBOND_83C553
+CONFIG_X600
+CONFIG_X86EMU_DEBUG
+CONFIG_X86EMU_RAW_IO
+CONFIG_X86_64
+CONFIG_X86_BSWAP
+CONFIG_X86_MRC_ADDR
+CONFIG_X86_REFCODE_ADDR
+CONFIG_X86_REFCODE_RUN_ADDR
+CONFIG_XGI_XG22_BASE
+CONFIG_XILINX_405
+CONFIG_XILINX_440
+CONFIG_XILINX_GPIO
+CONFIG_XILINX_LL_TEMAC
+CONFIG_XILINX_LL_TEMAC_CLK
+CONFIG_XILINX_PPC440_GENERIC
+CONFIG_XILINX_SPI_IDLE_VAL
+CONFIG_XILINX_TB_WATCHDOG
+CONFIG_XPEDITE1000
+CONFIG_XPEDITE5140
+CONFIG_XPEDITE5200
+CONFIG_XPEDITE5370
+CONFIG_XPEDITE550X
+CONFIG_XR16L2751
+CONFIG_XSENGINE
+CONFIG_XTFPGA
+CONFIG_YAFFS2
+CONFIG_YAFFSFS_PROVIDE_VALUES
+CONFIG_YAFFS_AUTO_UNICODE
+CONFIG_YAFFS_CASE_INSENSITIVE
+CONFIG_YAFFS_DEFINES_TYPES
+CONFIG_YAFFS_DIRECT
+CONFIG_YAFFS_PROVIDE_DEFS
+CONFIG_YAFFS_UNICODE
+CONFIG_YAFFS_UTIL
+CONFIG_YAFFS_WINCE
+CONFIG_YELLOWSTONE
+CONFIG_YELLOW_LED
+CONFIG_YOSEMITE
+CONFIG_ZBOOT_32
+CONFIG_ZC770_XM010
+CONFIG_ZC770_XM011
+CONFIG_ZC770_XM012
+CONFIG_ZC770_XM013
+CONFIG_ZLIB
+CONFIG_ZLT
+CONFIG_ZM7300
+CONFIG_ZYNQMP_EEPROM
+CONFIG_ZYNQMP_XHCI_LIST
+CONFIG_ZYNQ_EEPROM
+CONFIG_ZYNQ_EEPROM_BUS
+CONFIG_ZYNQ_GEM_EEPROM_ADDR
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
+CONFIG_ZYNQ_HISPD_BROKEN
+CONFIG_ZYNQ_I2C0
+CONFIG_ZYNQ_I2C1
+CONFIG_ZYNQ_PS_CLK_FREQ
+CONFIG_ZYNQ_SDHCI0
+CONFIG_ZYNQ_SDHCI1
+CONFIG_ZYNQ_SDHCI_MAX_FREQ
+CONFIG_ZYNQ_SDHCI_MIN_FREQ
+CONFIG_ZYNQ_SERIAL
+CONFIG_eTSEC_MDIO_BUS
+CONFIG_n
+CONFIG_prefix
+CONFIG_xxx
diff --git a/test/fs/fs-test.sh b/test/fs/fs-test.sh
index 93679cb..6e71b61 100755
--- a/test/fs/fs-test.sh
+++ b/test/fs/fs-test.sh
@@ -9,14 +9,14 @@
# It currently tests the fs/sb and native commands for ext4 and fat partitions
# Expected results are as follows:
# EXT4 tests:
-# fs-test.sb.ext4.out: Summary: PASS: 17 FAIL: 2
-# fs-test.ext4.out: Summary: PASS: 10 FAIL: 9
-# fs-test.fs.ext4.out: Summary: PASS: 10 FAIL: 9
+# fs-test.sb.ext4.out: Summary: PASS: 23 FAIL: 0
+# fs-test.ext4.out: Summary: PASS: 14 FAIL: 9
+# fs-test.fs.ext4.out: Summary: PASS: 14 FAIL: 9
# FAT tests:
-# fs-test.sb.fat.out: Summary: PASS: 17 FAIL: 2
-# fs-test.fat.out: Summary: PASS: 19 FAIL: 0
-# fs-test.fs.fat.out: Summary: PASS: 19 FAIL: 0
-# Total Summary: TOTAL PASS: 92 TOTAL FAIL: 22
+# fs-test.sb.fat.out: Summary: PASS: 23 FAIL: 0
+# fs-test.fat.out: Summary: PASS: 20 FAIL: 3
+# fs-test.fs.fat.out: Summary: PASS: 20 FAIL: 3
+# Total Summary: TOTAL PASS: 114 TOTAL FAIL: 24
# pre-requisite binaries list.
PREREQ_BINS="md5sum mkfs mount umount dd fallocate mkdir"
@@ -135,22 +135,6 @@
fi
}
-# 1st parameter is the FS type: fat/ext4
-# 2nd parameter is the name of small file
-# Returns filename which can be used for fat or ext4 for writing
-function fname_for_write() {
- case $1 in
- ext4)
- # ext4 needs absolute path name of file
- echo /${2}.w
- ;;
-
- *)
- echo ${2}.w
- ;;
- esac
-}
-
# 1st parameter is image file
# 2nd parameter is file system type - fat/ext4
# 3rd parameter is name of small file
@@ -166,11 +150,14 @@
case "$2" in
fat)
+ FPATH=""
PREFIX="fat"
WRITE="write"
;;
ext4)
+ # ext4 needs absolute path
+ FPATH="/"
PREFIX="ext4"
WRITE="write"
;;
@@ -205,16 +192,15 @@
esac
- if [ -z "$6" ]; then
- FILE_WRITE=`fname_for_write $2 $3`
- FILE_SMALL=$3
- FILE_BIG=$4
- else
- FILE_WRITE=$6/`fname_for_write $2 $3`
- FILE_SMALL=$6/$3
- FILE_BIG=$6/$4
+ # sb always uses full path to mointpoint, irrespective of filesystem
+ if [ "$5" = "sb" ]; then
+ FPATH=${6}/
fi
+ FILE_WRITE=${3}.w
+ FILE_SMALL=$3
+ FILE_BIG=$4
+
# In u-boot commands, <interface> stands for host or hostfs
# hostfs maps to the host fs.
# host maps to the "sb bind" that we do
@@ -230,13 +216,13 @@
# sb size hostfs - $3 for hostfs commands.
# 1MB is 0x0010 0000
# Test Case 2 - size of small file
-${PREFIX}size host${SUFFIX} $FILE_SMALL
+${PREFIX}size host${SUFFIX} ${FPATH}$FILE_SMALL
printenv filesize
setenv filesize
# 2.5GB (1024*1024*2500) is 0x9C40 0000
# Test Case 3 - size of big file
-${PREFIX}size host${SUFFIX} $FILE_BIG
+${PREFIX}size host${SUFFIX} ${FPATH}$FILE_BIG
printenv filesize
setenv filesize
@@ -245,14 +231,14 @@
# Last two parameters are size and offset.
# Test Case 4a - Read full 1MB of small file
-${PREFIX}load host${SUFFIX} $addr $FILE_SMALL
+${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_SMALL
printenv filesize
# Test Case 4b - Read full 1MB of small file
md5sum $addr \$filesize
setenv filesize
# Test Case 5a - First 1MB of big file
-${PREFIX}load host${SUFFIX} $addr $FILE_BIG $length 0x0
+${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG $length 0x0
printenv filesize
# Test Case 5b - First 1MB of big file
md5sum $addr \$filesize
@@ -260,7 +246,7 @@
# fails for ext as no offset support
# Test Case 6a - Last 1MB of big file
-${PREFIX}load host${SUFFIX} $addr $FILE_BIG $length 0x9C300000
+${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG $length 0x9C300000
printenv filesize
# Test Case 6b - Last 1MB of big file
md5sum $addr \$filesize
@@ -268,7 +254,7 @@
# fails for ext as no offset support
# Test Case 7a - One from the last 1MB chunk of 2GB
-${PREFIX}load host${SUFFIX} $addr $FILE_BIG $length 0x7FF00000
+${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG $length 0x7FF00000
printenv filesize
# Test Case 7b - One from the last 1MB chunk of 2GB
md5sum $addr \$filesize
@@ -276,7 +262,7 @@
# fails for ext as no offset support
# Test Case 8a - One from the start 1MB chunk from 2GB
-${PREFIX}load host${SUFFIX} $addr $FILE_BIG $length 0x80000000
+${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG $length 0x80000000
printenv filesize
# Test Case 8b - One from the start 1MB chunk from 2GB
md5sum $addr \$filesize
@@ -284,7 +270,7 @@
# fails for ext as no offset support
# Test Case 9a - One 1MB chunk crossing the 2GB boundary
-${PREFIX}load host${SUFFIX} $addr $FILE_BIG $length 0x7FF80000
+${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG $length 0x7FF80000
printenv filesize
# Test Case 9b - One 1MB chunk crossing the 2GB boundary
md5sum $addr \$filesize
@@ -292,21 +278,44 @@
# Generic failure case
# Test Case 10 - 2MB chunk from the last 1MB of big file
-${PREFIX}load host${SUFFIX} $addr $FILE_BIG 0x00200000 0x9C300000
+${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG 0x00200000 0x9C300000
printenv filesize
#
# Read 1MB from small file
-${PREFIX}load host${SUFFIX} $addr $FILE_SMALL
+${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_SMALL
# Write it back to test the writes
# Test Case 11a - Check that the write succeeded
-${PREFIX}${WRITE} host${SUFFIX} $addr $FILE_WRITE \$filesize
+${PREFIX}${WRITE} host${SUFFIX} $addr ${FPATH}$FILE_WRITE \$filesize
mw.b $addr 00 100
-${PREFIX}load host${SUFFIX} $addr $FILE_WRITE
+${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_WRITE
# Test Case 11b - Check md5 of written to is same as the one read from
md5sum $addr \$filesize
setenv filesize
#
+
+# Next test case checks writing a file whose dirent
+# is the first in the block, which is always true for "."
+# The write should fail, but the lookup should work
+# Test Case 12 - Check directory traversal
+${PREFIX}${WRITE} host${SUFFIX} $addr ${FPATH}. 0x10
+
+# Read 1MB from small file
+${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_SMALL
+# Write it via "same directory", i.e. "." dirent
+# Test Case 13a - Check directory traversal
+${PREFIX}${WRITE} host${SUFFIX} $addr ${FPATH}./${FILE_WRITE}2 \$filesize
+mw.b $addr 00 100
+${PREFIX}load host${SUFFIX} $addr ${FPATH}./${FILE_WRITE}2
+# Test Case 13b - Check md5 of written to is same as the one read from
+md5sum $addr \$filesize
+setenv filesize
+mw.b $addr 00 100
+${PREFIX}load host${SUFFIX} $addr ${FPATH}${FILE_WRITE}2
+# Test Case 13c - Check md5 of written to is same as the one read from
+md5sum $addr \$filesize
+setenv filesize
+#
reset
EOF
@@ -343,9 +352,10 @@
&> /dev/null
fi
- # Delete the small file which possibly is written as part of a
+ # Delete the small file copies which possibly are written as part of a
# previous test.
sudo rm -f "${MB1}.w"
+ sudo rm -f "${MB1}.w2"
# Generate the md5sums of reads that we will test against small file
dd if="${MB1}" bs=1M skip=0 count=1 2> /dev/null | md5sum > "$2"
@@ -400,7 +410,7 @@
# md5sum in u-boot has output of form:
# md5 for 01000008 ... 01100007 ==> <md5>
# the 7th field is the actual md5
- md5_src=`grep -A3 "$1" "$2" | grep "md5 for" | tr -d '\r'`
+ md5_src=`grep -A2 "$1" "$2" | grep "md5 for" | tr -d '\r'`
md5_src=($md5_src)
md5_src=${md5_src[6]}
@@ -445,48 +455,60 @@
pass_fail "TC3: size of $4"
# Check read full mb of 1MB.file
- grep -A6 "Test Case 4a " "$1" | grep -q "filesize=100000"
+ grep -A4 "Test Case 4a " "$1" | grep -q "filesize=100000"
pass_fail "TC4: load of $3 size"
check_md5 "Test Case 4b " "$1" "$2" 1 "TC4: load from $3"
# Check first mb of 2.5GB.file
- grep -A6 "Test Case 5a " "$1" | grep -q "filesize=100000"
+ grep -A4 "Test Case 5a " "$1" | grep -q "filesize=100000"
pass_fail "TC5: load of 1st MB from $4 size"
check_md5 "Test Case 5b " "$1" "$2" 2 "TC5: load of 1st MB from $4"
# Check last mb of 2.5GB.file
- grep -A6 "Test Case 6a " "$1" | grep -q "filesize=100000"
+ grep -A4 "Test Case 6a " "$1" | grep -q "filesize=100000"
pass_fail "TC6: load of last MB from $4 size"
check_md5 "Test Case 6b " "$1" "$2" 3 "TC6: load of last MB from $4"
# Check last 1mb chunk of 2gb from 2.5GB file
- grep -A6 "Test Case 7a " "$1" | grep -q "filesize=100000"
+ grep -A4 "Test Case 7a " "$1" | grep -q "filesize=100000"
pass_fail "TC7: load of last 1mb chunk of 2GB from $4 size"
check_md5 "Test Case 7b " "$1" "$2" 4 \
"TC7: load of last 1mb chunk of 2GB from $4"
# Check first 1mb chunk after 2gb from 2.5GB file
- grep -A6 "Test Case 8a " "$1" | grep -q "filesize=100000"
+ grep -A4 "Test Case 8a " "$1" | grep -q "filesize=100000"
pass_fail "TC8: load 1st MB chunk after 2GB from $4 size"
check_md5 "Test Case 8b " "$1" "$2" 5 \
"TC8: load 1st MB chunk after 2GB from $4"
# Check 1mb chunk crossing the 2gb boundary from 2.5GB file
- grep -A6 "Test Case 9a " "$1" | grep -q "filesize=100000"
+ grep -A4 "Test Case 9a " "$1" | grep -q "filesize=100000"
pass_fail "TC9: load 1MB chunk crossing 2GB boundary from $4 size"
check_md5 "Test Case 9b " "$1" "$2" 6 \
"TC9: load 1MB chunk crossing 2GB boundary from $4"
# Check 2mb chunk from the last 1MB of 2.5GB file loads 1MB
- grep -A6 "Test Case 10 " "$1" | grep -q "filesize=100000"
+ grep -A5 "Test Case 10 " "$1" | grep -q "filesize=100000"
pass_fail "TC10: load 2MB from the last 1MB of $4 loads 1MB"
# Check 1mb chunk write
- grep -A3 "Test Case 11a " "$1" | \
- egrep -q '1048576 bytes written|update journal'
- pass_fail "TC11: 1MB write to $5 - write succeeded"
+ grep -A2 "Test Case 11a " "$1" | grep -q '1048576 bytes written'
+ pass_fail "TC11: 1MB write to $3.w - write succeeded"
check_md5 "Test Case 11b " "$1" "$2" 1 \
- "TC11: 1MB write to $5 - content verified"
+ "TC11: 1MB write to $3.w - content verified"
+
+ # Check lookup of 'dot' directory
+ grep -A4 "Test Case 12 " "$1" | grep -q 'Unable to write file'
+ pass_fail "TC12: 1MB write to . - write denied"
+
+ # Check directory traversal
+ grep -A2 "Test Case 13a " "$1" | grep -q '1048576 bytes written'
+ pass_fail "TC13: 1MB write to ./$3.w2 - write succeeded"
+ check_md5 "Test Case 13b " "$1" "$2" 1 \
+ "TC13: 1MB read from ./$3.w2 - content verified"
+ check_md5 "Test Case 13c " "$1" "$2" 1 \
+ "TC13: 1MB read from $3.w2 - content verified"
+
echo "** End $1"
}
@@ -500,8 +522,12 @@
OUT_FILE="${OUT}.$1.${fs}.out"
test_image $IMAGE $fs $SMALL_FILE $BIG_FILE $1 "" \
> ${OUT_FILE} 2>&1
- check_results $OUT_FILE $MD5_FILE_FS $SMALL_FILE $BIG_FILE \
- $WRITE_FILE
+ # strip out noise from fs code
+ grep -v -e "File System is consistent\|update journal finished" \
+ -e "reading .*\.file\|writing .*\.file.w" \
+ < ${OUT_FILE} > ${OUT_FILE}_clean
+ check_results ${OUT_FILE}_clean $MD5_FILE_FS $SMALL_FILE \
+ $BIG_FILE
TOTAL_FAIL=$((TOTAL_FAIL + FAIL))
TOTAL_PASS=$((TOTAL_PASS + PASS))
echo "Summary: PASS: $PASS FAIL: $FAIL"
@@ -551,8 +577,7 @@
sudo umount "$MOUNT_DIR"
rmdir "$MOUNT_DIR"
- check_results $OUT_FILE $MD5_FILE_FS $SMALL_FILE $BIG_FILE \
- $WRITE_FILE
+ check_results $OUT_FILE $MD5_FILE_FS $SMALL_FILE $BIG_FILE
TOTAL_FAIL=$((TOTAL_FAIL + FAIL))
TOTAL_PASS=$((TOTAL_PASS + PASS))
echo "Summary: PASS: $PASS FAIL: $FAIL"
diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py
index 021892b..6e62820 100644
--- a/test/py/tests/test_vboot.py
+++ b/test/py/tests/test_vboot.py
@@ -53,7 +53,7 @@
util.run_and_log(cons, 'dtc %s %s%s -O dtb '
'-o %s%s' % (dtc_args, datadir, dts, tmpdir, dtb))
- def run_bootm(sha_algo, test_type, expect_string):
+ def run_bootm(sha_algo, test_type, expect_string, boots):
"""Run a 'bootm' command U-Boot.
This always starts a fresh U-Boot instance since the device tree may
@@ -64,6 +64,8 @@
expect_string: A string which is expected in the output.
sha_algo: Either 'sha1' or 'sha256', to select the algorithm to
use.
+ boots: A boolean that is True if Linux should boot and False if
+ we are expected to not boot
"""
cons.restart_uboot()
with cons.log.section('Verified boot %s %s' % (sha_algo, test_type)):
@@ -72,6 +74,8 @@
'fdt addr 100',
'bootm 100'])
assert(expect_string in ''.join(output))
+ if boots:
+ assert('sandbox: continuing, as we cannot run' in ''.join(output))
def make_fit(its):
"""Make a new FIT from the .its source file.
@@ -117,22 +121,22 @@
# Build the FIT, but don't sign anything yet
cons.log.action('%s: Test FIT with signed images' % sha_algo)
make_fit('sign-images-%s.its' % sha_algo)
- run_bootm(sha_algo, 'unsigned images', 'dev-')
+ run_bootm(sha_algo, 'unsigned images', 'dev-', True)
# Sign images with our dev keys
sign_fit(sha_algo)
- run_bootm(sha_algo, 'signed images', 'dev+')
+ run_bootm(sha_algo, 'signed images', 'dev+', True)
# Create a fresh .dtb without the public keys
dtc('sandbox-u-boot.dts')
cons.log.action('%s: Test FIT with signed configuration' % sha_algo)
make_fit('sign-configs-%s.its' % sha_algo)
- run_bootm(sha_algo, 'unsigned config', '%s+ OK' % sha_algo)
+ run_bootm(sha_algo, 'unsigned config', '%s+ OK' % sha_algo, True)
# Sign images with our dev keys
sign_fit(sha_algo)
- run_bootm(sha_algo, 'signed config', 'dev+')
+ run_bootm(sha_algo, 'signed config', 'dev+', True)
cons.log.action('%s: Check signed config on the host' % sha_algo)
@@ -149,7 +153,7 @@
util.run_and_log(cons, 'fdtput -t bx %s %s value %s' %
(fit, sig_node, sig))
- run_bootm(sha_algo, 'Signed config with bad hash', 'Bad Data Hash')
+ run_bootm(sha_algo, 'Signed config with bad hash', 'Bad Data Hash', False)
cons.log.action('%s: Check bad config on the host' % sha_algo)
util.run_and_log_expect_exception(cons, [fit_check_sign, '-f', fit,
diff --git a/tools/buildman/control.py b/tools/buildman/control.py
index b86d7b3..0b6ab03 100644
--- a/tools/buildman/control.py
+++ b/tools/buildman/control.py
@@ -237,7 +237,7 @@
options.step = len(series.commits) - 1
gnu_make = command.Output(os.path.join(options.git,
- 'scripts/show-gnu-make')).rstrip()
+ 'scripts/show-gnu-make'), raise_on_error=False).rstrip()
if not gnu_make:
sys.exit('GNU Make not found')
diff --git a/tools/dtoc/dtoc.py b/tools/dtoc/dtoc.py
index ec80abe..518aa51 100755
--- a/tools/dtoc/dtoc.py
+++ b/tools/dtoc/dtoc.py
@@ -9,27 +9,16 @@
import copy
from optparse import OptionError, OptionParser
import os
+import struct
import sys
-import fdt_util
-
# Bring in the patman libraries
our_path = os.path.dirname(os.path.realpath(__file__))
sys.path.append(os.path.join(our_path, '../patman'))
-# Bring in either the normal fdt library (which relies on libfdt) or the
-# fallback one (which uses fdtget and is slower). Both provide the same
-# interfface for this file to use.
-try:
- from fdt import Fdt
- import fdt
- have_libfdt = True
-except ImportError:
- have_libfdt = False
- from fdt_fallback import Fdt
- import fdt_fallback as fdt
-
-import struct
+import fdt
+import fdt_select
+import fdt_util
# When we see these properties we ignore them - i.e. do not create a structure member
PROP_IGNORE_LIST = [
@@ -45,10 +34,10 @@
# C type declarations for the tyues we support
TYPE_NAMES = {
- fdt_util.TYPE_INT: 'fdt32_t',
- fdt_util.TYPE_BYTE: 'unsigned char',
- fdt_util.TYPE_STRING: 'const char *',
- fdt_util.TYPE_BOOL: 'bool',
+ fdt.TYPE_INT: 'fdt32_t',
+ fdt.TYPE_BYTE: 'unsigned char',
+ fdt.TYPE_STRING: 'const char *',
+ fdt.TYPE_BOOL: 'bool',
};
STRUCT_PREFIX = 'dtd_'
@@ -150,13 +139,13 @@
type: Data type (fdt_util)
value: Data value, as a string of bytes
"""
- if type == fdt_util.TYPE_INT:
+ if type == fdt.TYPE_INT:
return '%#x' % fdt_util.fdt32_to_cpu(value)
- elif type == fdt_util.TYPE_BYTE:
+ elif type == fdt.TYPE_BYTE:
return '%#x' % ord(value[0])
- elif type == fdt_util.TYPE_STRING:
+ elif type == fdt.TYPE_STRING:
return '"%s"' % value
- elif type == fdt_util.TYPE_BOOL:
+ elif type == fdt.TYPE_BOOL:
return 'true'
def GetCompatName(self, node):
@@ -178,8 +167,7 @@
Once this is done, self.fdt.GetRoot() can be called to obtain the
device tree root node, and progress from there.
"""
- self.fdt = Fdt(self._dtb_fname)
- self.fdt.Scan()
+ self.fdt = fdt_select.FdtScan(self._dtb_fname)
def ScanTree(self):
"""Scan the device tree for useful information
diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py
index 1d913a9..816fdbe 100644
--- a/tools/dtoc/fdt.py
+++ b/tools/dtoc/fdt.py
@@ -6,17 +6,26 @@
# SPDX-License-Identifier: GPL-2.0+
#
-import fdt_util
-import libfdt
+import struct
import sys
+import fdt_util
+
-# This deals with a device tree, presenting it as a list of Node and Prop
-# objects, representing nodes and properties, respectively.
-#
-# This implementation uses a libfdt Python library to access the device tree,
-# so it is fairly efficient.
+# This deals with a device tree, presenting it as an assortment of Node and
+# Prop objects, representing nodes and properties, respectively. This file
+# contains the base classes and defines the high-level API. Most of the
+# implementation is in the FdtFallback and FdtNormal subclasses. See
+# fdt_select.py for how to create an Fdt object.
-class Prop:
+# A list of types we support
+(TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL) = range(4)
+
+def CheckErr(errnum, msg):
+ if errnum:
+ raise ValueError('Error %d: %s: %s' %
+ (errnum, libfdt.fdt_strerror(errnum), msg))
+
+class PropBase:
"""A device tree property
Properties:
@@ -25,14 +34,11 @@
bytes
type: Value type
"""
- def __init__(self, name, bytes):
+ def __init__(self, node, offset, name):
+ self._node = node
+ self._offset = offset
self.name = name
self.value = None
- if not bytes:
- self.type = fdt_util.TYPE_BOOL
- self.value = True
- return
- self.type, self.value = fdt_util.BytesToValue(bytes)
def GetPhandle(self):
"""Get a (single) phandle value from a property
@@ -71,12 +77,85 @@
self.value = [self.value]
if type(self.value) == list and len(newprop.value) > len(self.value):
- val = fdt_util.GetEmpty(self.type)
+ val = self.GetEmpty(self.type)
while len(self.value) < len(newprop.value):
self.value.append(val)
+ def BytesToValue(self, bytes):
+ """Converts a string of bytes into a type and value
-class Node:
+ Args:
+ A string containing bytes
+
+ Return:
+ A tuple:
+ Type of data
+ Data, either a single element or a list of elements. Each element
+ is one of:
+ TYPE_STRING: string value from the property
+ TYPE_INT: a byte-swapped integer stored as a 4-byte string
+ TYPE_BYTE: a byte stored as a single-byte string
+ """
+ size = len(bytes)
+ strings = bytes.split('\0')
+ is_string = True
+ count = len(strings) - 1
+ if count > 0 and not strings[-1]:
+ for string in strings[:-1]:
+ if not string:
+ is_string = False
+ break
+ for ch in string:
+ if ch < ' ' or ch > '~':
+ is_string = False
+ break
+ else:
+ is_string = False
+ if is_string:
+ if count == 1:
+ return TYPE_STRING, strings[0]
+ else:
+ return TYPE_STRING, strings[:-1]
+ if size % 4:
+ if size == 1:
+ return TYPE_BYTE, bytes[0]
+ else:
+ return TYPE_BYTE, list(bytes)
+ val = []
+ for i in range(0, size, 4):
+ val.append(bytes[i:i + 4])
+ if size == 4:
+ return TYPE_INT, val[0]
+ else:
+ return TYPE_INT, val
+
+ def GetEmpty(self, type):
+ """Get an empty / zero value of the given type
+
+ Returns:
+ A single value of the given type
+ """
+ if type == TYPE_BYTE:
+ return chr(0)
+ elif type == TYPE_INT:
+ return struct.pack('<I', 0);
+ elif type == TYPE_STRING:
+ return ''
+ else:
+ return True
+
+ def GetOffset(self):
+ """Get the offset of a property
+
+ This can be implemented by subclasses.
+
+ Returns:
+ The offset of the property (struct fdt_property) within the
+ file, or None if not known.
+ """
+ return None
+
+class NodeBase:
"""A device tree node
Properties:
@@ -89,32 +168,42 @@
Keyed by property name
"""
def __init__(self, fdt, offset, name, path):
- self.offset = offset
+ self._fdt = fdt
+ self._offset = offset
self.name = name
self.path = path
- self._fdt = fdt
self.subnodes = []
self.props = {}
+ def _FindNode(self, name):
+ """Find a node given its name
+
+ Args:
+ name: Node name to look for
+ Returns:
+ Node object if found, else None
+ """
+ for subnode in self.subnodes:
+ if subnode.name == name:
+ return subnode
+ return None
+
def Scan(self):
- """Scan a node's properties and subnodes
+ """Scan the subnodes of a node
- This fills in the props and subnodes properties, recursively
- searching into subnodes so that the entire tree is built.
+ This should be implemented by subclasses
"""
- self.props = self._fdt.GetProps(self.path)
+ raise NotImplementedError()
- offset = libfdt.fdt_first_subnode(self._fdt.GetFdt(), self.offset)
- while offset >= 0:
- sep = '' if self.path[-1] == '/' else '/'
- name = libfdt.Name(self._fdt.GetFdt(), offset)
- path = self.path + sep + name
- node = Node(self._fdt, offset, name, path)
- self.subnodes.append(node)
+ def DeleteProp(self, prop_name):
+ """Delete a property of a node
- node.Scan()
- offset = libfdt.fdt_next_subnode(self._fdt.GetFdt(), offset)
+ This should be implemented by subclasses
+ Args:
+ prop_name: Name of the property to delete
+ """
+ raise NotImplementedError()
class Fdt:
"""Provides simple access to a flat device tree blob.
@@ -123,26 +212,20 @@
fname: Filename of fdt
_root: Root of device tree (a Node object)
"""
-
def __init__(self, fname):
- self.fname = fname
- with open(fname) as fd:
- self._fdt = fd.read()
-
- def GetFdt(self):
- """Get the contents of the FDT
-
- Returns:
- The FDT contents as a string of bytes
- """
- return self._fdt
+ self._fname = fname
- def Scan(self):
+ def Scan(self, root='/'):
"""Scan a device tree, building up a tree of Node objects
This fills in the self._root property
+
+ Args:
+ root: Ignored
+
+ TODO(sjg@chromium.org): Implement the 'root' parameter
"""
- self._root = Node(self, 0, '/', '/')
+ self._root = self.Node(self, 0, '/', '/')
self._root.Scan()
def GetRoot(self):
@@ -153,28 +236,34 @@
"""
return self._root
- def GetProps(self, node):
- """Get all properties from a node.
+ def GetNode(self, path):
+ """Look up a node from its path
Args:
- node: Full path to node name to look in.
-
+ path: Path to look up, e.g. '/microcode/update@0'
Returns:
- A dictionary containing all the properties, indexed by node name.
- The entries are Prop objects.
+ Node object, or None if not found
+ """
+ node = self._root
+ for part in path.split('/')[1:]:
+ node = node._FindNode(part)
+ if not node:
+ return None
+ return node
- Raises:
- ValueError: if the node does not exist.
+ def Flush(self):
+ """Flush device tree changes back to the file
+
+ If the device tree has changed in memory, write it back to the file.
+ Subclasses can implement this if needed.
"""
- offset = libfdt.fdt_path_offset(self._fdt, node)
- if offset < 0:
- libfdt.Raise(offset)
- props_dict = {}
- poffset = libfdt.fdt_first_property_offset(self._fdt, offset)
- while poffset >= 0:
- dprop, plen = libfdt.fdt_get_property_by_offset(self._fdt, poffset)
- prop = Prop(libfdt.String(self._fdt, dprop.nameoff), libfdt.Data(dprop))
- props_dict[prop.name] = prop
+ pass
- poffset = libfdt.fdt_next_property_offset(self._fdt, poffset)
- return props_dict
+ def Pack(self):
+ """Pack the device tree down to its minimum size
+
+ When nodes and properties shrink or are deleted, wasted space can
+ build up in the device tree binary. Subclasses can implement this
+ to remove that spare space.
+ """
+ pass
diff --git a/tools/dtoc/fdt_fallback.py b/tools/dtoc/fdt_fallback.py
index 9ed11e4..0c0ebbc 100644
--- a/tools/dtoc/fdt_fallback.py
+++ b/tools/dtoc/fdt_fallback.py
@@ -7,6 +7,8 @@
#
import command
+import fdt
+from fdt import Fdt, NodeBase, PropBase
import fdt_util
import sys
@@ -17,7 +19,7 @@
# is not very efficient for larger trees. The tool is called once for each
# node and property in the tree.
-class Prop:
+class Prop(PropBase):
"""A device tree property
Properties:
@@ -26,58 +28,17 @@
bytes
type: Value type
"""
- def __init__(self, name, byte_list_str):
- self.name = name
- self.value = None
+ def __init__(self, node, name, byte_list_str):
+ PropBase.__init__(self, node, 0, name)
if not byte_list_str.strip():
- self.type = fdt_util.TYPE_BOOL
+ self.type = fdt.TYPE_BOOL
return
- bytes = [chr(int(byte, 16)) for byte in byte_list_str.strip().split(' ')]
- self.type, self.value = fdt_util.BytesToValue(''.join(bytes))
+ self.bytes = [chr(int(byte, 16))
+ for byte in byte_list_str.strip().split(' ')]
+ self.type, self.value = self.BytesToValue(''.join(self.bytes))
- def GetPhandle(self):
- """Get a (single) phandle value from a property
- Gets the phandle valuie from a property and returns it as an integer
- """
- return fdt_util.fdt32_to_cpu(self.value[:4])
-
- def Widen(self, newprop):
- """Figure out which property type is more general
-
- Given a current property and a new property, this function returns the
- one that is less specific as to type. The less specific property will
- be ble to represent the data in the more specific property. This is
- used for things like:
-
- node1 {
- compatible = "fred";
- value = <1>;
- };
- node1 {
- compatible = "fred";
- value = <1 2>;
- };
-
- He we want to use an int array for 'value'. The first property
- suggests that a single int is enough, but the second one shows that
- it is not. Calling this function with these two propertes would
- update the current property to be like the second, since it is less
- specific.
- """
- if newprop.type < self.type:
- self.type = newprop.type
-
- if type(newprop.value) == list and type(self.value) != list:
- self.value = newprop.value
-
- if type(self.value) == list and len(newprop.value) > len(self.value):
- val = fdt_util.GetEmpty(self.type)
- while len(self.value) < len(newprop.value):
- self.value.append(val)
-
-
-class Node:
+class Node(NodeBase):
"""A device tree node
Properties:
@@ -88,12 +49,8 @@
props: A dict of properties for this node, each a Prop object.
Keyed by property name
"""
- def __init__(self, fdt, name, path):
- self.name = name
- self.path = path
- self._fdt = fdt
- self.subnodes = []
- self.props = {}
+ def __init__(self, fdt, offset, name, path):
+ NodeBase.__init__(self, fdt, offset, name, path)
def Scan(self):
"""Scan a node's properties and subnodes
@@ -102,44 +59,42 @@
searching into subnodes so that the entire tree is built.
"""
for name, byte_list_str in self._fdt.GetProps(self.path).iteritems():
- prop = Prop(name, byte_list_str)
+ prop = Prop(self, name, byte_list_str)
self.props[name] = prop
for name in self._fdt.GetSubNodes(self.path):
sep = '' if self.path[-1] == '/' else '/'
path = self.path + sep + name
- node = Node(self._fdt, name, path)
+ node = Node(self._fdt, 0, name, path)
self.subnodes.append(node)
node.Scan()
+ def DeleteProp(self, prop_name):
+ """Delete a property of a node
+
+ The property is deleted using fdtput.
+
+ Args:
+ prop_name: Name of the property to delete
+ Raises:
+ CommandError if the property does not exist
+ """
+ args = [self._fdt._fname, '-d', self.path, prop_name]
+ command.Output('fdtput', *args)
+ del self.props[prop_name]
-class Fdt:
- """Provides simple access to a flat device tree blob.
+class FdtFallback(Fdt):
+ """Provides simple access to a flat device tree blob using fdtget/fdtput
Properties:
- fname: Filename of fdt
- _root: Root of device tree (a Node object)
+ See superclass
"""
def __init__(self, fname):
- self.fname = fname
-
- def Scan(self):
- """Scan a device tree, building up a tree of Node objects
-
- This fills in the self._root property
- """
- self._root = Node(self, '/', '/')
- self._root.Scan()
-
- def GetRoot(self):
- """Get the root Node of the device tree
-
- Returns:
- The root Node object
- """
- return self._root
+ Fdt.__init__(self, fname)
+ if self._fname:
+ self._fname = fdt_util.EnsureCompiled(self._fname)
def GetSubNodes(self, node):
"""Returns a list of sub-nodes of a given node
@@ -153,15 +108,14 @@
Raises:
CmdError: if the node does not exist.
"""
- out = command.Output('fdtget', self.fname, '-l', node)
+ out = command.Output('fdtget', self._fname, '-l', node)
return out.strip().splitlines()
- def GetProps(self, node, convert_dashes=False):
+ def GetProps(self, node):
"""Get all properties from a node
Args:
node: full path to node name to look in
- convert_dashes: True to convert - to _ in node names
Returns:
A dictionary containing all the properties, indexed by node name.
@@ -171,13 +125,11 @@
Raises:
CmdError: if the node does not exist.
"""
- out = command.Output('fdtget', self.fname, node, '-p')
+ out = command.Output('fdtget', self._fname, node, '-p')
props = out.strip().splitlines()
props_dict = {}
for prop in props:
name = prop
- if convert_dashes:
- prop = re.sub('-', '_', prop)
props_dict[prop] = self.GetProp(node, name)
return props_dict
@@ -204,10 +156,26 @@
Raises:
CmdError: if the property does not exist and no default is provided.
"""
- args = [self.fname, node, prop, '-t', 'bx']
+ args = [self._fname, node, prop, '-t', 'bx']
if default is not None:
args += ['-d', str(default)]
if typespec is not None:
args += ['-t%s' % typespec]
out = command.Output('fdtget', *args)
return out.strip()
+
+ @classmethod
+ def Node(self, fdt, offset, name, path):
+ """Create a new node
+
+ This is used by Fdt.Scan() to create a new node using the correct
+ class.
+
+ Args:
+ fdt: Fdt object
+ offset: Offset of node
+ name: Node name
+ path: Full path to node
+ """
+ node = Node(fdt, offset, name, path)
+ return node
diff --git a/tools/dtoc/fdt_normal.py b/tools/dtoc/fdt_normal.py
new file mode 100644
index 0000000..aae258e
--- /dev/null
+++ b/tools/dtoc/fdt_normal.py
@@ -0,0 +1,228 @@
+#!/usr/bin/python
+#
+# Copyright (C) 2016 Google, Inc
+# Written by Simon Glass <sjg@chromium.org>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+import struct
+import sys
+
+import fdt
+from fdt import Fdt, NodeBase, PropBase
+import fdt_util
+import libfdt
+
+# This deals with a device tree, presenting it as a list of Node and Prop
+# objects, representing nodes and properties, respectively.
+#
+# This implementation uses a libfdt Python library to access the device tree,
+# so it is fairly efficient.
+
+def CheckErr(errnum, msg):
+ if errnum:
+ raise ValueError('Error %d: %s: %s' %
+ (errnum, libfdt.fdt_strerror(errnum), msg))
+
+class Prop(PropBase):
+ """A device tree property
+
+ Properties:
+ name: Property name (as per the device tree)
+ value: Property value as a string of bytes, or a list of strings of
+ bytes
+ type: Value type
+ """
+ def __init__(self, node, offset, name, bytes):
+ PropBase.__init__(self, node, offset, name)
+ self.bytes = bytes
+ if not bytes:
+ self.type = fdt.TYPE_BOOL
+ self.value = True
+ return
+ self.type, self.value = self.BytesToValue(bytes)
+
+ def GetOffset(self):
+ """Get the offset of a property
+
+ Returns:
+ The offset of the property (struct fdt_property) within the file
+ """
+ return self._node._fdt.GetStructOffset(self._offset)
+
+class Node(NodeBase):
+ """A device tree node
+
+ Properties:
+ offset: Integer offset in the device tree
+ name: Device tree node tname
+ path: Full path to node, along with the node name itself
+ _fdt: Device tree object
+ subnodes: A list of subnodes for this node, each a Node object
+ props: A dict of properties for this node, each a Prop object.
+ Keyed by property name
+ """
+ def __init__(self, fdt, offset, name, path):
+ NodeBase.__init__(self, fdt, offset, name, path)
+
+ def Offset(self):
+ """Returns the offset of a node, after checking the cache
+
+ This should be used instead of self._offset directly, to ensure that
+ the cache does not contain invalid offsets.
+ """
+ self._fdt.CheckCache()
+ return self._offset
+
+ def Scan(self):
+ """Scan a node's properties and subnodes
+
+ This fills in the props and subnodes properties, recursively
+ searching into subnodes so that the entire tree is built.
+ """
+ self.props = self._fdt.GetProps(self, self.path)
+
+ offset = libfdt.fdt_first_subnode(self._fdt.GetFdt(), self.Offset())
+ while offset >= 0:
+ sep = '' if self.path[-1] == '/' else '/'
+ name = libfdt.Name(self._fdt.GetFdt(), offset)
+ path = self.path + sep + name
+ node = Node(self._fdt, offset, name, path)
+ self.subnodes.append(node)
+
+ node.Scan()
+ offset = libfdt.fdt_next_subnode(self._fdt.GetFdt(), offset)
+
+ def Refresh(self, my_offset):
+ """Fix up the _offset for each node, recursively
+
+ Note: This does not take account of property offsets - these will not
+ be updated.
+ """
+ if self._offset != my_offset:
+ #print '%s: %d -> %d\n' % (self.path, self._offset, my_offset)
+ self._offset = my_offset
+ offset = libfdt.fdt_first_subnode(self._fdt.GetFdt(), self._offset)
+ for subnode in self.subnodes:
+ subnode.Refresh(offset)
+ offset = libfdt.fdt_next_subnode(self._fdt.GetFdt(), offset)
+
+ def DeleteProp(self, prop_name):
+ """Delete a property of a node
+
+ The property is deleted and the offset cache is invalidated.
+
+ Args:
+ prop_name: Name of the property to delete
+ Raises:
+ ValueError if the property does not exist
+ """
+ CheckErr(libfdt.fdt_delprop(self._fdt.GetFdt(), self.Offset(), prop_name),
+ "Node '%s': delete property: '%s'" % (self.path, prop_name))
+ del self.props[prop_name]
+ self._fdt.Invalidate()
+
+class FdtNormal(Fdt):
+ """Provides simple access to a flat device tree blob using libfdt.
+
+ Properties:
+ _fdt: Device tree contents (bytearray)
+ _cached_offsets: True if all the nodes have a valid _offset property,
+ False if something has changed to invalidate the offsets
+ """
+ def __init__(self, fname):
+ Fdt.__init__(self, fname)
+ self._cached_offsets = False
+ if self._fname:
+ self._fname = fdt_util.EnsureCompiled(self._fname)
+
+ with open(self._fname) as fd:
+ self._fdt = bytearray(fd.read())
+
+ def GetFdt(self):
+ """Get the contents of the FDT
+
+ Returns:
+ The FDT contents as a string of bytes
+ """
+ return self._fdt
+
+ def Flush(self):
+ """Flush device tree changes back to the file"""
+ with open(self._fname, 'wb') as fd:
+ fd.write(self._fdt)
+
+ def Pack(self):
+ """Pack the device tree down to its minimum size"""
+ CheckErr(libfdt.fdt_pack(self._fdt), 'pack')
+ fdt_len = libfdt.fdt_totalsize(self._fdt)
+ del self._fdt[fdt_len:]
+
+ def GetProps(self, node, path):
+ """Get all properties from a node.
+
+ Args:
+ node: Full path to node name to look in.
+
+ Returns:
+ A dictionary containing all the properties, indexed by node name.
+ The entries are Prop objects.
+
+ Raises:
+ ValueError: if the node does not exist.
+ """
+ offset = libfdt.fdt_path_offset(self._fdt, path)
+ if offset < 0:
+ libfdt.Raise(offset)
+ props_dict = {}
+ poffset = libfdt.fdt_first_property_offset(self._fdt, offset)
+ while poffset >= 0:
+ dprop, plen = libfdt.fdt_get_property_by_offset(self._fdt, poffset)
+ prop = Prop(node, poffset, libfdt.String(self._fdt, dprop.nameoff),
+ libfdt.Data(dprop))
+ props_dict[prop.name] = prop
+
+ poffset = libfdt.fdt_next_property_offset(self._fdt, poffset)
+ return props_dict
+
+ def Invalidate(self):
+ """Mark our offset cache as invalid"""
+ self._cached_offsets = False
+
+ def CheckCache(self):
+ """Refresh the offset cache if needed"""
+ if self._cached_offsets:
+ return
+ self.Refresh()
+ self._cached_offsets = True
+
+ def Refresh(self):
+ """Refresh the offset cache"""
+ self._root.Refresh(0)
+
+ def GetStructOffset(self, offset):
+ """Get the file offset of a given struct offset
+
+ Args:
+ offset: Offset within the 'struct' region of the device tree
+ Returns:
+ Position of @offset within the device tree binary
+ """
+ return libfdt.fdt_off_dt_struct(self._fdt) + offset
+
+ @classmethod
+ def Node(self, fdt, offset, name, path):
+ """Create a new node
+
+ This is used by Fdt.Scan() to create a new node using the correct
+ class.
+
+ Args:
+ fdt: Fdt object
+ offset: Offset of node
+ name: Node name
+ path: Full path to node
+ """
+ node = Node(fdt, offset, name, path)
+ return node
diff --git a/tools/dtoc/fdt_select.py b/tools/dtoc/fdt_select.py
new file mode 100644
index 0000000..18a36d8
--- /dev/null
+++ b/tools/dtoc/fdt_select.py
@@ -0,0 +1,26 @@
+#!/usr/bin/python
+#
+# Copyright (C) 2016 Google, Inc
+# Written by Simon Glass <sjg@chromium.org>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+# Bring in either the normal fdt library (which relies on libfdt) or the
+# fallback one (which uses fdtget and is slower). Both provide the same
+# interface for this file to use.
+try:
+ import fdt_normal
+ have_libfdt = True
+except ImportError:
+ have_libfdt = False
+ import fdt_fallback
+
+def FdtScan(fname):
+ """Returns a new Fdt object from the implementation we are using"""
+ if have_libfdt:
+ dtb = fdt_normal.FdtNormal(fname)
+ else:
+ dtb = fdt_fallback.FdtFallback(fname)
+ dtb.Scan()
+ return dtb
diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py
index 929b524..3a10838 100644
--- a/tools/dtoc/fdt_util.py
+++ b/tools/dtoc/fdt_util.py
@@ -6,81 +6,81 @@
# SPDX-License-Identifier: GPL-2.0+
#
+import os
import struct
+import tempfile
-# A list of types we support
-(TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL) = range(4)
+import command
+import tools
-def BytesToValue(bytes):
- """Converts a string of bytes into a type and value
+def fdt32_to_cpu(val):
+ """Convert a device tree cell to an integer
Args:
- A string containing bytes
+ Value to convert (4-character string representing the cell value)
Return:
- A tuple:
- Type of data
- Data, either a single element or a list of elements. Each element
- is one of:
- TYPE_STRING: string value from the property
- TYPE_INT: a byte-swapped integer stored as a 4-byte string
- TYPE_BYTE: a byte stored as a single-byte string
+ A native-endian integer value
"""
- size = len(bytes)
- strings = bytes.split('\0')
- is_string = True
- count = len(strings) - 1
- if count > 0 and not strings[-1]:
- for string in strings[:-1]:
- if not string:
- is_string = False
- break
- for ch in string:
- if ch < ' ' or ch > '~':
- is_string = False
- break
- else:
- is_string = False
- if is_string:
- if count == 1:
- return TYPE_STRING, strings[0]
- else:
- return TYPE_STRING, strings[:-1]
- if size % 4:
- if size == 1:
- return TYPE_BYTE, bytes[0]
- else:
- return TYPE_BYTE, list(bytes)
- val = []
- for i in range(0, size, 4):
- val.append(bytes[i:i + 4])
- if size == 4:
- return TYPE_INT, val[0]
- else:
- return TYPE_INT, val
+ return struct.unpack('>I', val)[0]
-def GetEmpty(type):
- """Get an empty / zero value of the given type
+def EnsureCompiled(fname):
+ """Compile an fdt .dts source file into a .dtb binary blob if needed.
+
+ Args:
+ fname: Filename (if .dts it will be compiled). It not it will be
+ left alone
Returns:
- A single value of the given type
+ Filename of resulting .dtb file
"""
- if type == TYPE_BYTE:
- return chr(0)
- elif type == TYPE_INT:
- return struct.pack('<I', 0);
- elif type == TYPE_STRING:
- return ''
- else:
- return True
+ _, ext = os.path.splitext(fname)
+ if ext != '.dts':
+ return fname
-def fdt32_to_cpu(val):
- """Convert a device tree cell to an integer
+ dts_input = tools.GetOutputFilename('source.dts')
+ dtb_output = tools.GetOutputFilename('source.dtb')
- Args:
- Value to convert (4-character string representing the cell value)
+ search_paths = [os.path.join(os.getcwd(), 'include')]
+ root, _ = os.path.splitext(fname)
+ args = ['-E', '-P', '-x', 'assembler-with-cpp', '-D__ASSEMBLY__']
+ args += ['-Ulinux']
+ for path in search_paths:
+ args.extend(['-I', path])
+ args += ['-o', dts_input, fname]
+ command.Run('cc', *args)
- Return:
- A native-endian integer value
- """
- return struct.unpack(">I", val)[0]
+ # If we don't have a directory, put it in the tools tempdir
+ search_list = []
+ for path in search_paths:
+ search_list.extend(['-i', path])
+ args = ['-I', 'dts', '-o', dtb_output, '-O', 'dtb']
+ args.extend(search_list)
+ args.append(dts_input)
+ command.Run('dtc', *args)
+ return dtb_output
+
+def GetInt(node, propname, default=None):
+ prop = node.props.get(propname)
+ if not prop:
+ return default
+ value = fdt32_to_cpu(prop.value)
+ if type(value) == type(list):
+ raise ValueError("Node '%s' property '%' has list value: expecting"
+ "a single integer" % (node.name, propname))
+ return value
+
+def GetString(node, propname, default=None):
+ prop = node.props.get(propname)
+ if not prop:
+ return default
+ value = prop.value
+ if type(value) == type(list):
+ raise ValueError("Node '%s' property '%' has list value: expecting"
+ "a single string" % (node.name, propname))
+ return value
+
+def GetBool(node, propname, default=False):
+ if propname in node.props:
+ return True
+ return default
diff --git a/tools/moveconfig.py b/tools/moveconfig.py
index 5576b57..87e2bb2 100755
--- a/tools/moveconfig.py
+++ b/tools/moveconfig.py
@@ -122,6 +122,10 @@
Surround each portion of the log with escape sequences to display it
in color on the terminal.
+ -C, --commit
+ Create a git commit with the changes when the operation is complete. A
+ standard commit message is used which may need to be edited.
+
-d, --defconfigs
Specify a file containing a list of defconfigs to move
@@ -162,6 +166,10 @@
-v, --verbose
Show any build errors as boards are built
+ -y, --yes
+ Instead of prompting, automatically go ahead with all operations. This
+ includes cleaning up headers and CONFIG_SYS_EXTRA_OPTIONS.
+
To see the complete list of supported options, run
$ tools/moveconfig.py -h
@@ -481,14 +489,15 @@
configs: A list of CONFIGs to remove.
options: option flags.
"""
- while True:
- choice = raw_input('Clean up headers? [y/n]: ').lower()
- print choice
- if choice == 'y' or choice == 'n':
- break
+ if not options.yes:
+ while True:
+ choice = raw_input('Clean up headers? [y/n]: ').lower()
+ print choice
+ if choice == 'y' or choice == 'n':
+ break
- if choice == 'n':
- return
+ if choice == 'n':
+ return
patterns = []
for config in configs:
@@ -560,14 +569,16 @@
configs: A list of CONFIGs to remove.
options: option flags.
"""
- while True:
- choice = raw_input('Clean up CONFIG_SYS_EXTRA_OPTIONS? [y/n]: ').lower()
- print choice
- if choice == 'y' or choice == 'n':
- break
+ if not options.yes:
+ while True:
+ choice = (raw_input('Clean up CONFIG_SYS_EXTRA_OPTIONS? [y/n]: ').
+ lower())
+ print choice
+ if choice == 'y' or choice == 'n':
+ break
- if choice == 'n':
- return
+ if choice == 'n':
+ return
configs = [ config[len('CONFIG_'):] for config in configs ]
@@ -1233,6 +1244,8 @@
# Add options here
parser.add_option('-c', '--color', action='store_true', default=False,
help='display the log in color')
+ parser.add_option('-C', '--commit', action='store_true', default=False,
+ help='Create a git commit for the operation')
parser.add_option('-d', '--defconfigs', type='string',
help='a file containing a list of defconfigs to move')
parser.add_option('-n', '--dry-run', action='store_true', default=False,
@@ -1251,6 +1264,8 @@
help='the number of jobs to run simultaneously')
parser.add_option('-r', '--git-ref', type='string',
help='the git ref to clone for building the autoconf.mk')
+ parser.add_option('-y', '--yes', action='store_true', default=False,
+ help="respond 'yes' to any prompts")
parser.add_option('-v', '--verbose', action='store_true', default=False,
help='show any build errors as boards are built')
parser.usage += ' CONFIG ...'
@@ -1276,5 +1291,17 @@
cleanup_headers(configs, options)
cleanup_extra_options(configs, options)
+ if options.commit:
+ subprocess.call(['git', 'add', '-u'])
+ if configs:
+ msg = 'Convert %s %sto Kconfig' % (configs[0],
+ 'et al ' if len(configs) > 1 else '')
+ msg += ('\n\nThis converts the following to Kconfig:\n %s\n' %
+ '\n '.join(configs))
+ else:
+ msg = 'configs: Resync with savedefconfig'
+ msg += '\n\nRsync all defconfig files using moveconfig.py'
+ subprocess.call(['git', 'commit', '-s', '-m', msg])
+
if __name__ == '__main__':
main()
diff --git a/tools/patman/checkpatch.py b/tools/patman/checkpatch.py
index 34a3bd2..3eef6de 100644
--- a/tools/patman/checkpatch.py
+++ b/tools/patman/checkpatch.py
@@ -63,7 +63,8 @@
result.problems = []
chk = FindCheckPatch()
item = {}
- result.stdout = command.Output(chk, '--no-tree', fname)
+ result.stdout = command.Output(chk, '--no-tree', fname,
+ raise_on_error=False)
#pipe = subprocess.Popen(cmd, stdout=subprocess.PIPE)
#stdout, stderr = pipe.communicate()
diff --git a/tools/patman/command.py b/tools/patman/command.py
index d586f11..d1f0ca5 100644
--- a/tools/patman/command.py
+++ b/tools/patman/command.py
@@ -104,8 +104,9 @@
raise Exception("Error running '%s'" % user_pipestr)
return result
-def Output(*cmd):
- return RunPipe([cmd], capture=True, raise_on_error=False).stdout
+def Output(*cmd, **kwargs):
+ raise_on_error = kwargs.get('raise_on_error', True)
+ return RunPipe([cmd], capture=True, raise_on_error=raise_on_error).stdout
def OutputOneLine(*cmd, **kwargs):
raise_on_error = kwargs.pop('raise_on_error', True)
diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py
index e088bae..bb7c9e0 100644
--- a/tools/patman/gitutil.py
+++ b/tools/patman/gitutil.py
@@ -391,7 +391,8 @@
"""
to = BuildEmailList(series.get('to'), '--to', alias, raise_on_error)
if not to:
- git_config_to = command.Output('git', 'config', 'sendemail.to')
+ git_config_to = command.Output('git', 'config', 'sendemail.to',
+ raise_on_error=False)
if not git_config_to:
print ("No recipient.\n"
"Please add something like this to a commit\n"
diff --git a/tools/patman/tools.py b/tools/patman/tools.py
new file mode 100644
index 0000000..ba24853
--- /dev/null
+++ b/tools/patman/tools.py
@@ -0,0 +1,120 @@
+#
+# Copyright (c) 2016 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+import os
+import shutil
+import tempfile
+
+import tout
+
+outdir = None
+indirs = None
+preserve_outdir = False
+
+def PrepareOutputDir(dirname, preserve=False):
+ """Select an output directory, ensuring it exists.
+
+ This either creates a temporary directory or checks that the one supplied
+ by the user is valid. For a temporary directory, it makes a note to
+ remove it later if required.
+
+ Args:
+ dirname: a string, name of the output directory to use to store
+ intermediate and output files. If is None - create a temporary
+ directory.
+ preserve: a Boolean. If outdir above is None and preserve is False, the
+ created temporary directory will be destroyed on exit.
+
+ Raises:
+ OSError: If it cannot create the output directory.
+ """
+ global outdir, preserve_outdir
+
+ preserve_outdir = dirname or preserve
+ if dirname:
+ outdir = dirname
+ if not os.path.isdir(outdir):
+ try:
+ os.makedirs(outdir)
+ except OSError as err:
+ raise CmdError("Cannot make output directory '%s': '%s'" %
+ (outdir, err.strerror))
+ tout.Debug("Using output directory '%s'" % outdir)
+ else:
+ outdir = tempfile.mkdtemp(prefix='binman.')
+ tout.Debug("Using temporary directory '%s'" % outdir)
+
+def _RemoveOutputDir():
+ global outdir
+
+ shutil.rmtree(outdir)
+ tout.Debug("Deleted temporary directory '%s'" % outdir)
+ outdir = None
+
+def FinaliseOutputDir():
+ global outdir, preserve_outdir
+
+ """Tidy up: delete output directory if temporary and not preserved."""
+ if outdir and not preserve_outdir:
+ _RemoveOutputDir()
+
+def GetOutputFilename(fname):
+ """Return a filename within the output directory.
+
+ Args:
+ fname: Filename to use for new file
+
+ Returns:
+ The full path of the filename, within the output directory
+ """
+ return os.path.join(outdir, fname)
+
+def _FinaliseForTest():
+ """Remove the output directory (for use by tests)"""
+ global outdir
+
+ if outdir:
+ _RemoveOutputDir()
+
+def SetInputDirs(dirname):
+ """Add a list of input directories, where input files are kept.
+
+ Args:
+ dirname: a list of paths to input directories to use for obtaining
+ files needed by binman to place in the image.
+ """
+ global indir
+
+ indir = dirname
+ tout.Debug("Using input directories %s" % indir)
+
+def GetInputFilename(fname):
+ """Return a filename for use as input.
+
+ Args:
+ fname: Filename to use for new file
+
+ Returns:
+ The full path of the filename, within the input directory
+ """
+ if not indir:
+ return fname
+ for dirname in indir:
+ pathname = os.path.join(dirname, fname)
+ if os.path.exists(pathname):
+ return pathname
+
+ raise ValueError("Filename '%s' not found in input path (%s)" %
+ (fname, ','.join(indir)))
+
+def Align(pos, align):
+ if align:
+ mask = align - 1
+ pos = (pos + mask) & ~mask
+ return pos
+
+def NotPowerOfTwo(num):
+ return num and (num & (num - 1))
diff --git a/tools/patman/tout.py b/tools/patman/tout.py
new file mode 100644
index 0000000..c5fbd80
--- /dev/null
+++ b/tools/patman/tout.py
@@ -0,0 +1,166 @@
+# Copyright (c) 2016 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Terminal output logging.
+#
+
+import sys
+
+import terminal
+
+# Output verbosity levels that we support
+ERROR = 0
+WARNING = 1
+NOTICE = 2
+INFO = 3
+DEBUG = 4
+
+"""
+This class handles output of progress and other useful information
+to the user. It provides for simple verbosity level control and can
+output nothing but errors at verbosity zero.
+
+The idea is that modules set up an Output object early in their years and pass
+it around to other modules that need it. This keeps the output under control
+of a single class.
+
+Public properties:
+ verbose: Verbosity level: 0=silent, 1=progress, 3=full, 4=debug
+"""
+def __enter__():
+ return
+
+def __exit__(unused1, unused2, unused3):
+ """Clean up and remove any progress message."""
+ ClearProgress()
+ return False
+
+def UserIsPresent():
+ """This returns True if it is likely that a user is present.
+
+ Sometimes we want to prompt the user, but if no one is there then this
+ is a waste of time, and may lock a script which should otherwise fail.
+
+ Returns:
+ True if it thinks the user is there, and False otherwise
+ """
+ return stdout_is_tty and verbose > 0
+
+def ClearProgress():
+ """Clear any active progress message on the terminal."""
+ if verbose > 0 and stdout_is_tty:
+ _stdout.write('\r%s\r' % (" " * len (_progress)))
+ _stdout.flush()
+
+def Progress(msg, warning=False, trailer='...'):
+ """Display progress information.
+
+ Args:
+ msg: Message to display.
+ warning: True if this is a warning."""
+ ClearProgress()
+ if verbose > 0:
+ _progress = msg + trailer
+ if stdout_is_tty:
+ col = _color.YELLOW if warning else _color.GREEN
+ _stdout.write('\r' + _color.Color(col, _progress))
+ _stdout.flush()
+ else:
+ _stdout.write(_progress + '\n')
+
+def _Output(level, msg, color=None):
+ """Output a message to the terminal.
+
+ Args:
+ level: Verbosity level for this message. It will only be displayed if
+ this as high as the currently selected level.
+ msg; Message to display.
+ error: True if this is an error message, else False.
+ """
+ if verbose >= level:
+ ClearProgress()
+ if color:
+ msg = _color.Color(color, msg)
+ _stdout.write(msg + '\n')
+
+def DoOutput(level, msg):
+ """Output a message to the terminal.
+
+ Args:
+ level: Verbosity level for this message. It will only be displayed if
+ this as high as the currently selected level.
+ msg; Message to display.
+ """
+ _Output(level, msg)
+
+def Error(msg):
+ """Display an error message
+
+ Args:
+ msg; Message to display.
+ """
+ _Output(0, msg, _color.RED)
+
+def Warning(msg):
+ """Display a warning message
+
+ Args:
+ msg; Message to display.
+ """
+ _Output(1, msg, _color.YELLOW)
+
+def Notice(msg):
+ """Display an important infomation message
+
+ Args:
+ msg; Message to display.
+ """
+ _Output(2, msg)
+
+def Info(msg):
+ """Display an infomation message
+
+ Args:
+ msg; Message to display.
+ """
+ _Output(3, msg)
+
+def Debug(msg):
+ """Display a debug message
+
+ Args:
+ msg; Message to display.
+ """
+ _Output(4, msg)
+
+def UserOutput(msg):
+ """Display a message regardless of the current output level.
+
+ This is used when the output was specifically requested by the user.
+ Args:
+ msg; Message to display.
+ """
+ _Output(0, msg)
+
+def Init(_verbose=WARNING, stdout=sys.stdout):
+ """Initialize a new output object.
+
+ Args:
+ verbose: Verbosity level (0-4).
+ stdout: File to use for stdout.
+ """
+ global verbose, _progress, _color, _stdout, stdout_is_tty
+
+ verbose = _verbose
+ _progress = '' # Our last progress message
+ _color = terminal.Color()
+ _stdout = stdout
+
+ # TODO(sjg): Move this into Chromite libraries when we have them
+ stdout_is_tty = hasattr(sys.stdout, 'isatty') and sys.stdout.isatty()
+
+def Uninit():
+ ClearProgress()
+
+Init()