nand_spl: remove P1023RDS_NAND support
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h
index 8601eec..ac75b9c 100644
--- a/include/configs/P1023RDS.h
+++ b/include/configs/P1023RDS.h
@@ -14,23 +14,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#ifdef CONFIG_NAND
-#define CONFIG_NAND_U_BOOT
-#define CONFIG_RAMBOOT_NAND
-#endif
-
-#ifdef CONFIG_NAND_U_BOOT
-#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
-#define CONFIG_SYS_TEXT_BASE 0x11001000
-
-#ifdef CONFIG_NAND_SPL
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
-#else
-#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
-#endif /* CONFIG_NAND_SPL */
-#endif
-
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xeff40000
#endif
@@ -162,7 +145,6 @@
#define CONFIG_SYS_BCSR_BASE 0xe0000000 /* start of on board FPGA */
#define CONFIG_SYS_BCSR_BASE_PHYS CONFIG_SYS_BCSR_BASE
-#ifndef CONFIG_NAND
#define CONFIG_SYS_FLASH_BASE 0xee000000 /* start of FLASH 32M */
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
@@ -179,11 +161,8 @@
#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#else
-#define CONFIG_SYS_NO_FLASH
-#endif
-#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND)
+#if defined(CONFIG_SYS_SPL)
#define CONFIG_SYS_RAMBOOT
#endif
@@ -239,17 +218,6 @@
| OR_FCM_TRLX \
| OR_FCM_EHTR)
-#ifdef CONFIG_RAMBOOT_NAND
-/* NAND Base Address */
-#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM
-#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
-/* chip select 1 - BCSR */
-#define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_BCSR_BASE_PHYS) \
- | BR_MS_GPCM | BR_PS_8 | BR_V)
-#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_XACS \
- | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \
- | OR_GPCM_EAD)
-#else
#define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
/* chip select 1 - BCSR */
@@ -258,7 +226,6 @@
#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_XACS \
| OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \
| OR_GPCM_EAD)
-#endif
/* Serial Port
* open - index 2
@@ -381,15 +348,9 @@
#define CONFIG_ENV_OVERWRITE
#if defined(CONFIG_SYS_RAMBOOT)
-#if defined(CONFIG_RAMBOOT_NAND)
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
-#else
#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x4000)
#define CONFIG_ENV_SIZE 0x2000
-#endif
#else
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
@@ -496,15 +457,10 @@
#define CONFIG_PHY_MARVELL
#endif
-#ifndef CONFIG_NAND
/* Default address of microcode for the Linux Fman driver */
/* QE microcode/firmware address */
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
-#else
-#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_FMAN_FW_ADDR 0x1f00000
-#endif
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)