commit 7155ad5ff61fd7165800b63b8d6d556b20befd65
author Chunhe Lan <Chunhe.Lan@freescale.com> Wed May 07 10:50:20 2014 +0800
committer York Sun <yorksun@freescale.com> Fri May 16 16:24:26 2014 -0500
tree f1cf2111f5b0b49ad7ef751db0bd19ca608c8891
parent 11f0c94cc07c59e578c3a9aef70e71c207466b66

fsl/pci: Add workaround for erratum A-005434

By default, all PEX inbound windows PEX_PEXIWARn[TRGT] are
mapped to 0xF, which is local memory. But for BSC9132, 0xF
is CCSR, 0x0 is local memory.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

arch/powerpc/include/asm/config_mpc85xx.h

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 8a7d4d8..e124b07 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -591,6 +591,7 @@
 #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.2"
 #define CONFIG_SYS_FSL_ERRATUM_A005125
+#define CONFIG_SYS_FSL_ERRATUM_A005434
 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 #define CONFIG_SYS_FSL_A004447_SVR_REV	0x11
 #define CONFIG_ESDHC_HC_BLK_ADDR