tree e0c5e9d8f9b45ca6c2dc1d7dead327bc63a040cb
parent dcc8a84036bc57e6158ebf9bce8e9a4bbd496144
author Wenyou Yang <wenyou.yang@atmel.com> 1460364093 +0800
committer Andreas Bießmann <andreas@biessmann.org> 1464070117 +0200

board: sama5d2_xplained: change SDHCI GCK's clock source to UPLL

Change the clock source of the SDHCI's generated clock from PLLA to
UPLL clock to align to Linux driver.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>