commit 6faddbc44469ddf0f9fe467072c42d280253c141
author Hans de Goede <hdegoede@redhat.com> Sat Nov 15 23:18:18 2014 +0100
committer Hans de Goede <hdegoede@redhat.com> Wed Jan 14 14:56:36 2015 +0100
tree 2cf2919c04977bb3e4ede27242d5682f19a99987
parent 07be6d60983ec8b2442f7b7613f36ba87151f988

sun6i: dram: Do not try to initialize a second dram chan on A31s

The A31s only has one dram channel, so do not bother with trying to initialize
a second channel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

arch/arm/cpu/armv7/sunxi/dram_sun6i.c

diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
index 8f567c6..61bb8d4 100644
--- a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
@@ -369,18 +369,26 @@
 		.rows = 16,
 	};
 
+	/* A31s only has one channel */
+	if (sunxi_get_ss_bonding_id() == SUNXI_SS_BOND_ID_A31S)
+		para.chan = 1;
+
 	mctl_sys_init();
 
 	mctl_dll_init(0, &para);
-	mctl_dll_init(1, &para);
+	setbits_le32(&mctl_com->ccr, MCTL_CCR_CH0_CLK_EN);
 
-	setbits_le32(&mctl_com->ccr,
-		     MCTL_CCR_MASTER_CLK_EN |
-		     MCTL_CCR_CH0_CLK_EN |
-		     MCTL_CCR_CH1_CLK_EN);
+	if (para.chan == 2) {
+		mctl_dll_init(1, &para);
+		setbits_le32(&mctl_com->ccr, MCTL_CCR_CH1_CLK_EN);
+	}
+
+	setbits_le32(&mctl_com->ccr, MCTL_CCR_MASTER_CLK_EN);
 
 	mctl_channel_init(0, &para);
-	mctl_channel_init(1, &para);
+	if (para.chan == 2)
+		mctl_channel_init(1, &para);
+
 	mctl_com_init(&para);
 	mctl_port_cfg();