ARM: meson: rename GXBB to GX
Taking into account the Amlogic Family name starts with GX, including
the GXBB, GXL and GXM SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index 89e75fb..1ef7e5a 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <linux/libfdt.h>
#include <linux/err.h>
-#include <asm/arch/gxbb.h>
+#include <asm/arch/gx.h>
#include <asm/arch/sm.h>
#include <asm/armv8/mmu.h>
#include <asm/unaligned.h>
@@ -39,8 +39,8 @@
phys_size_t get_effective_memsize(void)
{
/* Size is reported in MiB, convert it in bytes */
- return ((readl(GXBB_AO_SEC_GP_CFG0) & GXBB_AO_MEM_SIZE_MASK)
- >> GXBB_AO_MEM_SIZE_SHIFT) * SZ_1M;
+ return ((readl(GX_AO_SEC_GP_CFG0) & GX_AO_MEM_SIZE_MASK)
+ >> GX_AO_MEM_SIZE_SHIFT) * SZ_1M;
}
static void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size)
@@ -71,27 +71,27 @@
* - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL
*/
- reg = readl(GXBB_AO_SEC_GP_CFG3);
+ reg = readl(GX_AO_SEC_GP_CFG3);
- bl31_size = ((reg & GXBB_AO_BL31_RSVMEM_SIZE_MASK)
- >> GXBB_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K;
- bl32_size = (reg & GXBB_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K;
+ bl31_size = ((reg & GX_AO_BL31_RSVMEM_SIZE_MASK)
+ >> GX_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K;
+ bl32_size = (reg & GX_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K;
- bl31_start = readl(GXBB_AO_SEC_GP_CFG5);
- bl32_start = readl(GXBB_AO_SEC_GP_CFG4);
+ bl31_start = readl(GX_AO_SEC_GP_CFG5);
+ bl32_start = readl(GX_AO_SEC_GP_CFG4);
/*
- * Early Meson GXBB Firmware revisions did not provide the reserved
+ * Early Meson GX Firmware revisions did not provide the reserved
* memory zones in the registers, keep fixed memory zone handling.
*/
- if (IS_ENABLED(CONFIG_MESON_GXBB) &&
+ if (IS_ENABLED(CONFIG_MESON_GX) &&
!reg && !bl31_start && !bl32_start) {
bl31_start = 0x10000000;
bl31_size = 0x200000;
}
/* Add first 16MiB reserved zone */
- meson_board_add_reserved_memory(fdt, 0, GXBB_FIRMWARE_MEM_SIZE);
+ meson_board_add_reserved_memory(fdt, 0, GX_FIRMWARE_MEM_SIZE);
/* Add BL31 reserved zone */
if (bl31_start && bl31_size)
@@ -107,7 +107,7 @@
psci_system_reset();
}
-static struct mm_region gxbb_mem_map[] = {
+static struct mm_region gx_mem_map[] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
@@ -127,4 +127,4 @@
}
};
-struct mm_region *mem_map = gxbb_mem_map;
+struct mm_region *mem_map = gx_mem_map;
diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
index e340212..061f19a 100644
--- a/arch/arm/mach-meson/eth.c
+++ b/arch/arm/mach-meson/eth.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <dm.h>
#include <asm/io.h>
-#include <asm/arch/gxbb.h>
+#include <asm/arch/gx.h>
#include <asm/arch/eth.h>
#include <phy.h>
@@ -22,23 +22,23 @@
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
/* Set RGMII mode */
- setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
- GXBB_ETH_REG_0_TX_PHASE(1) |
- GXBB_ETH_REG_0_TX_RATIO(4) |
- GXBB_ETH_REG_0_PHY_CLK_EN |
- GXBB_ETH_REG_0_CLK_EN);
+ setbits_le32(GX_ETH_REG_0, GX_ETH_REG_0_PHY_INTF |
+ GX_ETH_REG_0_TX_PHASE(1) |
+ GX_ETH_REG_0_TX_RATIO(4) |
+ GX_ETH_REG_0_PHY_CLK_EN |
+ GX_ETH_REG_0_CLK_EN);
break;
case PHY_INTERFACE_MODE_RMII:
/* Set RMII mode */
- out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
- GXBB_ETH_REG_0_CLK_EN);
+ out_le32(GX_ETH_REG_0, GX_ETH_REG_0_INVERT_RMII_CLK |
+ GX_ETH_REG_0_CLK_EN);
/* Use GXL RMII Internal PHY */
if (IS_ENABLED(CONFIG_MESON_GXL) &&
(flags & MESON_GXL_USE_INTERNAL_RMII_PHY)) {
- writel(0x10110181, GXBB_ETH_REG_2);
- writel(0xe40908ff, GXBB_ETH_REG_3);
+ writel(0x10110181, GX_ETH_REG_2);
+ writel(0xe40908ff, GX_ETH_REG_3);
}
break;
@@ -49,6 +49,6 @@
}
/* Enable power and clock gate */
- setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
- clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+ setbits_le32(GX_GCLK_MPEG_1, GX_GCLK_MPEG_1_ETH);
+ clrbits_le32(GX_MEM_PD_REG_0, GX_MEM_PD_REG_0_ETH_MASK);
}
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
index 9829bae..0bba5e4 100644
--- a/arch/arm/mach-meson/sm.c
+++ b/arch/arm/mach-meson/sm.c
@@ -6,7 +6,7 @@
*/
#include <common.h>
-#include <asm/arch/gxbb.h>
+#include <asm/arch/gx.h>
#include <linux/kernel.h>
#define FN_GET_SHARE_MEM_INPUT_BASE 0x82000020