commit 6e4d4d17f20bc755cf76840c176c3556b8f31a83
author Marek Vasut <marek.vasut@gmail.com> Mon Jan 30 14:00:01 2012 +0000
committer Albert ARIBAUD <albert.u.boot@aribaud.net> Mon Feb 27 21:19:23 2012 +0100
tree 1fd1d32dad8d03335ee2fd94c4691f31a26d3367
parent c37b7f76283af826b2695e10fed2ef68920e06b7

i.MX28: Fix VDDIO and VDDA setup

The DC power STS shouldn't be checked if booting off 5V supply.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Robert Deliën <robert@delien.nl>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>

arch/arm/cpu/arm926ejs/mx28/spl_power_init.c

diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index 380b120..271da8d 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -726,7 +726,9 @@
 			clrsetbits_le32(&power_regs->hw_power_vddioctrl,
 				POWER_VDDIOCTRL_TRG_MASK, diff);
 
-			if (powered_by_linreg)
+			if (powered_by_linreg ||
+				(readl(&power_regs->hw_power_sts) &
+					POWER_STS_VDD5V_GT_VDDIO))
 				early_delay(1500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
@@ -761,7 +763,9 @@
 			clrsetbits_le32(&power_regs->hw_power_vddioctrl,
 				POWER_VDDIOCTRL_TRG_MASK, diff);
 
-			if (powered_by_linreg)
+			if (powered_by_linreg ||
+				(readl(&power_regs->hw_power_sts) &
+					POWER_STS_VDD5V_GT_VDDIO))
 				early_delay(1500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
@@ -819,7 +823,9 @@
 			clrsetbits_le32(&power_regs->hw_power_vdddctrl,
 				POWER_VDDDCTRL_TRG_MASK, diff);
 
-			if (powered_by_linreg)
+			if (powered_by_linreg ||
+				(readl(&power_regs->hw_power_sts) &
+					POWER_STS_VDD5V_GT_VDDIO))
 				early_delay(1500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
@@ -854,7 +860,9 @@
 			clrsetbits_le32(&power_regs->hw_power_vdddctrl,
 					POWER_VDDDCTRL_TRG_MASK, diff);
 
-			if (powered_by_linreg)
+			if (powered_by_linreg ||
+				(readl(&power_regs->hw_power_sts) &
+					POWER_STS_VDD5V_GT_VDDIO))
 				early_delay(1500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &