arm: socfpga: spl: Toggle warm reset config I/O bit
Synchronise the SPL behavior with the original Altera code and
toggle the Warm Reset Config I/O bit accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index fd54ea9..8345975 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -84,8 +84,13 @@
if (scan_mgr_configure_iocsr())
hang();
+ sysmgr_config_warmrstcfgio(0);
+
/* configure the pin muxing through system manager */
+ sysmgr_config_warmrstcfgio(1);
sysmgr_pinmux_init();
+ sysmgr_config_warmrstcfgio(0);
+
#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
/* de-assert reset for peripherals and bridges based on handoff */