diff --git a/board/freescale/ls1012aqds/eth.c b/board/freescale/ls1012aqds/eth.c
index 8189f41..27f69ab 100644
--- a/board/freescale/ls1012aqds/eth.c
+++ b/board/freescale/ls1012aqds/eth.c
@@ -244,7 +244,7 @@
 		bus = miiphy_get_dev_by_name(mdio_name);
 		pfe_set_mdio(1, bus);
 		pfe_set_phy_address_mode(1, CONFIG_PFE_SGMII_2500_PHY2_ADDR,
-					 PHY_INTERFACE_MODE_SGMII_2500);
+					 PHY_INTERFACE_MODE_2500BASEX);
 
 		data8 = QIXIS_READ(brdcfg[12]);
 		data8 |= 0x20;
@@ -263,7 +263,7 @@
 		pfe_set_mdio(0, bus);
 		pfe_set_phy_address_mode(0,
 					 CONFIG_PFE_SGMII_2500_PHY1_ADDR,
-					 PHY_INTERFACE_MODE_SGMII_2500);
+					 PHY_INTERFACE_MODE_2500BASEX);
 	}
 		break;
 
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 33a0910..6e21040 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -265,7 +265,7 @@
 						ETH_1_2_5G_MDIO_MUX);
 				prop_val.phy_mask = cpu_to_fdt32(
 						ETH_2_5G_MDIO_PHY_MASK);
-				prop_val.phy_mode = "sgmii-2500";
+				prop_val.phy_mode = "2500base-x";
 				pfe_set_properties(l_blob, prop_val, ETH_1_PATH,
 						   ETH_1_MDIO);
 			} else {
@@ -277,7 +277,7 @@
 						ETH_2_2_5G_MDIO_MUX);
 				prop_val.phy_mask = cpu_to_fdt32(
 						ETH_2_5G_MDIO_PHY_MASK);
-				prop_val.phy_mode = "sgmii-2500";
+				prop_val.phy_mode = "2500base-x";
 				pfe_set_properties(l_blob, prop_val, ETH_2_PATH,
 						   ETH_2_MDIO);
 			}
diff --git a/board/freescale/ls1012aqds/ls1012aqds_pfe.h b/board/freescale/ls1012aqds/ls1012aqds_pfe.h
index 05ccb71..5ab283c 100644
--- a/board/freescale/ls1012aqds/ls1012aqds_pfe.h
+++ b/board/freescale/ls1012aqds/ls1012aqds_pfe.h
@@ -17,7 +17,7 @@
 #define ETH_1_2_5G_PHY_ID	0x1
 #define ETH_1_2_5G_MDIO_MUX	0x2
 #define ETH_2_5G_MDIO_PHY_MASK	0xFFFFFFF9
-#define ETH_2_5G_PHY_MODE	"sgmii-2500"
+#define ETH_2_5G_PHY_MODE	"2500base-x"
 #define ETH_2_2_5G_BUS_ID	0x1
 #define ETH_2_2_5G_PHY_ID	0x2
 #define ETH_2_2_5G_MDIO_MUX	0x3