arch/arm/dts/socfpga_stratix10_socdk.dts

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2018 Intel Corporation
 */

#include "socfpga_stratix10.dtsi"

/ {
	model = "SoCFPGA Stratix 10 SoCDK";

	aliases {
		ethernet0 = &gmac0;
		i2c0 = &i2c1;
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	leds {
		compatible = "gpio-leds";
		hps0 {
			label = "hps_led0";
			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
		};

		hps1 {
			label = "hps_led1";
			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
		};

		hps2 {
			label = "hps_led2";
			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
		};
	};

	memory {
		#address-cells = <2>;
		#size-cells = <2>;
		device_type = "memory";
		/* 4GB */
		reg = <0 0x00000000 0 0x80000000>,
		      <1 0x80000000 0 0x80000000>;
		bootph-all;
	};
};

&gpio1 {
	status = "okay";
};

&gmac0 {
	status = "okay";
	phy-mode = "rgmii";
	phy-handle = <&phy0>;

	max-frame-size = <3800>;

	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		phy0: ethernet-phy@0 {
			reg = <4>;

			txd0-skew-ps = <0>; /* -420ps */
			txd1-skew-ps = <0>; /* -420ps */
			txd2-skew-ps = <0>; /* -420ps */
			txd3-skew-ps = <0>; /* -420ps */
			rxd0-skew-ps = <420>; /* 0ps */
			rxd1-skew-ps = <420>; /* 0ps */
			rxd2-skew-ps = <420>; /* 0ps */
			rxd3-skew-ps = <420>; /* 0ps */
			txen-skew-ps = <0>; /* -420ps */
			txc-skew-ps = <900>; /* 0ps */
			rxdv-skew-ps = <420>; /* 0ps */
			rxc-skew-ps = <1680>; /* 780ps */
		};
	};
};

&i2c1 {
	status = "okay";
};

&mmc {
	status = "okay";
	cap-sd-highspeed;
	cap-mmc-highspeed;
	broken-cd;
	bus-width = <4>;
	drvsel = <3>;
	smplsel = <2>;
};

&qspi {
	flash0: flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "n25q00a";
		reg = <0>;
		spi-max-frequency = <50000000>;

		m25p,fast-read;
		cdns,page-size = <256>;
		cdns,block-size = <16>;
		cdns,read-delay = <1>;
		cdns,tshsl-ns = <50>;
		cdns,tsd2d-ns = <50>;
		cdns,tchsh-ns = <4>;
		cdns,tslch-ns = <4>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			qspi_boot: partition@0 {
				label = "Boot and fpga data";
				reg = <0x0 0x4000000>;
			};

			qspi_rootfs: partition@4000000 {
				label = "Root Filesystem - JFFS2";
				reg = <0x4000000 0x4000000>;
			};
		};
	};
};

&uart0 {
	status = "okay";
};

&usb0 {
	status = "okay";
};