| commit | 6bb25449ebdfecd28d482570d1d12fc06ba5a570 | [log] [tgz] |
|---|---|---|
| author | Yann Gautier <yann.gautier@foss.st.com> | Tue Sep 13 13:23:44 2022 +0200 |
| committer | Jaehoon Chung <jh80.chung@samsung.com> | Mon Oct 24 18:01:59 2022 +0900 |
| tree | 9e59c53825a634b7e721265f7464613f2d590cd2 | |
| parent | 2cd5da697a9d79475dee7113cbd1a0261cda1d7c [diff] |
mmc: stm32_sdmmc2: add dual data rate support To support dual data rate with STM32 sdmmc2 driver, the dedicated bit (DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass (no divider) is not allowed in this case. This is required for the eMMC DDR modes. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>