diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts
index 46a9239..e542c69 100644
--- a/arch/arm/dts/fsl-lx2160a-rdb.dts
+++ b/arch/arm/dts/fsl-lx2160a-rdb.dts
@@ -16,7 +16,9 @@
 / {
 	model = "NXP Layerscape LX2160ARDB Board";
 	compatible = "fsl,lx2160ardb", "fsl,lx2160a";
-
+	aliases {
+		spi0 = &fspi;
+	};
 };
 
 &esdhc0 {
@@ -28,6 +30,26 @@
 	mmc-hs200-1_8v;
 };
 
+&fspi {
+	status = "okay";
+
+	mt35xu512aba0: flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <50000000>;
+		reg = <0>;
+	};
+
+	mt35xu512aba1: flash@1 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <50000000>;
+		reg = <1>;
+	};
+};
+
 &i2c0 {
 	status = "okay";
 	u-boot,dm-pre-reloc;
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index 9d018ca..42ce437 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -6,6 +6,8 @@
  *
  */
 
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
 / {
 	compatible = "fsl,lx2160a";
 	interrupt-parent = <&gic>;
@@ -49,6 +51,19 @@
 			     <1 10 0x8>; /* Hypervisor PPI, active-low */
 	};
 
+	fspi: flexspi@20c0000 {
+		compatible = "nxp,lx2160a-fspi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x0 0x20c0000 0x0 0x10000>,
+			<0x0 0x20000000 0x0 0x10000000>;
+		reg-names = "fspi_base", "fspi_mmap";
+		clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+		clock-names = "fspi_en", "fspi";
+		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
 	i2c0: i2c@2000000 {
 		compatible = "fsl,vf610-i2c";
 		#address-cells = <1>;