sandbox64: add support for NVMXIP QSPI
enable NVMXIP QSPI for sandbox 64-bit
Adding two NVM XIP QSPI storage devices.
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/doc/develop/driver-model/nvmxip.rst b/doc/develop/driver-model/nvmxip.rst
index 09afdbc..e85dc22 100644
--- a/doc/develop/driver-model/nvmxip.rst
+++ b/doc/develop/driver-model/nvmxip.rst
@@ -56,7 +56,7 @@
Supported hardware
--------------------------------
-Any 64-bit plaform.
+Any plaform supporting readq().
Configuration
----------------------
diff --git a/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
index cc60e9e..882728d 100644
--- a/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+++ b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
@@ -16,7 +16,7 @@
string.
2)
- reg = <0x0 0x08000000 0x0 0x00200000>;
+ reg = /bits/ 64 <0x08000000 0x00200000>;
The start address and size of the flash device. The values give here are an
example (when the cell size is 2).
@@ -43,14 +43,14 @@
nvmxip-qspi1@08000000 {
compatible = "nvmxip,qspi";
- reg = <0x0 0x08000000 0x0 0x00200000>;
+ reg = /bits/ 64 <0x08000000 0x00200000>;
lba_shift = <9>;
lba = <4096>;
};
nvmxip-qspi2@08200000 {
compatible = "nvmxip,qspi";
- reg = <0x0 0x08200000 0x0 0x00100000>;
+ reg = /bits/ 64 <0x08200000 0x00100000>;
lba_shift = <9>;
lba = <2048>;
};