| commit | 6ab07624f627da52dc00d20407d050a5a77276dc | [log] [tgz] |
|---|---|---|
| author | Pratyush Yadav <p.yadav@ti.com> | Sat Jun 26 00:47:10 2021 +0530 |
| committer | Jagan Teki <jagan@amarulasolutions.com> | Mon Jun 28 11:57:46 2021 +0530 |
| tree | 20db2ee21f1220b18fbe7b76189cacacfd5ac663 | |
| parent | e1814ad2565c6be0b347edc78f81a1154b48b1b0 [diff] |
mtd: spi-nor-core: Fix address width on flash chips > 16MB If a flash chip has more than 16MB capacity but its BFPT reports BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3. The check in spi_nor_scan() doesn't catch it because addr_width did get set. This fixes that check. Ported from Kernel commit 324f78dfb442b82365548b657ec4e6974c677502. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>