tree f1a992c8c51bb07e33f245cac0d9625a4dda06a7
parent e66825ac22239003976148d192ba05bf7d89bd1b
author Marek Vasut <marex@denx.de> 1678114427 +0100
committer Stefano Babic <sbabic@denx.de> 1680176823 +0200

net: dwc_eth_qos: Add DM CLK support for i.MX8M Plus

The DWMAC clock in i.MX8M Plus were so far configured via ad-hoc
architecture code. Replace that with DM clock instead. This way,
the driver claims all its required clock, enables and disables
them, and even gets the CSR clock rate and sets the TX clock rate,
without any need of architecture specific register fiddling. Drop
the architecture specific code while at it too.

The adjustment here is modeled after STM32MP15xx clock handling
in this driver.

Signed-off-by: Marek Vasut <marex@denx.de>