net: replace the "xfi" phy-mode with "10gbase-r"

As part of the effort of making U-Boot work with the same device tree as
Linux, there is an issue with the "xfi" phy-mode. To be precise, in
Linux there was a discussion (for those who have time to read:
https://lore.kernel.org/netdev/1576768881-24971-2-git-send-email-madalin.bucur@oss.nxp.com/)

which led to a patch:
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=c114574ebfdf42f826776f717c8056a00fa94881

TL;DR: "xfi" was standardized in Linux as "10gbase-r".

This patch changes the relevant occurrences in U-Boot to use "10gbase-r"
instead of "xfi" wherever applicable.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
diff --git a/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi b/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
index e0a6c04..df39cca 100644
--- a/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
+++ b/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
@@ -9,12 +9,12 @@
 
 &dpmac1 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac2 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac4 {
diff --git a/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi b/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
index 65e95300..99f74c2 100644
--- a/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
+++ b/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
@@ -9,10 +9,10 @@
 
 &dpmac1 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac2 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
diff --git a/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi b/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
index ccbb5de..72297f4 100644
--- a/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
+++ b/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
@@ -9,40 +9,40 @@
 
 &dpmac1 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac2 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac3 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac4 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac5 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac6 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac7 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac8 {
 	status = "okay";
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
diff --git a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts
index 179ed19..9e68c14 100644
--- a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts
+++ b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts
@@ -24,49 +24,49 @@
 &dpmac1 {
 	status = "okay";
 	phy-handle = <&mdio1_phy1>;
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac2 {
 	status = "okay";
 	phy-handle = <&mdio1_phy2>;
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac3 {
 	status = "okay";
 	phy-handle = <&mdio1_phy3>;
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac4 {
 	status = "okay";
 	phy-handle = <&mdio1_phy4>;
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac5 {
 	status = "okay";
 	phy-handle = <&mdio2_phy1>;
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac6 {
 	status = "okay";
 	phy-handle = <&mdio2_phy2>;
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac7 {
 	status = "okay";
 	phy-handle = <&mdio2_phy3>;
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &dpmac8 {
 	status = "okay";
 	phy-handle = <&mdio2_phy4>;
-	phy-connection-type = "xfi";
+	phy-connection-type = "10gbase-r";
 };
 
 &emdio1 {
diff --git a/arch/arm/dts/fsl-sch-30841.dtsi b/arch/arm/dts/fsl-sch-30841.dtsi
index 2f1e63a..3aa7fdd 100644
--- a/arch/arm/dts/fsl-sch-30841.dtsi
+++ b/arch/arm/dts/fsl-sch-30841.dtsi
@@ -9,7 +9,7 @@
  * SCH-30841 is a 4 port add-on card used with various FSL QDS boards.
  * It integrates a AQR412C quad PHY which supports 4 interfaces either muxed
  * together on a single lane or mapped 1:1 to serdes lanes.
- * It supports several protocols - SGMII, SGMII-2500, USXGMII, M-USX, XFI.
+ * It supports several protocols - SGMII, SGMII-2500, USXGMII, M-USX, 10GBase-R.
  * PHY addresses are 0x00 - 0x03.
  * On the card the first port is the bottom port (closest to PEX connector).
  */
diff --git a/arch/arm/dts/fsl-sch-30842.dtsi b/arch/arm/dts/fsl-sch-30842.dtsi
index 6a68b18..b3c0c2b 100644
--- a/arch/arm/dts/fsl-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-sch-30842.dtsi
@@ -8,7 +8,7 @@
 /*
  * SCH-30842 is a single port add-on card used with various FSL QDS boards.
  * It integrates a AQR112 PHY, which supports several protocols - SGMII,
- * SGMII-2500, USXGMII, XFI.
+ * SGMII-2500, USXGMII, 10GBase-R.
  * PHY address is 0x02.
  */
 phy@02 {