global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/mach-at91/arm920t/clock.c b/arch/arm/mach-at91/arm920t/clock.c
index c744027..09ac66d 100644
--- a/arch/arm/mach-at91/arm920t/clock.c
+++ b/arch/arm/mach-at91/arm920t/clock.c
@@ -26,7 +26,7 @@
{
switch (css) {
case AT91_PMC_MCKR_CSS_SLOW:
- return CONFIG_SYS_AT91_SLOW_CLOCK;
+ return CFG_SYS_AT91_SLOW_CLOCK;
case AT91_PMC_MCKR_CSS_MAIN:
return gd->arch.main_clk_rate_hz;
case AT91_PMC_MCKR_CSS_PLLA:
@@ -107,7 +107,7 @@
{
unsigned freq, mckr;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
+#ifndef CFG_SYS_AT91_MAIN_CLOCK
unsigned tmp;
/*
* When the bootloader initialized the main oscillator correctly,
@@ -120,7 +120,7 @@
tmp = readl(&pmc->mcfr);
} while (!(tmp & AT91_PMC_MCFR_MAINRDY));
tmp &= AT91_PMC_MCFR_MAINF_MASK;
- main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
+ main_clock = tmp * (CFG_SYS_AT91_SLOW_CLOCK / 16);
}
#endif
gd->arch.main_clk_rate_hz = main_clock;
diff --git a/arch/arm/mach-at91/arm920t/cpu.c b/arch/arm/mach-at91/arm920t/cpu.c
index 44c079c..9bf03fd 100644
--- a/arch/arm/mach-at91/arm920t/cpu.c
+++ b/arch/arm/mach-at91/arm920t/cpu.c
@@ -16,11 +16,11 @@
#include <asm/arch/hardware.h>
#include <asm/arch/clk.h>
-#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
-#define CONFIG_SYS_AT91_MAIN_CLOCK 0
+#ifndef CFG_SYS_AT91_MAIN_CLOCK
+#define CFG_SYS_AT91_MAIN_CLOCK 0
#endif
int arch_cpu_init(void)
{
- return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
+ return at91_clock_init(CFG_SYS_AT91_MAIN_CLOCK);
}
diff --git a/arch/arm/mach-at91/arm920t/lowlevel_init.S b/arch/arm/mach-at91/arm920t/lowlevel_init.S
index 3b91a0c..6b7d3cb 100644
--- a/arch/arm/mach-at91/arm920t/lowlevel_init.S
+++ b/arch/arm/mach-at91/arm920t/lowlevel_init.S
@@ -94,11 +94,11 @@
.word AT91_ASM_MC_SMC_CSR0
.word CONFIG_SYS_SMC_CSR0_VAL
.word AT91_ASM_PMC_PLLAR
- .word CONFIG_SYS_PLLAR_VAL
+ .word CFG_SYS_PLLAR_VAL
.word AT91_ASM_PMC_PLLBR
.word CONFIG_SYS_PLLBR_VAL
.word AT91_ASM_PMC_MCKR
- .word CONFIG_SYS_MCKR_VAL
+ .word CFG_SYS_MCKR_VAL
SMRDATAE:
/* here there's a delay */
SMRDATA1:
@@ -107,17 +107,17 @@
.word AT91_ASM_PIOC_BSR
.word CONFIG_SYS_PIOC_BSR_VAL
.word AT91_ASM_PIOC_PDR
- .word CONFIG_SYS_PIOC_PDR_VAL
+ .word CFG_SYS_PIOC_PDR_VAL
.word AT91_ASM_MC_EBI_CSA
.word CONFIG_SYS_EBI_CSA_VAL
.word AT91_ASM_MC_SDRAMC_CR
- .word CONFIG_SYS_SDRC_CR_VAL
+ .word CFG_SYS_SDRC_CR_VAL
.word AT91_ASM_MC_SDRAMC_MR
- .word CONFIG_SYS_SDRC_MR_VAL
+ .word CFG_SYS_SDRC_MR_VAL
.word CFG_SYS_SDRAM
.word CFG_SYS_SDRAM_VAL
.word AT91_ASM_MC_SDRAMC_MR
- .word CONFIG_SYS_SDRC_MR_VAL1
+ .word CFG_SYS_SDRC_MR_VAL1
.word CFG_SYS_SDRAM
.word CFG_SYS_SDRAM_VAL
.word CFG_SYS_SDRAM
@@ -135,15 +135,15 @@
.word CFG_SYS_SDRAM
.word CFG_SYS_SDRAM_VAL
.word AT91_ASM_MC_SDRAMC_MR
- .word CONFIG_SYS_SDRC_MR_VAL2
+ .word CFG_SYS_SDRC_MR_VAL2
.word CFG_SYS_SDRAM1
.word CFG_SYS_SDRAM_VAL
.word AT91_ASM_MC_SDRAMC_TR
- .word CONFIG_SYS_SDRC_TR_VAL
+ .word CFG_SYS_SDRC_TR_VAL
.word CFG_SYS_SDRAM
.word CFG_SYS_SDRAM_VAL
.word AT91_ASM_MC_SDRAMC_MR
- .word CONFIG_SYS_SDRC_MR_VAL3
+ .word CFG_SYS_SDRC_MR_VAL3
.word CFG_SYS_SDRAM
.word CFG_SYS_SDRAM_VAL
SMRDATA1E:
diff --git a/arch/arm/mach-at91/arm920t/timer.c b/arch/arm/mach-at91/arm920t/timer.c
index c400e87..8ef5764 100644
--- a/arch/arm/mach-at91/arm920t/timer.c
+++ b/arch/arm/mach-at91/arm920t/timer.c
@@ -27,7 +27,7 @@
DECLARE_GLOBAL_DATA_PTR;
/* the number of clocks per CONFIG_SYS_HZ */
-#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
+#define TIMER_LOAD_VAL (CFG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
int timer_init(void)
{
@@ -92,7 +92,7 @@
u32 endtime;
signed long diff;
- tmo = CONFIG_SYS_HZ_CLOCK / 1000;
+ tmo = CFG_SYS_HZ_CLOCK / 1000;
tmo *= usec;
tmo /= 1000;
diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach-at91/arm926ejs/clock.c
index c68e0c0..013daf4 100644
--- a/arch/arm/mach-at91/arm926ejs/clock.c
+++ b/arch/arm/mach-at91/arm926ejs/clock.c
@@ -26,7 +26,7 @@
{
switch (css) {
case AT91_PMC_MCKR_CSS_SLOW:
- return CONFIG_SYS_AT91_SLOW_CLOCK;
+ return CFG_SYS_AT91_SLOW_CLOCK;
case AT91_PMC_MCKR_CSS_MAIN:
return gd->arch.main_clk_rate_hz;
case AT91_PMC_MCKR_CSS_PLLA:
@@ -115,7 +115,7 @@
{
unsigned freq, mckr;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
+#ifndef CFG_SYS_AT91_MAIN_CLOCK
unsigned tmp;
/*
* When the bootloader initialized the main oscillator correctly,
@@ -128,7 +128,7 @@
tmp = readl(&pmc->mcfr);
} while (!(tmp & AT91_PMC_MCFR_MAINRDY));
tmp &= AT91_PMC_MCFR_MAINF_MASK;
- main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
+ main_clock = tmp * (CFG_SYS_AT91_SLOW_CLOCK / 16);
}
#endif
gd->arch.main_clk_rate_hz = main_clock;
diff --git a/arch/arm/mach-at91/arm926ejs/cpu.c b/arch/arm/mach-at91/arm926ejs/cpu.c
index 761edb6..5e84b0a 100644
--- a/arch/arm/mach-at91/arm926ejs/cpu.c
+++ b/arch/arm/mach-at91/arm926ejs/cpu.c
@@ -15,13 +15,13 @@
#include <asm/arch/at91_gpbr.h>
#include <asm/arch/clk.h>
-#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
-#define CONFIG_SYS_AT91_MAIN_CLOCK 0
+#ifndef CFG_SYS_AT91_MAIN_CLOCK
+#define CFG_SYS_AT91_MAIN_CLOCK 0
#endif
int arch_cpu_init(void)
{
- return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
+ return at91_clock_init(CFG_SYS_AT91_MAIN_CLOCK);
}
void arch_preboot_os(void)
diff --git a/arch/arm/mach-at91/arm926ejs/lowlevel_init.S b/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
index ecfe589..e159a74 100644
--- a/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
+++ b/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
@@ -21,8 +21,8 @@
#ifdef CONFIG_ATMEL_LEGACY
#include <asm/arch/at91sam9_matrix.h>
#endif
-#ifndef CONFIG_SYS_MATRIX_EBICSA_VAL
-#define CONFIG_SYS_MATRIX_EBICSA_VAL CONFIG_SYS_MATRIX_EBI0CSA_VAL
+#ifndef CFG_SYS_MATRIX_EBICSA_VAL
+#define CFG_SYS_MATRIX_EBICSA_VAL CFG_SYS_MATRIX_EBI0CSA_VAL
#endif
.globl lowlevel_init
@@ -67,7 +67,7 @@
ldr r1, =(AT91_ASM_PMC_MOR)
ldr r2, =(AT91_ASM_PMC_SR)
/* Main oscillator Enable register PMC_MOR: */
- ldr r0, =CONFIG_SYS_MOR_VAL
+ ldr r0, =CFG_SYS_MOR_VAL
str r0, [r1]
/* Reading the PMC Status to detect when the Main Oscillator is enabled */
@@ -85,7 +85,7 @@
* ----------------------------------------------------------------------------
*/
ldr r1, =(AT91_ASM_PMC_PLLAR)
- ldr r0, =CONFIG_SYS_PLLAR_VAL
+ ldr r0, =CFG_SYS_PLLAR_VAL
str r0, [r1]
/* Reading the PMC Status register to detect when the PLLA is locked */
@@ -105,7 +105,7 @@
ldr r1, =(AT91_ASM_PMC_MCKR)
/* -Master Clock Controller register PMC_MCKR */
- ldr r0, =CONFIG_SYS_MCKR1_VAL
+ ldr r0, =CFG_SYS_MCKR1_VAL
str r0, [r1]
/* Reading the PMC Status to detect when the Master clock is ready */
@@ -116,7 +116,7 @@
cmp r3, #AT91_PMC_IXR_MCKRDY
bne MCKRDY_Loop
- ldr r0, =CONFIG_SYS_MCKR2_VAL
+ ldr r0, =CFG_SYS_MCKR2_VAL
str r0, [r1]
/* Reading the PMC Status to detect when the Master clock is ready */
@@ -158,53 +158,53 @@
SMRDATA:
.word AT91_ASM_WDT_MR
- .word CONFIG_SYS_WDTC_WDMR_VAL
+ .word CFG_SYS_WDTC_WDMR_VAL
/* configure PIOx as EBI0 D[16-31] */
#if defined(CONFIG_AT91SAM9263)
.word AT91_ASM_PIOD_PDR
- .word CONFIG_SYS_PIOD_PDR_VAL1
+ .word CFG_SYS_PIOD_PDR_VAL1
.word AT91_ASM_PIOD_PUDR
- .word CONFIG_SYS_PIOD_PPUDR_VAL
+ .word CFG_SYS_PIOD_PPUDR_VAL
.word AT91_ASM_PIOD_ASR
- .word CONFIG_SYS_PIOD_PPUDR_VAL
+ .word CFG_SYS_PIOD_PPUDR_VAL
#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) \
|| defined(CONFIG_AT91SAM9G20)
.word AT91_ASM_PIOC_PDR
- .word CONFIG_SYS_PIOC_PDR_VAL1
+ .word CFG_SYS_PIOC_PDR_VAL1
.word AT91_ASM_PIOC_PUDR
- .word CONFIG_SYS_PIOC_PPUDR_VAL
+ .word CFG_SYS_PIOC_PPUDR_VAL
#endif
.word AT91_ASM_MATRIX_CSA0
- .word CONFIG_SYS_MATRIX_EBICSA_VAL
+ .word CFG_SYS_MATRIX_EBICSA_VAL
/* flash */
.word AT91_ASM_SMC_MODE0
- .word CONFIG_SYS_SMC0_MODE0_VAL
+ .word CFG_SYS_SMC0_MODE0_VAL
.word AT91_ASM_SMC_CYCLE0
- .word CONFIG_SYS_SMC0_CYCLE0_VAL
+ .word CFG_SYS_SMC0_CYCLE0_VAL
.word AT91_ASM_SMC_PULSE0
- .word CONFIG_SYS_SMC0_PULSE0_VAL
+ .word CFG_SYS_SMC0_PULSE0_VAL
.word AT91_ASM_SMC_SETUP0
- .word CONFIG_SYS_SMC0_SETUP0_VAL
+ .word CFG_SYS_SMC0_SETUP0_VAL
SMRDATA1:
.word AT91_ASM_SDRAMC_MR
- .word CONFIG_SYS_SDRC_MR_VAL1
+ .word CFG_SYS_SDRC_MR_VAL1
.word AT91_ASM_SDRAMC_TR
- .word CONFIG_SYS_SDRC_TR_VAL1
+ .word CFG_SYS_SDRC_TR_VAL1
.word AT91_ASM_SDRAMC_CR
- .word CONFIG_SYS_SDRC_CR_VAL
+ .word CFG_SYS_SDRC_CR_VAL
.word AT91_ASM_SDRAMC_MDR
- .word CONFIG_SYS_SDRC_MDR_VAL
+ .word CFG_SYS_SDRC_MDR_VAL
.word AT91_ASM_SDRAMC_MR
- .word CONFIG_SYS_SDRC_MR_VAL2
+ .word CFG_SYS_SDRC_MR_VAL2
.word CFG_SYS_SDRAM_BASE
.word CFG_SYS_SDRAM_VAL1
.word AT91_ASM_SDRAMC_MR
- .word CONFIG_SYS_SDRC_MR_VAL3
+ .word CFG_SYS_SDRC_MR_VAL3
.word CFG_SYS_SDRAM_BASE
.word CFG_SYS_SDRAM_VAL2
.word CFG_SYS_SDRAM_BASE
@@ -222,20 +222,20 @@
.word CFG_SYS_SDRAM_BASE
.word CFG_SYS_SDRAM_VAL9
.word AT91_ASM_SDRAMC_MR
- .word CONFIG_SYS_SDRC_MR_VAL4
+ .word CFG_SYS_SDRC_MR_VAL4
.word CFG_SYS_SDRAM_BASE
.word CFG_SYS_SDRAM_VAL10
.word AT91_ASM_SDRAMC_MR
- .word CONFIG_SYS_SDRC_MR_VAL5
+ .word CFG_SYS_SDRC_MR_VAL5
.word CFG_SYS_SDRAM_BASE
.word CFG_SYS_SDRAM_VAL11
.word AT91_ASM_SDRAMC_TR
- .word CONFIG_SYS_SDRC_TR_VAL2
+ .word CFG_SYS_SDRC_TR_VAL2
.word CFG_SYS_SDRAM_BASE
.word CFG_SYS_SDRAM_VAL12
/* User reset enable*/
.word AT91_ASM_RSTC_MR
- .word CONFIG_SYS_RSTC_RMR_VAL
+ .word CFG_SYS_RSTC_RMR_VAL
#ifdef CONFIG_SYS_MATRIX_MCFG_REMAP
/* MATRIX_MCFG - REMAP all masters */
.word AT91_ASM_MATRIX_MCFG
diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c
index aa6bb6b..6bfa02d 100644
--- a/arch/arm/mach-at91/armv7/clock.c
+++ b/arch/arm/mach-at91/armv7/clock.c
@@ -28,7 +28,7 @@
{
switch (css) {
case AT91_PMC_MCKR_CSS_SLOW:
- return CONFIG_SYS_AT91_SLOW_CLOCK;
+ return CFG_SYS_AT91_SLOW_CLOCK;
case AT91_PMC_MCKR_CSS_MAIN:
return gd->arch.main_clk_rate_hz;
case AT91_PMC_MCKR_CSS_PLLA:
@@ -58,7 +58,7 @@
{
unsigned freq, mckr;
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
+#ifndef CFG_SYS_AT91_MAIN_CLOCK
unsigned tmp;
/*
* When the bootloader initialized the main oscillator correctly,
@@ -71,7 +71,7 @@
tmp = readl(&pmc->mcfr);
} while (!(tmp & AT91_PMC_MCFR_MAINRDY));
tmp &= AT91_PMC_MCFR_MAINF_MASK;
- main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
+ main_clock = tmp * (CFG_SYS_AT91_SLOW_CLOCK / 16);
}
#endif
gd->arch.main_clk_rate_hz = main_clock;
@@ -271,7 +271,7 @@
clk_source = regval & AT91_PMC_PCR_GCKCSS;
switch (clk_source) {
case AT91_PMC_PCR_GCKCSS_SLOW_CLK:
- freq = CONFIG_SYS_AT91_SLOW_CLOCK;
+ freq = CFG_SYS_AT91_SLOW_CLOCK;
break;
case AT91_PMC_PCR_GCKCSS_MAIN_CLK:
freq = gd->arch.main_clk_rate_hz;
diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c
index 9b37534..616621a 100644
--- a/arch/arm/mach-at91/armv7/cpu.c
+++ b/arch/arm/mach-at91/armv7/cpu.c
@@ -18,8 +18,8 @@
#include <asm/arch/at91_gpbr.h>
#include <asm/arch/clk.h>
-#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
-#define CONFIG_SYS_AT91_MAIN_CLOCK 0
+#ifndef CFG_SYS_AT91_MAIN_CLOCK
+#define CFG_SYS_AT91_MAIN_CLOCK 0
#endif
int arch_cpu_init(void)
@@ -27,7 +27,7 @@
#if defined(CONFIG_CLK_CCF)
return 0;
#else
- return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
+ return at91_clock_init(CFG_SYS_AT91_MAIN_CLOCK);
#endif
}
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 2daeb4f..103db26 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -128,7 +128,7 @@
#define ATMEL_BASE_CS7 0x80000000
/* Timer */
-#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
+#define CFG_SYS_TIMER_COUNTER 0xfffffd3c
/*
* Other misc defines
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index d5de8d5..2b252f1 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -112,7 +112,7 @@
#define ATMEL_BASE_CS7 0x80000000
/* Timer */
-#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
+#define CFG_SYS_TIMER_COUNTER 0xfffffd3c
/*
* Other misc defines
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index c9fff93..0aa1862 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -127,7 +127,7 @@
#define ATMEL_BASE_CS7 0x80000000
/* Timer */
-#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
+#define CFG_SYS_TIMER_COUNTER 0xfffffd3c
/*
* Other misc defines
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 5880325..22116f3 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -132,7 +132,7 @@
#define ATMEL_BASE_CS7 0x80000000
/* Timer */
-#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
+#define CFG_SYS_TIMER_COUNTER 0xfffffd3c
/*
* Other misc defines
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 8f9155c..b2c074e 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -112,7 +112,7 @@
#define ATMEL_BASE_CS5 0x60000000 /* Compact Flash Slot 1 */
/* Timer */
-#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
+#define CFG_SYS_TIMER_COUNTER 0xfffffd3c
/*
* Other misc defines
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h
index e3c494c..0efb4a9 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
@@ -162,7 +162,7 @@
#endif
/* Timer */
-#define CONFIG_SYS_TIMER_COUNTER 0xfffffe3c
+#define CFG_SYS_TIMER_COUNTER 0xfffffe3c
/*
* Other misc defines
diff --git a/arch/arm/mach-at91/include/mach/sam9x60.h b/arch/arm/mach-at91/include/mach/sam9x60.h
index c08d19c..47c7c72 100644
--- a/arch/arm/mach-at91/include/mach/sam9x60.h
+++ b/arch/arm/mach-at91/include/mach/sam9x60.h
@@ -140,7 +140,7 @@
#define ATMEL_CPU_NAME get_cpu_name()
/* Timer */
-#define CONFIG_SYS_TIMER_COUNTER 0xfffffe4c
+#define CFG_SYS_TIMER_COUNTER 0xfffffe4c
/*
* Other misc defines
diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h
index 5ff20e9..567cdd3 100644
--- a/arch/arm/mach-at91/include/mach/sama5d2.h
+++ b/arch/arm/mach-at91/include/mach/sama5d2.h
@@ -238,7 +238,7 @@
#define cpu_is_sama5d2 _cpu_is_sama5d2
/* PIT Timer(PIT_PIIR) */
-#define CONFIG_SYS_TIMER_COUNTER 0xf804803c
+#define CFG_SYS_TIMER_COUNTER 0xf804803c
#ifndef __ASSEMBLY__
unsigned int get_chip_id(void);
diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h b/arch/arm/mach-at91/include/mach/sama5d3.h
index 83f18a8..9efcf5f 100644
--- a/arch/arm/mach-at91/include/mach/sama5d3.h
+++ b/arch/arm/mach-at91/include/mach/sama5d3.h
@@ -185,7 +185,7 @@
#define CPU_HAS_PCR
/* Timer */
-#define CONFIG_SYS_TIMER_COUNTER 0xfffffe3c
+#define CFG_SYS_TIMER_COUNTER 0xfffffe3c
/*
* PMECC table in ROM
diff --git a/arch/arm/mach-at91/include/mach/sama5d4.h b/arch/arm/mach-at91/include/mach/sama5d4.h
index e2edb6a..9c80286 100644
--- a/arch/arm/mach-at91/include/mach/sama5d4.h
+++ b/arch/arm/mach-at91/include/mach/sama5d4.h
@@ -217,7 +217,7 @@
(get_extension_chip_id() == ARCH_EXID_SAMA5D44))
/* Timer */
-#define CONFIG_SYS_TIMER_COUNTER 0xfc06863c
+#define CFG_SYS_TIMER_COUNTER 0xfc06863c
/*
* No PMECC Galois table in ROM
diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c
index ea19ec3..dfba9f7 100644
--- a/arch/arm/mach-at91/spl_at91.c
+++ b/arch/arm/mach-at91/spl_at91.c
@@ -101,17 +101,17 @@
at91_pllicpr_init(0x00);
/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
- at91_plla_init(CONFIG_SYS_AT91_PLLA);
+ at91_plla_init(CFG_SYS_AT91_PLLA);
/* PCK = PLLA = 2 * MCK */
- at91_mck_init(CONFIG_SYS_MCKR);
+ at91_mck_init(CFG_SYS_MCKR);
/* Switch MCK on PLLA output */
- at91_mck_init(CONFIG_SYS_MCKR_CSS);
+ at91_mck_init(CFG_SYS_MCKR_CSS);
-#if defined(CONFIG_SYS_AT91_PLLB)
+#if defined(CFG_SYS_AT91_PLLB)
/* Configure PLLB */
- at91_pllb_init(CONFIG_SYS_AT91_PLLB);
+ at91_pllb_init(CFG_SYS_AT91_PLLB);
#endif
/* Enable External Reset */
@@ -120,7 +120,7 @@
/* Initialize matrix */
matrix_init();
- gd->arch.mck_rate_hz = CONFIG_SYS_MASTER_CLOCK;
+ gd->arch.mck_rate_hz = CFG_SYS_MASTER_CLOCK;
/*
* init timer long enough for using in spl.
*/
diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c
index 217ed12..a30c4f6 100644
--- a/arch/arm/mach-at91/spl_atmel.c
+++ b/arch/arm/mach-at91/spl_atmel.c
@@ -124,7 +124,7 @@
/* PMC configuration */
at91_pmc_init();
- at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
+ at91_clock_init(CFG_SYS_AT91_MAIN_CLOCK);
matrix_init();