| commit | 6a5c5ac436c38f21c108f1e0227a575c614652b2 | [log] [tgz] |
|---|---|---|
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | Tue May 24 21:13:57 2016 +0900 |
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | Thu May 26 00:35:26 2016 +0900 |
| tree | da95cd1c624176e51bd12a9b709e968afd89205f | |
| parent | c4a11bc54329483d7372ba56e8589cfa39f1465a [diff] |
ARM: uniphier: disable cache in SPL of PH1-LD20 The Boot ROM has enabled D-cache and MMU setting DDR memory area as Normal Memory in its page table. Disable D-cache and MMU before jumping to U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>