| commit | 5dbddb18d8cf8950c9b76313900615f62d15a3a7 | [log] [tgz] |
|---|---|---|
| author | Peng Fan <peng.fan@nxp.com> | Sun Dec 11 19:24:25 2016 +0800 |
| committer | Stefano Babic <sbabic@denx.de> | Fri Dec 16 11:38:24 2016 +0100 |
| tree | b221f86e0280526edfdd51d34d68f7a0b41aa023 | |
| parent | c203819b4f7baf143e510c1352436316eb39256d [diff] |
imx: mx6: fix mmdc ch0 clk for 6SL >From RM, per_periph2_clk_sel option3 is: "derive clock from 198MHz clock (divided 392MHz PLL2 PFD)." So fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>