tree b21d2134c34a7bfe6bcce532d4872353569ab2eb
parent 4f5561c9ff0321e58d8a493fd7a02398fe243f24
author Paul Burton <paul.burton@imgtec.com> 1474453131 +0100
committer Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 1474463044 +0200

MIPS: If we don't need DDR for cache init, init cache first

On systems where cache initialisation doesn't require zeroed memory (ie.
systems where CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD is not defined)
perform cache initialisation prior to lowlevel_init & DDR
initialisation. This allows for DDR initialisation code to run cached &
thus significantly faster.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>