diff --git a/board/cloudengines/pogo_e02/pogo_e02.c b/board/cloudengines/pogo_e02/pogo_e02.c
index 039fd6e..59e1218 100644
--- a/board/cloudengines/pogo_e02/pogo_e02.c
+++ b/board/cloudengines/pogo_e02/pogo_e02.c
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
+ * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com>
  * Copyright (C) 2012
  * David Purdy <david.c.purdy@gmail.com>
  *
@@ -12,16 +13,21 @@
 #include <common.h>
 #include <init.h>
 #include <log.h>
-#include <miiphy.h>
-#include <net.h>
+#include <netdev.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/global_data.h>
-#include "pogo_e02.h"
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/* GPIO configuration */
+#define POGO_E02_OE_LOW			(~(0))
+#define POGO_E02_OE_HIGH		(~(0))
+#define POGO_E02_OE_VAL_LOW		BIT(29)
+#define POGO_E02_OE_VAL_HIGH		0
+
 int board_early_init_f(void)
 {
 	/*
@@ -64,6 +70,11 @@
 	return 0;
 }
 
+int board_eth_init(struct bd_info *bis)
+{
+	return cpu_eth_init(bis);
+}
+
 int board_init(void)
 {
 	/* Boot parameters address */
@@ -71,37 +82,3 @@
 
 	return 0;
 }
-
-#ifdef CONFIG_RESET_PHY_R
-/* Configure and initialize PHY */
-void reset_phy(void)
-{
-	u16 reg;
-	u16 devadr;
-	char *name = "egiga0";
-
-	if (miiphy_set_current_dev(name))
-		return;
-
-	/* command to read PHY dev address */
-	if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
-		printf("Err..(%s) could not read PHY dev address\n", __func__);
-		return;
-	}
-
-	/*
-	 * Enable RGMII delay on Tx and Rx for CPU port
-	 * Ref: sec 4.7.2 of chip datasheet
-	 */
-	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
-	miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
-	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
-	miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
-	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
-
-	/* reset the phy */
-	miiphy_reset(name, devadr);
-
-	debug("88E1116 Initialized on %s\n", name);
-}
-#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/cloudengines/pogo_e02/pogo_e02.h b/board/cloudengines/pogo_e02/pogo_e02.h
deleted file mode 100644
index c8397b4..0000000
--- a/board/cloudengines/pogo_e02/pogo_e02.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2012
- * David Purdy <david.c.purdy@gmail.com>
- *
- * Based on Kirkwood support:
- * (C) Copyright 2009
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
- */
-
-#ifndef __POGO_E02_H
-#define __POGO_E02_H
-
-/* GPIO configuration */
-#define POGO_E02_OE_LOW				(~(0))
-#define POGO_E02_OE_HIGH			(~(0))
-#define POGO_E02_OE_VAL_LOW			(1 << 29)
-#define POGO_E02_OE_VAL_HIGH			0
-
-/* PHY related */
-#define MV88E1116_LED_FCTRL_REG			10
-#define MV88E1116_CPRSP_CR3_REG			21
-#define MV88E1116_MAC_CTRL_REG			21
-#define MV88E1116_PGADR_REG			22
-#define MV88E1116_RGMII_TXTM_CTRL		(1 << 4)
-#define MV88E1116_RGMII_RXTM_CTRL		(1 << 5)
-
-#endif /* __POGO_E02_H */