| commit | 66f05142553c4fbd5440c3fd106cd0c0c2379945 | [log] [tgz] |
|---|---|---|
| author | York Sun <yorksun@freescale.com> | Wed Feb 29 12:36:51 2012 +0000 |
| committer | Andy Fleming <afleming@freescale.com> | Tue Apr 24 23:58:30 2012 -0500 |
| tree | 5e9b575825060fae4ebefa3193ad5f1124c0fefd | |
| parent | 4a6642292cb37a577d012868ede1e3b4325bb7a9 [diff] |
powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards P1010RDB and p1_pc_rdb_pc has incorrect configuration for CONFIG_DDR_RAW_TIMING. It should be CONFIG_SYS_DDR_RAW_TIMING. Incorrect setting causes DDR failure in case of SPD absent. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>