arm64: zynqmp: Use reset controller framework for asserting/de-asserting reset
This patch modifies the phy_zynqmp.c driver to use reset-controller
framework for asserting/de-asserting reset for High Speed modules.
Also fix documentation and dtsi.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 5d953eb..9516c79 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -786,9 +786,8 @@
status = "disabled";
reg = <0x0 0xfd400000 0x0 0x40000>,
<0x0 0xfd3d0000 0x0 0x1000>,
- <0x0 0xfd1a0000 0x0 0x1000>,
<0x0 0xff5e0000 0x0 0x1000>;
- reg-names = "serdes", "siou", "fpd", "lpd";
+ reg-names = "serdes", "siou", "lpd";
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
resets = <&rst 16>, <&rst 59>, <&rst 60>,