| commit | 66220dab8bbd493d25a25a5dfbdc1c19db28ea25 | [log] [tgz] |
|---|---|---|
| author | Jagan Teki <jagan@amarulasolutions.com> | Wed Feb 27 20:02:05 2019 +0530 |
| committer | Jagan Teki <jagan@amarulasolutions.com> | Mon Mar 04 18:08:56 2019 +0530 |
| tree | 20942c0559785a51f7b9b0c638f52935a942c0ad | |
| parent | 340e5b3269d47cda7d61f3a040b057f27ab15446 [diff] |
spi: sun4i: Poll for rxfifo to be filled up To drain rx fifo the fifo need to poll for how much data has been filled up in rx fifo. To achieve this, the current code is using wait_for_bit logic on control register with exchange burst mode mask, which is not a proper way of waiting for fifo filled up. So, add code for polling rxfifo to be filled up using fifo status register. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>